April 2019 - U-Boot

[U-Boot] [PATCH 1/3 v3] armv8: ls1028a: Add NXP LS1028A SoC support
by Yuantian Tang 22 May '19

22 May '19

Ls1028a Soc is based on Layerscape Chassis Generation 3.2 architecture with features: 2 ARM v8 Cortex-A72 cores, CCI400, SEC, DDR3L/4, LCD, GPU, TSN ENETC, 2 USB 3.0, 2 eSDHC, 2 FlexCAN, 2 SPI, SATA, 8 I2C controllers, 6 LPUARTs, GPIO, SAI, qDMA, eDMA, GIC, TMU etc. Signed-off-by: Sudhanshu Gupta <sudhanshu.gupta(a)nxp.com> Signed-off-by: Rai Harninder <harninder.rai(a)nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat(a)nxp.com> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya(a)nxp.com> Signed-off-by: Tang Yuantian <andy.tang(a)nxp.com> --- v3: -- fix some issues arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 39 ++- arch/arm/cpu/armv8/fsl-layerscape/Makefile | 4 + arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 3 + arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc | 51 ++++ arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c | 73 ++++++ arch/arm/dts/fsl-ls1028a.dtsi | 280 +++++++++++++++++++++ arch/arm/include/asm/arch-fsl-layerscape/config.h | 61 +++++ .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 9 + arch/arm/include/asm/arch-fsl-layerscape/soc.h | 1 + .../asm/arch-fsl-layerscape/stream_id_lsch3.h | 2 +- 10 files changed, 521 insertions(+), 2 deletions(-) create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c create mode 100644 arch/arm/dts/fsl-ls1028a.dtsi diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index f48481f..8ecd095 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -20,6 +20,40 @@ config ARCH_LS1012A select SYS_I2C_MXC_I2C2 imply PANIC_HANG +config ARCH_LS1028A + bool + select ARMV8_SET_SMPEN + select FSL_LSCH3 + select NXP_LSCH3_2 + select SYS_FSL_HAS_CCI400 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES + select SYS_FSL_DDR + select SYS_FSL_DDR_LE + select SYS_FSL_DDR_VER_50 + select SYS_FSL_HAS_DDR3 + select SYS_FSL_HAS_DDR4 + select SYS_FSL_HAS_SEC + select SYS_FSL_SEC_COMPAT_5 + select SYS_FSL_SEC_LE + select FSL_TZASC_1 + select ARCH_EARLY_INIT_R + select BOARD_EARLY_INIT_F + select SYS_I2C_MXC + select SYS_I2C_MXC_I2C1 + select SYS_I2C_MXC_I2C2 + select SYS_I2C_MXC_I2C3 + select SYS_I2C_MXC_I2C4 + select SYS_I2C_MXC_I2C5 + select SYS_I2C_MXC_I2C6 + select SYS_I2C_MXC_I2C7 + select SYS_I2C_MXC_I2C8 + select SYS_FSL_ERRATUM_A009007 + select SYS_FSL_ERRATUM_A008514 if !TFABOOT + select SYS_FSL_ERRATUM_A009663 if !TFABOOT + select SYS_FSL_ERRATUM_A009942 if !TFABOOT + imply PANIC_HANG + config ARCH_LS1043A bool select ARMV8_SET_SMPEN @@ -244,6 +278,7 @@ config FSL_PCIE_COMPAT string "PCIe compatible of Kernel DT" depends on PCIE_LAYERSCAPE default "fsl,ls1012a-pcie" if ARCH_LS1012A + default "fsl,ls1028a-pcie" if ARCH_LS1028A default "fsl,ls1043a-pcie" if ARCH_LS1043A default "fsl,ls1046a-pcie" if ARCH_LS1046A default "fsl,ls2080a-pcie" if ARCH_LS2080A @@ -343,6 +378,7 @@ config SYS_FSL_ERRATUM_A010539 config MAX_CPUS int "Maximum number of CPUs permitted for Layerscape" + default 2 if ARCH_LS1028A default 4 if ARCH_LS1043A default 4 if ARCH_LS1046A default 16 if ARCH_LS2080A @@ -377,7 +413,7 @@ config QSPI_AHB_INIT config SYS_CCI400_OFFSET hex "Offset for CCI400 base" depends on SYS_FSL_HAS_CCI400 - default 0x3090000 if ARCH_LS1088A + default 0x3090000 if ARCH_LS1088A || ARCH_LS1028A default 0x180000 if FSL_LSCH2 help Offset for CCI400 base @@ -446,6 +482,7 @@ config CLUSTER_CLK_FREQ config SYS_FSL_PCLK_DIV int "Platform clock divider" + default 1 if ARCH_LS1028A default 1 if ARCH_LS1043A default 1 if ARCH_LS1046A default 1 if ARCH_LS1088A diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile index e9bc987..a8d3cf9 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile +++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile @@ -48,3 +48,7 @@ endif ifneq ($(CONFIG_ARCH_LS1088A),) obj-$(CONFIG_SYS_HAS_SERDES) += ls1088a_serdes.o endif + +ifneq ($(CONFIG_ARCH_LS1028A),) +obj-$(CONFIG_SYS_HAS_SERDES) += ls1028a_serdes.o +endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 978d46b..c258f2e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -58,6 +58,7 @@ static struct cpu_type cpu_type_list[] = { CPU_TYPE_ENTRY(LS1026A, LS1026A, 2), CPU_TYPE_ENTRY(LS2040A, LS2040A, 4), CPU_TYPE_ENTRY(LS1012A, LS1012A, 1), + CPU_TYPE_ENTRY(LS1028A, LS1028A, 2), CPU_TYPE_ENTRY(LS1088A, LS1088A, 8), CPU_TYPE_ENTRY(LS1084A, LS1084A, 8), CPU_TYPE_ENTRY(LS1048A, LS1048A, 4), @@ -246,11 +247,13 @@ static struct mm_region final_map[] = { PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN }, +#ifdef CONFIG_SYS_PCIE3_PHYS_ADDR { CONFIG_SYS_PCIE3_PHYS_ADDR, CONFIG_SYS_PCIE3_PHYS_ADDR, CONFIG_SYS_PCIE3_PHYS_SIZE, PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN }, +#endif #if defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LX2160A) { CONFIG_SYS_PCIE4_PHYS_ADDR, CONFIG_SYS_PCIE4_PHYS_ADDR, CONFIG_SYS_PCIE4_PHYS_SIZE, diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc index a0e2621..ad55573 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc +++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc @@ -8,6 +8,7 @@ SoC overview 6. LS2088A 7. LS2081A 8. LX2160A + 9. LS1028A LS1043A --------- @@ -328,3 +329,53 @@ LX2160A SoC has 2 more similar SoC personalities 2)LX2080A, few difference w.r.t. LX2160A: a) Eight 64-bit ARM v8 Cortex-A72 CPUs + + +LS1028A +-------- +The QorIQ LS1028A processor integrates two 64-bit Arm Cortex-A72 cores with +a GPU and LCD controller, as well as two TSN-enabled Ethernet controllers and +a TSNenabled 4-port switch. + +The high performance Cortex-A72 cores, performing above 16,000 CoreMarks, +combined with 2.5 Gbit Ethernet, PCI express Gen 3.0, SATA 3.0, USB 3.0 and +Octal/Quad SPI interfaces provide capabilities for a number of industrial and +embedded applications. The device provides excellent integration with the +new Time-Sensitive Networking standard, and enables a number of +TSN applications. + +The LS1028A SoC includes the following function and features: + - Two 64-bit ARM v8 A72 CPUs + - Cache Coherent interconnect (CCI-400) + - One 32-bit DDR3L/DDR4 SDRAM memory controller with ECC + - eDP/Displayport interface + - Graphics processing unit + - One Configurable x4 SerDes + - Ethernet interfaces + - Non-switched: One Ethernet MAC supporting 2.5G, 1G, 100M, 10M, one + ethernet MAC supporting 1G, 100M, 10M. + - Switched: TSN IP to support four 2.5/1G interfaces. + - None of the MACs support MACSEC + - Support for RGMII, SGMII (and 1000Base-KX), SGMII 2.5x, QSGMII + - Support for 10G-SXGMII and 10G-QXGMII. + - Energy efficient Ethernet support (802.3az) + - IEEE 1588 support + - High-speed peripheral interfaces + - Two PCIe 3.0 controllers, one supporting x4 operation + - One serial ATA (SATA 3.0) controller + - Additional peripheral interfaces + - Two high-speed USB 2.0/3.0 controllers with integrated PHY each + supporting host or device modes + - Two Enhanced secure digital host controllers (SD/SDIO/eMMC) + - Two Serial peripheral interface (SPI) controllers + - Eight I2C controllers + - Two UART controllers + - Additional six Industrual UARTs (LPUART). + - One FlexSPI controller + - General Purpose IO (GPIO) + - Two CAN-FD interfaces + - Eight Flextimers with PWM I/O + - Support for hardware virtualization and partitioning enforcement + - Layerscape Trust Architecture + - Service Processor (SP) provides pre-boot initialization and secure-boot + capabilities diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c new file mode 100644 index 0000000..ef598c4 --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c @@ -0,0 +1,73 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +#include <common.h> +#include <asm/arch/fsl_serdes.h> + +struct serdes_config { + u32 protocol; + u8 lanes[SRDS_MAX_LANES]; + u8 rcw_lanes[SRDS_MAX_LANES]; +}; + +static struct serdes_config serdes1_cfg_tbl[] = { + /* SerDes 1 */ + {0xCC5B, {PCIE1, QSGMII_B, PCIE2, PCIE2} }, + {0xEB99, {SGMII1, SGMII1, PCIE2, SATA1} }, + {0xCC99, {SGMII1, SGMII1, PCIE2, PCIE2} }, + {0xBB99, {SGMII1, SGMII1, PCIE2, PCIE1} }, + {0x9999, {SGMII1, SGMII2, SGMII3, SGMII4} }, + {0xEBCC, {PCIE1, PCIE1, PCIE2, SATA1} }, + {0xCCCC, {PCIE1, PCIE1, PCIE2, PCIE2} }, + {0xDDDD, {PCIE1, PCIE1, PCIE1, PCIE1} }, + {} +}; + +static struct serdes_config *serdes_cfg_tbl[] = { + serdes1_cfg_tbl, +}; + +enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane) +{ + struct serdes_config *ptr; + + if (serdes >= ARRAY_SIZE(serdes_cfg_tbl)) + return 0; + + ptr = serdes_cfg_tbl[serdes]; + while (ptr->protocol) { + if (ptr->protocol == cfg) + return ptr->lanes[lane]; + ptr++; + } + + return 0; +} + +int is_serdes_prtcl_valid(int serdes, u32 prtcl) +{ + int i; + struct serdes_config *ptr; + + if (serdes >= ARRAY_SIZE(serdes_cfg_tbl)) + return 0; + + ptr = serdes_cfg_tbl[serdes]; + while (ptr->protocol) { + if (ptr->protocol == prtcl) + break; + ptr++; + } + + if (!ptr->protocol) + return 0; + + for (i = 0; i < SRDS_MAX_LANES; i++) { + if (ptr->lanes[i] != NONE) + return 1; + } + + return 0; +} diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi new file mode 100644 index 0000000..1274d2c --- /dev/null +++ b/arch/arm/dts/fsl-ls1028a.dtsi @@ -0,0 +1,280 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * NXP ls1028a SOC common device tree source + * + * Copyright 2019 NXP + * + */ + +/ { + compatible = "fsl,ls1028a"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + sysclk: sysclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "sysclk"; + }; + + clockgen: clocking@1300000 { + compatible = "fsl,ls1028a-clockgen"; + reg = <0x0 0x1300000 0x0 0xa0000>; + #clock-cells = <2>; + clocks = <&sysclk>; + }; + + memory@01080000 { + device_type = "memory"; + reg = <0x00000000 0x01080000 0 0x80000000>; + /* DRAM space - 1, size : 2 GB DRAM */ + }; + + gic: interrupt-controller@6000000 { + compatible = "arm,gic-v3"; + reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */ + <0x0 0x06040000 0 0x40000>; + #interrupt-cells = <3>; + interrupt-controller; + interrupts = <1 9 0x4>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */ + <1 14 0x8>, /* Physical Non-Secure PPI, active-low */ + <1 11 0x8>, /* Virtual PPI, active-low */ + <1 10 0x8>; /* Hypervisor PPI, active-low */ + }; + + fspi: flexspi@20C0000 { + compatible = "nxp,dn-fspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x20C0000 0x0 0x10000>, + <0x0 0x20000000 0x0 0x10000000>; /*64MB flash*/ + reg-names = "FSPI", "FSPI-memory"; + num-cs = <1>; + status = "disabled"; + }; + + serial0: serial@21c0500 { + device_type = "serial"; + compatible = "fsl,ns16550", "ns16550a"; + reg = <0x0 0x21c0500 0x0 0x100>; + interrupts = <0 32 0x1>; /* edge triggered */ + status = "disabled"; + }; + + serial1: serial@21c0600 { + device_type = "serial"; + compatible = "fsl,ns16550", "ns16550a"; + reg = <0x0 0x21c0600 0x0 0x100>; + interrupts = <0 32 0x1>; /* edge triggered */ + status = "disabled"; + }; + + pcie@3400000 { + compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie"; + reg = <0x00 0x03400000 0x0 0x80000 + 0x00 0x03480000 0x0 0x40000 /* lut registers */ + 0x00 0x034c0000 0x0 0x40000 /* pf controls registers */ + 0x80 0x00000000 0x0 0x20000>; /* configuration space */ + reg-names = "dbi", "lut", "ctrl", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + num-lanes = <4>; + bus-range = <0x0 0xff>; + ranges = <0x81000000 0x0 0x00000000 0x80 0x00020000 0x0 0x00010000 /* downstream I/O */ + 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + }; + + pcie@3500000 { + compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie"; + reg = <0x00 0x03500000 0x0 0x80000 + 0x00 0x03580000 0x0 0x40000 /* lut registers */ + 0x00 0x035c0000 0x0 0x40000 /* pf controls registers */ + 0x88 0x00000000 0x0 0x20000>; /* configuration space */ + reg-names = "dbi", "lut", "ctrl", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + num-lanes = <4>; + bus-range = <0x0 0xff>; + ranges = <0x81000000 0x0 0x00000000 0x88 0x00020000 0x0 0x00010000 /* downstream I/O */ + 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + }; + + i2c0: i2c@2000000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2000000 0x0 0x10000>; + interrupts = <0 34 0x4>; + clock-names = "i2c"; + clocks = <&clockgen 4 0>; + status = "disabled"; + }; + + i2c1: i2c@2010000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2010000 0x0 0x10000>; + interrupts = <0 34 0x4>; + clock-names = "i2c"; + clocks = <&clockgen 4 0>; + status = "disabled"; + }; + + i2c2: i2c@2020000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2020000 0x0 0x10000>; + interrupts = <0 35 0x4>; + clock-names = "i2c"; + clocks = <&clockgen 4 0>; + status = "disabled"; + }; + + i2c3: i2c@2030000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2030000 0x0 0x10000>; + interrupts = <0 35 0x4>; + clock-names = "i2c"; + clocks = <&clockgen 4 0>; + status = "disabled"; + }; + + i2c4: i2c@2040000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2040000 0x0 0x10000>; + interrupts = <0 74 0x4>; + clock-names = "i2c"; + clocks = <&clockgen 4 0>; + status = "disabled"; + }; + + i2c5: i2c@2050000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2050000 0x0 0x10000>; + interrupts = <0 74 0x4>; + clock-names = "i2c"; + clocks = <&clockgen 4 0>; + status = "disabled"; + }; + + i2c6: i2c@2060000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2060000 0x0 0x10000>; + interrupts = <0 75 0x4>; + clock-names = "i2c"; + clocks = <&clockgen 4 0>; + status = "disabled"; + }; + + i2c7: i2c@2070000 { + compatible = "fsl,vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2070000 0x0 0x10000>; + interrupts = <0 75 0x4>; + clock-names = "i2c"; + clocks = <&clockgen 4 0>; + status = "disabled"; + }; + + usb1: usb3@3100000 { + compatible = "fsl,layerscape-dwc3"; + reg = <0x0 0x3100000 0x0 0x10000>; + interrupts = <0 80 0x4>; + dr_mode = "host"; + status = "disabled"; + }; + + usb2: usb3@3110000 { + compatible = "fsl,layerscape-dwc3"; + reg = <0x0 0x3110000 0x0 0x10000>; + interrupts = <0 81 0x4>; + dr_mode = "host"; + status = "disabled"; + }; + + dspi0: dspi@2100000 { + compatible = "fsl,vf610-dspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2100000 0x0 0x10000>; + interrupts = <0 26 0x4>; + clock-names = "dspi"; + clocks = <&clockgen 4 0>; + num-cs = <5>; + litte-endian; + status = "disabled"; + }; + + dspi1: dspi@2110000 { + compatible = "fsl,vf610-dspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2110000 0x0 0x10000>; + interrupts = <0 26 0x4>; + clock-names = "dspi"; + clocks = <&clockgen 4 0>; + num-cs = <5>; + little-endian; + status = "disabled"; + }; + + dspi2: dspi@2120000 { + compatible = "fsl,vf610-dspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2120000 0x0 0x10000>; + interrupts = <0 26 0x4>; + clock-names = "dspi"; + clocks = <&clockgen 4 0>; + num-cs = <5>; + little-endian; + status = "disabled"; + }; + + esdhc0: esdhc@2140000 { + compatible = "fsl,esdhc"; + reg = <0x0 0x2140000 0x0 0x10000>; + interrupts = <0 28 0x4>; + big-endian; + bus-width = <4>; + status = "disabled"; + }; + + esdhc1: esdhc@2150000 { + compatible = "fsl,esdhc"; + reg = <0x0 0x2150000 0x0 0x10000>; + interrupts = <0 63 0x4>; + big-endian; + non-removable; + bus-width = <4>; + status = "disabled"; + }; + + sata: sata@3200000 { + compatible = "fsl,ls1028a-ahci"; + reg = <0x0 0x3200000 0x0 0x10000>; + interrupts = <0 133 4>; + clocks = <&clockgen 4 1>; + status = "disabled"; + }; +}; diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 903d509..eb21c09 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -229,6 +229,67 @@ #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 +#elif defined(CONFIG_ARCH_LS1028A) +#define CONFIG_SYS_FSL_NUM_CC_PLLS 3 +#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 } +#define CONFIG_GICV3 +#define CONFIG_FSL_TZPC_BP147 +#define CONFIG_FSL_TZASC_400 + +/* TZ Protection Controller Definitions */ +#define TZPC_BASE 0x02200000 +#define TZPCR0SIZE_BASE (TZPC_BASE) +#define TZPCDECPROT_0_STAT_BASE (TZPC_BASE + 0x800) +#define TZPCDECPROT_0_SET_BASE (TZPC_BASE + 0x804) +#define TZPCDECPROT_0_CLR_BASE (TZPC_BASE + 0x808) +#define TZPCDECPROT_1_STAT_BASE (TZPC_BASE + 0x80C) +#define TZPCDECPROT_1_SET_BASE (TZPC_BASE + 0x810) +#define TZPCDECPROT_1_CLR_BASE (TZPC_BASE + 0x814) +#define TZPCDECPROT_2_STAT_BASE (TZPC_BASE + 0x818) +#define TZPCDECPROT_2_SET_BASE (TZPC_BASE + 0x81C) +#define TZPCDECPROT_2_CLR_BASE (TZPC_BASE + 0x820) + +#define SRDS_MAX_LANES 4 + +#define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */ +#define SYS_FSL_OCRAM_SPACE_SIZE 0x00200000 /* 2M */ +#define CONFIG_SYS_FSL_OCRAM_SIZE 0x00040000 /* Real size 256K */ + +/* Generic Interrupt Controller Definitions */ +#define GICD_BASE 0x06000000 +#define GICR_BASE 0x06040000 + +/* SMMU Definitions */ +#define SMMU_BASE 0x05000000 /* GR0 Base */ + +/* DDR */ +#define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) +#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE + +#define CONFIG_SYS_FSL_CCSR_GUR_LE +#define CONFIG_SYS_FSL_CCSR_SCFG_LE +#define CONFIG_SYS_FSL_ESDHC_LE +#define CONFIG_SYS_FSL_PEX_LUT_LE + +#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN + +/* SFP */ +#define CONFIG_SYS_FSL_SFP_VER_3_4 +#define CONFIG_SYS_FSL_SFP_LE +#define CONFIG_SYS_FSL_SRK_LE + +/* SEC */ +#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1 + +/* Security Monitor */ +#define CONFIG_SYS_FSL_SEC_MON_LE + +/* Secure Boot */ +#define CONFIG_ESBC_HDR_LS + +/* DCFG - GUR */ +#define CONFIG_SYS_FSL_CCSR_GUR_LE + #elif defined(CONFIG_FSL_LSCH2) #define CONFIG_SYS_FSL_OCRAM_BASE 0x10000000 /* initial RAM */ #define SYS_FSL_OCRAM_SPACE_SIZE 0x00200000 /* 2M space */ diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 9fab88a..dbf3215 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -171,6 +171,9 @@ #define CONFIG_SYS_PCIE1_PHYS_ADDR 0x2000000000ULL #define CONFIG_SYS_PCIE2_PHYS_ADDR 0x2800000000ULL #define CONFIG_SYS_PCIE3_PHYS_ADDR 0x3000000000ULL +#elif CONFIG_ARCH_LS1028A +#define CONFIG_SYS_PCIE1_PHYS_ADDR 0x8000000000ULL +#define CONFIG_SYS_PCIE2_PHYS_ADDR 0x8800000000ULL #else #define CONFIG_SYS_PCIE1_PHYS_ADDR 0x1000000000ULL #define CONFIG_SYS_PCIE2_PHYS_ADDR 0x1200000000ULL @@ -375,6 +378,12 @@ struct ccsr_gur { #define FSL_CHASSIS3_SRDS2_PRTCL_SHIFT FSL_CHASSIS3_RCWSR30_SRDS2_PRTCL_SHIFT #define FSL_CHASSIS3_SRDS1_REGSR 29 #define FSL_CHASSIS3_SRDS2_REGSR 30 +#elif defined(CONFIG_ARCH_LS1028A) +#define FSL_CHASSIS3_RCWSR29_SRDS1_PRTCL_MASK 0xFFFF0000 +#define FSL_CHASSIS3_RCWSR29_SRDS1_PRTCL_SHIFT 16 +#define FSL_CHASSIS3_SRDS1_PRTCL_MASK FSL_CHASSIS3_RCWSR29_SRDS1_PRTCL_MASK +#define FSL_CHASSIS3_SRDS1_PRTCL_SHIFT FSL_CHASSIS3_RCWSR29_SRDS1_PRTCL_SHIFT +#define FSL_CHASSIS3_SRDS1_REGSR 29 #endif #define RCW_SB_EN_REG_INDEX 9 #define RCW_SB_EN_MASK 0x00000400 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 7d95c4e..234440b 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -83,6 +83,7 @@ enum boot_src get_boot_src(void); /* LS1043A/LS1023A 23x23 package silicon has different value of VAR_PER */ #define SVR_LS1043A_P23 0x879202 #define SVR_LS1023A_P23 0x87920A +#define SVR_LS1028A 0x870B00 #define SVR_LS1046A 0x870700 #define SVR_LS1026A 0x870708 #define SVR_LS1048A 0x870320 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h index e017d8b..c53cc57 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h @@ -87,7 +87,7 @@ #define FSL_PEX_STREAM_ID_NUM (0x100) #endif -#if defined(CONFIG_ARCH_LS2080A) +#if defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1028A) #define FSL_PEX_STREAM_ID_END 22 #elif defined(CONFIG_ARCH_LS1088A) #define FSL_PEX_STREAM_ID_END 18 -- 2.7.4

4 12

[U-Boot] [PATCH v4] configs: ls1046: Update mtd-id for QSPI nor in mtdparts variable
by Kuldeep Singh 22 May '19

22 May '19

Update mtd-id for QSPI nor due to change introduced in mtd/spi in linux 5.0 commit 84d043185dbe ("spi: Add a driver for the Freescale/NXP QuadSPI controller") This patch works only for linux kernel version > 5.0. In order to use bootargs for kernel < 5.0, use the following bootargs CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:2m(uboot),14m(free)" CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:2m(uboot),14m(free)" Signed-off-by: Kuldeep Singh <kuldeep.singh(a)nxp.com> --- v4: Update commit message v3: Update commit message v2: Update commit message configs/ls1046aqds_qspi_defconfig | 4 ++-- configs/ls1046aqds_sdcard_qspi_defconfig | 4 ++-- configs/ls1046ardb_emmc_defconfig | 4 ++-- configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 4 ++-- configs/ls1046ardb_qspi_defconfig | 4 ++-- configs/ls1046ardb_qspi_spl_defconfig | 4 ++-- configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 4 ++-- configs/ls1046ardb_sdcard_defconfig | 4 ++-- configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 4 ++-- configs/ls1046ardb_tfa_defconfig | 4 ++-- 10 files changed, 20 insertions(+), 20 deletions(-) diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index 4cc19fe7ac..b7a6da2128 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -10,7 +10,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:2m(uboot),14m(free)" +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:2m(uboot),14m(free)" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_MISC_INIT_R=y CONFIG_CMD_BOOTZ=y @@ -25,7 +25,7 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_MP=y -CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:2m(uboot),14m(free)" +CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:2m(uboot),14m(free)" CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" CONFIG_ENV_IS_IN_SPI_FLASH=y diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index a7620d23ad..3cd7d344c0 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -17,7 +17,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT_QSPI" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:2m(uboot),14m(free)" +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:2m(uboot),14m(free)" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y @@ -39,7 +39,7 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_MP=y -CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:2m(uboot),14m(free)" +CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:2m(uboot),14m(free)" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart" diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 4b45289869..e8e7e13e61 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -17,7 +17,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,EMMC_BOOT" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y @@ -36,7 +36,7 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_MP=y -CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index 27309bfa33..326f83229d 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -12,7 +12,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -23,7 +23,7 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_MP=y -CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_DM=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index d2850480d6..b5ab6ca228 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -11,7 +11,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -22,7 +22,7 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_MP=y -CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_ENV_IS_IN_SPI_FLASH=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index 975cc580bd..4b1d9712f9 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -18,7 +18,7 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y @@ -38,7 +38,7 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_MP=y -CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index 643a52039a..4e6a6727f6 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -17,7 +17,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 @@ -36,7 +36,7 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_MP=y -CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index a7624967cf..b3da79f9bf 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -17,7 +17,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y @@ -35,7 +35,7 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_MP=y -CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index 93efb5c3a9..c50d5f80d2 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -13,7 +13,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -24,7 +24,7 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_MP=y -CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_DM=y diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index c86e182459..da8d7f23ed 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -12,7 +12,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_MISC_INIT_R=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -23,7 +23,7 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_MP=y -CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.quadspi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" +CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb" CONFIG_ENV_IS_IN_MMC=y -- 2.17.1

2 1

[U-Boot] [PATCH] drivers: core: use strcmp when find device by name
by Peng Fan 22 May '19

22 May '19

`if (!strncmp(dev->name, name, strlen(name)))` might find out the wrong device, it might find out `dram_pll_ref_sel`, when name is `dram_pll`. So use strcmp to avoid such issue. Signed-off-by: Peng Fan <peng.fan(a)nxp.com> --- drivers/core/uclass.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c index fc3157de39..e2f35393a9 100644 --- a/drivers/core/uclass.c +++ b/drivers/core/uclass.c @@ -260,7 +260,7 @@ int uclass_find_device_by_name(enum uclass_id id, const char *name, return ret; uclass_foreach_dev(dev, uc) { - if (!strncmp(dev->name, name, strlen(name))) { + if (!strcmp(dev->name, name)) { *devp = dev; return 0; } -- 2.16.4

2 4

[U-Boot] [v2, 0/5] Split fsl_esdhc driver for i.MX
by Y.b. Lu 21 May '19

21 May '19

The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX initially. The later QoriQ series PowerPC processors (which were evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and i.MX series processors were using this driver for their eSDHCs too. For the two series processors, the eSDHCs are becoming more and more different. We should have split it into two drivers, like them (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel. It's ideal to keep common part for reusing. However, it's hard to find out a little which could be reused. The truth is there will be more and more different registers, bits and operatiing processes. Even some code is common now, it may have to be split in the future. So let's just split is as two drivers. Patch #2 just created a fsl_esdhc_imx driver which was a copy of fsl_esdhc driver for i.MX processors. Patch #3 converted i.MX platforms to use fsl_esdhc_imx. Patch #4 and #5 just dropped useless code for the two driver. There are still many cleaning up works needed to be done in the future, because the eSDHC driver is mess for a long time. Since I'm only owner for QorIQ eSDHC driver, I dropped only a little things which I'm sure for fsl_esdhc_imx. Let i.MX eSDHC owner do futhur cleaning up. Yangbo Lu (5): Move CONFIG_FSL_ESDHC to defconfig mmc: split fsl_esdhc driver for i.MX Convert to use fsl_esdhc_imx for i.MX platforms mmc: fsl_esdhc: drop i.MX code mmc: fsl_esdhc_imx: drop useless code arch/arm/cpu/arm1136/mx35/generic.c | 10 +- arch/arm/cpu/arm926ejs/mx25/generic.c | 8 +- arch/arm/cpu/armv7/vf610/generic.c | 10 +- arch/arm/cpu/armv8/s32v234/generic.c | 2 +- arch/arm/include/asm/global_data.h | 2 +- arch/arm/mach-imx/cpu.c | 6 +- arch/arm/mach-imx/mx6/litesom.c | 4 +- arch/arm/mach-imx/mx7/clock.c | 4 +- arch/arm/mach-imx/mx7ulp/clock.c | 2 +- arch/arm/mach-imx/speed.c | 4 +- board/Arcturus/ucp1020/spl.c | 2 +- board/advantech/dms-ba16/dms-ba16.c | 4 +- board/aristainetos/aristainetos-v1.c | 2 +- board/aristainetos/aristainetos-v2.c | 2 +- board/aristainetos/aristainetos.c | 4 +- board/bachmann/ot1200/ot1200.c | 2 +- board/barco/platinum/platinum.c | 2 +- board/barco/titanium/titanium.c | 4 +- board/beckhoff/mx53cx9020/mx53cx9020.c | 4 +- board/boundary/nitrogen6x/nitrogen6x.c | 4 +- board/ccv/xpress/xpress.c | 2 +- board/compulab/cl-som-imx7/cl-som-imx7.c | 6 +- board/compulab/cl-som-imx7/common.c | 6 +- board/compulab/cl-som-imx7/common.h | 8 +- board/compulab/cl-som-imx7/mux.c | 8 +- board/compulab/cl-som-imx7/spl.c | 6 +- board/compulab/cm_fx6/cm_fx6.c | 4 +- board/compulab/cm_fx6/common.c | 4 +- board/compulab/cm_fx6/spl.c | 2 +- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 4 +- board/dhelectronics/dh_imx6/dh_imx6.c | 4 +- board/dhelectronics/dh_imx6/dh_imx6_spl.c | 2 +- board/el/el6x/el6x.c | 4 +- board/embest/mx6boards/mx6boards.c | 4 +- board/freescale/imx8mq_evk/imx8mq_evk.c | 2 +- board/freescale/imx8mq_evk/spl.c | 2 +- board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- board/freescale/m54418twr/m54418twr.c | 2 +- board/freescale/mx25pdk/mx25pdk.c | 6 +- board/freescale/mx35pdk/mx35pdk.c | 4 +- board/freescale/mx51evk/mx51evk.c | 6 +- board/freescale/mx53ard/mx53ard.c | 4 +- board/freescale/mx53evk/mx53evk.c | 4 +- board/freescale/mx53loco/mx53loco.c | 4 +- board/freescale/mx53smd/mx53smd.c | 4 +- board/freescale/mx6qarm2/mx6qarm2.c | 4 +- board/freescale/mx6sabreauto/mx6sabreauto.c | 4 +- board/freescale/mx6sabresd/mx6sabresd.c | 4 +- board/freescale/mx6slevk/mx6slevk.c | 2 +- .../freescale/mx6sxsabreauto/mx6sxsabreauto.c | 2 +- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 +- .../mx6ul_14x14_evk/mx6ul_14x14_evk.c | 4 +- board/freescale/mx6ullevk/mx6ullevk.c | 2 +- board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +- board/freescale/s32v234evb/s32v234evb.c | 4 +- board/freescale/vf610twr/vf610twr.c | 4 +- board/gateworks/gw_ventana/common.c | 6 +- board/gateworks/gw_ventana/gw_ventana.c | 2 +- board/ge/bx50v3/bx50v3.c | 4 +- board/ge/mx53ppd/mx53ppd.c | 4 +- board/grinn/liteboard/board.c | 4 +- board/inversepath/usbarmory/usbarmory.c | 2 +- board/k+p/kp_imx53/kp_imx53.c | 4 +- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 4 +- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 2 +- board/kosagi/novena/novena.c | 4 +- board/kosagi/novena/novena_spl.c | 6 +- board/liebherr/display5/common.c | 2 +- board/liebherr/display5/display5.c | 6 +- board/liebherr/display5/spl.c | 2 +- board/liebherr/mccmon6/mccmon6.c | 2 +- board/liebherr/mccmon6/spl.c | 2 +- board/logicpd/imx6/imx6logic.c | 4 +- board/menlo/m53menlo/m53menlo.c | 4 +- board/phytec/pcl063/pcl063.c | 2 +- board/phytec/pcl063/spl.c | 6 +- board/phytec/pcm052/pcm052.c | 2 +- board/phytec/pcm058/pcm058.c | 2 +- board/phytec/pfla02/pfla02.c | 2 +- board/samtec/vining_2000/vining_2000.c | 2 +- board/seco/common/mx6.c | 2 +- board/seco/mx6quq7/mx6quq7.c | 2 +- board/sks-kinkel/sksimx6/sksimx6.c | 2 +- board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +- board/sysam/stmark2/stmark2.c | 2 +- board/tbs/tbs2910/tbs2910.c | 6 +- board/technexion/pico-imx7d/pico-imx7d.c | 2 +- board/technologic/ts4800/ts4800.c | 6 +- board/toradex/apalis_imx6/apalis_imx6.c | 4 +- .../toradex/colibri-imx6ull/colibri-imx6ull.c | 6 +- board/toradex/colibri_imx6/colibri_imx6.c | 4 +- board/toradex/colibri_imx7/colibri_imx7.c | 2 +- board/toradex/colibri_vf/colibri_vf.c | 4 +- board/tqc/tqma6/tqma6.c | 2 +- board/tqc/tqma6/tqma6_mba6.c | 2 +- board/tqc/tqma6/tqma6_wru4.c | 2 +- board/udoo/neo/neo.c | 2 +- board/udoo/udoo.c | 2 +- board/udoo/udoo_spl.c | 2 +- board/wandboard/spl.c | 2 +- board/wandboard/wandboard.c | 2 +- board/warp/warp.c | 2 +- board/woodburn/woodburn.c | 4 +- configs/apalis_imx6_defconfig | 2 +- configs/apalis_imx6_nospl_com_defconfig | 2 +- configs/apalis_imx6_nospl_it_defconfig | 2 +- configs/aristainetos2_defconfig | 2 +- configs/aristainetos2b_defconfig | 2 +- configs/aristainetos_defconfig | 2 +- configs/bk4r1_defconfig | 2 +- configs/cgtqmx6eval_defconfig | 2 +- configs/cl-som-imx7_defconfig | 2 +- configs/cm_fx6_defconfig | 2 +- configs/colibri-imx6ull_defconfig | 2 +- configs/colibri_imx6_defconfig | 2 +- configs/colibri_imx6_nospl_defconfig | 2 +- configs/colibri_imx7_defconfig | 2 +- configs/colibri_imx7_emmc_defconfig | 2 +- configs/colibri_vf_defconfig | 2 +- configs/dh_imx6_defconfig | 2 +- configs/display5_defconfig | 2 +- configs/display5_factory_defconfig | 2 +- configs/dms-ba16-1g_defconfig | 2 +- configs/dms-ba16_defconfig | 2 +- configs/ge_bx50v3_defconfig | 2 +- configs/gwventana_emmc_defconfig | 2 +- configs/gwventana_gw5904_defconfig | 2 +- configs/gwventana_nand_defconfig | 2 +- configs/imx6dl_icore_nand_defconfig | 2 +- configs/imx6dl_mamoj_defconfig | 2 +- configs/imx6q_icore_nand_defconfig | 2 +- configs/imx6q_logic_defconfig | 2 +- configs/imx6qdl_icore_mipi_defconfig | 2 +- configs/imx6qdl_icore_mmc_defconfig | 2 +- configs/imx6qdl_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_rqs_defconfig | 2 +- configs/imx6ul_geam_mmc_defconfig | 2 +- configs/imx6ul_geam_nand_defconfig | 2 +- configs/imx6ul_isiot_emmc_defconfig | 2 +- configs/imx6ul_isiot_nand_defconfig | 2 +- configs/imx8mq_evk_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/kp_imx53_defconfig | 1 + configs/kp_imx6q_tpc_defconfig | 1 + configs/liteboard_defconfig | 2 +- .../ls1012afrwy_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_qspi_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_tfa_defconfig | 1 + configs/m53menlo_defconfig | 2 +- configs/marsboard_defconfig | 2 +- configs/mccmon6_nor_defconfig | 2 +- configs/mccmon6_sd_defconfig | 2 +- configs/mx25pdk_defconfig | 2 +- configs/mx35pdk_defconfig | 2 +- configs/mx51evk_defconfig | 2 +- configs/mx53ard_defconfig | 2 +- configs/mx53cx9020_defconfig | 2 +- configs/mx53evk_defconfig | 2 +- configs/mx53loco_defconfig | 2 +- configs/mx53ppd_defconfig | 2 +- configs/mx53smd_defconfig | 2 +- configs/mx6cuboxi_defconfig | 2 +- configs/mx6dlarm2_defconfig | 2 +- configs/mx6dlarm2_lpddr2_defconfig | 2 +- configs/mx6qarm2_defconfig | 2 +- configs/mx6qarm2_lpddr2_defconfig | 2 +- configs/mx6qsabrelite_defconfig | 2 +- configs/mx6sabreauto_defconfig | 2 +- configs/mx6sabresd_defconfig | 2 +- configs/mx6slevk_defconfig | 2 +- configs/mx6slevk_spinor_defconfig | 2 +- configs/mx6slevk_spl_defconfig | 2 +- configs/mx6sllevk_defconfig | 2 +- configs/mx6sllevk_plugin_defconfig | 2 +- configs/mx6sxsabreauto_defconfig | 2 +- configs/mx6sxsabresd_defconfig | 2 +- configs/mx6sxsabresd_spl_defconfig | 2 +- configs/mx6ul_14x14_evk_defconfig | 2 +- configs/mx6ul_9x9_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_plugin_defconfig | 2 +- configs/mx7dsabresd_defconfig | 2 +- configs/mx7dsabresd_qspi_defconfig | 2 +- configs/mx7ulp_evk_defconfig | 2 +- configs/mx7ulp_evk_plugin_defconfig | 2 +- configs/nitrogen6dl2g_defconfig | 2 +- configs/nitrogen6dl_defconfig | 2 +- configs/nitrogen6q2g_defconfig | 2 +- configs/nitrogen6q_defconfig | 2 +- configs/nitrogen6s1g_defconfig | 2 +- configs/nitrogen6s_defconfig | 2 +- configs/novena_defconfig | 2 +- configs/opos6uldev_defconfig | 2 +- configs/ot1200_defconfig | 2 +- configs/ot1200_spl_defconfig | 2 +- configs/pcm052_defconfig | 2 +- configs/pcm058_defconfig | 2 +- configs/pfla02_defconfig | 2 +- configs/phycore_pcl063_defconfig | 2 +- configs/pico-hobbit-imx6ul_defconfig | 2 +- configs/pico-hobbit-imx7d_defconfig | 2 +- configs/pico-imx6ul_defconfig | 2 +- configs/pico-imx7d_defconfig | 2 +- configs/pico-pi-imx6ul_defconfig | 2 +- configs/pico-pi-imx7d_defconfig | 2 +- configs/platinum_picon_defconfig | 2 +- configs/platinum_titanium_defconfig | 2 +- configs/riotboard_defconfig | 2 +- configs/riotboard_spl_defconfig | 2 +- configs/s32v234evb_defconfig | 2 +- configs/secomx6quq7_defconfig | 2 +- configs/sksimx6_defconfig | 2 +- configs/tbs2910_defconfig | 2 +- configs/titanium_defconfig | 2 +- configs/tqma6dl_mba6_mmc_defconfig | 2 +- configs/tqma6dl_mba6_spi_defconfig | 2 +- configs/tqma6q_mba6_mmc_defconfig | 2 +- configs/tqma6q_mba6_spi_defconfig | 2 +- configs/tqma6s_mba6_mmc_defconfig | 2 +- configs/tqma6s_mba6_spi_defconfig | 2 +- configs/tqma6s_wru4_mmc_defconfig | 2 +- configs/ts4800_defconfig | 2 +- configs/udoo_defconfig | 2 +- configs/udoo_neo_defconfig | 2 +- configs/usbarmory_defconfig | 2 +- configs/vf610twr_defconfig | 2 +- configs/vf610twr_nand_defconfig | 2 +- configs/vining_2000_defconfig | 2 +- configs/wandboard_defconfig | 2 +- configs/warp7_bl33_defconfig | 2 +- configs/warp7_defconfig | 2 +- configs/warp_defconfig | 2 +- configs/woodburn_defconfig | 2 +- configs/woodburn_sd_defconfig | 2 +- configs/xpress_defconfig | 2 +- configs/xpress_spl_defconfig | 2 +- configs/zc5202_defconfig | 2 +- configs/zc5601_defconfig | 2 +- drivers/mmc/Kconfig | 6 + drivers/mmc/Makefile | 1 + drivers/mmc/fsl_esdhc.c | 576 +----------------- drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} | 101 +-- include/configs/imx8mq_evk.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/kp_imx53.h | 1 - include/configs/kp_imx6q_tpc.h | 1 - include/configs/ls1012afrwy.h | 1 - include/fsl_esdhc.h | 57 -- include/{fsl_esdhc.h => fsl_esdhc_imx.h} | 15 +- 250 files changed, 354 insertions(+), 1037 deletions(-) copy drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} (94%) copy include/{fsl_esdhc.h => fsl_esdhc_imx.h} (97%) -- 2.17.1

2 11

[U-Boot] [PATCH v2 00/19] spi: Convert MPC8XXX to DM
by Jagan Teki 20 May '19

20 May '19

This would be next version mpc8xxx dm conversion. No functional changes in v2 apart from rebase, and this would merge soon. Changes for v2: - rebase on master - patch for SPI MIGRATION status Any inputs? Jagan. Jagan Teki (2): spi: mpc8xxx: Convert to DM dm: MIGRATION: Update migration status for SPI Mario Six (17): spi: mpc8xxx: Use short type names spi: mpc8xxx: Fix comments spi: mpc8xxx: Rename camel-case variables spi: mpc8xxx: Fix space after cast spi: mpc8xxx: Fix function names in strings spi: mpc8xxx: Replace defines with enums spi: mpc8xxx: Use IO accessors spi: mpc8xxx: Simplify if spi: mpc8xxx: Get rid of is_read spi: mpc8xxx: Simplify logic a bit spi: mpc8xxx: Reduce scope of loop variables spi: mpc8xxx: Make code more readable spi: mpc8xxx: Rename variable spi: mpc8xxx: Document LEN setting better spi: mpc8xxx: Re-order transfer setup spi: mpc8xxx: Fix if check spi: mpc8xxx: Use get_timer doc/driver-model/MIGRATION.txt | 6 +- drivers/spi/Kconfig | 10 +- drivers/spi/mpc8xxx_spi.c | 279 ++++++++++++++++++++++----------- 3 files changed, 194 insertions(+), 101 deletions(-) -- 2.18.0.321.gffc6fa0e3

3 27

[U-Boot] [PATCH v3 0/3] Add Beelink GS1 Board
by Clément Péron 20 May '19

20 May '19

This serie introduce the Beelink GS1 board with a patch for the reset on Allwinner H6. The first patch has been submitted but is still not merged. But it's required for this series Thanks to Jagan Teki most of the Beelink GS1 device-tree is taken from the Orange Pi boards. Changes with v2: - Add myself in sunxi MAINTAINERS file - Update with Jagan Teki's rsync patch - Change to complete DTS same as linux - Add linux sha1 to the commit log Changes with v1: - Add bus-width for mmc2 node - Add sha1 in the sync dts commit Clément Péron (2): arm: dts: h6: Add Beelink GS1 initial support arm: sunxi: h6: fix reset using r_wdog Jagan Teki (1): arm64: allwinner: sun50i: Sync H6 dts(i) files from Linux arch/arm/dts/Makefile | 1 + arch/arm/dts/sun50i-h6-beelink-gs1.dts | 260 ++++++++++++ arch/arm/dts/sun50i-h6-orangepi.dtsi | 62 ++- arch/arm/dts/sun50i-h6-pine-h64.dts | 88 +++- arch/arm/dts/sun50i-h6.dtsi | 398 +++++++++++++++++- .../include/asm/arch-sunxi/cpu_sun50i_h6.h | 1 + arch/arm/mach-sunxi/board.c | 9 +- board/sunxi/MAINTAINERS | 6 + configs/beelink_gs1_defconfig | 15 + include/dt-bindings/clock/sun8i-tcon-top.h | 11 + 10 files changed, 828 insertions(+), 23 deletions(-) create mode 100644 arch/arm/dts/sun50i-h6-beelink-gs1.dts create mode 100644 configs/beelink_gs1_defconfig create mode 100644 include/dt-bindings/clock/sun8i-tcon-top.h -- 2.17.1

2 15

[U-Boot] [PATCH 0/5] arm: remove leftover code for dm* SoCs
by Bartosz Golaszewski 20 May '19

20 May '19

From: Bartosz Golaszewski <bgolaszewski(a)baylibre.com> Commit 6761946fb716 ("arm: Remove unmaintained davinci boards") removed support for certain DaVinci platforms. We still want to support the da850 chips though and I'm currently working on converting all remaining drivers to using the driver model (please don't remove it yet :)). This series is the first step: let's remove all leftover dead code. This will make things easier when adding support for driver model to NAND and EMAC drivers. Bartosz Golaszewski (5): net: davinci_emac: drop support for unused PHYs arm: davinci: remove dead code for PHYs used by DaVinci DM* boards nand: davinci: remove dead code for dm644x usb: musb_hcd: remove unnecessary ifdefs for dm* SoCs arm: davinci: remove leftover code for dm* SoCs arch/arm/mach-davinci/Makefile | 1 - arch/arm/mach-davinci/cpu.c | 116 ----- arch/arm/mach-davinci/dm355.c | 29 -- arch/arm/mach-davinci/dm365.c | 19 - arch/arm/mach-davinci/dm365_lowlevel.c | 459 ------------------ arch/arm/mach-davinci/dm644x.c | 80 --- arch/arm/mach-davinci/dm646x.c | 25 - arch/arm/mach-davinci/dp83848.c | 127 ----- arch/arm/mach-davinci/et1011c.c | 41 -- .../mach-davinci/include/mach/davinci_misc.h | 4 +- .../arm/mach-davinci/include/mach/emac_defs.h | 56 --- arch/arm/mach-davinci/include/mach/gpio.h | 14 +- arch/arm/mach-davinci/include/mach/hardware.h | 216 --------- arch/arm/mach-davinci/include/mach/i2c_defs.h | 4 - .../mach-davinci/include/mach/syscfg_defs.h | 49 -- arch/arm/mach-davinci/ksz8873.c | 52 -- arch/arm/mach-davinci/lxt972.c | 112 ----- arch/arm/mach-davinci/misc.c | 5 +- arch/arm/mach-davinci/psc.c | 76 --- arch/arm/mach-davinci/spl.c | 5 - drivers/mtd/nand/raw/davinci_nand.c | 39 -- drivers/net/ti/davinci_emac.c | 55 +-- drivers/usb/musb/musb_hcd.c | 6 - 23 files changed, 9 insertions(+), 1581 deletions(-) delete mode 100644 arch/arm/mach-davinci/dm355.c delete mode 100644 arch/arm/mach-davinci/dm365.c delete mode 100644 arch/arm/mach-davinci/dm365_lowlevel.c delete mode 100644 arch/arm/mach-davinci/dm644x.c delete mode 100644 arch/arm/mach-davinci/dm646x.c delete mode 100644 arch/arm/mach-davinci/dp83848.c delete mode 100644 arch/arm/mach-davinci/et1011c.c delete mode 100644 arch/arm/mach-davinci/include/mach/syscfg_defs.h delete mode 100644 arch/arm/mach-davinci/ksz8873.c delete mode 100644 arch/arm/mach-davinci/lxt972.c -- 2.21.0

5 13

[U-Boot] [PATCH v3 0/7] android: implement A/B boot process
by Igor Opaniuk 20 May '19

20 May '19

This patch series adds support for Android A/B boot process [1]. Main steps of A/B boot process are: - A/B metadata integrity check - looking for the current slot (where the system should be booting from) - getting the name of the current boot partition (boot_a or boot_b) and loading the corresponding Android boot image - getting the name of the current system partition (system_a or system_b) and passing of its full name via kernel command line (like 'root=/dev/mmcblk1p11') - passing current slot via kernel command line (like 'androidboot.slot_suffix=_a') and via A/B metadata (e.g. via misc partition) - A/B metadata processing: setting the boot success flag for current slot, handling the retry counter, etc A/B metadata is organized according to Android reference [2] and stored on 'misc' partition. On the first A/B boot process, when 'misc' partition doesn't contain required data, default A/B metadata will be created and stored in 'misc' partition. In the end of the Android boot, 'update_verifier' and 'update_engine' services are processing the A/B metadata through the Boot Control HAL. To confirm the boot was successful using current slot, "boot success" flag must be set on Android side. To enable Android A/B support in U-Boot: 1. Set the following config options: CONFIG_ANDROID_AB=y CONFIG_CMD_AB_SELECT=y 2. Change the disk layout so that it has sloted boot partitions. E.g. instead of 'boot' and 'system' partitions there should be 'boot_a', 'boot_b', 'system_a' and 'system_b' partitions. To be able to actually test this patch series, the A/B features must be implemented and enabled in Android as well (see [1] for details). Documentation and corresponding test for A/B boot is present here. The last patch in this series integrates A/B boot support on AM57xx based boards (though it's not enabled by default). Future users of A/B boot feature can use it as a reference. This series is a part of previous submission [3] by Alex Deymo. It contains only A/B feature that was stripped out from there with some modifications for using with "bootm" command preferred in upstream. Changes in v3: * Minor fixes in the ab metadata handling (added additional sanity checks). * As Ruslan Trofymenko left Linaro and won't address comments anymore, continue (added my S-b tag) upstreaming patches on my own. Changes in v2: * 'android_ab_select' command is renamed to 'ab_select' command and moved to separate 'Android support commands' menu * For am57xx boards slotted sections (e.g. system_a and system_b) are added to the default sections if CONFIG_CMD_AB_SELECT flag is defined * Returned function error codes are clarified (errno using) * Some types constants and files are renamed * Assertion condition is clarified in test case * 'debug' calls are changed to 'log_debug' * The Guide is clarified by the results of changes [1] https://source.android.com/devices/tech/ota/ab/ab_implement [2] bootable/recovery/bootloader_message/include/bootloader_message/bootloader_message.h [3] https://lists.denx.de/pipermail/u-boot/2017-April/285841.html Ruslan Trofymenko (7): cmd: part: Add 'number' sub-command disk: part: Extend API to get partition info common: Implement A/B metadata cmd: Add 'ab_select' command test/py: Add base test case for A/B updates doc: android: Add simple guide for A/B updates env: am57xx: Implement A/B boot process cmd/Kconfig | 15 +++ cmd/Makefile | 1 + cmd/ab_select.c | 52 ++++++++ cmd/part.c | 16 ++- common/Kconfig | 10 ++ common/Makefile | 1 + common/android_ab.c | 290 ++++++++++++++++++++++++++++++++++++++++++ configs/sandbox_defconfig | 2 + disk/part.c | 68 ++++++++++ doc/README.android-ab | 67 ++++++++++ include/android_ab.h | 34 +++++ include/android_bl_msg.h | 169 ++++++++++++++++++++++++ include/environment/ti/boot.h | 58 ++++++++- include/part.h | 21 +++ test/py/tests/test_ab.py | 74 +++++++++++ 15 files changed, 871 insertions(+), 7 deletions(-) create mode 100644 cmd/ab_select.c create mode 100644 common/android_ab.c create mode 100644 doc/README.android-ab create mode 100644 include/android_ab.h create mode 100644 include/android_bl_msg.h create mode 100644 test/py/tests/test_ab.py -- 2.7.4

9 25

[U-Boot] [PATCH] Makefile: Prioritize external dtb if defined
by Michal Simek 20 May '19

20 May '19

Prioritize external dtb if its passed via EXT_DTB than the dtb that was built in the tree. With this patch it appends the specified external dtb to the u-boot image. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu(a)xilinx.com> --- Makefile | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Makefile b/Makefile index c1af9307b38e..83da41d87d6e 100644 --- a/Makefile +++ b/Makefile @@ -1020,8 +1020,13 @@ MKIMAGEFLAGS_fit-dtb.blob = -f auto -A $(ARCH) -T firmware -C none -O u-boot \ -a 0 -e 0 -E \ $(patsubst %,-b arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) -d /dev/null +ifneq ($(EXT_DTB),) +u-boot-fit-dtb.bin: u-boot-nodtb.bin $(EXT_DTB) + $(call if_changed,cat) +else u-boot-fit-dtb.bin: u-boot-nodtb.bin fit-dtb.blob $(call if_changed,cat) +endif u-boot.bin: u-boot-fit-dtb.bin FORCE $(call if_changed,copy) -- 1.9.1

4 7

[U-Boot] [PATCH 01/16] gdsys: phy: Adapt fixup_88e1518() to latest Release Notes
by Mario Six 20 May '19

20 May '19

From: Dirk Eibach <dirk.eibach(a)gdsys.cc> The initialization sequence in the newest release notes of the 88e1518 phy omits two commands. Remove them from the sequence. Signed-off-by: Dirk Eibach <dirk.eibach(a)gdsys.cc> --- board/gdsys/common/phy.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/board/gdsys/common/phy.c b/board/gdsys/common/phy.c index c4b2256da3a..d40c08d9e94 100644 --- a/board/gdsys/common/phy.c +++ b/board/gdsys/common/phy.c @@ -45,8 +45,6 @@ struct mii_setupcmd fixup_88e1518[] = { { MIICMD_SET, 16, 0x214d }, { MIICMD_SET, 17, 0xcc0c }, { MIICMD_SET, 16, 0x2159 }, - { MIICMD_SET, 22, 0x00fb }, - { MIICMD_SET, 7, 0xc00d }, { MIICMD_SET, 22, 0x0000 }, }; -- 2.20.1

1 16