April 2019 - U-Boot

[U-Boot] [PATCH imx-next] imx6: tbs2910: fix dtb build error
by Anatolij Gustschin 01 Apr '19

01 Apr '19

Fix broken build: Device Tree Source is not correctly specified. Please define 'CONFIG_DEFAULT_DEVICE_TREE' or build with 'DEVICE_TREE=<device_tree>' argument Signed-off-by: Anatolij Gustschin <agust(a)denx.de> --- arch/arm/dts/Makefile | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 48e792b9a4..92074cd8da 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -500,6 +500,9 @@ dtb-$(CONFIG_MX6Q) += \ imx6q-display5.dtb \ imx6q-logicpd.dtb +dtb-$(CONFIG_TARGET_TBS2910) += \ + imx6q-tbs2910.dtb + dtb-$(CONFIG_MX6QDL) += \ imx6dl-icore.dtb \ imx6dl-icore-mipi.dtb \ -- 2.17.1

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[U-Boot] [PATCH imx-next 1/2] imx6: dts: add wandboard dtb target to fix build error
by Anatolij Gustschin 01 Apr '19

01 Apr '19

Fix broken build: Device Tree Source is not correctly specified. Please define 'CONFIG_DEFAULT_DEVICE_TREE' or build with 'DEVICE_TREE=<device_tree>' argument Signed-off-by: Anatolij Gustschin <agust(a)denx.de> --- arch/arm/dts/Makefile | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c2cc4599cf..48e792b9a4 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -516,6 +516,9 @@ dtb-$(CONFIG_MX6QDL) += \ imx6qp-sabreauto.dtb \ imx6qp-sabresd.dtb +dtb-$(CONFIG_TARGET_WANDBOARD) += \ + imx6dl-wandboard-revb1.dtb + dtb-$(CONFIG_MX6SL) += imx6sl-evk.dtb dtb-$(CONFIG_MX6SLL) += imx6sll-evk.dtb -- 2.17.1

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[U-Boot] [PATCH] mx6: colibri: fix build due to missing DTB
by Stefano Babic 01 Apr '19

01 Apr '19

This fix colibri (imx6) build due to: Device Tree Source is not correctly specified. Please define 'CONFIG_DEFAULT_DEVICE_TREE' or build with 'DEVICE_TREE=<device_tree>' argument CONFIG_DEFAULT_DEVICE_TREE is set in default config, but it is not built because the target is missing in dts/Makefile Signed-off-by: Stefano Babic <sbabic(a)denx.de> CC: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> --- I got build error after rebasing on current Tom's master - colibri-imx6.dtb is missing from dts/Makefile. This is to fix -next on u-boot-imx. arch/arm/dts/Makefile | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index e67b3bd767..0b39721dbc 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -500,6 +500,9 @@ dtb-$(CONFIG_MX6Q) += \ imx6q-display5.dtb \ imx6q-logicpd.dtb +dtb-$(CONFIG_TARGET_COLIBRI_IMX6) += \ + imx6-colibri.dtb + dtb-$(CONFIG_MX6QDL) += \ imx6dl-icore.dtb \ imx6dl-icore-mipi.dtb \ -- 2.17.1

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[U-Boot] [PATCH 01/12 v2] arm: at91: Makefile: Compile lowlevel_init only when really necessary
by Stefan Roese 01 Apr '19

01 Apr '19

Make sure that lowlevel_init is not compiled when CONFIG_SKIP_LOWLEVEL_INIT_ONLY is configured. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Heiko Schocher <hs(a)denx.de> Cc: Andreas Bießmann <andreas(a)biessmann.org> Cc: Eugen Hristev <eugen.hristev(a)microchip.com> --- v2: - No change arch/arm/mach-at91/arm926ejs/Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-at91/arm926ejs/Makefile b/arch/arm/mach-at91/arm926ejs/Makefile index 0639d7ea1e..6b0b28957a 100644 --- a/arch/arm/mach-at91/arm926ejs/Makefile +++ b/arch/arm/mach-at91/arm926ejs/Makefile @@ -24,8 +24,10 @@ obj-y += timer.o endif ifndef CONFIG_SKIP_LOWLEVEL_INIT +ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY obj-y += lowlevel_init.o endif +endif ifdef CONFIG_$(SPL_)SYS_THUMB_BUILD ifndef CONFIG_HAS_THUMB2 -- 2.21.0

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[U-Boot] [PATCH] [for-next] imx: aristainetos: fix build breakage
by Anatolij Gustschin 01 Apr '19

01 Apr '19

ipu.h header is not found since the ipuv3 driver was moved to the drivers/video/imx subdirectory. Fix it. Signed-off-by: Anatolij Gustschin <agust(a)denx.de> --- Hi Stefano, During my build tests I've seen a build breakage with [1] applied. Here is a patch to fix it. Please take it for u-boot-imx, -next. Thanks, Anatolij [1] http://patchwork.ozlabs.org/patch/1058108 board/aristainetos/aristainetos-v2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/aristainetos/aristainetos-v2.c b/board/aristainetos/aristainetos-v2.c index b33a75c82c..63b1057553 100644 --- a/board/aristainetos/aristainetos-v2.c +++ b/board/aristainetos/aristainetos-v2.c @@ -33,7 +33,7 @@ #include <micrel.h> #include <spi.h> #include <video.h> -#include <../drivers/video/ipu.h> +#include <../drivers/video/imx/ipu.h> #if defined(CONFIG_VIDEO_BMP_LOGO) #include <bmp_logo.h> #endif -- 2.17.1

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[U-Boot] [PATCH] optee: support rockchip optee binary release
by Kever Yang 01 Apr '19

01 Apr '19

Rockchip provide tee binary release in 'rkbin' repository: https://github.com/rockchip-linux/rkbin For some historical reason, rockchip optee binary is using 'r1' instead of 'lr' as U-Boot entry. Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> --- common/spl/spl_optee.S | 3 +++ 1 file changed, 3 insertions(+) diff --git a/common/spl/spl_optee.S b/common/spl/spl_optee.S index 8bd1949ddf..092307b3cc 100644 --- a/common/spl/spl_optee.S +++ b/common/spl/spl_optee.S @@ -8,5 +8,8 @@ ENTRY(spl_optee_entry) ldr lr, =CONFIG_SYS_TEXT_BASE +#ifdef CONFIG_ARCH_ROCKCHIP + ldr r1, =CONFIG_SYS_TEXT_BASE +#endif mov pc, r3 ENDPROC(spl_optee_entry) -- 2.20.1

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[U-Boot] [PATCH] pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl
by David Wu 01 Apr '19

01 Apr '19

There are no higher 16 writing corresponding bits for pmu_gpio0's iomux/drive/pull at rk3288, need to read the value from register firstly. Add the flag to distinguish it from normal registers. Signed-off-by: David Wu <david.wu(a)rock-chips.com> --- drivers/pinctrl/rockchip/pinctrl-rk3288.c | 17 ++++++-- .../pinctrl/rockchip/pinctrl-rockchip-core.c | 39 ++++++++++++++----- drivers/pinctrl/rockchip/pinctrl-rockchip.h | 33 ++++++++++++++++ 3 files changed, 76 insertions(+), 13 deletions(-) diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c index 60585f3208..8b6ce11a63 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c @@ -92,10 +92,19 @@ static void rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, } static struct rockchip_pin_bank rk3288_pin_banks[] = { - PIN_BANK_IOMUX_FLAGS(0, 24, "gpio0", IOMUX_SOURCE_PMU, - IOMUX_SOURCE_PMU, - IOMUX_SOURCE_PMU, - IOMUX_UNROUTED + PIN_BANK_IOMUX_DRV_PULL_FLAGS(0, 24, "gpio0", + IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT, + IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT, + IOMUX_SOURCE_PMU | IOMUX_WRITABLE_32BIT, + IOMUX_UNROUTED, + DRV_TYPE_WRITABLE_32BIT, + DRV_TYPE_WRITABLE_32BIT, + DRV_TYPE_WRITABLE_32BIT, + 0, + PULL_TYPE_WRITABLE_32BIT, + PULL_TYPE_WRITABLE_32BIT, + PULL_TYPE_WRITABLE_32BIT, + 0 ), PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", IOMUX_UNROUTED, IOMUX_UNROUTED, diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c index b84b079064..ce935656f0 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c +++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c @@ -228,7 +228,13 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) } } - data = (mask << (bit + 16)); + if (mux_type & IOMUX_WRITABLE_32BIT) { + regmap_read(regmap, reg, &data); + data &= ~(mask << bit); + } else { + data = (mask << (bit + 16)); + } + data |= (mux & mask) << bit; ret = regmap_write(regmap, reg, data); @@ -252,7 +258,8 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank, int reg, ret, i; u32 data, rmask_bits, temp; u8 bit; - int drv_type = bank->drv[pin_num / 8].drv_type; + /* Where need to clean the special mask for rockchip_perpin_drv_list */ + int drv_type = bank->drv[pin_num / 8].drv_type & (~DRV_TYPE_IO_MASK); debug("setting drive of GPIO%d-%d to %d\n", bank->bank_num, pin_num, strength); @@ -324,10 +331,15 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank, return -EINVAL; } - /* enable the write to the equivalent lower bits */ - data = ((1 << rmask_bits) - 1) << (bit + 16); - data |= (ret << bit); + if (bank->drv[pin_num / 8].drv_type & DRV_TYPE_WRITABLE_32BIT) { + regmap_read(regmap, reg, &data); + data &= ~(((1 << rmask_bits) - 1) << bit); + } else { + /* enable the write to the equivalent lower bits */ + data = ((1 << rmask_bits) - 1) << (bit + 16); + } + data |= (ret << bit); ret = regmap_write(regmap, reg, data); return ret; } @@ -375,7 +387,11 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank, case RK3288: case RK3368: case RK3399: - pull_type = bank->pull_type[pin_num / 8]; + /* + * Where need to clean the special mask for + * rockchip_pull_list. + */ + pull_type = bank->pull_type[pin_num / 8] & (~PULL_TYPE_IO_MASK); ret = -EINVAL; for (i = 0; i < ARRAY_SIZE(rockchip_pull_list[pull_type]); i++) { @@ -390,10 +406,15 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank, return ret; } - /* enable the write to the equivalent lower bits */ - data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16); - data |= (ret << bit); + if (bank->pull_type[pin_num / 8] & PULL_TYPE_WRITABLE_32BIT) { + regmap_read(regmap, reg, &data); + data &= ~(((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << bit); + } else { + /* enable the write to the equivalent lower bits */ + data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16); + } + data |= (ret << bit); ret = regmap_write(regmap, reg, data); break; default: diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip.h b/drivers/pinctrl/rockchip/pinctrl-rockchip.h index bc809630c1..5a6849c996 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rockchip.h +++ b/drivers/pinctrl/rockchip/pinctrl-rockchip.h @@ -26,6 +26,7 @@ enum rockchip_pinctrl_type { #define IOMUX_SOURCE_PMU BIT(2) #define IOMUX_UNROUTED BIT(3) #define IOMUX_WIDTH_3BIT BIT(4) +#define IOMUX_WRITABLE_32BIT BIT(5) /** * Defined some common pins constants @@ -49,6 +50,9 @@ struct rockchip_iomux { int offset; }; +#define DRV_TYPE_IO_MASK GENMASK(31, 16) +#define DRV_TYPE_WRITABLE_32BIT BIT(31) + /** * enum type index corresponding to rockchip_perpin_drv_list arrays index. */ @@ -61,6 +65,9 @@ enum rockchip_pin_drv_type { DRV_TYPE_MAX }; +#define PULL_TYPE_IO_MASK GENMASK(31, 16) +#define PULL_TYPE_WRITABLE_32BIT BIT(31) + /** * enum type index corresponding to rockchip_pull_list arrays index. */ @@ -200,6 +207,32 @@ struct rockchip_pin_bank { }, \ } +#define PIN_BANK_IOMUX_DRV_PULL_FLAGS(id, pins, label, iom0, iom1, \ + iom2, iom3, drv0, drv1, drv2, \ + drv3, pull0, pull1, pull2, \ + pull3) \ + { \ + .bank_num = id, \ + .nr_pins = pins, \ + .name = label, \ + .iomux = { \ + { .type = iom0, .offset = -1 }, \ + { .type = iom1, .offset = -1 }, \ + { .type = iom2, .offset = -1 }, \ + { .type = iom3, .offset = -1 }, \ + }, \ + .drv = { \ + { .drv_type = drv0, .offset = -1 }, \ + { .drv_type = drv1, .offset = -1 }, \ + { .drv_type = drv2, .offset = -1 }, \ + { .drv_type = drv3, .offset = -1 }, \ + }, \ + .pull_type[0] = pull0, \ + .pull_type[1] = pull1, \ + .pull_type[2] = pull2, \ + .pull_type[3] = pull3, \ + } + #define PIN_BANK_IOMUX_FLAGS_DRV_FLAGS_OFFSET_PULL_FLAGS(id, pins, \ label, iom0, iom1, iom2, \ iom3, drv0, drv1, drv2, \ -- 2.19.1

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[U-Boot] [PATCH v2 00/22] colibri vybrid fixes, device tree enablement and driver model conversion
by Marcel Ziswiler 01 Apr '19

01 Apr '19

This series addresses some shortcomings, enables/introduces device tree support and converts all except video to using the driver model. This is fully tested both running our latest downstream BSP as well as the mainline Linux kernel. This series is based on Lukasz' previous work on Vybrid [1] and is available together with his and my previous series addressing Apalis and Colibri iMX6 on our git server [2]. [1] https://patchwork.ozlabs.org/cover/1041597/ [2] http://git.toradex.com/cgit/u-boot-toradex.git/log/?h=for-next Changes in v2: - Added various reviewed-bys. Bhuvanchandra DV (1): colibri_vf: sync the board info message Gerard Salvatella (1): colibri_vf: fix sdboot for vybrid modules Marcel Ziswiler (12): Add missing space in comment vf610: ddrmc: add missing include imx: bootaux: add dependency on vf610 configs: move CONFIG_USB_EHCI_VF to Kconfig configs: colibri_vf: remove obsolete mmc/sd card environment configs: colibri_vf: limit size of malloc() pool before relocation configs: move CONFIG_MXC_OCOTP to Kconfig ARM: dts: colibri_vf: update device trees configs: colibri_vf: disable obscure options colibri_vf: migrate pinctrl and regulators to dtb/dm colibri_vf: migrate fec, esdhc, nfc and usb to driver model config: colibri_vf: use macros from linux/sizes.h Stefan Agner (8): colibri_vf: add distroboot support colibri_vf: set fdtfile for distroboot colibri_vf: enable user debug by default colibri_vf: disable undefined instruction events in user debug config: colibri_vf: enable mtd partitions via dt arm: vf610: add uart2 clock/pinmux support colibri_vf: adjust timing according to data sheet colibri_vf: use leveling evaluated by DDR validation tools arch/arm/dts/vf-colibri-u-boot.dtsi | 23 ++ arch/arm/dts/vf-colibri.dtsi | 198 ++++++++++++++- arch/arm/dts/vf500-colibri.dts | 1 + arch/arm/dts/vf610-colibri.dts | 1 + arch/arm/include/asm/arch-vf610/crm_regs.h | 1 + arch/arm/include/asm/arch-vf610/ddrmc-vf610.h | 2 + arch/arm/include/asm/arch-vf610/iomux-vf610.h | 6 +- arch/arm/mach-imx/Kconfig | 2 +- board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- board/toradex/colibri_vf/MAINTAINERS | 4 +- board/toradex/colibri_vf/colibri_vf.c | 240 ++---------------- configs/bk4r1_defconfig | 1 - configs/colibri_vf_defconfig | 22 +- configs/pcm052_defconfig | 1 - drivers/misc/Kconfig | 2 + drivers/usb/host/Kconfig | 7 + drivers/video/videomodes.c | 2 +- include/configs/advantech_dms-ba16.h | 2 - include/configs/apalis_imx6.h | 5 - include/configs/colibri_imx6.h | 5 - include/configs/colibri_vf.h | 109 ++++---- include/configs/dh_imx6.h | 5 - include/configs/ge_bx50v3.h | 2 - include/configs/imx8mq_evk.h | 1 - include/configs/kp_imx6q_tpc.h | 5 - include/configs/mx6_common.h | 3 - include/configs/mx7_common.h | 3 - include/configs/vf610twr.h | 4 - scripts/config_whitelist.txt | 1 - 29 files changed, 344 insertions(+), 316 deletions(-) create mode 100644 arch/arm/dts/vf-colibri-u-boot.dtsi -- 2.20.1

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[U-Boot] [PATCH 00/10] tbs2910 fixes and driver model conversion
by Soeren Moch 01 Apr '19

01 Apr '19

DM_MMC activates BLK, so we have to convert dwc_ahsata to AHCI before. Soeren Moch (10): board: tbs2910: Fix default environment board: tbs2910: Remove efi loader support in defconfig to reduce u-boot size board: tbs2910: Add device tree board: tbs2910: Add pinctrl driver and convert gpio to driver model board: tbs2910: Convert usb to driver model board: tbs2910: Convert i2c and rtc to driver model ata: dwc_ahsata: Fix sector reports for large disks ata: dwc_ahsata: Add ahci driver model support board: tbs2910: Convert sata to ahci driver model board: tbs2910: Convert mmc to driver model arch/arm/dts/imx6q-tbs2910.dts | 394 +++++++++++++++++++++++++++++++++ board/tbs/tbs2910/MAINTAINERS | 1 + board/tbs/tbs2910/tbs2910.c | 184 +-------------- configs/cm_fx6_defconfig | 1 + configs/tbs2910_defconfig | 18 +- drivers/ata/Kconfig | 8 + drivers/ata/dwc_ahsata.c | 38 +++- include/configs/tbs2910.h | 38 +--- 8 files changed, 455 insertions(+), 227 deletions(-) create mode 100644 arch/arm/dts/imx6q-tbs2910.dts -- 2.17.1

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[U-Boot] [PATCH v2 0/7] AE350 SMP support RISC-V
by Andes 01 Apr '19

01 Apr '19

From: Rick Chen <rick(a)andestech.com> Changes in v2: - Drop patch1 and replace by simple-bus driver - Rename nds_plic as andes_plic - Move initialize plic to PLIC_BASE_GET() and called automatically - Rename nds_plmt as andes_plmt - Recovery dts isa string Rick Chen (7): riscv: Add a SYSCON driver for Andestech's PLIC riscv: Add a SYSCON driver for Andestech's PLMT riscv: ae350: disable ATCPIT100 timer riscv: ax25: Add platform-specific Kconfig options riscv: ax25: Andes specific cache shall only support in M-mode riscv: dts: ae350 support SMP riscv: ae350: enable SMP arch/riscv/Kconfig | 18 ++++++ arch/riscv/cpu/ax25/Kconfig | 7 +++ arch/riscv/dts/ae350_32.dts | 81 ++++++++++++++++++------- arch/riscv/dts/ae350_64.dts | 47 +++++++++++++-- arch/riscv/include/asm/global_data.h | 6 ++ arch/riscv/include/asm/syscon.h | 3 +- arch/riscv/lib/Makefile | 2 + arch/riscv/lib/andes_plic.c | 111 +++++++++++++++++++++++++++++++++++ arch/riscv/lib/andes_plmt.c | 53 +++++++++++++++++ board/AndesTech/ax25-ae350/Kconfig | 1 + configs/ae350_rv32_defconfig | 1 - configs/ae350_rv64_defconfig | 1 - 12 files changed, 301 insertions(+), 30 deletions(-) create mode 100644 arch/riscv/lib/andes_plic.c create mode 100644 arch/riscv/lib/andes_plmt.c -- 2.7.4

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