April 2019 - U-Boot

[U-Boot] [PATCH v4 0/6] AE350 SMP support RISC-V
by Andes 02 Apr '19

02 Apr '19

From: Rick Chen <rick(a)andestech.com> Changes in v4: Patch 1 - Drop the empty comment line - Check return value after cpu_get_count() - Rename nds_plic as andes_plic - Fix checkpatch error issues Patch 2 - Rename nds_plmt as andes_plmt Patch 3 riscv: ae350: disable ATCPIT100 timer Patch 4 riscv: ax25: Add platform-specific Kconfig options - Squash as patch 3 riscv: ax25: Add platform-specific Kconfig options Changes in v3: Patch 1 - Rename plic_init() as enable_ipi() - Remove PLIC_BASE_GET() from enable_ipi() Patch 2 - Add a space before (PLMT) Patch 6 - Fix some mis-alignments - Recovery isa string of CPU1 Changes in v2: - Drop patch1 and replace by simple-bus driver - Rename nds_plic as andes_plic - Move initialize plic to PLIC_BASE_GET() and called automatically - Rename nds_plmt as andes_plmt - Recovery dts isa string Rick Chen (6): riscv: Add a SYSCON driver for Andestech's PLIC riscv: Add a SYSCON driver for Andestech's PLMT riscv: ax25: Add platform-specific Kconfig options riscv: ax25: Andes specific cache shall only support in M-mode riscv: dts: ae350 support SMP riscv: ae350: enable SMP arch/riscv/Kconfig | 18 ++++++ arch/riscv/cpu/ax25/Kconfig | 7 +++ arch/riscv/dts/ae350_32.dts | 81 ++++++++++++++++++------- arch/riscv/dts/ae350_64.dts | 81 ++++++++++++++++++------- arch/riscv/include/asm/global_data.h | 6 ++ arch/riscv/include/asm/syscon.h | 4 +- arch/riscv/lib/Makefile | 2 + arch/riscv/lib/andes_plic.c | 113 +++++++++++++++++++++++++++++++++++ arch/riscv/lib/andes_plmt.c | 53 ++++++++++++++++ board/AndesTech/ax25-ae350/Kconfig | 1 + configs/ae350_rv32_defconfig | 1 - configs/ae350_rv64_defconfig | 1 - 12 files changed, 320 insertions(+), 48 deletions(-) create mode 100644 arch/riscv/lib/andes_plic.c create mode 100644 arch/riscv/lib/andes_plmt.c -- 2.7.4

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Re: [U-Boot] [PATCH v3 1/7] riscv: Add a SYSCON driver for Andestech's PLIC
by Rick Chen 02 Apr '19

02 Apr '19

Hi Lukas >Auer, Lukas <lukas.auer(a)aisec.fraunhofer.de> 於 2019年4月1日週一下午5:08寫道： > > Hi Rick, > > On Mon, 2019-04-01 at 16:24 +0800, Andes wrote: > > From: Rick Chen <rick(a)andestech.com> > > > > The Platform-Level Interrupt Controller (PLIC) > > block holds memory-mapped claim and pending registers > > associated with software interrupt. It is required > > for handling IPI. > > > > Signed-off-by: Rick Chen <rick(a)andestech.com> > > Cc: Greentime Hu <greentime(a)andestech.com> > > --- > > V3: > > - Rename plic_init() as enable_ipi(). > > - Declase as static. > > - Remove PLIC_BASE_GET() from enable_ipi(). > > > > Take a look at patman [1], it makes it really easy to handle different > versions of a patch series. :) OK Thanks :) > > [1]: https://github.com/u-boot/u-boot/blob/master/tools/patman/README > > > arch/riscv/Kconfig | 9 +++ > > arch/riscv/include/asm/global_data.h | 3 + > > arch/riscv/include/asm/syscon.h | 2 +- > > arch/riscv/lib/Makefile | 1 + > > arch/riscv/lib/andes_plic.c | 110 +++++++++++++++++++++++++++++++++++ > > 5 files changed, 124 insertions(+), 1 deletion(-) > > create mode 100644 arch/riscv/lib/andes_plic.c > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > > index 3a4470d..511768b 100644 > > --- a/arch/riscv/Kconfig > > +++ b/arch/riscv/Kconfig > > @@ -109,6 +109,15 @@ config SIFIVE_CLINT > > The SiFive CLINT block holds memory-mapped control and status registers > > associated with software and timer interrupts. > > > > +config ANDES_PLIC > > + bool > > + depends on RISCV_MMODE > > + select REGMAP > > + select SYSCON > > + help > > + The Andes PLIC block holds memory-mapped claim and pending registers > > + associated with software interrupt. > > + > > config RISCV_RDTIME > > bool > > default y if RISCV_SMODE > > diff --git a/arch/riscv/include/asm/global_data.h b/arch/riscv/include/asm/global_data.h > > index 80e3165..b867910 100644 > > --- a/arch/riscv/include/asm/global_data.h > > +++ b/arch/riscv/include/asm/global_data.h > > @@ -18,6 +18,9 @@ struct arch_global_data { > > #ifdef CONFIG_SIFIVE_CLINT > > void __iomem *clint; /* clint base address */ > > #endif > > +#ifdef CONFIG_ANDES_PLIC > > + void __iomem *plic; /* plic base address */ > > +#endif > > #ifdef CONFIG_SMP > > struct ipi_data ipi[CONFIG_NR_CPUS]; > > #endif > > diff --git a/arch/riscv/include/asm/syscon.h b/arch/riscv/include/asm/syscon.h > > index d311ee6..c1b4b86 100644 > > --- a/arch/riscv/include/asm/syscon.h > > +++ b/arch/riscv/include/asm/syscon.h > > @@ -9,11 +9,11 @@ > > /* > > * System controllers in a RISC-V system > > * > > nit: can you also drop the empty comment line above? OK > > > - * So far only SiFive's Core Local Interruptor (CLINT) is defined. > > */ > > enum { > > RISCV_NONE, > > RISCV_SYSCON_CLINT, /* Core Local Interruptor (CLINT) */ > > + RISCV_SYSCON_PLIC, /* Platform Level Interrupt Controller (PLIC) */ > > }; > > > > #endif /* _ASM_SYSCON_H */ > > diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile > > index 35dbf64..1bf554b 100644 > > --- a/arch/riscv/lib/Makefile > > +++ b/arch/riscv/lib/Makefile > > @@ -11,6 +11,7 @@ obj-$(CONFIG_CMD_GO) += boot.o > > obj-y += cache.o > > obj-$(CONFIG_RISCV_RDTIME) += rdtime.o > > obj-$(CONFIG_SIFIVE_CLINT) += sifive_clint.o > > +obj-$(CONFIG_ANDES_PLIC) += andes_plic.o > > obj-y += interrupts.o > > obj-y += reset.o > > obj-$(CONFIG_SBI_IPI) += sbi_ipi.o > > diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c > > new file mode 100644 > > index 0000000..67ab561 > > --- /dev/null > > +++ b/arch/riscv/lib/andes_plic.c > > @@ -0,0 +1,110 @@ > > +// SPDX-License-Identifier: GPL-2.0+ > > +/* > > + * Copyright (C) 2019, Rick Chen <rick(a)andestech.com> > > + * > > + * U-Boot syscon driver for Andes's Platform Level Interrupt Controller (PLIC). > > + * The PLIC block holds memory-mapped claim and pending registers > > + * associated with software interrupt. > > + */ > > + > > +#include <common.h> > > +#include <dm.h> > > +#include <dm/device-internal.h> > > +#include <dm/lists.h> > > +#include <dm/uclass-internal.h> > > +#include <regmap.h> > > +#include <syscon.h> > > +#include <asm/io.h> > > +#include <asm/syscon.h> > > +#include <cpu.h> > > + > > +/* pending register */ > > +#define PENDING_REG(base, hart) ((ulong)(base) + 0x1000 + (hart) * 8) > > +/* enable register */ > > +#define ENABLE_REG(base, hart) ((ulong)(base) + 0x2000 + (hart) * 0x80) > > +/* claim register */ > > +#define CLAIM_REG(base, hart) ((ulong)(base) + 0x200004 + (hart) * 0x1000) > > + > > +#define ENABLE_HART_IPI (0x80808080) > > +#define SEND_IPI_TO_HART(hart) (0x80>>hart) > > + > > +DECLARE_GLOBAL_DATA_PTR; > > +static int init_plic(void); > > + > > +#define PLIC_BASE_GET(void) \ > > + do { \ > > + long *ret; \ > > + \ > > + if (!gd->arch.plic) { \ > > + ret = syscon_get_first_range(RISCV_SYSCON_PLIC); \ > > + if (IS_ERR(ret)) \ > > + return PTR_ERR(ret); \ > > + gd->arch.plic = ret; \ > > + init_plic(); \ > > + } \ > > + } while (0) > > + > > +static int enable_ipi(int harts) > > +{ > > + int i; > > + int en = ENABLE_HART_IPI; > > + > > + for (i = 0; i < harts ;i++) > > + { > > + en = en >> i; > > + writel(en, (void __iomem *)ENABLE_REG(gd->arch.plic, i)); > > + } > > + > > + return 0; > > +} > > + > > +static int init_plic(void) > > +{ > > + struct udevice *dev; > > + int ret; > > + > > + ret = uclass_find_first_device(UCLASS_CPU, &dev); > > + if (ret) > > + return ret; > > + > > + if (ret == 0 && dev != NULL) { > > + ret = cpu_get_count(dev); > > You should check first, if cpu_get_count() has returned an error before > using its return value. OK I will check the return value from cpu_get_count(). > > > + enable_ipi(ret); > > + return 0; > > + } > > + > > + return -ENODEV; > > +} > > + > > +int riscv_send_ipi(int hart) > > +{ > > + PLIC_BASE_GET(); > > + > > + writel(SEND_IPI_TO_HART(hart), (void __iomem *)PENDING_REG(gd->arch.plic, gd->arch.boot_hart)); > > + > > + return 0; > > +} > > + > > +int riscv_clear_ipi(int hart) > > +{ > > + u32 source_id; > > + > > + PLIC_BASE_GET(); > > + > > + source_id = readl((void __iomem *)CLAIM_REG(gd->arch.plic, hart)); > > + writel(source_id, (void __iomem *)CLAIM_REG(gd->arch.plic, hart)); > > + > > + return 0; > > +} > > + > > +static const struct udevice_id andes_plic_ids[] = { > > + { .compatible = "riscv,plic1", .data = RISCV_SYSCON_PLIC }, > > Would a compatible string of "andes,plic1" be more suitable? I got and sync the dts from our kernel team. If I shall change the string, I need to discuss with them. Some of them are not in office this week. So I prefer not change in this series. > > > + { } > > +}; > > + > > +U_BOOT_DRIVER(nds_plic) = { > > nit: andes_plic OK > + .name = "andes_plic", > > + .id = UCLASS_SYSCON, > > + .of_match = andes_plic_ids, > > + .flags = DM_FLAG_PRE_RELOC, > > +}; > > There are a couple of checkpatch issues in this patch. I have copied > the relevant ones below. > I will check patchs in the next patchsets Thanks Rick > CHECK: spaces preferred around that '>>' (ctx:VxV) > #135: FILE: arch/riscv/lib/andes_plic.c:29: > +#define SEND_IPI_TO_HART(hart) (0x80>>hart) > > ERROR: that open brace { should be on the previous line > #158: FILE: arch/riscv/lib/andes_plic.c:52: > + for (i = 0; i < harts ;i++) > + { > > ERROR: space required after that ';' (ctx:WxV) > #158: FILE: arch/riscv/lib/andes_plic.c:52: > + for (i = 0; i < harts ;i++) > > CHECK: Comparison to NULL could be written "dev" > #176: FILE: arch/riscv/lib/andes_plic.c:70: > + if (ret == 0 && dev != NULL) { > > WARNING: line over 80 characters > #189: FILE: arch/riscv/lib/andes_plic.c:83: > + writel(SEND_IPI_TO_HART(hart), (void __iomem *)PENDING_REG(gd- > >arch.plic, gd->arch.boot_hart)); > > Thanks, > Lukas

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[U-Boot] [PATCH v2] travis-ci: fix at91 missing boards
by Eugen.Hristev＠microchip.com 02 Apr '19

02 Apr '19

From: Eugen Hristev <eugen.hristev(a)microchip.com> Fix missing at91 boards and split the at91 in two categories: at91 arm v7 at91 arm926esj which are the two main cores for the at91 architecture. Signed-off-by: Eugen Hristev <eugen.hristev(a)microchip.com> --- Changes in v2: - replaced atmel with at91 everywhere, not just the split travis for this patch : https://travis-ci.org/ehristev/u-boot/builds/513985857 .travis.yml | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/.travis.yml b/.travis.yml index 834502f..eb531f1 100644 --- a/.travis.yml +++ b/.travis.yml @@ -163,13 +163,16 @@ matrix: - name: "buildman arm11 arm7 arm920t arm946es" env: - BUILDMAN="arm11 arm7 arm920t arm946es" - - name: "buildman arm926ejs (non-NXP,siemens,atmel,kirkwood,spear)" + - name: "buildman arm926ejs (non-NXP,siemens,at91,kirkwood,spear)" env: - JOB="arm926ejs" - BUILDMAN="arm926ejs -x freescale,siemens,atmel,kirkwood,spear,omap" - - name: "buildman atmel" + BUILDMAN="arm926ejs -x freescale,siemens,at91,kirkwood,spear,omap" + - name: "buildman at91 (non arm v7)" env: - - BUILDMAN="atmel" + - BUILDMAN="at91 -x armv7" + - name: "buildman at91 (non arm926ejs)" + env: + - BUILDMAN="at91 -x arm926ejs" - name: "buildman boundary engicam toradex" env: - BUILDMAN="boundary engicam toradex" @@ -226,7 +229,7 @@ matrix: - BUILDMAN="sun50i" - name: "buildman catch-all ARM" env: - - BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,xilinx" + - BUILDMAN="arm -x arm11,arm7,arm9,aarch64,at91,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,xilinx" - name: "buildman sandbox x86" env: - BUILDMAN="sandbox x86" -- 2.7.4

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[U-Boot] [PATCH v2 0/3] rockchip: correct SYS_SOC name for all rockchip SoCs
by Kever Yang 02 Apr '19

02 Apr '19

Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we do not need to make folder for each soc, because many header file are shared for all the SoCs which not need separate for each SoC. With the SoC name correct to its own name, the build system can include the $(SOC)-u-boot.dtsi automatically. Version 2 does not touch the armv8/start.S and lib/vector.S, but add boot0.h for each SoC. Kever Yang (3): rockchip: add common header boot0.h and gpio.h for soc rockchip: use 'arch-rockchip' as header file path rockchip: correct ARCH_SOC name arch/arm/include/asm/arch-rk3036/boot0.h | 11 ++++++++++ arch/arm/include/asm/arch-rk3036/gpio.h | 11 ++++++++++ arch/arm/include/asm/arch-rk3128/boot0.h | 11 ++++++++++ arch/arm/include/asm/arch-rk3128/gpio.h | 11 ++++++++++ arch/arm/include/asm/arch-rk3188/boot0.h | 11 ++++++++++ arch/arm/include/asm/arch-rk3188/gpio.h | 11 ++++++++++ arch/arm/include/asm/arch-rk322x/boot0.h | 11 ++++++++++ arch/arm/include/asm/arch-rk322x/gpio.h | 11 ++++++++++ arch/arm/include/asm/arch-rk3288/boot0.h | 11 ++++++++++ arch/arm/include/asm/arch-rk3288/gpio.h | 11 ++++++++++ arch/arm/include/asm/arch-rk3328/boot0.h | 11 ++++++++++ arch/arm/include/asm/arch-rk3328/gpio.h | 11 ++++++++++ arch/arm/include/asm/arch-rk3368/boot0.h | 11 ++++++++++ arch/arm/include/asm/arch-rk3368/gpio.h | 11 ++++++++++ arch/arm/include/asm/arch-rk3399/boot0.h | 11 ++++++++++ arch/arm/include/asm/arch-rk3399/gpio.h | 11 ++++++++++ .../include/asm/arch-rockchip/ddr_rk3188.h | 2 +- arch/arm/include/asm/arch-rv1108/boot0.h | 11 ++++++++++ arch/arm/include/asm/arch-rv1108/gpio.h | 11 ++++++++++ arch/arm/mach-rockchip/Kconfig | 2 +- arch/arm/mach-rockchip/boot_mode.c | 2 +- arch/arm/mach-rockchip/bootrom.c | 4 ++-- arch/arm/mach-rockchip/rk3036-board-spl.c | 12 +++++------ arch/arm/mach-rockchip/rk3036-board.c | 10 +++++----- arch/arm/mach-rockchip/rk3036/Kconfig | 2 +- arch/arm/mach-rockchip/rk3036/clk_rk3036.c | 4 ++-- arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 12 +++++------ arch/arm/mach-rockchip/rk3036/syscon_rk3036.c | 2 +- arch/arm/mach-rockchip/rk3128-board.c | 10 +++++----- arch/arm/mach-rockchip/rk3128/Kconfig | 2 +- arch/arm/mach-rockchip/rk3128/clk_rk3128.c | 4 ++-- arch/arm/mach-rockchip/rk3128/syscon_rk3128.c | 2 +- arch/arm/mach-rockchip/rk3188-board-spl.c | 16 +++++++-------- arch/arm/mach-rockchip/rk3188-board.c | 10 +++++----- arch/arm/mach-rockchip/rk3188/Kconfig | 2 +- arch/arm/mach-rockchip/rk3188/clk_rk3188.c | 4 ++-- arch/arm/mach-rockchip/rk3188/syscon_rk3188.c | 2 +- arch/arm/mach-rockchip/rk322x-board-spl.c | 12 +++++------ arch/arm/mach-rockchip/rk322x-board.c | 10 +++++----- arch/arm/mach-rockchip/rk322x/Kconfig | 2 +- arch/arm/mach-rockchip/rk322x/clk_rk322x.c | 4 ++-- arch/arm/mach-rockchip/rk322x/syscon_rk322x.c | 2 +- arch/arm/mach-rockchip/rk3288-board-spl.c | 20 +++++++++---------- arch/arm/mach-rockchip/rk3288-board-tpl.c | 14 ++++++------- arch/arm/mach-rockchip/rk3288-board.c | 12 +++++------ arch/arm/mach-rockchip/rk3288/Kconfig | 2 +- arch/arm/mach-rockchip/rk3288/clk_rk3288.c | 4 ++-- arch/arm/mach-rockchip/rk3288/rk3288.c | 2 +- arch/arm/mach-rockchip/rk3288/syscon_rk3288.c | 2 +- arch/arm/mach-rockchip/rk3328/Kconfig | 2 +- arch/arm/mach-rockchip/rk3328/clk_rk3328.c | 4 ++-- arch/arm/mach-rockchip/rk3328/rk3328.c | 2 +- arch/arm/mach-rockchip/rk3328/syscon_rk3328.c | 2 +- arch/arm/mach-rockchip/rk3368-board-spl.c | 10 +++++----- arch/arm/mach-rockchip/rk3368-board-tpl.c | 12 +++++------ arch/arm/mach-rockchip/rk3368/Kconfig | 2 +- arch/arm/mach-rockchip/rk3368/clk_rk3368.c | 4 ++-- arch/arm/mach-rockchip/rk3368/rk3368.c | 6 +++--- arch/arm/mach-rockchip/rk3368/syscon_rk3368.c | 2 +- arch/arm/mach-rockchip/rk3399-board-spl.c | 12 +++++------ arch/arm/mach-rockchip/rk3399-board.c | 2 +- arch/arm/mach-rockchip/rk3399/Kconfig | 2 +- arch/arm/mach-rockchip/rk3399/clk_rk3399.c | 4 ++-- arch/arm/mach-rockchip/rk3399/rk3399.c | 2 +- arch/arm/mach-rockchip/rk3399/syscon_rk3399.c | 2 +- arch/arm/mach-rockchip/rk_timer.c | 2 +- arch/arm/mach-rockchip/rv1108/Kconfig | 2 +- arch/arm/mach-rockchip/rv1108/clk_rv1108.c | 4 ++-- arch/arm/mach-rockchip/rv1108/syscon_rv1108.c | 2 +- arch/arm/mach-rockchip/sdram_common.c | 2 +- board/elgin/elgin_rv1108/elgin_rv1108.c | 4 ++-- board/rockchip/evb_rk3036/evb_rk3036.c | 4 ++-- board/rockchip/evb_rk3229/evb_rk3229.c | 2 +- board/rockchip/evb_rk3399/evb-rk3399.c | 2 +- board/rockchip/evb_rv1108/evb_rv1108.c | 4 ++-- board/rockchip/kylin_rk3036/kylin_rk3036.c | 4 ++-- board/rockchip/sheep_rk3368/sheep_rk3368.c | 4 ++-- .../lion_rk3368/lion_rk3368.c | 6 +++--- .../puma_rk3399/puma-rk3399.c | 10 +++++----- board/vamrs/rock960_rk3399/rock960-rk3399.c | 2 +- cmd/rockusb.c | 2 +- drivers/clk/rockchip/clk_rk3036.c | 6 +++--- drivers/clk/rockchip/clk_rk3128.c | 6 +++--- drivers/clk/rockchip/clk_rk3188.c | 8 ++++---- drivers/clk/rockchip/clk_rk322x.c | 6 +++--- drivers/clk/rockchip/clk_rk3288.c | 8 ++++---- drivers/clk/rockchip/clk_rk3328.c | 8 ++++---- drivers/clk/rockchip/clk_rk3368.c | 6 +++--- drivers/clk/rockchip/clk_rk3399.c | 6 +++--- drivers/clk/rockchip/clk_rv1108.c | 6 +++--- drivers/gpio/rk_gpio.c | 3 ++- drivers/i2c/rk_i2c.c | 6 +++--- drivers/mmc/rockchip_dw_mmc.c | 4 ++-- drivers/net/gmac_rockchip.c | 18 ++++++++--------- drivers/pwm/rk_pwm.c | 2 +- drivers/ram/rockchip/dmc-rk3368.c | 12 +++++------ drivers/ram/rockchip/sdram_rk3128.c | 6 +++--- drivers/ram/rockchip/sdram_rk3188.c | 14 ++++++------- drivers/ram/rockchip/sdram_rk322x.c | 16 +++++++-------- drivers/ram/rockchip/sdram_rk3288.c | 14 ++++++------- drivers/ram/rockchip/sdram_rk3328.c | 6 +++--- drivers/ram/rockchip/sdram_rk3399.c | 12 +++++------ drivers/reset/reset-rockchip.c | 2 +- drivers/serial/serial_rockchip.c | 2 +- drivers/sound/rockchip_sound.c | 2 +- drivers/spi/rk_spi.c | 4 ++-- drivers/sysreset/sysreset_rockchip.c | 6 +++--- drivers/timer/rockchip_timer.c | 2 +- drivers/usb/gadget/f_rockusb.c | 2 +- drivers/video/rockchip/rk3288_hdmi.c | 6 +++--- drivers/video/rockchip/rk3288_mipi.c | 10 +++++----- drivers/video/rockchip/rk3288_vop.c | 6 +++--- drivers/video/rockchip/rk3399_hdmi.c | 6 +++--- drivers/video/rockchip/rk3399_mipi.c | 10 +++++----- drivers/video/rockchip/rk3399_vop.c | 2 +- drivers/video/rockchip/rk_edp.c | 6 +++--- drivers/video/rockchip/rk_hdmi.c | 5 ++--- drivers/video/rockchip/rk_lvds.c | 6 +++--- drivers/video/rockchip/rk_mipi.c | 9 ++++----- drivers/video/rockchip/rk_vop.c | 7 +++---- drivers/video/rockchip/rk_vop.h | 2 +- include/configs/rk3036_common.h | 2 +- include/configs/rk3188_common.h | 2 +- include/configs/rk322x_common.h | 2 +- include/configs/rk3288_common.h | 2 +- include/configs/rk3368_common.h | 2 +- include/configs/rv1108_common.h | 2 +- 127 files changed, 495 insertions(+), 299 deletions(-) create mode 100644 arch/arm/include/asm/arch-rk3036/boot0.h create mode 100644 arch/arm/include/asm/arch-rk3036/gpio.h create mode 100644 arch/arm/include/asm/arch-rk3128/boot0.h create mode 100644 arch/arm/include/asm/arch-rk3128/gpio.h create mode 100644 arch/arm/include/asm/arch-rk3188/boot0.h create mode 100644 arch/arm/include/asm/arch-rk3188/gpio.h create mode 100644 arch/arm/include/asm/arch-rk322x/boot0.h create mode 100644 arch/arm/include/asm/arch-rk322x/gpio.h create mode 100644 arch/arm/include/asm/arch-rk3288/boot0.h create mode 100644 arch/arm/include/asm/arch-rk3288/gpio.h create mode 100644 arch/arm/include/asm/arch-rk3328/boot0.h create mode 100644 arch/arm/include/asm/arch-rk3328/gpio.h create mode 100644 arch/arm/include/asm/arch-rk3368/boot0.h create mode 100644 arch/arm/include/asm/arch-rk3368/gpio.h create mode 100644 arch/arm/include/asm/arch-rk3399/boot0.h create mode 100644 arch/arm/include/asm/arch-rk3399/gpio.h create mode 100644 arch/arm/include/asm/arch-rv1108/boot0.h create mode 100644 arch/arm/include/asm/arch-rv1108/gpio.h -- 2.20.1

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[U-Boot] [PULL] u-boot-sh/master
by Marek Vasut 02 Apr '19

02 Apr '19

Minor fixes for the Alt board and PHY use on Gen2. The following changes since commit c3aef9339ce0592b06c8d44cf2eaf9e6f3713e4f: Merge branch '2019-03-29-master-imports' (2019-03-29 10:53:28 -0400) are available in the Git repository at: git://git.denx.de/u-boot-sh.git master for you to fetch changes up to 0c78ec64bcc96c34642ebd29614c4c26132ad4b6: ARM: rmobile: alt: Fix I2C bus number (2019-03-30 08:28:25 +0100) ---------------------------------------------------------------- Marek Vasut (7): ARM: rmobile: alt: Remove R8A7794_ETHERNET_B ARM: rmobile: alt: Remove CLK2MHZ macro ARM: rmobile: alt: Synchronize defconfig ARM: rmobile: Fix PHY LED mode register mask ARM: rmobile: rcar-gen2: Activate bootm_size ARM: dts: rmobile: Activate I2C7 on Alt ARM: rmobile: alt: Fix I2C bus number arch/arm/dts/r8a7794-alt-u-boot.dts | 5 +++++ board/renesas/alt/Kconfig | 9 --------- board/renesas/alt/alt.c | 5 ++--- board/renesas/gose/gose.c | 2 +- board/renesas/koelsch/koelsch.c | 2 +- board/renesas/lager/lager.c | 2 +- board/renesas/porter/porter.c | 2 +- board/renesas/silk/silk.c | 2 +- board/renesas/stout/stout.c | 2 +- configs/alt_defconfig | 3 +++ include/configs/rcar-gen2-common.h | 1 - 11 files changed, 16 insertions(+), 19 deletions(-)

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[U-Boot] [PATCH 1/2] Makefile: Add target to generate hex output for combined spl and dtb
by Dalon Westergreen 02 Apr '19

02 Apr '19

From: Dalon Westergreen <dalon.westergreen(a)intel.com> Some architectures, Stratix10, require a hex formatted spl that combines the spl image and dtb. This adds a target to create said hex file with and offset of SPL_TEXT_BASE. Signed-off-by: Dalon Westergreen <dalon.westergreen(a)intel.com> --- Makefile | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Makefile b/Makefile index c52a33b403..ecba06ffce 100644 --- a/Makefile +++ b/Makefile @@ -1074,6 +1074,11 @@ OBJCOPYFLAGS_u-boot-spl.hex = $(OBJCOPYFLAGS_u-boot.hex) spl/u-boot-spl.hex: spl/u-boot-spl FORCE $(call if_changed,objcopy) +OBJCOPYFLAGS_u-boot-spl-dtb.hex := -I binary -O ihex --change-address=$(CONFIG_SPL_TEXT_BASE) + +spl/u-boot-spl-dtb.hex: spl/u-boot-spl-dtb.bin FORCE + $(call if_changed,objcopy) + binary_size_check: u-boot-nodtb.bin FORCE @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \ map_size=$(shell cat u-boot.map | \ @@ -1643,6 +1648,10 @@ u-boot.lds: $(LDSCRIPT) prepare FORCE spl/u-boot-spl.bin: spl/u-boot-spl @: + +spl/u-boot-spl-dtb.bin: spl/u-boot-spl + @: + spl/u-boot-spl: tools prepare \ $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb) \ $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_TPL_OF_PLATDATA),dts/dt.dtb) -- 2.20.1

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[U-Boot] [PATCH v6 00/11] rockchip: add tpl and OPTEE support for rk3229
by Kever Yang 02 Apr '19

02 Apr '19

Add some generic options for TPL support for arm 32bit, and then and TPL support for rk3229(cortex-A7), and then add OPTEE support in SPL. Version 5 rebase on master branch with 'SYS_SOC name correct' patch set, remove the patches for OP-TEE which has been mergerd. Version 6 fix travis build error cause by sysreset update. https://travis-ci.org/keveryang/u-boot/builds/514475183 Changes in v6: - update defconfig for stm32mp15_basic, am65x_evm_r5, mt7629_rfb, x86, sandbox... to enable SPL_SYSRESET. Kever Yang (11): Revert "rockchip: rk322x: ram: enable DRAM init in SPL instead of TPL" arm: add option for TPL support in arm 32bit arm: add a separate stack for TPL rockchip: rk322x: add CLK_EMMC_SAMPLE clock support rockchip: clk: rk322x: fix assert clock value rockchip: rk322x: add tpl support sysreset: enable driver support in SPL/TPL rockchip: rk322x: dts: enable uart2 for SPL/TPL rockchip: evb-rk3229: remove unnecessary defines rockchip: evb-rk3229: add README file for OP-TEE support rockchip: evb-rk322x: update defconfig with tpl and optee support arch/Kconfig | 1 + arch/arm/Kconfig | 30 ++++++++++ arch/arm/dts/rk3229-evb.dts | 1 + arch/arm/lib/crt0.S | 4 +- arch/arm/mach-rockchip/Kconfig | 26 ++++++++ arch/arm/mach-rockchip/Makefile | 3 +- arch/arm/mach-rockchip/rk322x-board-spl.c | 46 ++++++--------- arch/arm/mach-rockchip/rk322x-board-tpl.c | 53 +++++++++++++++++ arch/arm/mach-rockchip/u-boot-tpl.lds | 12 ++++ board/rockchip/evb_rk3229/README | 72 +++++++++++++++++++++++ configs/am65x_evm_a53_defconfig | 1 + configs/am65x_evm_r5_defconfig | 1 + configs/evb-rk3229_defconfig | 25 ++++++-- configs/mt7629_rfb_defconfig | 1 + configs/sandbox_spl_defconfig | 1 + drivers/clk/rockchip/clk_rk322x.c | 6 +- drivers/ram/rockchip/sdram_rk322x.c | 12 ++-- drivers/sysreset/Kconfig | 18 ++++++ drivers/sysreset/Makefile | 2 +- include/configs/evb_rk3229.h | 44 +------------- include/configs/rk322x_common.h | 10 ++-- 21 files changed, 278 insertions(+), 91 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk322x-board-tpl.c create mode 100644 arch/arm/mach-rockchip/u-boot-tpl.lds create mode 100644 board/rockchip/evb_rk3229/README -- 2.20.1

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[U-Boot] [PATCH] cosmetic: config: Remove empty #ifdefs
by Lukasz Majewski 02 Apr '19

02 Apr '19

After running tools/moveconfig.py it turned out that for various boards there are an empty #ifdef statements. Remove them to clean u-boot source code. Signed-off-by: Lukasz Majewski <lukma(a)denx.de> --- include/configs/bg0900.h | 4 ---- include/configs/dreamplug.h | 3 --- include/configs/ds109.h | 3 --- include/configs/km/km_arm.h | 3 --- 4 files changed, 13 deletions(-) diff --git a/include/configs/bg0900.h b/include/configs/bg0900.h index 832dbbaafc..c05b06a417 100644 --- a/include/configs/bg0900.h +++ b/include/configs/bg0900.h @@ -19,10 +19,6 @@ #define CONFIG_FEC_MXC #endif -/* SPI FLASH */ -#ifdef CONFIG_CMD_SF -#endif - /* Boot Linux */ #define CONFIG_BOOTFILE "uImage" #define CONFIG_BOOTCOMMAND "bootm" diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index 28bda14c3d..f7f9141dd0 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -34,9 +34,6 @@ #define CONFIG_ENV_SECT_SIZE 0x10000 /* 64k */ #endif -#ifdef CONFIG_CMD_SF -#endif - /* * max 4k env size is enough, but in case of nand * it has to be rounded to sector size diff --git a/include/configs/ds109.h b/include/configs/ds109.h index 07367cfef0..31abb4bc85 100644 --- a/include/configs/ds109.h +++ b/include/configs/ds109.h @@ -37,9 +37,6 @@ #define CONFIG_ENV_SECT_SIZE 0x10000 /* 64k */ #endif -#ifdef CONFIG_CMD_SF -#endif - /* * max 4k env size is enough, but in case of nand * it has to be rounded to sector size diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index a2e9cf1fa5..8a00ac015a 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -34,9 +34,6 @@ /* SPI NOR Flash default params, used by sf commands */ -#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR -#endif - /* Reserve 4 MB for malloc */ #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) -- 2.11.0

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[U-Boot] [PATCH] doc: Fix outdated ohci board hook documentation
by Krzysztof Kozlowski 02 Apr '19

02 Apr '19

The ohci driver calls board_usb_init(), not usb_board_init(). Signed-off-by: Krzysztof Kozlowski <krzk(a)kernel.org> --- doc/README.generic_usb_ohci | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/README.generic_usb_ohci b/doc/README.generic_usb_ohci index 61300c35758a..65b0896c7fd2 100644 --- a/doc/README.generic_usb_ohci +++ b/doc/README.generic_usb_ohci @@ -13,7 +13,7 @@ Configuration options CONFIG_SYS_USB_OHCI_BOARD_INIT: call the board dependant hooks: - - extern int usb_board_init(void); + - extern int board_usb_init(void); - extern int usb_board_stop(void); - extern int usb_cpu_init_fail(void); -- 2.7.4

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[U-Boot] [PATCH] spl: fit: handle mmc read to sram case in rockchip SoCs
by Kever Yang 02 Apr '19

02 Apr '19

Rockchip fit image with atf may have firmware for sram, so the fit driver need to read data from mmc to sram, but Rockchip mmc controller does not support this data path, we have to read into ddr first and then copy it to sram. Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> --- common/spl/spl_fit.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index c9bfe0cc8a..5c5b58f69d 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -9,6 +9,7 @@ #include <fpga.h> #include <image.h> #include <linux/libfdt.h> +#include <malloc.h> #include <spl.h> #ifndef CONFIG_SYS_BOOTM_LEN @@ -215,6 +216,15 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector, return -ENOENT; load_ptr = (load_addr + align_len) & ~align_len; +#if defined(CONFIG_ROCKCHIP_RK3399) || defined(CONFIG_ROCKCHIP_RK3368) + /* + * Rockchip SOC's mmc controller does not support read data + * from mmc to sram, we have to read to sdram first, and then + * copy to sram. + */ + if ((load_ptr & 0xffff0000) != CONFIG_SYS_SDRAM_BASE) + load_ptr = (ulong)memalign(ARCH_DMA_MINALIGN, len); +#endif length = len; overhead = get_aligned_image_overhead(info, offset); -- 2.20.1

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