March 2019 - U-Boot

[U-Boot] [PATCH 0/9] sunxi: Allow FEL capable SPLs with 32bit builds
by Andre Przywara 04 Mar '19

04 Mar '19

At the moment we can't use the USB-OTG based Allwinner FEL booting method with mainline U-Boot on ARMv8 Allwinner SoCs. As we run the SPL in AArch64 with the MMU enabled, returning to the BootROM in AArch32 with the MMU off and matching the BootROM's expectation is not trivial. To workaround the problem, we can compile at least the SPL in AArch32. This creates FEL-capable SPLs without further ado. A second effect is the much smaller code size, due to smaller data types on one hand, and due to the more compact Thumb2 encoding on the other. Whereas Aarch64 builds get dangerously close to the 32KB limit, the Thumb2 build is less than 21KB. This is the cornerstone for more whacky experiments like DRAM autodetection and supporting multiple SoCs in one build. So this series adds a Kconfig symbol to toggle between AArch64 and Thumb2 builds for the 64-bit Allwinner SoCs. The latter generates pure 32-bit binaries (including U-Boot proper), though this is not too useful at the moment (would require an ATF hack, for instance). However this can be the base for further 32-bit experiments. The first patch removes the exception vectors in the SPL build (which were accidentally disabled anyway), to keep the Aarch64 H6 SPL within the limit. Patch 02 to 05 prepare the build system and some generic sunxi code parts for proper 32-bit compilation of ARMv8 boards. Patch 06 then adds the actual new Kconfig symbol, which toggles the bitness for a build. The final three patches add defconfigs for the respective SoCs and their DRAM variants. They must be build with an ARM(32) (cross) compiler, the FEL capable SPL can be plucked from spl/sunxi-spl.bin. Short of the DRAM configuration, there is nothing really board specific in there, so one SPL defconfig can cover multiple boards. The 32-bit SPL is flexible enough to launch 64-bit binaries as well, so it can be combined with a 64-bit U-Boot proper and ATF, and also works on SD cards, from eMMC or SPI flash. Consider it a drop-in replacement for the 64-bit SPL build, although this has to be done manually. Also FEL booting requires the firmware components to be given separately on the sunxi-fel command line at the moment. This is tested on the Pine64, Pine64-LTS, Orangepi-PC2 and Pine H64, with FEL booting, normal AArch64 boots from an SD card and a 32-bit SPL/ 64-bit U-Boot proper combination on an SD card. Looking forward to any comments! Cheers, Andre. Alexander Graf (1): armv8: Disable exception vectors in SPL by default Andre Przywara (8): Makefile: use "arm64" architecture for U-Boot image files SPL: read and store arch property from U-Boot image sunxi: introduce RMR switch to enter payloads in 64-bit mode sunxi: allow FIT image for 32-bit builds as well sunxi: allow 32-bit builds for 64-bit SoCs sunxi: H5: add generic H5 32-bit SPL defconfig sunxi: A64: add generic A64 32-bit SPL defconfigs sunxi: H6: add generic H6 32-bit SPL defconfig Makefile | 12 +++++-- arch/arm/cpu/armv8/Kconfig | 2 +- arch/arm/cpu/armv8/start.S | 4 +-- arch/arm/lib/spl.c | 14 ++++++++ arch/arm/mach-sunxi/Kconfig | 13 +++++-- arch/arm/mach-sunxi/Makefile | 3 ++ arch/arm/mach-sunxi/spl_switch.c | 64 +++++++++++++++++++++++++++++++++ common/spl/spl.c | 1 + common/spl/spl_fit.c | 8 +++++ configs/sun50i-a64-ddr3-spl_defconfig | 13 +++++++ configs/sun50i-a64-lpddr3-spl_defconfig | 17 +++++++++ configs/sun50i-h5-ddr3-spl_defconfig | 16 +++++++++ configs/sun50i-h6-lpddr3-spl_defconfig | 12 +++++++ include/spl.h | 3 +- 14 files changed, 172 insertions(+), 10 deletions(-) create mode 100644 arch/arm/mach-sunxi/spl_switch.c create mode 100644 configs/sun50i-a64-ddr3-spl_defconfig create mode 100644 configs/sun50i-a64-lpddr3-spl_defconfig create mode 100644 configs/sun50i-h5-ddr3-spl_defconfig create mode 100644 configs/sun50i-h6-lpddr3-spl_defconfig -- 2.14.5

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Re: [U-Boot] [PATCH] driver: net: fsl-mc: Fix DPC MAC address fixup
by Laurentiu Tudor 04 Mar '19

04 Mar '19

On 26.02.2019 17:41, Ioana Ciocoi Radulescu wrote: > If node /board_info/ports does not exist in the DPC file, > function mc_fixup_dpc() will skip not only MAC address fixup, > but also the cache flush at the end. This may cause the other > fixup changes (e.g. ICID relatd ones) to be ignored by MC. > > Fixes: 1161dbcc0a36 ("drivers: net: fsl-mc: Include MAC addr fixup to DPL") > > Signed-off-by: Ioana Radulescu <ruxandra.radulescu(a)nxp.com> > --- > drivers/net/fsl-mc/mc.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) Reviewed-by: Laurentiu Tudor <laurentiu.tudor(a)nxp.com> --- Best Regards, Laurentiu

1 0

[U-Boot] [PATCH] board: ls1046qds: Enable PPA for secure boot
by Prabhakar Kushwaha 04 Mar '19

04 Mar '19

Re-organize defconfig and enabled PPA for secure boot Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> --- configs/ls1046aqds_SECURE_BOOT_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index de8cab6b20..5ba600ee67 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -2,10 +2,10 @@ CONFIG_ARM=y CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SECURE_BOOT=y +CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=10 -- 2.14.1

1 1

[U-Boot] [PATCH] board/freescale: Enable DHCP distro boot for Layerscape board
by Yunfeng Ding 04 Mar '19

04 Mar '19

Enable DHCP distro boot for Layerscape Signed-off-by: Yunfeng Ding <yunfeng.ding(a)nxp.com> --- include/configs/ls1012a_common.h | 5 +++-- include/configs/ls1021atwr.h | 3 ++- include/configs/ls1043a_common.h | 3 ++- include/configs/ls1046a_common.h | 3 ++- include/configs/ls1088ardb.h | 3 ++- include/configs/ls2080ardb.h | 3 ++- 6 files changed, 13 insertions(+), 7 deletions(-) diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 324dba2b7e..d6e0e0614f 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -96,9 +96,10 @@ #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ - func(SCSI, scsi, 0) \ func(MMC, mmc, 0) \ - func(USB, usb, 0) + func(USB, usb, 0) \ + func(SCSI, scsi, 0) \ + func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> #endif diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 2c91ae783b..4b6760b600 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -315,7 +315,8 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ - func(USB, usb, 0) + func(USB, usb, 0) \ + func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> #ifdef CONFIG_LPUART diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 49b014181e..27bbfb4c95 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -239,7 +239,8 @@ #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ - func(USB, usb, 0) + func(USB, usb, 0) \ + func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> #endif diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 6e36c9339b..eb4c78f549 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -213,7 +213,8 @@ #define BOOT_TARGET_DEVICES(func) \ func(SCSI, scsi, 0) \ func(MMC, mmc, 0) \ - func(USB, usb, 0) + func(USB, usb, 0) \ + func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> #endif diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index f52ea4d746..6387b19dd5 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -577,7 +577,8 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ - func(SCSI, scsi, 0) + func(SCSI, scsi, 0) \ + func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> #endif diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index ef0f4ff48e..d3d759533d 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -333,7 +333,8 @@ unsigned long get_board_sys_clk(void); #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ func(MMC, mmc, 0) \ - func(SCSI, scsi, 0) + func(SCSI, scsi, 0) \ + func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> #ifdef CONFIG_TFABOOT -- 2.17.1

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[U-Boot] [PATCH v2 1/3] fsl_sec: fix register layout on Layerscape architectures
by laurentiu.tudor＠nxp.com 04 Mar '19

04 Mar '19

From: Laurentiu Tudor <laurentiu.tudor(a)nxp.com> On Layerscape architectures the SEC memory map is 1MB and the register blocks contained in it are 64KB aligned, not 4KB as the ccsr_sec structure currently assumes. Fix the layout of the structure for these architectures. Signed-off-by: Laurentiu Tudor <laurentiu.tudor(a)nxp.com> Reviewed-by: Horia Geanta <horia.geanta(a)nxp.com> Reviewed-by: Bharat Bhushan <bharat.bhushan(a)nxp.com> --- v2: - added Reviewed-by tags include/fsl_sec.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/fsl_sec.h b/include/fsl_sec.h index 16e3fcb5a1..be08a2b88b 100644 --- a/include/fsl_sec.h +++ b/include/fsl_sec.h @@ -121,10 +121,18 @@ typedef struct ccsr_sec { u32 chanum_ls; /* CHA Number Register, LS */ u32 secvid_ms; /* SEC Version ID Register, MS */ u32 secvid_ls; /* SEC Version ID Register, LS */ +#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) + u8 res9[0x6f020]; +#else u8 res9[0x6020]; +#endif u32 qilcr_ms; /* Queue Interface LIODN CFG Register, MS */ u32 qilcr_ls; /* Queue Interface LIODN CFG Register, LS */ +#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) + u8 res10[0x8ffd8]; +#else u8 res10[0x8fd8]; +#endif } ccsr_sec_t; #define SEC_CTPR_MS_AXI_LIODN 0x08000000 -- 2.17.1

2 3

[U-Boot] [PATCH] configs: fsl: move DDR specific defines to Kconfig
by Rajesh Bhagat 04 Mar '19

04 Mar '19

Moves below DDR specific defines to Kconfig: CONFIG_FSL_DDR_BIST CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE CONFIG_FSL_DDR_INTERACTIVE CONFIG_FSL_DDR_SYNC_REFRESH Signed-off-by: Rajesh Bhagat <rajesh.bhagat(a)nxp.com> --- arch/arm/Kconfig | 14 ++++++++++++++ arch/powerpc/cpu/mpc85xx/Kconfig | 13 +++++++++++++ arch/powerpc/cpu/mpc86xx/Kconfig | 1 + drivers/ddr/fsl/Kconfig | 12 ++++++++++++ include/configs/B4860QDS.h | 3 --- include/configs/BSC9132QDS.h | 1 - include/configs/MPC8536DS.h | 1 - include/configs/MPC8540ADS.h | 1 - include/configs/MPC8541CDS.h | 1 - include/configs/MPC8544DS.h | 1 - include/configs/MPC8548CDS.h | 1 - include/configs/MPC8555CDS.h | 1 - include/configs/MPC8560ADS.h | 1 - include/configs/MPC8568MDS.h | 1 - include/configs/MPC8569MDS.h | 1 - include/configs/MPC8572DS.h | 1 - include/configs/MPC8610HPCD.h | 1 - include/configs/MPC8641HPCN.h | 1 - include/configs/P1023RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T1040QDS.h | 1 - include/configs/T208xQDS.h | 2 -- include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/UCP1020.h | 1 - include/configs/km/kmp204x-common.h | 1 - include/configs/ls1021aqds.h | 1 - include/configs/ls1043aqds.h | 4 ---- include/configs/ls1043ardb.h | 2 -- include/configs/ls1046aqds.h | 4 ---- include/configs/ls1046ardb.h | 4 ---- include/configs/ls1088a_common.h | 4 ---- include/configs/ls2080a_common.h | 3 --- include/configs/ls2080a_emu.h | 2 -- include/configs/ls2080aqds.h | 3 --- include/configs/ls2080ardb.h | 2 -- include/configs/p1_p2_rdb_pc.h | 1 - include/configs/sbc8548.h | 1 - include/configs/socrates.h | 1 - include/configs/t4qds.h | 1 - include/configs/xpedite520x.h | 1 - include/configs/xpedite537x.h | 1 - scripts/config_whitelist.txt | 4 ---- 43 files changed, 40 insertions(+), 64 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index cefa8f40d0..829b34787a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -998,6 +998,7 @@ config TARGET_LS2080A_EMU select ARCH_MISC_INIT select ARM64 select ARMV8_MULTIENTRY + select FSL_DDR_SYNC_REFRESH help Support for Freescale LS2080A_EMU platform The LS2080A Development System (EMULATOR) is a pre silicon @@ -1024,6 +1025,7 @@ config TARGET_LS1088AQDS select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL + select FSL_DDR_INTERACTIVE if !SD_BOOT help Support for NXP LS1088AQDS platform The LS1088A Development System (QDS) is a high-performance @@ -1040,6 +1042,8 @@ config TARGET_LS2080AQDS select SUPPORT_SPL imply SCSI imply SCSI_AHCI + select FSL_DDR_BIST + select FSL_DDR_INTERACTIVE if !SPL help Support for Freescale LS2080AQDS platform The LS2080A Development System (QDS) is a high-performance @@ -1054,6 +1058,8 @@ config TARGET_LS2080ARDB select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL + select FSL_DDR_BIST + select FSL_DDR_INTERACTIVE if !SPL imply SCSI imply SCSI_AHCI help @@ -1172,6 +1178,7 @@ config TARGET_LS1088ARDB select ARMV8_MULTIENTRY select BOARD_LATE_INIT select SUPPORT_SPL + select FSL_DDR_INTERACTIVE if !SD_BOOT help Support for NXP LS1088ARDB platform. The LS1088A Reference design board (RDB) is a high-performance @@ -1190,6 +1197,7 @@ config TARGET_LS1021AQDS select LS1_DEEP_SLEEP select SUPPORT_SPL select SYS_FSL_DDR + select FSL_DDR_INTERACTIVE imply SCSI config TARGET_LS1021ATWR @@ -1229,6 +1237,7 @@ config TARGET_LS1043AQDS select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select SUPPORT_SPL + select FSL_DDR_INTERACTIVE if !SPL imply SCSI help Support for Freescale LS1043AQDS platform. @@ -1241,6 +1250,8 @@ config TARGET_LS1043ARDB select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select SUPPORT_SPL + select FSL_DDR_BIST if !SPL + select FSL_DDR_INTERACTIVE if !SPL imply SCSI help Support for Freescale LS1043ARDB platform. @@ -1254,6 +1265,7 @@ config TARGET_LS1046AQDS select BOARD_LATE_INIT select DM_SPI_FLASH if DM_SPI select SUPPORT_SPL + select FSL_DDR_INTERACTIVE if !SPL imply SCSI help Support for Freescale LS1046AQDS platform. @@ -1271,6 +1283,8 @@ config TARGET_LS1046ARDB select DM_SPI_FLASH if DM_SPI select POWER_MC34VR500 select SUPPORT_SPL + select FSL_DDR_BIST + select FSL_DDR_INTERACTIVE if !SPL imply SCSI help Support for Freescale LS1046ARDB platform. diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 309ca29460..0057f195b3 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -37,6 +37,7 @@ config TARGET_B4860QDS select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + select FSL_DDR_INTERACTIVE if !SPL_BUILD imply PANIC_HANG config TARGET_BSC9131RDB @@ -51,6 +52,7 @@ config TARGET_BSC9132QDS select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select BOARD_EARLY_INIT_F + select FSL_DDR_INTERACTIVE config TARGET_C29XPCIE bool "Support C29XPCIE" @@ -165,6 +167,7 @@ config TARGET_P1022DS config TARGET_P1023RDB bool "Support P1023RDB" select ARCH_P1023 + select FSL_DDR_INTERACTIVE imply CMD_EEPROM imply PANIC_HANG @@ -273,6 +276,7 @@ config TARGET_T1023RDB select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + select FSL_DDR_INTERACTIVE imply CMD_EEPROM imply PANIC_HANG @@ -282,6 +286,7 @@ config TARGET_T1024RDB select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + select FSL_DDR_INTERACTIVE imply CMD_EEPROM imply PANIC_HANG @@ -290,6 +295,7 @@ config TARGET_T1040QDS select ARCH_T1040 select BOARD_LATE_INIT if CHAIN_OF_TRUST select PHYS_64BIT + select FSL_DDR_INTERACTIVE imply CMD_EEPROM imply CMD_SATA imply PANIC_HANG @@ -344,6 +350,8 @@ config TARGET_T2080QDS select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE + select FSL_DDR_INTERACTIVE imply CMD_SATA config TARGET_T2080RDB @@ -360,6 +368,8 @@ config TARGET_T2081QDS select ARCH_T2081 select SUPPORT_SPL select PHYS_64BIT + select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE + select FSL_DDR_INTERACTIVE config TARGET_T4160QDS bool "Support T4160QDS" @@ -383,6 +393,7 @@ config TARGET_T4240QDS select BOARD_LATE_INIT if CHAIN_OF_TRUST select SUPPORT_SPL select PHYS_64BIT + select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE imply CMD_SATA imply PANIC_HANG @@ -391,6 +402,7 @@ config TARGET_T4240RDB select ARCH_T4240 select SUPPORT_SPL select PHYS_64BIT + select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE imply CMD_SATA imply PANIC_HANG @@ -402,6 +414,7 @@ config TARGET_KMP204X bool "Support kmp204x" select ARCH_P2041 select PHYS_64BIT + select FSL_DDR_INTERACTIVE imply CMD_CRAMFS imply FS_CRAMFS diff --git a/arch/powerpc/cpu/mpc86xx/Kconfig b/arch/powerpc/cpu/mpc86xx/Kconfig index 2cc180da38..0f253051f2 100644 --- a/arch/powerpc/cpu/mpc86xx/Kconfig +++ b/arch/powerpc/cpu/mpc86xx/Kconfig @@ -21,6 +21,7 @@ config TARGET_MPC8610HPCD config TARGET_MPC8641HPCN bool "Support MPC8641HPCN" select ARCH_MPC8641 + select FSL_DDR_INTERACTIVE imply SCSI config TARGET_XPEDITE517X diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig index c5bd8a8876..1b73df82de 100644 --- a/drivers/ddr/fsl/Kconfig +++ b/drivers/ddr/fsl/Kconfig @@ -20,6 +20,18 @@ config SYS_FSL_DDR_LE help Access DDR registers in little-endian +config FSL_DDR_BIST + bool + +config FSL_DDR_INTERACTIVE + bool + +config FSL_DDR_SYNC_REFRESH + bool + +config FSL_DDR_FIRST_SLOT_QUAD_CAPABLE + bool + menu "Freescale DDR controllers" depends on SYS_FSL_DDR diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 252e1272c3..42b3337216 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -194,9 +194,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DDR_SPD #define CONFIG_SYS_DDR_RAW_TIMING -#ifndef CONFIG_SPL_BUILD -#define CONFIG_FSL_DDR_INTERACTIVE -#endif #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS1 0x51 diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 49bb38279a..f385509daf 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -105,7 +105,6 @@ #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS1 0x54 /* I2C access */ #define SPD_EEPROM_ADDRESS2 0x56 /* I2C access */ -#define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 86a1233e32..1413b3dcfe 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -83,7 +83,6 @@ /* DDR Setup */ #define CONFIG_VERY_BIG_RAM -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index b8a9b5c638..13ca2c395d 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -67,7 +67,6 @@ /* DDR Setup */ #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 13ad04e279..e00a56e2fd 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -41,7 +41,6 @@ extern unsigned long get_clock_freq(void); /* DDR Setup */ #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 6ad0849cec..280b873aee 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -45,7 +45,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index b09cbab292..be600becfe 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -56,7 +56,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index bac8456825..5b3933412c 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -41,7 +41,6 @@ extern unsigned long get_clock_freq(void); /* DDR Setup */ #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index d28a35f87b..5ba2b6d643 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -66,7 +66,6 @@ /* DDR Setup */ #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 5da70bb83e..9b3485ed4b 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -44,7 +44,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 0edcc2ed72..de5a7ca959 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -68,7 +68,6 @@ extern unsigned long get_clock_freq(void); #endif /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index cff3ca9bce..13fbbb3044 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -73,7 +73,6 @@ /* DDR Setup */ #define CONFIG_VERY_BIG_RAM -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index a3f29c5f9e..b534d4758b 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -72,7 +72,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR_PHYS_LOW /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD for DDR */ #define CONFIG_DDR_SPD diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index bb6dd95d59..9318b190ae 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -97,7 +97,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * DDR Setup */ -#define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index ada00ae8bb..4f6ee22385 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -59,7 +59,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_DDR_SPD -#define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SDRAM_SIZE 512u /* DDR is 512M */ #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x50 diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 673d1112e2..2a0d4cf230 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -236,7 +236,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) -#define CONFIG_FSL_DDR_INTERACTIVE #if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 2d5c96f335..147ef71084 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -140,7 +140,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 1dcf2779d7..2da0fe09d2 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -189,9 +189,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 2 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) -#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE #define CONFIG_DDR_SPD -#define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index ddb60b3d6d..656ad5317b 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -175,7 +175,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 42252c7c42..f42a4f4af0 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -112,7 +112,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL 4 -#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE #define CONFIG_DDR_SPD diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index 1bbe9d9b37..6a0254a55b 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -133,7 +133,6 @@ #define CONFIG_DDR_SPD #endif #define CONFIG_SYS_SPD_BUS_NUM 1 -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_512M #define CONFIG_CHIP_SELECTS_PER_CTRL 1 diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index a8f7300c1e..948bb8de49 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -94,7 +94,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_DDR_SPD -#define CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 4ad98c69e6..d75ac4e57e 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -89,7 +89,6 @@ unsigned long get_board_ddr_clk(void); #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ #ifndef CONFIG_SYS_FSL_DDR4 #define CONFIG_SYS_DDR_RAW_TIMING #endif diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index ed07d9f28e..52b47ad670 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -28,10 +28,6 @@ unsigned long get_board_ddr_clk(void); #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 -#ifndef CONFIG_SPL -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#endif - #define CONFIG_DDR_ECC #ifdef CONFIG_DDR_ECC #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index a0d39878b8..6ab83d02a4 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -21,8 +21,6 @@ #ifndef CONFIG_SPL #define CONFIG_SYS_DDR_RAW_TIMING -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#define CONFIG_FSL_DDR_BIST #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 886fe723ba..6e36baf4ca 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -28,10 +28,6 @@ unsigned long get_board_ddr_clk(void); #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 -#ifndef CONFIG_SPL -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#endif - #define CONFIG_DDR_ECC #ifdef CONFIG_DDR_ECC #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 77b50dbdad..f22e863749 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -24,10 +24,6 @@ #define CONFIG_DDR_ECC #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#define CONFIG_FSL_DDR_BIST /* enable built-in memory test */ -#ifndef CONFIG_SPL -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#endif #ifdef CONFIG_SD_BOOT #define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1046ardb/ls1046ardb_pbi.cfg diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 95e6786e6c..e55c23631e 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -49,10 +49,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT -#if !defined(CONFIG_SD_BOOT) -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#endif - #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 235a757f75..a248e13443 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -36,9 +36,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT -#ifndef CONFIG_SPL -#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#endif #ifndef CONFIG_SYS_FSL_DDR4 #define CONFIG_SYS_DDR_RAW_TIMING #endif diff --git a/include/configs/ls2080a_emu.h b/include/configs/ls2080a_emu.h index 76ac5363c5..d5cb3e4df9 100644 --- a/include/configs/ls2080a_emu.h +++ b/include/configs/ls2080a_emu.h @@ -24,8 +24,6 @@ #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif -#define CONFIG_FSL_DDR_SYNC_REFRESH - #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) /* diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 2822811da5..df648e2675 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -42,7 +42,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_SYS_FSL_HAS_DP_DDR #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif -#define CONFIG_FSL_DDR_BIST /* enable built-in memory test */ /* SATA */ #define CONFIG_SCSI_AHCI_PLAT @@ -64,8 +63,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ENV_SECT_SIZE 0x20000 #endif -/* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */ - #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) #define CONFIG_SYS_NOR_AMASK_EARLY IFC_AMASK(64*1024*1024) diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index ef0f4ff48e..e10afae6d7 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -57,7 +57,6 @@ unsigned long get_board_sys_clk(void); #ifdef CONFIG_SYS_FSL_HAS_DP_DDR #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif -#define CONFIG_FSL_DDR_BIST /* enable built-in memory test */ /* SATA */ #define CONFIG_SCSI_AHCI_PLAT @@ -80,7 +79,6 @@ unsigned long get_board_sys_clk(void); #endif #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT) -/* undefined CONFIG_FSL_DDR_SYNC_REFRESH for simulator */ #define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 459ecf328f..2af10a2b75 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -264,7 +264,6 @@ #define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS 0x52 -#undef CONFIG_FSL_DDR_INTERACTIVE #if (defined(CONFIG_TARGET_P1020MBG) || defined(CONFIG_TARGET_P1020RDB_PD)) #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index f0b165591c..9df8604af7 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -83,7 +83,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #undef CONFIG_DDR_ECC /* only for ECC DDR module */ /* * A hardware errata caused the LBC SDRAM SPD and the DDR2 SPD diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 9fa8917a9b..3f84fabdb6 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -60,7 +60,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index bca5961206..bf37501912 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -73,7 +73,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 #define CONFIG_CHIP_SELECTS_PER_CTRL 4 -#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE #define CONFIG_DDR_SPD diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index 206f0c13a4..5737cfee95 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -25,7 +25,6 @@ /* * DDR config */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index e6eea8dfc2..22dd3c036e 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -33,7 +33,6 @@ /* * DDR config */ -#undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 8c88031546..a4e73ae56b 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -627,10 +627,6 @@ CONFIG_FSL_CADMUS CONFIG_FSL_CORENET CONFIG_FSL_CPLD CONFIG_FSL_DCU_SII9022A -CONFIG_FSL_DDR_BIST -CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE -CONFIG_FSL_DDR_INTERACTIVE -CONFIG_FSL_DDR_SYNC_REFRESH CONFIG_FSL_DEEP_SLEEP CONFIG_FSL_DEVICE_DISABLE CONFIG_FSL_DIU_CH7301 -- 2.17.1

3 2

[U-Boot] [PATCH 00/12] nxp: fix dhcp and efi boot support for various socs
by Mian Yousaf Kaukab 04 Mar '19

04 Mar '19

This patch series fixes dhcp and efi boot support for nxp ls1043a, ls1046a, ls1088a and ls208xa platforms. Patches are independent and can be cherry-picked individually. Thank you, Best regards, Yousaf Mian Yousaf Kaukab (12): nxp: ls1088a: fix dppa exit when using efi boot nxp: ls1088a: fix fsl-mc search path Revert "ls1088a: remove dhcp function from u-boot env as boot source" nxp: ls1088a: use default scan_dev_for_boot Revert "ls2080ardb: remove dhcp function from env as boot source" nxp: ls2080a: use default scan_dev_for_boot nxp: ls1046a: enable EFI_LOADER_BOUNCE_BUFFER nxp: ls1046a: enable dhcp boot nxp: ls1046a: use default scan_dev_for_boot nxp: ls1043a: enable EFI_LOADER_BOUNCE_BUFFER nxp: ls1043a: enable dhcp boot nxp: ls1043a: use default scan_dev_for_boot board/freescale/ls1088a/ls1088a.c | 12 +++++++----- configs/ls1043aqds_defconfig | 1 + configs/ls1043aqds_lpuart_defconfig | 1 + configs/ls1043aqds_nand_defconfig | 1 + configs/ls1043aqds_nor_ddr3_defconfig | 1 + configs/ls1043aqds_qspi_defconfig | 1 + configs/ls1043aqds_sdcard_ifc_defconfig | 1 + configs/ls1043aqds_sdcard_qspi_defconfig | 1 + configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1043aqds_tfa_defconfig | 1 + configs/ls1043ardb_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_defconfig | 1 + configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_nand_defconfig | 1 + configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_sdcard_defconfig | 1 + configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_tfa_defconfig | 1 + configs/ls1046aqds_SECURE_BOOT_defconfig | 1 + configs/ls1046aqds_defconfig | 1 + configs/ls1046aqds_lpuart_defconfig | 1 + configs/ls1046aqds_nand_defconfig | 1 + configs/ls1046aqds_qspi_defconfig | 1 + configs/ls1046aqds_sdcard_ifc_defconfig | 1 + configs/ls1046aqds_sdcard_qspi_defconfig | 1 + configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046aqds_tfa_defconfig | 1 + configs/ls1046ardb_emmc_defconfig | 1 + configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_qspi_defconfig | 1 + configs/ls1046ardb_qspi_spl_defconfig | 1 + configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_sdcard_defconfig | 1 + configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1046ardb_tfa_defconfig | 1 + include/configs/ls1043a_common.h | 9 ++------- include/configs/ls1046a_common.h | 10 ++-------- include/configs/ls1088ardb.h | 15 ++------------- include/configs/ls2080ardb.h | 15 ++------------- 39 files changed, 49 insertions(+), 46 deletions(-) -- 2.11.0

3 15

[U-Boot] [PATCH v2 1/2] x86: edison: Use proper number of serial interface
by Andy Shevchenko 04 Mar '19

04 Mar '19

The console is actually serial #2. When we would like to enable other ports, this would be not okay to mess up with the ordering. Thus, fix the number of default console interface to be 2. Reviewed-by: Bin Meng <bmeng.cn(a)gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- arch/x86/dts/edison.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/dts/edison.dts b/arch/x86/dts/edison.dts index 0dd72407ea..b59171cb50 100644 --- a/arch/x86/dts/edison.dts +++ b/arch/x86/dts/edison.dts @@ -17,11 +17,11 @@ compatible = "intel,edison"; aliases { - serial0 = &serial0; + serial2 = &serial2; }; chosen { - stdout-path = &serial0; + stdout-path = &serial2; }; cpus { @@ -53,7 +53,7 @@ 0x01000000 0x0 0x2000 0x2000 0 0xe000>; }; - serial0: serial@ff010180 { + serial2: serial@ff010180 { compatible = "intel,mid-uart"; reg = <0xff010180 0x100>; reg-shift = <0>; -- 2.20.1

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[U-Boot] [PATCH v2] x86: acpi: Not every platform has serial console a first device
by Andy Shevchenko 04 Mar '19

04 Mar '19

We may not do an assumption that current console device is always a first of UCLASS_SERIAL one. For example, on properly described Intel Edison board the console UART is a third one. Use current serial device as described in global data. Fixes: a61cbad78e67 ("dm: serial: Adjust serial_getinfo() to use proper API") Cc: Simon Glass <sjg(a)chromium.org> Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- arch/x86/lib/acpi_table.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index 04058a60d7..270274f6b3 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -347,7 +347,7 @@ static void acpi_create_spcr(struct acpi_spcr *spcr) uint serial_width; int access_size; int space_id; - int ret; + int ret = -ENODEV; /* Fill out header fields */ acpi_fill_header(header, "SPCR"); @@ -355,8 +355,8 @@ static void acpi_create_spcr(struct acpi_spcr *spcr) header->revision = 2; /* Read the device once, here. It is reused below */ - ret = uclass_first_device_err(UCLASS_SERIAL, &dev); - if (!ret) + dev = gd->cur_serial_dev; + if (dev) ret = serial_getinfo(dev, &serial_info); if (ret) serial_info.type = SERIAL_CHIP_UNKNOWN; -- 2.20.1

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[U-Boot] [PATCH v1 1/2] x86: acpi: Add DMA descriptors for SPI5 on Intel Tangier
by Andy Shevchenko 04 Mar '19

04 Mar '19

Intel Tangier SoC has a general purpose DMA which can serve to speed up communications on SPI and I2C serial buses. Provide DMA descriptors to utilize this capability in the future. Signed-off-by: Andy Shevchenko <andriy.shevchenko(a)linux.intel.com> --- arch/x86/include/asm/arch-tangier/acpi/southcluster.asl | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl index aad1bf0c87..e4d876ab78 100644 --- a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl +++ b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl @@ -189,6 +189,9 @@ Device (PCI0) "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 112 } GpioIo(Exclusive, PullUp, 0, 0, IoRestrictionOutputOnly, "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 113 } + + FixedDMA(0x000d, 0x0002, Width32bit, ) + FixedDMA(0x000c, 0x0003, Width32bit, ) }) Method (_CRS, 0, NotSerialized) -- 2.20.1

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