November 2019 - U-Boot

[U-Boot] [PATCH] arm: dts: Stratix10: change pad skew values for EMAC0 PHY driver
by Ooi, Joyce 22 Nov '19

22 Nov '19

The HPS EMAC0 drive strength is changed to 4mA because the initial 8mA drive strength has caused CE test to fail. This requires changes on the pad skew for EMAC0 PHY driver. Based on several measurements done, Tx clock does not require the extra 0.96ns delay which was needed in Arria10. Signed-off-by: Ooi, Joyce <joyce.ooi(a)intel.com> --- arch/arm/dts/socfpga_stratix10_socdk.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts index 8c7b422..b7b48a5 100755 --- a/arch/arm/dts/socfpga_stratix10_socdk.dts +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts @@ -74,7 +74,7 @@ rxd2-skew-ps = <420>; /* 0ps */ rxd3-skew-ps = <420>; /* 0ps */ txen-skew-ps = <0>; /* -420ps */ - txc-skew-ps = <1860>; /* 960ps */ + txc-skew-ps = <900>; /* 0ps */ rxdv-skew-ps = <420>; /* 0ps */ rxc-skew-ps = <1680>; /* 780ps */ }; -- 1.9.1

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[U-Boot] [PATCH] ARM: socfpga: Unreset NAND in SPL on Gen5
by Marek Vasut 22 Nov '19

22 Nov '19

In case the SPL on Gen5 loads U-Boot from NAND, unreset the NAND IP explicitly in the platform code as the denali-spl driver is not aware of DM at all. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Chin Liang See <chin.liang.see(a)intel.com> Cc: Dalon Westergreen <dwesterg(a)gmail.com> Cc: Dinh Nguyen <dinguyen(a)kernel.org> Cc: Ley Foon Tan <ley.foon.tan(a)intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt(a)gmail.com> Cc: Tien Fong Chee <tien.fong.chee(a)intel.com> --- arch/arm/mach-socfpga/spl_gen5.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index 47e63709ad..408e409375 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -138,6 +138,13 @@ void board_init_f(ulong dummy) if (ret) debug("Reset init failed: %d\n", ret); +#ifdef CONFIG_SPL_NAND_DENALI + struct socfpga_reset_manager *reset_manager_base = + (struct socfpga_reset_manager *)SOCFPGA_RSTMGR_ADDRESS; + + clrbits_le32(&reset_manager_base->per_mod_reset, BIT(4)); +#endif + /* enable console uart printing */ preloader_console_init(); -- 2.24.0.432.g9d3f5f5b63

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[U-Boot] [PATCH 0/5] board: ti: beagleboneai: add initial support
by Caleb Robey 22 Nov '19

22 Nov '19

The following patches 1) Introduce the emmc based board detection for BBAI due to a lack of eeprom onboard the BBAI (to be fixed in future revision of the board). 2) Minor changes to files to support dts and bbai boot overall 3) Add structures in the pinctrl to detect the beaglebone AI and add checks for the beaglebone AI in the board detection scheme 4) Add device tree file for BeagleBone AI 5) Enable beaglebone ai in am57xx_evm_defconfig Device tree has gone to mainline kernel found here: https://patchwork.kernel.org/patch/11254903/ Caleb Robey (5): board: ti: beagleboneai: emmc read changes board: ti: beagleboneai: add initial support board: ti: beagleboneai: IODELAY and pinmux changes board: ti: beagleboneai: add dts file board: ti: beagleboneai: enable in am57xx_evm_defconfig arch/arm/dts/Makefile | 1 + arch/arm/dts/am5729-beagleboneai.dts | 731 +++++++++++++++++++++++++++ arch/arm/dts/dra7.dtsi | 2 +- arch/arm/mach-omap2/omap5/hw_data.c | 1 + board/ti/am57xx/board.c | 37 ++ board/ti/am57xx/mux_data.h | 280 ++++++++++ board/ti/common/board_detect.c | 80 ++- board/ti/common/board_detect.h | 9 + configs/am57xx_evm_defconfig | 2 +- include/configs/am57xx_evm.h | 1 - include/environment/ti/boot.h | 4 +- 11 files changed, 1141 insertions(+), 7 deletions(-) create mode 100644 arch/arm/dts/am5729-beagleboneai.dts -- 2.17.1

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[U-Boot] [PATCH 1/2] usb: composite: fix possible alignment issues
by Simon Goldschmidt 21 Nov '19

21 Nov '19

Since upgrading to gcc9, warnings are issued: "taking address of packed member of ‘...’ may result in an unaligned pointer value" Fix this by converting two functions to use unaligned access since packed structures may be on an unaligned address, depending on USB hardware. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt(a)gmail.com> --- drivers/usb/gadget/composite.c | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c index 618a7d5016..cfc9512caa 100644 --- a/drivers/usb/gadget/composite.c +++ b/drivers/usb/gadget/composite.c @@ -12,8 +12,16 @@ #define USB_BUFSIZ 4096 +/* Helper type for accessing packed u16 pointers */ +typedef struct { __le16 val; } __packed __le16_packed; + static struct usb_composite_driver *composite; +static inline void le16_add_cpu_packed(__le16_packed *var, u16 val) +{ + var->val = cpu_to_le16(le16_to_cpu(var->val) + val); +} + /** * usb_add_function() - add a function to a configuration * @config: the configuration @@ -480,20 +488,20 @@ done: * the host side. */ -static void collect_langs(struct usb_gadget_strings **sp, __le16 *buf) +static void collect_langs(struct usb_gadget_strings **sp, void *buf) { const struct usb_gadget_strings *s; u16 language; - __le16 *tmp; + __le16_packed *tmp; while (*sp) { s = *sp; language = cpu_to_le16(s->language); - for (tmp = buf; *tmp && tmp < &buf[126]; tmp++) { - if (*tmp == language) + for (tmp = buf; tmp->val && tmp < &buf[126]; tmp++) { + if (tmp->val == language) goto repeat; } - *tmp++ = language; + tmp->val = language; repeat: sp++; } @@ -705,7 +713,8 @@ static int bos_desc(struct usb_composite_dev *cdev) */ usb_ext = cdev->req->buf + le16_to_cpu(bos->wTotalLength); bos->bNumDeviceCaps++; - le16_add_cpu(&bos->wTotalLength, USB_DT_USB_EXT_CAP_SIZE); + le16_add_cpu_packed((__le16_packed *)&bos->wTotalLength, + USB_DT_USB_EXT_CAP_SIZE); usb_ext->bLength = USB_DT_USB_EXT_CAP_SIZE; usb_ext->bDescriptorType = USB_DT_DEVICE_CAPABILITY; usb_ext->bDevCapabilityType = USB_CAP_TYPE_EXT; @@ -721,7 +730,8 @@ static int bos_desc(struct usb_composite_dev *cdev) ss_cap = cdev->req->buf + le16_to_cpu(bos->wTotalLength); bos->bNumDeviceCaps++; - le16_add_cpu(&bos->wTotalLength, USB_DT_USB_SS_CAP_SIZE); + le16_add_cpu_packed((__le16_packed *)&bos->wTotalLength, + USB_DT_USB_SS_CAP_SIZE); ss_cap->bLength = USB_DT_USB_SS_CAP_SIZE; ss_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY; ss_cap->bDevCapabilityType = USB_SS_CAP_TYPE; -- 2.20.1

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[U-Boot] [PATCHv2 1/5] smart-gateway-mt7688: Rework build time check for overwriting factory data
by Tom Rini 21 Nov '19

21 Nov '19

The board file has a build time check to ensure that we do not have the redundant environment overwriting the factory data. However, using the symbol CONFIG_ENV_SIZE_REDUND isn't strictly needed as that is always the same as CONFIG_ENV_SIZE. Use CONFIG_ENV_SIZE instead so that we can later drop CONFIG_ENV_SIZE_REDUND. Cc: Stefan Roese <sr(a)denx.de> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- Changes in v2: - As pointed out by Stefan's review, I should address the usage of ENV_SIZE_REDUND here first and remove it second. --- board/gardena/smart-gateway-mt7688/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/gardena/smart-gateway-mt7688/board.c b/board/gardena/smart-gateway-mt7688/board.c index bd494c84fc80..e9ffd42a8a68 100644 --- a/board/gardena/smart-gateway-mt7688/board.c +++ b/board/gardena/smart-gateway-mt7688/board.c @@ -18,7 +18,7 @@ #define FACTORY_DATA_OFFS 0xc0000 #define FACTORY_DATA_SECT_SIZE 0x10000 -#if ((CONFIG_ENV_OFFSET_REDUND + CONFIG_ENV_SIZE_REDUND) > FACTORY_DATA_OFFS) +#if ((CONFIG_ENV_OFFSET_REDUND + CONFIG_ENV_SIZE) > FACTORY_DATA_OFFS) #error "U-Boot image with environment too big (overlapping with factory-data)!" #endif #define FACTORY_DATA_USER_OFFS 0x140 -- 2.17.1

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[U-Boot] [PATCH v3 1/6] mx7ulp: Print the LDO mode status
by Fabio Estevam 21 Nov '19

21 Nov '19

As per the i.MX7ULP datasheet, it can boot in LDO enabled mode or LDO bypass mode. Print the LDO mode status in the U-Boot log for convenience. Signed-off-by: Fabio Estevam <festevam(a)gmail.com> --- Changes since v2: - None arch/arm/mach-imx/mx7ulp/soc.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c index 127fcfeea1..b9a108a514 100644 --- a/arch/arm/mach-imx/mx7ulp/soc.c +++ b/arch/arm/mach-imx/mx7ulp/soc.c @@ -131,6 +131,21 @@ const char *get_imx_type(u32 imxtype) return "7ULP"; } +#define PMC0_BASE_ADDR 0x410a1000 +#define PMC0_CTRL 0x28 +#define PMC0_CTRL_LDOEN BIT(31) + +static bool ldo_mode_is_enabled(void) +{ + unsigned int reg; + + reg = readl(PMC0_BASE_ADDR + PMC0_CTRL); + if (reg & PMC0_CTRL_LDOEN) + return true; + else + return false; +} + int print_cpuinfo(void) { u32 cpurev; @@ -159,6 +174,11 @@ int print_cpuinfo(void) break; } + if (ldo_mode_is_enabled()) + printf("PMC1: LDO enabled mode\n"); + else + printf("PMC1: LDO bypass mode\n"); + return 0; } #endif -- 2.17.1

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[U-Boot] [PATCH] arm: socfpga: add kernel parameter for immediate reboot
by Ooi, Joyce 21 Nov '19

21 Nov '19

Add Linux kernel line parameters for Stratix10 U-Boot. The "panic=-1" indicates the reset should occur immediately (without a delay) Signed-off-by: Thor Thayer <thor.thayer(a)linux.intel.com> Signed-off-by: Ooi, Joyce <joyce.ooi(a)intel.com> --- include/configs/socfpga_stratix10_socdk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h index 8e6ecf4..09ea066 100644 --- a/include/configs/socfpga_stratix10_socdk.h +++ b/include/configs/socfpga_stratix10_socdk.h @@ -88,7 +88,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); * CONFIG_BOOTARGS goes into the environment value "bootargs". * Do note the value will override also the chosen node in FDT blob. */ -#define CONFIG_BOOTARGS "earlycon" +#define CONFIG_BOOTARGS "earlycon panic=-1" #define CONFIG_BOOTCOMMAND "run fatscript; run mmcload;run linux_qspi_enable;" \ "run mmcboot" -- 1.9.1

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[U-Boot] [PATCH] board: altera: stratix10: add fitImage to support secure boot
by Ooi, Joyce 21 Nov '19

21 Nov '19

FitImage files are added to load Linux kernel image and U-boot image for Stratix10 Secure Boot. Signed-off-by: Ooi, Joyce <joyce.ooi(a)intel.com> --- board/altera/stratix10-socdk/its/kernel-sign.its | 51 ++++++++++++++++++++++++ board/altera/stratix10-socdk/its/uboot-sign.its | 41 +++++++++++++++++++ 2 files changed, 92 insertions(+) create mode 100644 board/altera/stratix10-socdk/its/kernel-sign.its create mode 100644 board/altera/stratix10-socdk/its/uboot-sign.its diff --git a/board/altera/stratix10-socdk/its/kernel-sign.its b/board/altera/stratix10-socdk/its/kernel-sign.its new file mode 100644 index 0000000..5136365 --- /dev/null +++ b/board/altera/stratix10-socdk/its/kernel-sign.its @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2019 Intel Corporation. All rights reserved + * + * SPDX-License-Identifier: GPL-2.0 + */ + +/dts-v1/; + +/ { + description = "Linux kernel image with FDT blob"; + #address-cells = <1>; + + images { + kernel { + description = "Linux Kernel"; + data = /incbin/("Image"); + type = "kernel"; + arch = "arm64"; + os = "linux"; + compression = "none"; + load = <0x2080000>; + entry = <0x2080000>; + hash { + algo = "sha256"; + }; + }; + fdt { + description = "Linux DTB"; + data = /incbin/("socfpga_stratix10_socdk.dtb"); + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + hash { + algo = "sha256"; + }; + }; + }; + configurations { + default = "conf"; + conf { + description = "Linux boot configuration"; + kernel = "kernel"; + fdt = "fdt"; + signature { + algo = "sha256,rsa4096"; + key-name-hint = "dev"; + sign-images = "fdt", "kernel"; + }; + }; + }; +}; diff --git a/board/altera/stratix10-socdk/its/uboot-sign.its b/board/altera/stratix10-socdk/its/uboot-sign.its new file mode 100644 index 0000000..16af921 --- /dev/null +++ b/board/altera/stratix10-socdk/its/uboot-sign.its @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2019 Intel Corporation. All rights reserved + * + * SPDX-License-Identifier: GPL-2.0 + */ + +/dts-v1/; + +/ { + description = "Authenticator"; + #address-cells = <1>; + + images { + standalone { + description = "Authenticator binary"; + data = /incbin/("../../../../u-boot.bin"); + type = "standalone"; + arch = "arm64"; + compression = "none"; + load = <0x1000>; + entry = <0x1000>; + os = "u-boot"; + hash { + algo = "sha256"; + }; + }; + }; + + configurations { + default = "conf"; + conf { + description = "Authenticator fitImage"; + standalone = "standalone"; + signature { + algo = "sha256,rsa4096"; + key-name-hint = "dev"; + sign-images = "standalone"; + }; + }; + }; +}; -- 1.9.1

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[U-Boot] [PATCH v3 022/108] x86: timer: Use a separate flag for whether timer is inited
by Simon Glass 21 Nov '19

21 Nov '19

At present the value of the timer base is used to determine whether the timer has been set up or not. It is true that the timer is essentially never exactly 0 when it is read. However 'time 0' may indicate the time that the machine was reset so it is useful to be able to denote that. Update the code to use a separate flag instead. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v3: None Changes in v2: None arch/x86/include/asm/global_data.h | 1 + drivers/timer/tsc_timer.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index 17a4d344913..7f3ada06f61 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -76,6 +76,7 @@ struct arch_global_data { uint8_t x86_mask; uint32_t x86_device; uint64_t tsc_base; /* Initial value returned by rdtsc() */ + bool tsc_inited; /* true if tsc is ready for use */ unsigned long clock_rate; /* Clock rate of timer in Hz */ void *new_fdt; /* Relocated FDT */ uint32_t bist; /* Built-in self test value */ diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c index f19d2237e4f..637c8ff25a5 100644 --- a/drivers/timer/tsc_timer.c +++ b/drivers/timer/tsc_timer.c @@ -394,7 +394,7 @@ static int tsc_timer_get_count(struct udevice *dev, u64 *count) static void tsc_timer_ensure_setup(bool early) { - if (gd->arch.tsc_base) + if (gd->arch.tsc_inited) return; gd->arch.tsc_base = rdtsc(); @@ -425,6 +425,7 @@ static void tsc_timer_ensure_setup(bool early) done: gd->arch.clock_rate = fast_calibrate * 1000000; } + gd->arch.tsc_inited = true; } static int tsc_timer_probe(struct udevice *dev) -- 2.23.0.866.gb869b98d4c-goog

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[U-Boot] [PATCH v3 000/108] x86: Add initial support for apollolake
by Simon Glass 21 Nov '19

21 Nov '19

Apollolake is an Intel SoC generation aimed at relatively low-end embedded systems. It was released in 2016 but has become more popular recently with some embedded boards using it. This series adds support for apollolake. As an example it adds an implementation of chromebook_coral (a large range of Chromebooks released in 2017). The series provides enough support to boot to a prompt. with LCD display, storage, USB, EC and keyboard. Since this is the first time U-Boot has used FSP2 there is quite a bit of refactoring needed. This series is available at u-boot-dm/coral-working Changes in v3: - Ad FSP-S support - Add CONFIG_TPL_X86_ASSUME_CPUID to reduce code size - Add Chrome OS EC support - Add FSP-S and VBT also - Add MMC, video, USB configs - Add SPL condition to the option - Add VBT signature - Add a driver for APL SPI for TPL (using of-platdata) - Add a proper SPI node and make the SPI flash node a child - Add a proper implementation of fsp_notify - Add a weak function to avoid errors on other platforms - Add an APL_SPI_FLASH_BOOT option to enable non-mmap boot - Add an extra size parameter to the find_next_mrc_cache() function - Add an fsp: tag - Add bootstage support - Add bootstage timing for memory-mapped reads - Add bootstage timing for reading vbt - Add fsp_locate_fsp to locate an fsp component - Add fspm_done() hook - Add fspm_done() hook to handle FSP-S wierdness (it breaks SPI flash) - Add help to CONFIG_FIT and don't make it 'default y' - Add more documentation - Add snapshot/restore for IRQs - Add spi alias in device tree - Add structures for FSP-S also - Add support for FSP-S component and VBT - Add support for of-platdata for TPL - Add the missing header file - Add two more defines for the CPU driver - Add two more operations to IRQ - Adjust fast_spi_cache_bios_region() to avoid using SPI driver - Change Fast-SPI driver into a helper file used by ICH SPI - Change the sandbox test from ITSS to IRQ - Convert code to use hex increased of decimal - Disable the bootcommand since it does nothing useful on coral - Don't allow BOOT_FROM_FAST_SPI_FLASH with FSP-S - Don't enable SPI flash in TPL by default - Don't imply SPI flash either - Don't include write() and erase() in TPL - Drop CONFIG_SPL_NET_SUPPORT - Drop calls to x86_cpu_init_f(), x86_cpu_reinit_f() - Drop patch '86: timer: Reduce timer code size in TPL on Intel CPUs' - Drop patch 'dm: core: Don't include ofnode functions with of-platdata' - Drop patch 'spi: sandbox: Add a test driver for sandbox SPI flash' - Drop patch 'spl: Allow SPL/TPL to use of-platdata without libfdt' - Drop patch 'x86: apollolake: Add definitions for the Intel Fast SPI interface' - Drop patch 'x86: timer: Set up the timer in timer_early_get_count()' - Drop struct fsp_usp_header as it is now in the API file - Drop unnecessary #else part of CONFIG_HAVE_MICROCODE - Drop unneeded Kconfig file - Drop unused code in lpc_configure_pads() - Enable video and USB3 - Expand comments for BOOT_FROM_FAST_SPI_FLASH - Fix 'autoallocation' typo - Fix 'err-%d' typo - Fix build error when debug UART is disabled - Fix build errors in sandbox_spl, etc - Fix mixed case in GPIO defines - Fix the incorrect value of CPU_ADDR_BITS - Fix value of LPC_BC_LE - Improve wording in commit message - Init the p2sb before the northbridge since the latter so it can use GPIOs - Merge in patch "x86: Add support for booting from Fast SPI" - Move an additional error handling fix from a future patch - Move line related to variable-cache into the next patch - Move location of fast_spi.h header file - Move mtrr_add_request() call into this patch - Move mtrr_add_request() call to next patch - Move pad programming into the hostbridge to reduce TPL device-tree size - Move the function to a common file instead of duplicating it - Move the get_mmap() method from the SPI_FLASH to the SPI uclass - Move the mrccache_get_region() change into this patch - Move write_pirq_routing_table() to avoid 64-bit build error - Only supress the 'MAC address from ROM' warning on sandbox - Reduce amount of early-pad data in TPL - Rename power-mgr uclass to acpi-pmc - Reorder file so that write() and erase() are together - Rework how pads configuration is defined in TPL and SPL - Rework patch now that the original CONFIG_IS_ENABLED() problems is fixed - Rewrite commit message - Set boot_loader_tolum_size to 0 - Set the environment variables at runtime to avoid other warnings - Shorten log_msg_ret() calls since the function name is always printed - Simplify types for fsp_locate_fsp() - Support TPL without CONFIG_TPL_SPI_SUPPORT - Support TPL without CONFIG_TPL_SPI_SUPPORT (reduces code size) - Support bootstage timing - Switch mmap to use SPI instead of SPI flash - Tidy up the pad settings in the device tree - Update commit message - Update device type to pci_dev_t - Update example error message to better show the intended purpose - Update mrccache livetree patch to just convert to livetree - Update the 'fsp' command for FSP2, instead of disabling it - Use a zero-based tsc timer - Use pci_get_devfn() - Use the IRQ uclass instead of ITSS - Use the IRQ uclass instead of creating a new ITSS uclass - Use the LPSS code from a separate file Changes in v2: - Change 'queensbay' to 'baytrail' in help - Drop probe() function - Fix 'proides' typo - Fix the Kconfig condition to avoid build errors on snow - Implement set_spi_protect() - Use SPI mmap() instead of SPI flash - s/board device/boot device/ Simon Glass (108): binman: Correct symbol calculation with non-zero image base binman: Add support for Intel FSP-S binman: Add support for Intel FSP-T binman: Fix up comment in intel-fsp-m binman: Add a library to access binman entries dm: gpio: Allow control of GPIO uclass in SPL dm: core: Fix offset_to_ofnode() with invalid offset dm: pci: Delay auto-config until after relocation dm: pci: Move pci_get_devfn() into a common file net: Move the checksum functions to lib/ i2c: Tidy up designware PCI support spl: Correct priority selection for image loaders x86: spi: Add helper functions for Intel Fast SPI spi: Add support for memory-mapped flash dm: doc: Correct of-platdata driver name fdt: Show the preprocessed .dts file on error RFC: sandbox: net: Suppress the MAC-address warnings Revert "RFC: sandbox: net: Suppress the MAC-address warnings" spl: Add a size check for TPL sandbox: pci: Create a new sandbox_pci_read_bar() function x86: timer: Set up the timer in timer_early_get_count() x86: timer: Use a separate flag for whether timer is inited x86: timer: Allow a timer base of 0 x86: spl: Support init of a PUNIT x86: tpl: Add a fake PCI bus x86: timer: Reduce timer code size in TPL on Intel CPUs x86: Drop unnecessary cpu code for TPL x86: Drop unnecessary interrupt code for TPL x86: Add a CPU init function for TPL x86: Move CPU init to before spl_init() x86: Don't print CPU info in TPL x86: Quieten TPL's jump_to_image_no_args() x86: power: Add an ACPI PMC uclass x86: sandbox: Add a PMC emulator and test x86: power: Add a 'pmc' command pci: Add support for p2sb uclass sandbox: Add PCI driver and test for p2sb x86: Move UCLASS_IRQ into a separate file sandbox: Add a test for IRQ x86: Define the SPL image start x86: Reduce mrccache record alignment size x86: Correct mrccache find_next_mrc_cache() calculation x86: Adjust mrccache_get_region() to use livetree x86: Adjust mrccache_get_region() to support get_mmap() x86: Add a new global_data member for the cache record x86: Tidy up error handling in mrccache_save() x86: Update mrccache to support multiple caches x86: Add mrccache support for a 'variable' cache x86: Move fsp_prepare_mrc_cache() to fsp1 directory x86: Set the DRAM banks to reflect real location x86: Set up the MTRR for SDRAM x86: Don't imply libfdt or SPI flash in TPL x86: Allow removal of standard PCH drivers x86: Allow interrupt to happen once x86: fsp: Make graphics support common to FSP1/2 x86: fsp: Correct wrong header inlude in fsp_support.c x86: fsp: Add FSP2 base support x86: fsp: Set up an MTRR for the graphics frame buffer x86: fsp: Add a new arch_fsp_init_r() hook x86: fsp: Allow remembering the location of FSP-S x86: fsp: Make the notify API call common x86: Don't include the BIOS emulator in TPL x86: Add an option to include a FIT x86: Add support for newer CAR schemes x86: Disable microcode section for FSP2 x86: Update the fsp command for FSP2 x86: Update .dtsi file for FSP2 x86: Add an option to control the position of U-Boot x86: Add an option to control the position of SPL x86: Add an fdtmap and image-header x86: Don't repeat microcode in U-Boot if not needed x86: Separate out U-Boot and device tree in ROM image x86: Make MSR_PKG_POWER_SKU common spi: Correct operations check in dm_spi_xfer() x86: spi: Don't enable SPI_FLASH_BAR by default spi: ich: Move init function just above probe() spi: ich: Move the protection/lockdown code into a function spi: ich: Convert to livetree spi: ich: Fix header order spi: ich: Various small tidy-ups spi: ich: Add mmio_base to struct ich_spi_platdata spi: ich: Correct max-size bug in ich_spi_adjust_size() spi: ich: Support of-platdata for fast-spi spi: ich: Support hardware sequencing spi: ich: Add support for get_mmap() method spi: ich: Add TPL support spi: ich: Add Apollolake support mtd: spi: Export spi_flash_std_probe() x86: apollolake: Add basic IO addresses x86: apollolake: Add PMC driver x86: apollolake: Add low-power subsystem (lpss) support x86: apollolake: Add UART driver x86: apollolake: Add GPIO driver i2c: designware: Add apollolake support x86: apollolake: Add systemagent driver x86: apollolake: Add hostbridge driver x86: apollolake: Add ITSS driver x86: apollolake: Add LPC driver x86: apollolake: Add PCH driver x86: apollolake: Add PUNIT driver x86: apollolake: Add SPL loaders x86: apollolake: Add a CPU driver x86: apollolake: Add SPL/TPL init x86: apollolake: Add P2SB driver x86: apollolake: Add Kconfig and Makefile x86: apollolake: Add FSP structures x86: apollolake: Add FSP support x86: Add chromebook_coral Kconfig | 9 +- Makefile | 10 +- arch/Kconfig | 7 +- arch/arm/include/asm/omap_gpio.h | 2 +- arch/arm/mach-at91/include/mach/at91sam9260.h | 2 +- arch/arm/mach-davinci/include/mach/gpio.h | 2 +- arch/arm/mach-omap2/am33xx/board.c | 4 +- arch/arm/mach-omap2/omap3/board.c | 2 +- arch/arm/mach-omap2/omap5/hwinit.c | 2 +- arch/sandbox/cpu/state.c | 1 + arch/sandbox/dts/sandbox.dtsi | 14 + arch/sandbox/dts/test.dts | 31 + arch/sandbox/include/asm/test.h | 11 + arch/x86/Kconfig | 101 ++- arch/x86/cpu/Makefile | 3 +- arch/x86/cpu/apollolake/Kconfig | 87 ++ arch/x86/cpu/apollolake/Makefile | 28 + arch/x86/cpu/apollolake/cpu.c | 51 ++ arch/x86/cpu/apollolake/cpu_spl.c | 278 ++++++ arch/x86/cpu/apollolake/fsp_m.c | 210 +++++ arch/x86/cpu/apollolake/fsp_s.c | 665 +++++++++++++++ arch/x86/cpu/apollolake/gpio.c | 735 ++++++++++++++++ arch/x86/cpu/apollolake/hostbridge.c | 220 +++++ arch/x86/cpu/apollolake/itss.c | 214 +++++ arch/x86/cpu/apollolake/lpc.c | 141 ++++ arch/x86/cpu/apollolake/lpss.c | 31 + arch/x86/cpu/apollolake/p2sb.c | 167 ++++ arch/x86/cpu/apollolake/pch.c | 36 + arch/x86/cpu/apollolake/pmc.c | 216 +++++ arch/x86/cpu/apollolake/punit.c | 121 +++ arch/x86/cpu/apollolake/spl.c | 202 +++++ arch/x86/cpu/apollolake/systemagent.c | 19 + arch/x86/cpu/apollolake/uart.c | 141 ++++ arch/x86/cpu/broadwell/sdram.c | 8 +- arch/x86/cpu/cpu.c | 4 + arch/x86/cpu/i386/cpu.c | 49 +- arch/x86/cpu/i386/interrupt.c | 13 + arch/x86/cpu/intel_common/Makefile | 9 + arch/x86/cpu/intel_common/car2.S | 490 +++++++++++ arch/x86/cpu/intel_common/car2_uninit.S | 87 ++ arch/x86/cpu/intel_common/fast_spi.c | 73 ++ arch/x86/cpu/irq.c | 13 - arch/x86/cpu/ivybridge/sdram.c | 8 +- arch/x86/cpu/quark/dram.c | 8 +- arch/x86/cpu/start_from_spl.S | 1 + arch/x86/cpu/u-boot-spl.lds | 5 +- arch/x86/dts/Makefile | 1 + arch/x86/dts/chromebook_coral.dts | 790 ++++++++++++++++++ arch/x86/dts/u-boot.dtsi | 84 +- arch/x86/include/asm/arch-apollolake/cpu.h | 27 + .../asm/arch-apollolake/fsp/fsp_configs.h | 14 + .../asm/arch-apollolake/fsp/fsp_m_upd.h | 123 +++ .../asm/arch-apollolake/fsp/fsp_s_upd.h | 292 +++++++ .../include/asm/arch-apollolake/fsp/fsp_vpd.h | 11 + arch/x86/include/asm/arch-apollolake/gpio.h | 191 +++++ .../include/asm/arch-apollolake/gpio_apl.h | 491 +++++++++++ .../include/asm/arch-apollolake/gpio_defs.h | 398 +++++++++ arch/x86/include/asm/arch-apollolake/iomap.h | 28 + arch/x86/include/asm/arch-apollolake/itss.h | 43 + arch/x86/include/asm/arch-apollolake/lpc.h | 61 ++ arch/x86/include/asm/arch-apollolake/pch.h | 9 + arch/x86/include/asm/arch-apollolake/pm.h | 19 + .../include/asm/arch-apollolake/systemagent.h | 31 + arch/x86/include/asm/arch-apollolake/uart.h | 17 + arch/x86/include/asm/arch-broadwell/cpu.h | 1 - .../include/asm/arch-ivybridge/model_206ax.h | 1 - arch/x86/include/asm/cpu.h | 1 + arch/x86/include/asm/fast_spi.h | 68 ++ arch/x86/include/asm/fsp/fsp_api.h | 27 + arch/x86/include/asm/fsp/fsp_support.h | 7 - arch/x86/include/asm/fsp1/fsp_api.h | 21 +- arch/x86/include/asm/fsp2/fsp_api.h | 60 ++ arch/x86/include/asm/fsp2/fsp_internal.h | 97 +++ arch/x86/include/asm/global_data.h | 25 +- arch/x86/include/asm/lpss.h | 11 + arch/x86/include/asm/mrccache.h | 14 +- arch/x86/include/asm/msr-index.h | 9 +- arch/x86/include/asm/pci.h | 11 + arch/x86/include/asm/spl.h | 1 + arch/x86/include/asm/u-boot-x86.h | 9 + arch/x86/lib/Makefile | 2 + arch/x86/lib/fsp/Makefile | 3 + arch/x86/lib/fsp/fsp_common.c | 20 - arch/x86/lib/fsp/fsp_dram.c | 35 +- arch/x86/lib/{fsp1 => fsp}/fsp_graphics.c | 6 +- arch/x86/lib/fsp/fsp_support.c | 2 +- arch/x86/lib/fsp1/Makefile | 1 - arch/x86/lib/fsp1/fsp_common.c | 20 + arch/x86/lib/fsp1/fsp_dram.c | 8 +- arch/x86/lib/fsp2/Makefile | 10 + arch/x86/lib/fsp2/fsp_common.c | 13 + arch/x86/lib/fsp2/fsp_dram.c | 77 ++ arch/x86/lib/fsp2/fsp_init.c | 157 ++++ arch/x86/lib/fsp2/fsp_meminit.c | 97 +++ arch/x86/lib/fsp2/fsp_silicon_init.c | 52 ++ arch/x86/lib/fsp2/fsp_support.c | 129 +++ arch/x86/lib/mrccache.c | 183 ++-- arch/x86/lib/pirq_routing.c | 10 + arch/x86/lib/spl.c | 44 + arch/x86/lib/tpl.c | 37 +- board/freescale/imx8qm_mek/imx8qm_mek.c | 2 +- board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- board/gateworks/gw_ventana/Kconfig | 3 + board/google/Kconfig | 15 + board/google/chromebook_coral/Kconfig | 43 + board/google/chromebook_coral/MAINTAINERS | 6 + board/google/chromebook_coral/Makefile | 5 + board/google/chromebook_coral/coral.c | 18 + board/toradex/apalis-imx8/apalis-imx8.c | 2 +- cmd/Kconfig | 8 + cmd/Makefile | 1 + cmd/pmc.c | 81 ++ cmd/x86/fsp.c | 59 +- common/board_r.c | 13 + common/spl/Kconfig | 8 + configs/chromebook_coral_defconfig | 101 +++ configs/chromebook_samus_tpl_defconfig | 1 + configs/sandbox64_defconfig | 2 + configs/sandbox_defconfig | 2 + configs/sandbox_flattree_defconfig | 4 + configs/sandbox_spl_defconfig | 4 + configs/tools-only_defconfig | 2 + doc/board/google/chromebook_coral.rst | 238 ++++++ doc/driver-model/of-plat.rst | 2 +- drivers/Makefile | 2 + drivers/core/uclass.c | 4 +- drivers/core/util.c | 20 + drivers/gpio/Kconfig | 22 + drivers/gpio/Makefile | 4 +- drivers/gpio/at91_gpio.c | 6 +- drivers/gpio/atmel_pio4.c | 2 +- drivers/gpio/da8xx_gpio.c | 6 +- drivers/gpio/da8xx_gpio.h | 2 +- drivers/gpio/mxc_gpio.c | 4 +- drivers/gpio/mxs_gpio.c | 4 +- drivers/gpio/omap_gpio.c | 6 +- drivers/gpio/sunxi_gpio.c | 8 +- drivers/i2c/Makefile | 3 + drivers/i2c/designware_i2c.c | 104 +-- drivers/i2c/designware_i2c.h | 35 + drivers/i2c/dw_i2c_pci.c | 96 +++ drivers/i2c/i2c-uclass.c | 6 +- drivers/i2c/muxes/pca954x.c | 4 +- drivers/misc/Kconfig | 42 + drivers/misc/Makefile | 5 + drivers/misc/irq-uclass.c | 53 ++ drivers/misc/irq_sandbox.c | 55 ++ drivers/misc/p2sb-uclass.c | 209 +++++ drivers/misc/p2sb_emul.c | 272 ++++++ drivers/misc/p2sb_sandbox.c | 44 + drivers/misc/sandbox_adder.c | 60 ++ drivers/mmc/fsl_esdhc_imx.c | 13 +- drivers/mmc/omap_hsmmc.c | 2 +- drivers/mtd/spi/sf_probe.c | 2 +- drivers/net/designware.c | 10 +- drivers/net/designware.h | 4 +- drivers/net/fec_mxc.c | 6 +- drivers/net/fec_mxc.h | 2 +- drivers/net/mvneta.c | 4 +- drivers/net/mvpp2.c | 8 +- drivers/net/sun8i_emac.c | 12 +- drivers/pch/Kconfig | 18 + drivers/pch/Makefile | 4 +- drivers/pci/pci-aardvark.c | 4 +- drivers/pci/pci-uclass.c | 26 +- drivers/pci/pci_sandbox.c | 1 + drivers/pci/pcie_dw_mvebu.c | 4 +- drivers/power/Kconfig | 2 + drivers/power/acpi_pmc/Kconfig | 34 + drivers/power/acpi_pmc/Makefile | 6 + drivers/power/acpi_pmc/acpi-pmc-uclass.c | 242 ++++++ drivers/power/acpi_pmc/pmc_emul.c | 246 ++++++ drivers/power/acpi_pmc/sandbox.c | 97 +++ drivers/spi/Kconfig | 1 - drivers/spi/atmel_spi.c | 10 +- drivers/spi/designware_spi.c | 4 +- drivers/spi/ich.c | 519 +++++++++--- drivers/spi/ich.h | 46 +- drivers/spi/sandbox_spi.c | 11 + drivers/spi/spi-uclass.c | 19 +- drivers/timer/Kconfig | 22 + drivers/timer/tsc_timer.c | 15 +- drivers/tpm/tpm2_tis_spi.c | 2 +- include/binman.h | 27 + include/bootstage.h | 3 + include/config_uncmd_spl.h | 1 - include/configs/at91-sama5_common.h | 5 +- include/configs/chromebook_coral.h | 31 + include/configs/gw_ventana.h | 1 - include/configs/mx6ul_14x14_evk.h | 1 + include/dm/ofnode.h | 2 +- include/dm/pci.h | 21 + include/dm/uclass-id.h | 2 + include/init.h | 11 + include/irq.h | 88 ++ include/p2sb.h | 127 +++ include/pci.h | 12 +- include/power/acpi_pmc.h | 185 ++++ include/spi.h | 29 +- include/spi_flash.h | 12 + include/spl.h | 4 +- lib/Kconfig | 10 + lib/Makefile | 3 +- lib/binman.c | 48 ++ lib/net_utils.c | 48 ++ net/Makefile | 1 - net/checksum.c | 59 -- scripts/Makefile.lib | 4 +- scripts/Makefile.uncmd_spl | 1 - test/dm/Makefile | 3 + test/dm/irq.c | 32 + test/dm/p2sb.c | 28 + test/dm/pmc.c | 33 + test/dm/sf.c | 9 + tools/binman/README.entries | 33 + tools/binman/elf.py | 4 +- tools/binman/etype/intel_fsp_m.py | 2 +- tools/binman/etype/intel_fsp_s.py | 27 + tools/binman/etype/intel_fsp_t.py | 26 + tools/binman/ftest.py | 13 + tools/binman/test/153_intel_fsp_s.dts | 14 + tools/binman/test/154_intel_fsp_t.dts | 14 + tools/binman/test/u_boot_binman_syms.lds | 2 +- 223 files changed, 11883 insertions(+), 619 deletions(-) create mode 100644 arch/x86/cpu/apollolake/Kconfig create mode 100644 arch/x86/cpu/apollolake/Makefile create mode 100644 arch/x86/cpu/apollolake/cpu.c create mode 100644 arch/x86/cpu/apollolake/cpu_spl.c create mode 100644 arch/x86/cpu/apollolake/fsp_m.c create mode 100644 arch/x86/cpu/apollolake/fsp_s.c create mode 100644 arch/x86/cpu/apollolake/gpio.c create mode 100644 arch/x86/cpu/apollolake/hostbridge.c create mode 100644 arch/x86/cpu/apollolake/itss.c create mode 100644 arch/x86/cpu/apollolake/lpc.c create mode 100644 arch/x86/cpu/apollolake/lpss.c create mode 100644 arch/x86/cpu/apollolake/p2sb.c create mode 100644 arch/x86/cpu/apollolake/pch.c create mode 100644 arch/x86/cpu/apollolake/pmc.c create mode 100644 arch/x86/cpu/apollolake/punit.c create mode 100644 arch/x86/cpu/apollolake/spl.c create mode 100644 arch/x86/cpu/apollolake/systemagent.c create mode 100644 arch/x86/cpu/apollolake/uart.c create mode 100644 arch/x86/cpu/intel_common/car2.S create mode 100644 arch/x86/cpu/intel_common/car2_uninit.S create mode 100644 arch/x86/cpu/intel_common/fast_spi.c create mode 100644 arch/x86/dts/chromebook_coral.dts create mode 100644 arch/x86/include/asm/arch-apollolake/cpu.h create mode 100644 arch/x86/include/asm/arch-apollolake/fsp/fsp_configs.h create mode 100644 arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h create mode 100644 arch/x86/include/asm/arch-apollolake/fsp/fsp_s_upd.h create mode 100644 arch/x86/include/asm/arch-apollolake/fsp/fsp_vpd.h create mode 100644 arch/x86/include/asm/arch-apollolake/gpio.h create mode 100644 arch/x86/include/asm/arch-apollolake/gpio_apl.h create mode 100644 arch/x86/include/asm/arch-apollolake/gpio_defs.h create mode 100644 arch/x86/include/asm/arch-apollolake/iomap.h create mode 100644 arch/x86/include/asm/arch-apollolake/itss.h create mode 100644 arch/x86/include/asm/arch-apollolake/lpc.h create mode 100644 arch/x86/include/asm/arch-apollolake/pch.h create mode 100644 arch/x86/include/asm/arch-apollolake/pm.h create mode 100644 arch/x86/include/asm/arch-apollolake/systemagent.h create mode 100644 arch/x86/include/asm/arch-apollolake/uart.h create mode 100644 arch/x86/include/asm/fast_spi.h create mode 100644 arch/x86/include/asm/fsp/fsp_api.h create mode 100644 arch/x86/include/asm/fsp2/fsp_api.h create mode 100644 arch/x86/include/asm/fsp2/fsp_internal.h create mode 100644 arch/x86/include/asm/lpss.h rename arch/x86/lib/{fsp1 => fsp}/fsp_graphics.c (95%) create mode 100644 arch/x86/lib/fsp2/Makefile create mode 100644 arch/x86/lib/fsp2/fsp_common.c create mode 100644 arch/x86/lib/fsp2/fsp_dram.c create mode 100644 arch/x86/lib/fsp2/fsp_init.c create mode 100644 arch/x86/lib/fsp2/fsp_meminit.c create mode 100644 arch/x86/lib/fsp2/fsp_silicon_init.c create mode 100644 arch/x86/lib/fsp2/fsp_support.c create mode 100644 board/google/chromebook_coral/Kconfig create mode 100644 board/google/chromebook_coral/MAINTAINERS create mode 100644 board/google/chromebook_coral/Makefile create mode 100644 board/google/chromebook_coral/coral.c create mode 100644 cmd/pmc.c create mode 100644 configs/chromebook_coral_defconfig create mode 100644 doc/board/google/chromebook_coral.rst create mode 100644 drivers/i2c/dw_i2c_pci.c create mode 100644 drivers/misc/irq-uclass.c create mode 100644 drivers/misc/irq_sandbox.c create mode 100644 drivers/misc/p2sb-uclass.c create mode 100644 drivers/misc/p2sb_emul.c create mode 100644 drivers/misc/p2sb_sandbox.c create mode 100644 drivers/misc/sandbox_adder.c create mode 100644 drivers/power/acpi_pmc/Kconfig create mode 100644 drivers/power/acpi_pmc/Makefile create mode 100644 drivers/power/acpi_pmc/acpi-pmc-uclass.c create mode 100644 drivers/power/acpi_pmc/pmc_emul.c create mode 100644 drivers/power/acpi_pmc/sandbox.c create mode 100644 include/binman.h create mode 100644 include/configs/chromebook_coral.h create mode 100644 include/dm/pci.h create mode 100644 include/irq.h create mode 100644 include/p2sb.h create mode 100644 include/power/acpi_pmc.h create mode 100644 lib/binman.c delete mode 100644 net/checksum.c create mode 100644 test/dm/irq.c create mode 100644 test/dm/p2sb.c create mode 100644 test/dm/pmc.c create mode 100644 tools/binman/etype/intel_fsp_s.py create mode 100644 tools/binman/etype/intel_fsp_t.py create mode 100644 tools/binman/test/153_intel_fsp_s.dts create mode 100644 tools/binman/test/154_intel_fsp_t.dts -- 2.23.0.866.gb869b98d4c-goog

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