January 2019 - U-Boot

[U-Boot] [PATCH v5.1 01/26] clk: Add Allwinner A64 CLK driver
by Jagan Teki 08 Jan '19

08 Jan '19

Add initial clock driver for Allwinner A64. Implement USB clock enable and disable functions for OHCI, EHCI, OTG and USBPHY gate and clock registers via ccu clk gate table. Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard(a)bootlin.com> --- Changes for v5.1: - s/CCU_CLK_F_INIT_DONE/CCU_CLK_F_IS_VALID - Use ccu_flags instead of ccu_clk_flags since reset flags is included arch/arm/include/asm/arch-sunxi/ccu.h | 65 +++++++++++++++++++++++ drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/sunxi/Kconfig | 18 +++++++ drivers/clk/sunxi/Makefile | 9 ++++ drivers/clk/sunxi/clk_a64.c | 46 +++++++++++++++++ drivers/clk/sunxi/clk_sunxi.c | 74 +++++++++++++++++++++++++++ 7 files changed, 214 insertions(+) create mode 100644 arch/arm/include/asm/arch-sunxi/ccu.h create mode 100644 drivers/clk/sunxi/Kconfig create mode 100644 drivers/clk/sunxi/Makefile create mode 100644 drivers/clk/sunxi/clk_a64.c create mode 100644 drivers/clk/sunxi/clk_sunxi.c diff --git a/arch/arm/include/asm/arch-sunxi/ccu.h b/arch/arm/include/asm/arch-sunxi/ccu.h new file mode 100644 index 0000000000..24efe0ab0a --- /dev/null +++ b/arch/arm/include/asm/arch-sunxi/ccu.h @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Amarula Solutions. + * Author: Jagan Teki <jagan(a)amarulasolutions.com> + */ + +#ifndef _ASM_ARCH_CCU_H +#define _ASM_ARCH_CCU_H + +/** + * enum ccu_flags - ccu clock flags + * + * @CCU_CLK_F_IS_VALID: is given clock gate is valid? + */ +enum ccu_flags { + CCU_CLK_F_IS_VALID = BIT(0), +}; + +/** + * struct ccu_clk_gate - ccu clock gate + * @off: gate offset + * @bit: gate bit + * @flags: ccu clock gate flags + */ +struct ccu_clk_gate { + u16 off; + u32 bit; + enum ccu_flags flags; +}; + +#define GATE(_off, _bit) { \ + .off = _off, \ + .bit = _bit, \ + .flags = CCU_CLK_F_IS_VALID, \ +} + +/** + * struct ccu_desc - clock control unit descriptor + * + * @gates: clock gates + */ +struct ccu_desc { + const struct ccu_clk_gate *gates; +}; + +/** + * struct ccu_priv - sunxi clock control unit + * + * @base: base address + * @desc: ccu descriptor + */ +struct ccu_priv { + void *base; + const struct ccu_desc *desc; +}; + +/** + * sunxi_clk_probe - common sunxi clock probe + * @dev: clock device + */ +int sunxi_clk_probe(struct udevice *dev); + +extern struct clk_ops sunxi_clk_ops; + +#endif /* _ASM_ARCH_CCU_H */ diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index eadf7f8250..51c931b906 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -104,6 +104,7 @@ source "drivers/clk/imx/Kconfig" source "drivers/clk/mvebu/Kconfig" source "drivers/clk/owl/Kconfig" source "drivers/clk/renesas/Kconfig" +source "drivers/clk/sunxi/Kconfig" source "drivers/clk/tegra/Kconfig" source "drivers/clk/uniphier/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 9acbb1a650..6a4ff9143b 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -22,6 +22,7 @@ obj-$(CONFIG_CLK_HSDK) += clk-hsdk-cgu.o obj-$(CONFIG_CLK_MPC83XX) += mpc83xx_clk.o obj-$(CONFIG_CLK_OWL) += owl/ obj-$(CONFIG_CLK_RENESAS) += renesas/ +obj-$(CONFIG_ARCH_SUNXI) += sunxi/ obj-$(CONFIG_CLK_STM32F) += clk_stm32f.o obj-$(CONFIG_CLK_STM32MP1) += clk_stm32mp1.o obj-$(CONFIG_CLK_UNIPHIER) += uniphier/ diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig new file mode 100644 index 0000000000..bf5ecb3801 --- /dev/null +++ b/drivers/clk/sunxi/Kconfig @@ -0,0 +1,18 @@ +config CLK_SUNXI + bool "Clock support for Allwinner SoCs" + depends on CLK && ARCH_SUNXI + default y + help + This enables support for common clock driver API on Allwinner + SoCs. + +if CLK_SUNXI + +config CLK_SUN50I_A64 + bool "Clock driver for Allwinner A64" + default MACH_SUN50I + help + This enables common clock driver support for platforms based + on Allwinner A64 SoC. + +endif # CLK_SUNXI diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile new file mode 100644 index 0000000000..fb20d28333 --- /dev/null +++ b/drivers/clk/sunxi/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2018 Amarula Solutions. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-$(CONFIG_CLK_SUNXI) += clk_sunxi.o + +obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c new file mode 100644 index 0000000000..803a2f711d --- /dev/null +++ b/drivers/clk/sunxi/clk_a64.c @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Amarula Solutions. + * Author: Jagan Teki <jagan(a)amarulasolutions.com> + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/arch/ccu.h> +#include <dt-bindings/clock/sun50i-a64-ccu.h> + +static const struct ccu_clk_gate a64_gates[] = { + [CLK_BUS_OTG] = GATE(0x060, BIT(23)), + [CLK_BUS_EHCI0] = GATE(0x060, BIT(24)), + [CLK_BUS_EHCI1] = GATE(0x060, BIT(25)), + [CLK_BUS_OHCI0] = GATE(0x060, BIT(28)), + [CLK_BUS_OHCI1] = GATE(0x060, BIT(29)), + + [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)), + [CLK_USB_PHY1] = GATE(0x0cc, BIT(9)), + [CLK_USB_HSIC] = GATE(0x0cc, BIT(10)), + [CLK_USB_HSIC_12M] = GATE(0x0cc, BIT(11)), + [CLK_USB_OHCI0] = GATE(0x0cc, BIT(16)), + [CLK_USB_OHCI1] = GATE(0x0cc, BIT(17)), +}; + +static const struct ccu_desc a64_ccu_desc = { + .gates = a64_gates, +}; + +static const struct udevice_id a64_ccu_ids[] = { + { .compatible = "allwinner,sun50i-a64-ccu", + .data = (ulong)&a64_ccu_desc }, + { } +}; + +U_BOOT_DRIVER(clk_sun50i_a64) = { + .name = "sun50i_a64_ccu", + .id = UCLASS_CLK, + .of_match = a64_ccu_ids, + .priv_auto_alloc_size = sizeof(struct ccu_priv), + .ops = &sunxi_clk_ops, + .probe = sunxi_clk_probe, +}; diff --git a/drivers/clk/sunxi/clk_sunxi.c b/drivers/clk/sunxi/clk_sunxi.c new file mode 100644 index 0000000000..62ce2994e4 --- /dev/null +++ b/drivers/clk/sunxi/clk_sunxi.c @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Amarula Solutions. + * Author: Jagan Teki <jagan(a)amarulasolutions.com> + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/io.h> +#include <asm/arch/ccu.h> +#include <linux/log2.h> + +static const struct ccu_clk_gate *priv_to_gate(struct ccu_priv *priv, + unsigned long id) +{ + return &priv->desc->gates[id]; +} + +static int sunxi_set_gate(struct clk *clk, bool on) +{ + struct ccu_priv *priv = dev_get_priv(clk->dev); + const struct ccu_clk_gate *gate = priv_to_gate(priv, clk->id); + u32 reg; + + if (!(gate->flags & CCU_CLK_F_IS_VALID)) { + printf("%s: (CLK#%ld) unhandled\n", __func__, clk->id); + return 0; + } + + debug("%s: (CLK#%ld) off#0x%x, BIT(%d)\n", __func__, + clk->id, gate->off, ilog2(gate->bit)); + + reg = readl(priv->base + gate->off); + if (on) + reg |= gate->bit; + else + reg &= ~gate->bit; + + writel(reg, priv->base + gate->off); + + return 0; +} + +static int sunxi_clk_enable(struct clk *clk) +{ + return sunxi_set_gate(clk, true); +} + +static int sunxi_clk_disable(struct clk *clk) +{ + return sunxi_set_gate(clk, false); +} + +struct clk_ops sunxi_clk_ops = { + .enable = sunxi_clk_enable, + .disable = sunxi_clk_disable, +}; + +int sunxi_clk_probe(struct udevice *dev) +{ + struct ccu_priv *priv = dev_get_priv(dev); + + priv->base = dev_read_addr_ptr(dev); + if (!priv->base) + return -ENOMEM; + + priv->desc = (const struct ccu_desc *)dev_get_driver_data(dev); + if (!priv->desc) + return -EINVAL; + + return 0; +} -- 2.18.0.321.gffc6fa0e3

1 1

[U-Boot] [RESEND PATCH v2 0/6] subject: efi_loader: add HII database protocol
by AKASHI Takahiro 08 Jan '19

08 Jan '19

HII database protocol is the last missing (major?) piece of code so that we can run unmodified EDKII's shell and UEFI SCT on EFI-enabled u-boot. The original code was initially written by Leif and Rob a year ago[1], and now I'm reworking it. The implementation has not been much enhanced from the original, but I tried to give it clearer implementation to be able to add more functionality easily later on. I also addressed the comments by Alex[2] and added a self test on request of Heinrich. HII configuration routing protocol and access protocol have only a skeleton and should be implemented when we need to have *drivers* that require configuration mechanism. # Please note that a bunch of warnings are generated by checkpatch.pl, # but there are also good reasons for not fixing them. Concerns (if any): * missing features (see the commit log of patch#2) * unaligned access to *packed* structure in a package list should be cared? Changes in v2 (Nov 16, 2018) * add some descriptions to newly added functions * rename EFI_HII_PACKAGE_[TYPE|LEN]_* to __EFI_HII_PACKAGE_[TYPE|LEN]_* as they are of internal use only * cast a return value (of efi_status_t) to "unsigned int" for printing [1] https://lists.denx.de/pipermail/u-boot/2017-October/308999.html [2] https://lists.denx.de/pipermail/u-boot/2017-October/309116.html AKASHI Takahiro (4): efi: hii: add guid package support efi: hii: add keyboard layout package support efi: hii: add HII config routing/access protocols efi_selftest: add HII database protocols test Akashi, Takahiro (1): lib: add u16_strcpy/strdup functions Leif Lindholm (1): efi_loader: Initial HII database protocols include/charset.h | 23 + include/efi_api.h | 419 +++++++++ include/efi_loader.h | 8 + lib/charset.c | 29 + lib/efi_loader/Makefile | 1 + lib/efi_loader/efi_boottime.c | 18 + lib/efi_loader/efi_hii.c | 1053 ++++++++++++++++++++++ lib/efi_loader/efi_hii_config.c | 146 +++ lib/efi_selftest/Makefile | 1 + lib/efi_selftest/efi_selftest_hii.c | 1046 +++++++++++++++++++++ lib/efi_selftest/efi_selftest_hii_data.c | 452 ++++++++++ 11 files changed, 3196 insertions(+) create mode 100644 lib/efi_loader/efi_hii.c create mode 100644 lib/efi_loader/efi_hii_config.c create mode 100644 lib/efi_selftest/efi_selftest_hii.c create mode 100644 lib/efi_selftest/efi_selftest_hii_data.c -- 2.19.1

8 29

[U-Boot] [PATCH v4 1/1] efi_loader: refactor switch to non-secure mode
by Heinrich Schuchardt 08 Jan '19

08 Jan '19

Refactor the switch from supervisor to hypervisor to a new function called at the beginning of do_bootefi(). Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- v4 Correct comments. Use tab in Makefile. v3 Move weak function to common/bootm.c. Rename functions. Add more comments. Avoid static variable for jump buffer. v2 Use weak function with implementation in arch directories --- arch/arm/cpu/armv7/Makefile | 1 + arch/arm/cpu/armv7/exception_level.c | 56 ++++++++++++++++++++++ arch/arm/cpu/armv8/Makefile | 1 + arch/arm/cpu/armv8/exception_level.c | 55 +++++++++++++++++++++ cmd/bootefi.c | 72 ++-------------------------- common/bootm.c | 10 ++++ include/bootm.h | 5 ++ 7 files changed, 132 insertions(+), 68 deletions(-) create mode 100644 arch/arm/cpu/armv7/exception_level.c create mode 100644 arch/arm/cpu/armv8/exception_level.c diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 4f4647c90ac..8c955d0d528 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_SYS_ARM_MPU) += mpu_v7r.o ifneq ($(CONFIG_SPL_BUILD),y) obj-$(CONFIG_EFI_LOADER) += sctlr.o +obj-$(CONFIG_ARMV7_NONSEC) += exception_level.o endif ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y) diff --git a/arch/arm/cpu/armv7/exception_level.c b/arch/arm/cpu/armv7/exception_level.c new file mode 100644 index 00000000000..e116435623f --- /dev/null +++ b/arch/arm/cpu/armv7/exception_level.c @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Switch to non-secure mode + * + * Copyright (c) 2018 Heinrich Schuchardt + * + * This module contains the ARMv7 specific code required for leaving the + * secure mode before booting an operating system. + */ + +#include <common.h> +#include <bootm.h> +#include <asm/armv7.h> +#include <asm/secure.h> +#include <asm/setjmp.h> + +/** + * entry_non_secure() - entry point when switching to non-secure mode + * + * When switching to non-secure mode switch_to_non_secure_mode() calls this + * function passing a jump buffer. We use this jump buffer to restore the + * original stack and register state. + * + * @non_secure_jmp: jump buffer for restoring stack and registers + */ +static void entry_non_secure(struct jmp_buf_data *non_secure_jmp) +{ + dcache_enable(); + debug("Reached non-secure mode\n"); + + /* Restore stack and registers saved in switch_to_non_secure_mode() */ + longjmp(non_secure_jmp, 1); +} + +/** + * switch_to_non_secure_mode() - switch to non-secure mode + * + * Operating systems may expect to run in non-secure mode. Here we check if + * we are running in secure mode and switch to non-secure mode if necessary. + */ +void switch_to_non_secure_mode(void) +{ + static bool is_nonsec; + struct jmp_buf_data non_secure_jmp; + + if (armv7_boot_nonsec() && !is_nonsec) { + if (setjmp(&non_secure_jmp)) + return; + dcache_disable(); /* flush cache before switch to HYP */ + armv7_init_nonsec(); + is_nonsec = true; + secure_ram_addr(_do_nonsec_entry)(entry_non_secure, + (uintptr_t)&non_secure_jmp, + 0, 0); + } +} diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index 52c8daa0496..8b0b887a696 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -14,6 +14,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_ARMV8_SPL_EXCEPTION_VECTORS) += exceptions.o else obj-y += exceptions.o +obj-y += exception_level.o endif obj-y += cache.o obj-y += tlb.o diff --git a/arch/arm/cpu/armv8/exception_level.c b/arch/arm/cpu/armv8/exception_level.c new file mode 100644 index 00000000000..245af3f1d4e --- /dev/null +++ b/arch/arm/cpu/armv8/exception_level.c @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Switch to non-secure mode + * + * Copyright (c) 2018 Heinrich Schuchardt + * + * This module contains the ARMv8 specific code required to adjust the exception + * level before booting an operating system. + */ + +#include <common.h> +#include <bootm.h> +#include <asm/setjmp.h> + +/** + * entry_non_secure() - entry point when switching to non-secure mode + * + * When switching to non-secure mode switch_to_non_secure_mode() calls this + * function passing a jump buffer. We use this jump buffer to restore the + * original stack and register state. + * + * @non_secure_jmp: jump buffer for restoring stack and registers + */ +static void entry_non_secure(struct jmp_buf_data *non_secure_jmp) +{ + dcache_enable(); + debug("Reached non-secure mode\n"); + + /* Restore stack and registers saved in switch_to_non_secure_mode() */ + longjmp(non_secure_jmp, 1); +} + +/** + * switch_to_non_secure_mode() - switch to non-secure mode + * + * Exception level EL3 is meant to be used by the secure monitor only (ARM + * trusted firmware being one embodiment). The operating system shall be + * started at exception level EL2. So here we check the exception level + * and switch it if necessary. + */ +void switch_to_non_secure_mode(void) +{ + struct jmp_buf_data non_secure_jmp; + + /* On AArch64 we need to make sure we call our payload in < EL3 */ + if (current_el() == 3) { + if (setjmp(&non_secure_jmp)) + return; + dcache_disable(); /* flush cache before switch to EL2 */ + + /* Move into EL2 and keep running there */ + armv8_switch_to_el2((uintptr_t)&non_secure_jmp, 0, 0, 0, + (uintptr_t)entry_non_secure, ES_TO_AARCH64); + } +} diff --git a/cmd/bootefi.c b/cmd/bootefi.c index 23639ced7a0..4c87dca808f 100644 --- a/cmd/bootefi.c +++ b/cmd/bootefi.c @@ -5,8 +5,9 @@ * Copyright (c) 2016 Alexander Graf */ -#include <charset.h> #include <common.h> +#include <bootm.h> +#include <charset.h> #include <command.h> #include <dm.h> #include <efi_loader.h> @@ -21,10 +22,5 @@ #include <asm-generic/unaligned.h> #include <linux/linkage.h> -#ifdef CONFIG_ARMV7_NONSEC -#include <asm/armv7.h> -#include <asm/secure.h> -#endif - DECLARE_GLOBAL_DATA_PTR; @@ -233,34 +228,6 @@ static efi_status_t efi_do_enter( return ret; } -#ifdef CONFIG_ARM64 -static efi_status_t efi_run_in_el2(EFIAPI efi_status_t (*entry)( - efi_handle_t image_handle, struct efi_system_table *st), - efi_handle_t image_handle, struct efi_system_table *st) -{ - /* Enable caches again */ - dcache_enable(); - - return efi_do_enter(image_handle, st, entry); -} -#endif - -#ifdef CONFIG_ARMV7_NONSEC -static bool is_nonsec; - -static efi_status_t efi_run_in_hyp(EFIAPI efi_status_t (*entry)( - efi_handle_t image_handle, struct efi_system_table *st), - efi_handle_t image_handle, struct efi_system_table *st) -{ - /* Enable caches again */ - dcache_enable(); - - is_nonsec = true; - - return efi_do_enter(image_handle, st, entry); -} -#endif - /* * efi_carve_out_dt_rsv() - Carve out DT reserved memory ranges * @@ -440,39 +407,6 @@ static efi_status_t do_bootefi_exec(void *efi, goto err_prepare; } -#ifdef CONFIG_ARM64 - /* On AArch64 we need to make sure we call our payload in < EL3 */ - if (current_el() == 3) { - smp_kick_all_cpus(); - dcache_disable(); /* flush cache before switch to EL2 */ - - /* Move into EL2 and keep running there */ - armv8_switch_to_el2((ulong)entry, - (ulong)&image_obj->header, - (ulong)&systab, 0, (ulong)efi_run_in_el2, - ES_TO_AARCH64); - - /* Should never reach here, efi exits with longjmp */ - while (1) { } - } -#endif - -#ifdef CONFIG_ARMV7_NONSEC - if (armv7_boot_nonsec() && !is_nonsec) { - dcache_disable(); /* flush cache before switch to HYP */ - - armv7_init_nonsec(); - secure_ram_addr(_do_nonsec_entry)( - efi_run_in_hyp, - (uintptr_t)entry, - (uintptr_t)&image_obj->header, - (uintptr_t)&systab); - - /* Should never reach here, efi exits with longjmp */ - while (1) { } - } -#endif - ret = efi_do_enter(&image_obj->header, &systab, entry); err_prepare: @@ -558,6 +492,8 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) /* Allow unaligned memory access */ allow_unaligned(); + switch_to_non_secure_mode(); + /* Initialize EFI drivers */ r = efi_init_obj_list(); if (r != EFI_SUCCESS) { diff --git a/common/bootm.c b/common/bootm.c index 8bf84ebcb7e..e34d3ac8f44 100644 --- a/common/bootm.c +++ b/common/bootm.c @@ -915,6 +915,16 @@ static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc, return buf; } + +/** + * switch_to_non_secure_mode() - switch to non-secure mode + * + * This routine is overridden by architectures requiring this feature. + */ +void __weak switch_to_non_secure_mode(void) +{ +} + #else /* USE_HOSTCC */ void memmove_wd(void *to, void *from, size_t len, ulong chunksz) diff --git a/include/bootm.h b/include/bootm.h index 0501414e0dc..81b7252bd4d 100644 --- a/include/bootm.h +++ b/include/bootm.h @@ -80,4 +80,9 @@ int bootm_decomp_image(int comp, ulong load, ulong image_start, int type, */ void board_quiesce_devices(void); +/** + * switch_to_non_secure_mode() - switch to non-secure mode + */ +void switch_to_non_secure_mode(void); + #endif -- 2.19.2

1 0

[U-Boot] [PATCH v2 1/2] cmd: bmp: Make integer-to-pointer cast platform, independent
by Adam Heinrich 08 Jan '19

08 Jan '19

This patch fixes the int-to-pointer-cast warning on aarch64. Signed-off-by: Adam Heinrich <adam(a)adamh.cz> --- cmd/bmp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmd/bmp.c b/cmd/bmp.c index b8af784590..00f0256a30 100644 --- a/cmd/bmp.c +++ b/cmd/bmp.c @@ -57,7 +57,7 @@ struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp, bmp = dst; /* align to 32-bit-aligned-address + 2 */ - bmp = (struct bmp_image *)((((unsigned int)dst + 1) & ~3) + 2); + bmp = (struct bmp_image *)((((uintptr_t)dst + 1) & ~3) + 2); if (gunzip(bmp, CONFIG_SYS_VIDEO_LOGO_MAX_SIZE, map_sysmem(addr, 0), &len) != 0) { -- 2.17.1

2 1

[U-Boot] [PATCH v2 2/2] rpi: Enable command bmp
by Adam Heinrich 08 Jan '19

08 Jan '19

This patch enables the bmp command (with gzip support enabled) on all Raspberry Pi boards. The value of CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (required by CONFIG_VIDEO_BMP_GZIP) is set to match resolution of the "official" 7 inch LCD. Signed-off-by: Adam Heinrich <adam(a)adamh.cz> Cc: Alexander Graf <agraf(a)suse.de> --- configs/rpi_0_w_defconfig | 1 + configs/rpi_2_defconfig | 1 + configs/rpi_3_32b_defconfig | 1 + configs/rpi_3_defconfig | 1 + configs/rpi_defconfig | 1 + include/configs/rpi.h | 7 +++++++ 6 files changed, 12 insertions(+) diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig index 66b0de31b6..18b7cfef76 100644 --- a/configs/rpi_0_w_defconfig +++ b/configs/rpi_0_w_defconfig @@ -9,6 +9,7 @@ CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_CMD_BMP=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig index ba75e52dda..6c04a622ff 100644 --- a/configs/rpi_2_defconfig +++ b/configs/rpi_2_defconfig @@ -9,6 +9,7 @@ CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_CMD_BMP=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig index bbcdd91e90..c856621a03 100644 --- a/configs/rpi_3_32b_defconfig +++ b/configs/rpi_3_32b_defconfig @@ -10,6 +10,7 @@ CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_CMD_BMP=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig index 54b6303c2d..7d2eff0517 100644 --- a/configs/rpi_3_defconfig +++ b/configs/rpi_3_defconfig @@ -10,6 +10,7 @@ CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_CMD_BMP=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig index e7820cb147..7b3f82c0d3 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig @@ -9,6 +9,7 @@ CONFIG_MISC_INIT_R=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_CMD_BMP=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 9ce41767a9..284e3a98de 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -63,6 +63,13 @@ #define CONFIG_LCD_DT_SIMPLEFB #define CONFIG_VIDEO_BCM2835 +#ifdef CONFIG_DM_VIDEO +#define CONFIG_BMP_24BPP +#define CONFIG_BMP_32BPP +#define CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((800 * 480 * 4) + 54) +#endif + #ifdef CONFIG_CMD_USB #define CONFIG_TFTP_TSIZE #endif -- 2.17.1

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[U-Boot] [PATCH PATCH v1 0/2] Use CONFIG_USB_GADGET and CONFIG_SPL_USB_GADGET to select the USB gadget code
by Jean-Jacques Hiblot 08 Jan '19

08 Jan '19

This series applies on top of u-boot-dfu. This series renames CONFIG_SPL_USB_GADGET_SUPPORT to CONFIG_SPL_USB_GADGET for consistency. It also uses CONFIG_USB_GADGET to compile-in the gadget code. This make sure that the code is not included if it is not needed. Some defconfigs had to be updated as they relied on the gadget code to be always compiled. TRAVIS: https://travis-ci.org/jjhiblot/u-boot/builds/476452900 Jean-Jacques Hiblot (2): Kconfig: rename CONFIG_SPL_USB_GADGET_SUPPORT as CONFIG_SPL_USB_GADGET usb: Make compiling gadget support optional Makefile | 4 ++-- arch/arm/mach-imx/mx6/Kconfig | 2 +- arch/arm/mach-imx/spl.c | 2 +- common/spl/Kconfig | 4 ++-- configs/am335x_boneblack_vboot_defconfig | 2 +- configs/am335x_evm_usbspl_defconfig | 2 +- configs/am43xx_evm_defconfig | 2 +- configs/am43xx_hs_evm_defconfig | 2 +- configs/apalis_imx6_defconfig | 2 +- configs/cm_t3517_defconfig | 1 + configs/cm_t35_defconfig | 1 + configs/colibri_imx6_defconfig | 2 +- configs/display5_factory_defconfig | 2 +- configs/duovero_defconfig | 1 + configs/igep0032_defconfig | 1 + configs/igep00x0_defconfig | 1 + configs/imx6q_logic_defconfig | 2 +- configs/mx6memcal_defconfig | 2 +- configs/mx6sabresd_defconfig | 2 +- configs/omap3_zoom1_defconfig | 1 + configs/omap4_panda_defconfig | 1 + configs/omap4_sdp4430_defconfig | 1 + configs/pico-hobbit-imx6ul_defconfig | 2 +- configs/pico-hobbit-imx7d_defconfig | 2 +- configs/pico-imx6ul_defconfig | 2 +- configs/pico-imx7d_defconfig | 2 +- configs/pico-pi-imx6ul_defconfig | 2 +- configs/pico-pi-imx7d_defconfig | 2 +- configs/spear300_usbtty_defconfig | 2 ++ configs/spear300_usbtty_nand_defconfig | 2 ++ configs/spear310_usbtty_defconfig | 2 ++ configs/spear310_usbtty_nand_defconfig | 2 ++ configs/spear310_usbtty_pnor_defconfig | 2 ++ configs/spear320_usbtty_defconfig | 2 ++ configs/spear320_usbtty_nand_defconfig | 2 ++ configs/spear320_usbtty_pnor_defconfig | 2 ++ configs/spear600_usbtty_defconfig | 2 ++ configs/spear600_usbtty_nand_defconfig | 2 ++ drivers/Makefile | 6 +++--- drivers/usb/gadget/Makefile | 2 +- scripts/Makefile.spl | 2 +- 41 files changed, 55 insertions(+), 27 deletions(-) -- 2.7.4

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[U-Boot] [PATCH] arm64: zynqmp: Fix tcminit help text alignment
by Michal Simek 08 Jan '19

08 Jan '19

Trivial patch. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- board/xilinx/zynqmp/cmds.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c index 3e039ccb13ea..321670d4e3ea 100644 --- a/board/xilinx/zynqmp/cmds.c +++ b/board/xilinx/zynqmp/cmds.c @@ -174,11 +174,11 @@ static char zynqmp_help_text[] = "zynqmp mmio_write address mask value - write value after masking to\n" " address\n" #ifdef CONFIG_DEFINE_TCM_OCM_MMAP - "zynqmp tcminit mode - Initialize the TCM with zeros. TCM needs to be\n" - " initialized before accessing to avoid ECC\n" - " errors. mode specifies in which mode TCM has\n" - " to be initialized. Supported modes will be\n" - " lock(0)/split(1)\n" + "zynqmp tcminit mode - Initialize the TCM with zeros. TCM needs to be\n" + " initialized before accessing to avoid ECC\n" + " errors. mode specifies in which mode TCM has\n" + " to be initialized. Supported modes will be\n" + " lock(0)/split(1)\n" #endif ; #endif -- 1.9.1

1 0

[U-Boot] Bogus message about SCSI during build
by Andy Shevchenko 08 Jan '19

08 Jan '19

Hi! Since X86 implies SCSI and Intel Edison board does not use it, I have got a ===================== WARNING ====================== This board does not use CONFIG_DM_SCSI. Please update the storage controller to use CONFIG_DM_SCSI before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/MIGRATION.txt for more info. ==================================================== Is anybody aware of? -- With Best Regards, Andy Shevchenko

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[U-Boot] [PATCH 1/1] efi_loader: refactor switch to non-secure mode
by Heinrich Schuchardt 08 Jan '19

08 Jan '19

Refactor the switch from supervisor to hypervisor to a new function called at the beginning of do_bootefi(). Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- v3 Move weak function to common/bootm.c. Rename functions. Add more comments. Avoid static variable for jump buffer. v2 Use weak function with implementation in arch directories --- arch/arm/cpu/armv7/Makefile | 1 + arch/arm/cpu/armv7/exception_level.c | 56 ++++++++++++++++++++++ arch/arm/cpu/armv8/Makefile | 1 + arch/arm/cpu/armv8/exception_level.c | 55 +++++++++++++++++++++ cmd/bootefi.c | 72 ++-------------------------- common/bootm.c | 10 ++++ include/bootm.h | 5 ++ 7 files changed, 132 insertions(+), 68 deletions(-) create mode 100644 arch/arm/cpu/armv7/exception_level.c create mode 100644 arch/arm/cpu/armv8/exception_level.c diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 4f4647c90ac..8c955d0d528 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_SYS_ARM_MPU) += mpu_v7r.o ifneq ($(CONFIG_SPL_BUILD),y) obj-$(CONFIG_EFI_LOADER) += sctlr.o +obj-$(CONFIG_ARMV7_NONSEC) += exception_level.o endif ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y) diff --git a/arch/arm/cpu/armv7/exception_level.c b/arch/arm/cpu/armv7/exception_level.c new file mode 100644 index 00000000000..e116435623f --- /dev/null +++ b/arch/arm/cpu/armv7/exception_level.c @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Switch to non-secure mode + * + * Copyright (c) 2018 Heinrich Schuchardt + * + * This module contains the ARMv7 specific code required for leaving the + * secure mode before booting an operating system. + */ + +#include <common.h> +#include <bootm.h> +#include <asm/armv7.h> +#include <asm/secure.h> +#include <asm/setjmp.h> + +/** + * entry_non_secure() - entry point when switching to non-secure mode + * + * When switching to non-secure mode switch_to_non_secure_mode() calls this + * function passing a jump buffer. We use this jump buffer to restoring the + * original stack and register state. + * + * @non_secure_jmp: jump buffer for restoring stack and registers + */ +static void entry_non_secure(struct jmp_buf_data *non_secure_jmp) +{ + dcache_enable(); + debug("Reached non-secure mode\n"); + + /* Restore stack and registers saved in switch_to_non_secure_mode() */ + longjmp(non_secure_jmp, 1); +} + +/** + * switch_to_non_secure_mode() - switch to non-secure mode + * + * Operating systems are expected to run in non-secure mode. Here we check if + * we are running in secure mode and switch to non-secure mode if necessary. + */ +void switch_to_non_secure_mode(void) +{ + static bool is_nonsec; + struct jmp_buf_data non_secure_jmp; + + if (armv7_boot_nonsec() && !is_nonsec) { + if (setjmp(&non_secure_jmp)) + return; + dcache_disable(); /* flush cache before switch to HYP */ + armv7_init_nonsec(); + is_nonsec = true; + secure_ram_addr(_do_nonsec_entry)(entry_non_secure, + (uintptr_t)&non_secure_jmp, + 0, 0); + } +} diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index 52c8daa0496..8b0b887a696 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -14,6 +14,7 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_ARMV8_SPL_EXCEPTION_VECTORS) += exceptions.o else obj-y += exceptions.o +obj-y += exception_level.o endif obj-y += cache.o obj-y += tlb.o diff --git a/arch/arm/cpu/armv8/exception_level.c b/arch/arm/cpu/armv8/exception_level.c new file mode 100644 index 00000000000..245af3f1d4e --- /dev/null +++ b/arch/arm/cpu/armv8/exception_level.c @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Switch to non-secure mode + * + * Copyright (c) 2018 Heinrich Schuchardt + * + * This module contains the ARMv8 specific code required to adjust the exception + * level before booting an operating system. + */ + +#include <common.h> +#include <bootm.h> +#include <asm/setjmp.h> + +/** + * entry_non_secure() - entry point when switching to non-secure mode + * + * When switching to non-secure mode switch_to_non_secure_mode() calls this + * function passing a jump buffer. We use this jump buffer to restoring the + * original stack and register state. + * + * @non_secure_jmp: jump buffer for restoring stack and registers + */ +static void entry_non_secure(struct jmp_buf_data *non_secure_jmp) +{ + dcache_enable(); + debug("Reached non-secure mode\n"); + + /* Restore stack and registers saved in switch_to_non_secure_mode() */ + longjmp(non_secure_jmp, 1); +} + +/** + * switch_to_non_secure_mode() - switch to non-secure mode + * + * Exception level EL3 is meant to be used by the secure monitor only (ARM + * trusted firmware being one embodiment). The operating system shall be + * started at exception level EL2. So here we check the exception level + * and switch it if necessary. + */ +void switch_to_non_secure_mode(void) +{ + struct jmp_buf_data non_secure_jmp; + + /* On AArch64 we need to make sure we call our payload in < EL3 */ + if (current_el() == 3) { + if (setjmp(&non_secure_jmp)) + return; + dcache_disable(); /* flush cache before switch to EL2 */ + + /* Move into EL2 and keep running there */ + armv8_switch_to_el2((uintptr_t)&non_secure_jmp, 0, 0, 0, + (uintptr_t)entry_non_secure, ES_TO_AARCH64); + } +} diff --git a/cmd/bootefi.c b/cmd/bootefi.c index 23639ced7a0..4c87dca808f 100644 --- a/cmd/bootefi.c +++ b/cmd/bootefi.c @@ -5,8 +5,9 @@ * Copyright (c) 2016 Alexander Graf */ -#include <charset.h> #include <common.h> +#include <bootm.h> +#include <charset.h> #include <command.h> #include <dm.h> #include <efi_loader.h> @@ -21,17 +22,11 @@ #include <asm-generic/unaligned.h> #include <linux/linkage.h> -#ifdef CONFIG_ARMV7_NONSEC -#include <asm/armv7.h> -#include <asm/secure.h> -#endif - DECLARE_GLOBAL_DATA_PTR; #define OBJ_LIST_NOT_INITIALIZED 1 static efi_status_t efi_obj_list_initialized = OBJ_LIST_NOT_INITIALIZED; - static struct efi_device_path *bootefi_image_path; static struct efi_device_path *bootefi_device_path; @@ -233,34 +228,6 @@ static efi_status_t efi_do_enter( return ret; } -#ifdef CONFIG_ARM64 -static efi_status_t efi_run_in_el2(EFIAPI efi_status_t (*entry)( - efi_handle_t image_handle, struct efi_system_table *st), - efi_handle_t image_handle, struct efi_system_table *st) -{ - /* Enable caches again */ - dcache_enable(); - - return efi_do_enter(image_handle, st, entry); -} -#endif - -#ifdef CONFIG_ARMV7_NONSEC -static bool is_nonsec; - -static efi_status_t efi_run_in_hyp(EFIAPI efi_status_t (*entry)( - efi_handle_t image_handle, struct efi_system_table *st), - efi_handle_t image_handle, struct efi_system_table *st) -{ - /* Enable caches again */ - dcache_enable(); - - is_nonsec = true; - - return efi_do_enter(image_handle, st, entry); -} -#endif - /* * efi_carve_out_dt_rsv() - Carve out DT reserved memory ranges * @@ -440,39 +407,6 @@ static efi_status_t do_bootefi_exec(void *efi, goto err_prepare; } -#ifdef CONFIG_ARM64 - /* On AArch64 we need to make sure we call our payload in < EL3 */ - if (current_el() == 3) { - smp_kick_all_cpus(); - dcache_disable(); /* flush cache before switch to EL2 */ - - /* Move into EL2 and keep running there */ - armv8_switch_to_el2((ulong)entry, - (ulong)&image_obj->header, - (ulong)&systab, 0, (ulong)efi_run_in_el2, - ES_TO_AARCH64); - - /* Should never reach here, efi exits with longjmp */ - while (1) { } - } -#endif - -#ifdef CONFIG_ARMV7_NONSEC - if (armv7_boot_nonsec() && !is_nonsec) { - dcache_disable(); /* flush cache before switch to HYP */ - - armv7_init_nonsec(); - secure_ram_addr(_do_nonsec_entry)( - efi_run_in_hyp, - (uintptr_t)entry, - (uintptr_t)&image_obj->header, - (uintptr_t)&systab); - - /* Should never reach here, efi exits with longjmp */ - while (1) { } - } -#endif - ret = efi_do_enter(&image_obj->header, &systab, entry); err_prepare: @@ -558,6 +492,8 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) /* Allow unaligned memory access */ allow_unaligned(); + switch_to_non_secure_mode(); + /* Initialize EFI drivers */ r = efi_init_obj_list(); if (r != EFI_SUCCESS) { diff --git a/common/bootm.c b/common/bootm.c index 8bf84ebcb7e..e34d3ac8f44 100644 --- a/common/bootm.c +++ b/common/bootm.c @@ -915,6 +915,16 @@ static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc, return buf; } + +/** + * switch_to_non_secure_mode() - switch to non-secure mode + * + * This routine is overridden by architectures requiring this feature. + */ +void __weak switch_to_non_secure_mode(void) +{ +} + #else /* USE_HOSTCC */ void memmove_wd(void *to, void *from, size_t len, ulong chunksz) diff --git a/include/bootm.h b/include/bootm.h index 0501414e0dc..81b7252bd4d 100644 --- a/include/bootm.h +++ b/include/bootm.h @@ -80,4 +80,9 @@ int bootm_decomp_image(int comp, ulong load, ulong image_start, int type, */ void board_quiesce_devices(void); +/** + * switch_to_non_secure_mode() - switch to non-secure mode + */ +void switch_to_non_secure_mode(void); + #endif -- 2.19.2

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[U-Boot] [PATCH] sunxi: add spi flash bootcmd
by Oskari Lemmela 08 Jan '19

08 Jan '19

Enable SPI bootcmd if CONFIG_DM_SPI_FLASH is defined. Signed-off-by: Oskari Lemmela <oskari(a)lemmela.net> --- include/configs/sunxi-common.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 9819d9980c..b2443ef678 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -401,6 +401,21 @@ extern int soft_i2c_gpio_scl; #define BOOT_TARGET_DEVICES_USB(func) #endif +#ifdef CONFIG_DM_SPI_FLASH +#define BOOT_TARGET_DEVICES_SPI(func) func(SPI, spi, 0) +#define BOOTENV_DEV_SPI(devtypeu, devtypel, instance) \ + "image_addr=0x100000\0" \ + "image_size=0x700000\0" \ + "bootcmd_" #devtypel #instance "=" \ + "if sf probe " #instance "; then " \ + "sf read ${ramdisk_addr_r} ${image_addr} ${image_size}; " \ + "bootm ${ramdisk_addr_r}; " \ + "fi\0" +#define BOOTENV_DEV_NAME_SPI(devtypeu, devtypel, instance) \ + #devtypel #instance " " +#else +#define BOOT_TARGET_DEVICES_SPI(func) +#endif /* FEL boot support, auto-execute boot.scr if a script address was provided */ #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \ "bootcmd_fel=" \ @@ -416,6 +431,7 @@ extern int soft_i2c_gpio_scl; BOOT_TARGET_DEVICES_MMC(func) \ BOOT_TARGET_DEVICES_SCSI(func) \ BOOT_TARGET_DEVICES_USB(func) \ + BOOT_TARGET_DEVICES_SPI(func) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) -- 2.17.1

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