October 2018 - U-Boot

[U-Boot] [PATCH V4 1/2] mmc: add HS400 support
by Peng Fan 29 Mar '19

29 Mar '19

Add HS400 support. Selecting HS400 needs first select HS200 according to spec, so use a dedicated function for HS400. Add HS400 related macros. Remove the restriction of only using the low 6 bits of EXT_CSD_CARD_TYPE, using all the 8 bits. Signed-off-by: Peng Fan <peng.fan(a)nxp.com> Cc: Jaehoon Chung <jh80.chung(a)samsung.com> Cc: Jean-Jacques Hiblot <jjhiblot(a)ti.com> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Kishon Vijay Abraham I <kishon(a)ti.com> Cc: Faiz Abbas <faiz_abbas(a)ti.com> Cc: Marek Vasut <marex(a)denx.de> --- V4: Add SPL_MMC_HS400_SUPPORT Kconfig entry typo fix, HS199->HS200 in commit log. V3: Simplify code add error msg V2: remove 4bits support from HS400, as HS400 does not support 4bits per spec. drivers/mmc/Kconfig | 13 +++++ drivers/mmc/mmc.c | 137 +++++++++++++++++++++++++++++++++++++++++----------- include/mmc.h | 11 +++++ 3 files changed, 134 insertions(+), 27 deletions(-) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 377b1c4b3b..1616022b91 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -111,6 +111,19 @@ config SPL_MMC_UHS_SUPPORT cards. The IO voltage must be switchable from 3.3v to 1.8v. The bus frequency can go up to 208MHz (SDR104) +config MMC_HS400_SUPPORT + bool "enable HS400 support" + select MMC_HS200_SUPPORT + help + The HS400 mode is support by some eMMC. The bus frequency is up to + 200MHz. This mode requires tuning the IO. + +config SPL_MMC_HS400_SUPPORT + bool "enable HS400 support in SPL" + help + The HS400 mode is support by some eMMC. The bus frequency is up to + 200MHz. This mode requires tuning the IO. + config MMC_HS200_SUPPORT bool "enable HS200 support" help diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index ad429f49c9..585951cd78 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -147,6 +147,7 @@ const char *mmc_mode_name(enum bus_mode mode) [MMC_HS_52] = "MMC High Speed (52MHz)", [MMC_DDR_52] = "MMC DDR52 (52MHz)", [MMC_HS_200] = "HS200 (200MHz)", + [MMC_HS_400] = "HS400 (200MHz)", }; if (mode >= MMC_MODES_END) @@ -171,6 +172,7 @@ static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode) [UHS_DDR50] = 50000000, [UHS_SDR104] = 208000000, [MMC_HS_200] = 200000000, + [MMC_HS_400] = 200000000, }; if (mode == MMC_LEGACY) @@ -769,6 +771,11 @@ static int mmc_set_card_speed(struct mmc *mmc, enum bus_mode mode) case MMC_HS_200: speed_bits = EXT_CSD_TIMING_HS200; break; +#endif +#if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) + case MMC_HS_400: + speed_bits = EXT_CSD_TIMING_HS400; + break; #endif case MMC_LEGACY: speed_bits = EXT_CSD_TIMING_LEGACY; @@ -816,7 +823,7 @@ static int mmc_get_capabilities(struct mmc *mmc) mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT; - cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0x3f; + cardtype = ext_csd[EXT_CSD_CARD_TYPE]; mmc->cardtype = cardtype; #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) @@ -824,6 +831,12 @@ static int mmc_get_capabilities(struct mmc *mmc) EXT_CSD_CARD_TYPE_HS200_1_8V)) { mmc->card_caps |= MMC_MODE_HS200; } +#endif +#if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) + if (cardtype & (EXT_CSD_CARD_TYPE_HS400_1_2V | + EXT_CSD_CARD_TYPE_HS400_1_8V)) { + mmc->card_caps |= MMC_MODE_HS400; + } #endif if (cardtype & EXT_CSD_CARD_TYPE_52) { if (cardtype & EXT_CSD_CARD_TYPE_DDR_52) @@ -1734,10 +1747,13 @@ static int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode, u32 card_mask = 0; switch (mode) { + case MMC_HS_400: case MMC_HS_200: - if (mmc->cardtype & EXT_CSD_CARD_TYPE_HS200_1_8V) + if (mmc->cardtype & (EXT_CSD_CARD_TYPE_HS200_1_8V | + EXT_CSD_CARD_TYPE_HS400_1_8V)) card_mask |= MMC_SIGNAL_VOLTAGE_180; - if (mmc->cardtype & EXT_CSD_CARD_TYPE_HS200_1_2V) + if (mmc->cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V | + EXT_CSD_CARD_TYPE_HS400_1_2V)) card_mask |= MMC_SIGNAL_VOLTAGE_120; break; case MMC_DDR_52: @@ -1773,6 +1789,13 @@ static inline int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode, #endif static const struct mode_width_tuning mmc_modes_by_pref[] = { +#if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) + { + .mode = MMC_HS_400, + .widths = MMC_MODE_8BIT, + .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200 + }, +#endif #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) { .mode = MMC_HS_200, @@ -1816,6 +1839,54 @@ static const struct ext_csd_bus_width { {MMC_MODE_1BIT, false, EXT_CSD_BUS_WIDTH_1}, }; +#if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) +static int mmc_select_hs400(struct mmc *mmc) +{ + int err; + + /* Set timing to HS200 for tuning */ + err = mmc_set_card_speed(mmc, MMC_HS_200); + if (err) + return err; + + /* configure the bus mode (host) */ + mmc_select_mode(mmc, MMC_HS_200); + mmc_set_clock(mmc, mmc->tran_speed, false); + + /* execute tuning if needed */ + err = mmc_execute_tuning(mmc, MMC_CMD_SEND_TUNING_BLOCK_HS200); + if (err) { + debug("tuning failed\n"); + return err; + } + + /* Set back to HS */ + mmc_set_card_speed(mmc, MMC_HS); + mmc_set_clock(mmc, mmc_mode2freq(mmc, MMC_HS), false); + + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, + EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_FLAG); + if (err) + return err; + + err = mmc_set_card_speed(mmc, MMC_HS_400); + if (err) + return err; + + mmc_select_mode(mmc, MMC_HS_400); + err = mmc_set_clock(mmc, mmc->tran_speed, false); + if (err) + return err; + + return 0; +} +#else +static int mmc_select_hs400(struct mmc *mmc) +{ + return -ENOTSUPP; +} +#endif + #define for_each_supported_width(caps, ddr, ecbv) \ for (ecbv = ext_csd_bus_width;\ ecbv < ext_csd_bus_width + ARRAY_SIZE(ext_csd_bus_width);\ @@ -1869,37 +1940,49 @@ static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps) goto error; mmc_set_bus_width(mmc, bus_width(ecbw->cap)); - /* configure the bus speed (card) */ - err = mmc_set_card_speed(mmc, mwt->mode); - if (err) - goto error; - - /* - * configure the bus width AND the ddr mode (card) - * The host side will be taken care of in the next step - */ - if (ecbw->ext_csd_bits & EXT_CSD_DDR_FLAG) { - err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, - EXT_CSD_BUS_WIDTH, - ecbw->ext_csd_bits); + if (mwt->mode == MMC_HS_400) { + err = mmc_select_hs400(mmc); + if (err) { + printf("Select HS400 failed %d\n", err); + goto error; + } + } else { + /* configure the bus speed (card) */ + err = mmc_set_card_speed(mmc, mwt->mode); if (err) goto error; - } - /* configure the bus mode (host) */ - mmc_select_mode(mmc, mwt->mode); - mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE); + /* + * configure the bus width AND the ddr mode + * (card). The host side will be taken care + * of in the next step + */ + if (ecbw->ext_csd_bits & EXT_CSD_DDR_FLAG) { + err = mmc_switch(mmc, + EXT_CSD_CMD_SET_NORMAL, + EXT_CSD_BUS_WIDTH, + ecbw->ext_csd_bits); + if (err) + goto error; + } + + /* configure the bus mode (host) */ + mmc_select_mode(mmc, mwt->mode); + mmc_set_clock(mmc, mmc->tran_speed, + MMC_CLK_ENABLE); #ifdef MMC_SUPPORTS_TUNING - /* execute tuning if needed */ - if (mwt->tuning) { - err = mmc_execute_tuning(mmc, mwt->tuning); - if (err) { - pr_debug("tuning failed\n"); - goto error; + /* execute tuning if needed */ + if (mwt->tuning) { + err = mmc_execute_tuning(mmc, + mwt->tuning); + if (err) { + pr_debug("tuning failed\n"); + goto error; + } } - } #endif + } /* do a transfer to check the configuration */ err = mmc_read_and_compare_ext_csd(mmc); diff --git a/include/mmc.h b/include/mmc.h index df4255b828..9b9cbedadc 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -64,6 +64,7 @@ #define MMC_MODE_HS_52MHz MMC_CAP(MMC_HS_52) #define MMC_MODE_DDR_52MHz MMC_CAP(MMC_DDR_52) #define MMC_MODE_HS200 MMC_CAP(MMC_HS_200) +#define MMC_MODE_HS400 MMC_CAP(MMC_HS_400) #define MMC_MODE_8BIT BIT(30) #define MMC_MODE_4BIT BIT(29) @@ -248,6 +249,10 @@ static inline bool mmc_is_tuning_cmd(uint cmdidx) /* SDR mode @1.2V I/O */ #define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \ EXT_CSD_CARD_TYPE_HS200_1_2V) +#define EXT_CSD_CARD_TYPE_HS400_1_8V BIT(6) +#define EXT_CSD_CARD_TYPE_HS400_1_2V BIT(7) +#define EXT_CSD_CARD_TYPE_HS400 (EXT_CSD_CARD_TYPE_HS400_1_8V | \ + EXT_CSD_CARD_TYPE_HS400_1_2V) #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ @@ -259,6 +264,7 @@ static inline bool mmc_is_tuning_cmd(uint cmdidx) #define EXT_CSD_TIMING_LEGACY 0 /* no high speed */ #define EXT_CSD_TIMING_HS 1 /* HS */ #define EXT_CSD_TIMING_HS200 2 /* HS200 */ +#define EXT_CSD_TIMING_HS400 3 /* HS400 */ #define EXT_CSD_BOOT_ACK_ENABLE (1 << 6) #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3) @@ -519,6 +525,7 @@ enum bus_mode { UHS_DDR50, UHS_SDR104, MMC_HS_200, + MMC_HS_400, MMC_MODES_END }; @@ -532,6 +539,10 @@ static inline bool mmc_is_mode_ddr(enum bus_mode mode) #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) else if (mode == UHS_DDR50) return true; +#endif +#if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) + else if (mode == MMC_HS_400) + return true; #endif else return false; -- 2.14.1

4 10

[U-Boot] [PATCH 0/5] Use Android DT image format for TI boards
by Sam Protsenko 29 Mar '19

29 Mar '19

Android documentation recommends using new image format for storing dtb and dtbo files: [1]. Using that format, we can pack several dtb files to dtb.img, and also pack several dtbo files to dtbo.img. Then those images should be flashed to eMMC partitions, called "dtb" and "dtbo" respectively. This patch series introduces support for mentioned Android DT image format, adds "dtimg" command to deal with that image format from U-Boot shell, and provides new Android boot scheme to TI boards (AM57x and DRA7 boards). So with this patch series we will have next procedure for Android boot: 1. Read next images from eMMC partitions to RAM: - boot.img - dtb.img - dtbo.img 2. Take addresses of desired dtb/dtbo files from that images (for current board) 3. Apply dtbo overlays to main dtb, if needed 4. Boot the kernel from Android boot image, using resulting dtb It was tested on X15 and AM57x EVM boards. [1] https://source.android.com/devices/architecture/dto/partitions Sam Protsenko (5): common: Add support for Android DT image cmd: Add dtimg command arm: ti: boot: Extract PARTS_DEFAULT to boot.h arm: ti: boot: Add dtbo partition for Android boot arm: ti: boot: Implement Android boot using DT image format board/ti/common/Kconfig | 1 + cmd/Kconfig | 8 ++ cmd/Makefile | 1 + cmd/dtimg.c | 142 ++++++++++++++++++++++++++++++ common/Makefile | 4 + common/image-android-dt.c | 134 ++++++++++++++++++++++++++++ configs/am57xx_evm_defconfig | 1 + configs/am57xx_hs_evm_defconfig | 1 + configs/dra7xx_evm_defconfig | 1 + configs/dra7xx_hs_evm_defconfig | 1 + include/configs/am57xx_evm.h | 25 ------ include/configs/cl-som-am57x.h | 2 + include/configs/cm_t54.h | 2 + include/configs/dra7xx_evm.h | 25 ------ include/configs/ti_armv7_common.h | 1 + include/dt_table.h | 46 ++++++++++ include/environment/ti/boot.h | 68 ++++++++++++-- include/image-android-dt.h | 18 ++++ 18 files changed, 422 insertions(+), 59 deletions(-) create mode 100644 cmd/dtimg.c create mode 100644 common/image-android-dt.c create mode 100644 include/dt_table.h create mode 100644 include/image-android-dt.h -- 2.17.0

4 21

[U-Boot] [PATCH 00/36] rockchip: clean up board file for rockchip SoCs
by Kever Yang 29 Mar '19

29 Mar '19

This patch set is to clean code for board related file, after this patch set, all the Rockchip SoCs will share the same tpl/spl/board file and very similar boot flow. tpl.c: target for init DDR sdram, only internal sram available, prefer tpl to be as simple as possible and then back to backrom; spl.c: target for load U-Boot and Trust(option) image and boot into next stage, init DDR sdram if no tpl exist; board.c: use for U-Boot proper for all Rockchip SoCs. We prefer to reduce boot flow option like RETURN_TO_BROM in SPL/TPL, and will enable trust(ATF or OPTEE) support for all SoCs with TrustZone, will share scripts for link and firmware package. Only rk3399 is using spl+Trust/U-Boot and all other SoCs should go to tpl+spl_Trust/U-Boot mode now. Kever Yang (36): rockchip: rk3288: move configure_l2ctlr back to rk3288 rockchip: add common MACRO to enable sys arch timer rockchip: enable SYS_NS16550 for all SoCs by default rockchip: defconfig: remove CONFIG_SYS_NS16550 rockchip: add STIMER_BASE for all SoCs rockchip: add IRAM_START_ADDR for all SoCs rockchip: rk3328: add BOOT_MODE_REG for rk3328 rockchip: rk322x: remove use rockchip timer as sys timer rockchip: rk322x: sdram: use common udelay instead of rockchip_udelay rockchip: rk322x: prepare to use common board file rockchip: defconfig enable sysreset for rk3229 spl rockchip: rk3036: sdram: use udelay instead of rockchip_udelay rockchip: rk3036: remove sys timer rockchip: rk3036: prepare to use commong board file rockchip: declare sdram_init() in common header rockchip: sdram-common: add api to pass dram info to trust os rockchip: sdram_common: add common dram_init_banksize rockchip: rk3188: remove rockchip timer as sys timer rockchip: rk3188: prepare to use common board file rockchip: rk3128: remove rockchip timer as systimer rockchip: rk3128: prepare use common board file rockchip: dts: rk3288: update spl-boot-order rockchip: rk3288: remove rockchip timer for sys timer armv8: add timer_get_boot_us() for generic timer rockchip: rk3288: prepare to use common board file rockchip: rk1108: remove rockchip timer for sys timer rockchip: rv1108: prepare to use common board file rockchip: rk3328: prepare to use common board file rockchip: rk3368: prepare to use common board file rockchip: lion-rk3368: remove rockchip timer rockchip: rk3399: prepare to use common board file rockchip: remove rk_timer rockchip: dts: rk3399-firefly: enable uart2 in spl rockchip: spl-boot-order: do not enable with OF_PLATDATA rockchip: declear boot_devices in bootrom.h rockchip: add common board file for rockchip platform arch/arm/Kconfig | 1 + arch/arm/cpu/armv8/generic_timer.c | 6 + arch/arm/dts/rk3288-phycore-rdk.dts | 6 +- arch/arm/dts/rk3288-veyron.dtsi | 6 +- arch/arm/dts/rk3399-firefly.dts | 1 + arch/arm/include/asm/arch-rockchip/bootrom.h | 2 + arch/arm/include/asm/arch-rockchip/sdram_common.h | 4 + arch/arm/include/asm/arch-rockchip/sys_proto.h | 25 +- arch/arm/mach-rockchip/Kconfig | 38 ++- arch/arm/mach-rockchip/Makefile | 23 +- arch/arm/mach-rockchip/{rk3128-board.c => board.c} | 93 +++--- arch/arm/mach-rockchip/rk3036-board.c | 104 ------- arch/arm/mach-rockchip/rk3036/Makefile | 2 +- .../{rk3036-board-spl.c => rk3036/rk3036.c} | 41 +-- arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 33 +- arch/arm/mach-rockchip/rk3188-board-spl.c | 226 -------------- arch/arm/mach-rockchip/rk3188-board.c | 82 ----- arch/arm/mach-rockchip/rk3188/Makefile | 1 + arch/arm/mach-rockchip/rk3188/rk3188.c | 23 ++ arch/arm/mach-rockchip/rk322x-board.c | 155 ---------- arch/arm/mach-rockchip/rk322x/Makefile | 2 +- .../{rk322x-board-spl.c => rk322x/rk322x.c} | 86 ++---- arch/arm/mach-rockchip/rk3288-board-spl.c | 304 ------------------ arch/arm/mach-rockchip/rk3288-board-tpl.c | 84 ----- arch/arm/mach-rockchip/rk3288-board.c | 338 --------------------- arch/arm/mach-rockchip/rk3288/rk3288.c | 328 +++++++++++++++++++- arch/arm/mach-rockchip/rk3328/rk3328.c | 59 +++- arch/arm/mach-rockchip/rk3368-board-spl.c | 73 ----- arch/arm/mach-rockchip/rk3368-board-tpl.c | 157 ---------- arch/arm/mach-rockchip/rk3368/rk3368.c | 116 ++++++- arch/arm/mach-rockchip/rk3399-board-spl.c | 179 ----------- arch/arm/mach-rockchip/rk3399-board.c | 14 - arch/arm/mach-rockchip/rk3399/rk3399.c | 86 +++++- arch/arm/mach-rockchip/rk_timer.c | 48 --- arch/arm/mach-rockchip/rv1108/rv1108.c | 8 - arch/arm/mach-rockchip/sdram_common.c | 84 ++++- arch/arm/mach-rockchip/spl-boot-order.c | 2 +- arch/arm/mach-rockchip/spl.c | 195 ++++++++++++ arch/arm/mach-rockchip/tpl.c | 111 +++++++ board/chipspark/popmetal_rk3288/popmetal-rk3288.c | 9 +- board/geekbuying/geekbox/geekbox.c | 5 - board/mqmaker/miqi_rk3288/miqi-rk3288.c | 7 - board/phytec/phycore_rk3288/phycore-rk3288.c | 45 ++- board/rockchip/evb_px5/evb-px5.c | 5 - board/rockchip/evb_rk3288/evb-rk3288.c | 7 - .../rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c | 8 + board/rockchip/evb_rk3328/evb-rk3328.c | 66 ---- board/rockchip/evb_rk3399/evb-rk3399.c | 56 ++-- board/rockchip/evb_rv1108/evb_rv1108.c | 6 - board/rockchip/fennec_rk3288/fennec-rk3288.c | 7 - board/rockchip/sheep_rk3368/sheep_rk3368.c | 5 - board/rockchip/tinker_rk3288/tinker-rk3288.c | 2 +- board/theobroma-systems/lion_rk3368/lion_rk3368.c | 8 - board/theobroma-systems/puma_rk3399/puma-rk3399.c | 17 +- configs/evb-rk3128_defconfig | 1 - configs/evb-rk3229_defconfig | 2 +- configs/evb-rk3288_defconfig | 1 - configs/evb-rk3328_defconfig | 1 - configs/evb-rk3399_defconfig | 1 - configs/fennec-rk3288_defconfig | 1 - configs/firefly-rk3288_defconfig | 1 - configs/firefly-rk3399_defconfig | 1 - configs/lion-rk3368_defconfig | 4 - configs/miqi-rk3288_defconfig | 1 - configs/phycore-rk3288_defconfig | 1 - configs/popmetal-rk3288_defconfig | 1 - configs/puma-rk3399_defconfig | 1 - configs/tinker-rk3288_defconfig | 1 - configs/vyasa-rk3288_defconfig | 1 - drivers/ram/rockchip/sdram_rk322x.c | 29 +- include/configs/rk3036_common.h | 7 - include/configs/rk3128_common.h | 6 - include/configs/rk3188_common.h | 5 - include/configs/rk322x_common.h | 4 - include/configs/rk3288_common.h | 6 - include/configs/rk3328_common.h | 2 - include/configs/rk3368_common.h | 4 - include/configs/rk3399_common.h | 4 - include/configs/rockchip-common.h | 6 + include/configs/rv1108_common.h | 8 - 80 files changed, 1248 insertions(+), 2251 deletions(-) rename arch/arm/mach-rockchip/{rk3128-board.c => board.c} (63%) delete mode 100644 arch/arm/mach-rockchip/rk3036-board.c rename arch/arm/mach-rockchip/{rk3036-board-spl.c => rk3036/rk3036.c} (50%) delete mode 100644 arch/arm/mach-rockchip/rk3188-board-spl.c delete mode 100644 arch/arm/mach-rockchip/rk3188-board.c create mode 100644 arch/arm/mach-rockchip/rk3188/rk3188.c delete mode 100644 arch/arm/mach-rockchip/rk322x-board.c rename arch/arm/mach-rockchip/{rk322x-board-spl.c => rk322x/rk322x.c} (51%) delete mode 100644 arch/arm/mach-rockchip/rk3288-board-spl.c delete mode 100644 arch/arm/mach-rockchip/rk3288-board-tpl.c delete mode 100644 arch/arm/mach-rockchip/rk3288-board.c delete mode 100644 arch/arm/mach-rockchip/rk3368-board-spl.c delete mode 100644 arch/arm/mach-rockchip/rk3368-board-tpl.c delete mode 100644 arch/arm/mach-rockchip/rk3399-board-spl.c delete mode 100644 arch/arm/mach-rockchip/rk3399-board.c delete mode 100644 arch/arm/mach-rockchip/rk_timer.c create mode 100644 arch/arm/mach-rockchip/spl.c create mode 100644 arch/arm/mach-rockchip/tpl.c create mode 100644 board/rockchip/evb_rk3288_rk1608/evb-rk3288-rk1608.c -- 1.9.1

9 137

[U-Boot] [PATCH 00/10] rockchip: enable board_debug_uart_init for all soc
by Kever Yang 28 Mar '19

28 Mar '19

ALl rockchip soc use DEBUG UART, and need init the uart iomux in board_debug_uart_init(). Move the board_debug_uart_init() into soc file so that we can make all soc config in soc file and share a common board file later for all rockchip SoCs. Kever Yang (10): rockchip: enable DEBUG_UART_BOARD_INIT by default rockchip; kylin-rk3036: enabl DEBUG UART rockchip: rk3036: add board_debug_uart_init() rockchip: rk3188: add board_debug_uart_init() rockchip: rk322x: move board_debug_uart_init() to rk322x.c rockchip: rk3288: use grf structure to access soc_con2 rockchip: rk3288: add board_debug_uart_init() rockchip: rk3368: move board_debug_uart_init() to rk3368.c rockchip: rk3399: use grf structure to access reg rockchip: rk3399: add board_debug_uart_init() arch/arm/Kconfig | 2 ++ arch/arm/mach-rockchip/Kconfig | 3 --- arch/arm/mach-rockchip/rk3036-board-spl.c | 19 +------------ arch/arm/mach-rockchip/rk3036/Makefile | 1 + arch/arm/mach-rockchip/rk3036/rk3036.c | 40 +++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3188-board-spl.c | 12 +-------- arch/arm/mach-rockchip/rk3188/Makefile | 1 + arch/arm/mach-rockchip/rk3188/rk3188.c | 37 +++++++++++++++++++++++++ arch/arm/mach-rockchip/rk322x-board-spl.c | 43 ++--------------------------- arch/arm/mach-rockchip/rk322x-board.c | 31 +-------------------- arch/arm/mach-rockchip/rk322x/Makefile | 2 +- arch/arm/mach-rockchip/rk322x/rk322x.c | 45 +++++++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3288-board-spl.c | 11 ++------ arch/arm/mach-rockchip/rk3288-board-tpl.c | 13 ++------- arch/arm/mach-rockchip/rk3288/rk3288.c | 19 +++++++++++-- arch/arm/mach-rockchip/rk3368-board-spl.c | 5 ---- arch/arm/mach-rockchip/rk3368-board-tpl.c | 33 +---------------------- arch/arm/mach-rockchip/rk3368/rk3368.c | 31 +++++++++++++++++++++ arch/arm/mach-rockchip/rk3399-board-spl.c | 31 +-------------------- arch/arm/mach-rockchip/rk3399/rk3399.c | 34 ++++++++++++++++++++++- configs/kylin-rk3036_defconfig | 4 +++ 21 files changed, 223 insertions(+), 194 deletions(-) create mode 100644 arch/arm/mach-rockchip/rk3036/rk3036.c create mode 100644 arch/arm/mach-rockchip/rk3188/rk3188.c create mode 100644 arch/arm/mach-rockchip/rk322x/rk322x.c -- 1.9.1

3 35

[U-Boot] [PATCH v3 00/26] subject: fs: fat: extend FAT write operations
by Akashi, Takahiro 22 Mar '19

22 Mar '19

This patch series[1] is an attempt to address FAT write related issues in an effort of running UEFI SCT (Self-Certification Test) to verify UEFI support on u-boot. SCT is a test platform as well as an extensive collection of test cases for UEFI specification. It can run all the tests automatically and save test results to dedicated log files. AFAIK, what's missing in the current fat file system to safely run SCT without errors (I don't mean test case failures) are: * write a file located under sub-directories * write a file with non-zero offset * delete a file * create a directory What's more, this series contains a file system test; "basic" test is directly derived from test/test-fs.sh. The others, "ext" and "mkdir," are solely for newly added functionality in this patch series. Patch#1 to patch#7 are some sort of preparatory ones. Patch#8 implements write with sub-directories path. Patch#9 to patch#11 implement write with non-zero offset. Patch#12 to patch#16 are related to creating a directory. Patch#17 to patch#20 allows for deleting a file or directory. Patch#21 fixes a minor bug in fs-test.sh. Patch#22 updates a test result summary. Patch#23 to patch#26 add a file system test in U-boot pytest suite. I applied this patch series on top of v2018.09-rc along with a couple of yet-to--be-upstreamed UEFI-related patches, and could successfully run unmodified SCT[2] on qemu-arm(arm64). === future TODO list === 1. set creation (,access and modification) time 2. debug() vs. printf() 3. open()'s parameter checks 4. precisely detect and prevent write() beyond out-of-space 5. create an unique short name from a long file name 6. fat32's fsInfo support Without (5) or (6), fsck may issue warnings. [1] https://git.linaro.org/people/takahiro.akashi/u-boot.git fat_write [2] http://uefi.org/testtools Changes in v3 (Sep 11, 2018) * remove v2's patch#4 which tries to make iterator symbols global * add unlink operation along with a pytest script * use guestmount, if available, for non-root user * remove all the filesystem images created in tests Changes in v2 (Sep 4, 2018) * guard the whole content of fat.h with CONFIG_FS_FAT against a compiler warning * determine total_sect in struct fsdata correctly, depending on fat type (12/16 or 32) * explicitly revert "fs: fat: cannot write to subdirectories" * add test scripts with pytest, mostly the same as RFC, but removing "sudo" for ext4 case AKASHI Takahiro (25): fs: fat: guard the content of include/fat.h fs: fat: extend get_fs_info() for write use fs: fat: handle "." and ".." of root dir correctly with fat_itr_resolve() fs: fat: assure iterator's ->dent belongs to ->clust Revert "fs: fat: cannot write to subdirectories" fs: fat: check and normalize file name fs: fat: write returns error code instead of -1 fs: fat: support write with sub-directory path fs: fat: refactor write interface for a file offset fs: fat: support write with non-zero offset cmd: fat: add offset parameter to fatwrite fs: add mkdir interface fs: fat: remember the starting cluster number of directory fs: fat: support mkdir cmd: fat: add fatmkdir command efi_loader: file: support creating a directory fs: add unlink interface fs: fat: support unlink cmd: fat: add fatrm command efi_loader: implement a file delete fs-test: fix false positive error at Test Case 12 fs-test: update the test result as of v2018.09 test/py: convert fs-test.sh to pytest test/py: fs: add extended write operation test test/py: fs: add fstest/mkdir test Akashi, Takahiro (1): test/py: fs: add fstest/unlink test cmd/fat.c | 34 +- fs/fat/fat.c | 65 +- fs/fat/fat_write.c | 1183 +++++++++++++++++--------- fs/fs.c | 87 ++ include/fat.h | 7 + include/fs.h | 22 + lib/efi_loader/efi_file.c | 28 +- test/fs/fs-test.sh | 24 +- test/py/tests/test_fs/conftest.py | 392 +++++++++ test/py/tests/test_fs/fstest_defs.py | 13 + test/py/tests/test_fs/test_basic.py | 287 +++++++ test/py/tests/test_fs/test_ext.py | 224 +++++ test/py/tests/test_fs/test_mkdir.py | 112 +++ test/py/tests/test_fs/test_unlink.py | 109 +++ 14 files changed, 2136 insertions(+), 451 deletions(-) create mode 100644 test/py/tests/test_fs/conftest.py create mode 100644 test/py/tests/test_fs/fstest_defs.py create mode 100644 test/py/tests/test_fs/test_basic.py create mode 100644 test/py/tests/test_fs/test_ext.py create mode 100644 test/py/tests/test_fs/test_mkdir.py create mode 100644 test/py/tests/test_fs/test_unlink.py -- 2.18.0

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[U-Boot] [PATCH v2] efi_loader: set image_base and image_size to correct values
by AKASHI Takahiro 22 Mar '19

22 Mar '19

Currently, image's image_base points to an address where the image was temporarily uploaded for further loading. Since efi_loader relocates the image to final destination, image_base and image_size should reflect that. This bug was detected in UEFI SCT, "Loaded Image Protocol Test - test 2," which shows that 'Unload' function doesn't fit into a range suggested by image_base and image_size. TestCase/UEFI/EFI/Protocol/LoadedImage/BlackBoxTest/ LoadedImageBBTestMain.c:1002 Changes in this patch also includes: * reverts a patch, "efi_loader: save image relocation address and size" since newly added fields are no longer needed. * copy PE headers as well since those information will be needed for module loading, in particular, at gurb. (This bug was reported by Heinrich.) Signed-off-by: AKASHI Takahiro <takahiro.akashi(a)linaro.org> Reported-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- lib/efi_loader/efi_image_loader.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c index a18ce0a5705e..d1b6c0d3cdf2 100644 --- a/lib/efi_loader/efi_image_loader.c +++ b/lib/efi_loader/efi_image_loader.c @@ -59,10 +59,10 @@ static efi_status_t efi_print_image_info(struct efi_loaded_image_obj *obj, { printf("UEFI image"); printf(" [0x%p:0x%p]", - obj->reloc_base, obj->reloc_base + obj->reloc_size - 1); - if (pc && pc >= obj->reloc_base && - pc < obj->reloc_base + obj->reloc_size) - printf(" pc=0x%zx", pc - obj->reloc_base); + image->image_base, image->image_base + image->image_size - 1); + if (pc && pc >= image->image_base && + pc < image->image_base + image->image_size) + printf(" pc=0x%zx", pc - image->image_base); if (image->file_path) printf(" '%pD'", image->file_path); printf("\n"); @@ -212,7 +212,6 @@ void *efi_load_pe(struct efi_loaded_image_obj *handle, void *efi, int rel_idx = IMAGE_DIRECTORY_ENTRY_BASERELOC; void *entry; uint64_t image_base; - uint64_t image_size; unsigned long virt_size = 0; int supported = 0; @@ -256,7 +255,6 @@ void *efi_load_pe(struct efi_loaded_image_obj *handle, void *efi, IMAGE_NT_HEADERS64 *nt64 = (void *)nt; IMAGE_OPTIONAL_HEADER64 *opt = &nt64->OptionalHeader; image_base = opt->ImageBase; - image_size = opt->SizeOfImage; efi_set_code_and_data_type(loaded_image_info, opt->Subsystem); efi_reloc = efi_alloc(virt_size, loaded_image_info->image_code_type); @@ -272,7 +270,6 @@ void *efi_load_pe(struct efi_loaded_image_obj *handle, void *efi, } else if (nt->OptionalHeader.Magic == IMAGE_NT_OPTIONAL_HDR32_MAGIC) { IMAGE_OPTIONAL_HEADER32 *opt = &nt->OptionalHeader; image_base = opt->ImageBase; - image_size = opt->SizeOfImage; efi_set_code_and_data_type(loaded_image_info, opt->Subsystem); efi_reloc = efi_alloc(virt_size, loaded_image_info->image_code_type); @@ -291,6 +288,11 @@ void *efi_load_pe(struct efi_loaded_image_obj *handle, void *efi, return NULL; } + /* Copy PE headers */ + memcpy(efi_reloc, efi, sizeof(*dos) + sizeof(*nt) + + nt->FileHeader.SizeOfOptionalHeader + + num_sections * sizeof(IMAGE_SECTION_HEADER)); + /* Load sections into RAM */ for (i = num_sections - 1; i >= 0; i--) { IMAGE_SECTION_HEADER *sec = &sections[i]; @@ -315,10 +317,8 @@ void *efi_load_pe(struct efi_loaded_image_obj *handle, void *efi, invalidate_icache_all(); /* Populate the loaded image interface bits */ - loaded_image_info->image_base = efi; - loaded_image_info->image_size = image_size; - handle->reloc_base = efi_reloc; - handle->reloc_size = virt_size; + loaded_image_info->image_base = efi_reloc; + loaded_image_info->image_size = virt_size; return entry; } -- 2.19.0

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[U-Boot] [PATCH 1/2] usb: gadget: fastboot: Request status and length check in rx handler
by Paul Kocialkowski 18 Mar '19

18 Mar '19

This avoids handling requests that have an error status or no data. In particular, this avoids showing unnecessary error messages when the USB gadget gets disconnected (e.g. with fastboot continue) and the fastboot USB gadget driver sends an error back to the host (that has disconnected already). Signed-off-by: Paul Kocialkowski <contact(a)paulk.fr> --- drivers/usb/gadget/f_fastboot.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 206b6d1..b9a9099 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -635,6 +635,9 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req) void (*func_cb)(struct usb_ep *ep, struct usb_request *req) = NULL; int i; + if (req->status != 0 || req->length == 0) + return; + for (i = 0; i < ARRAY_SIZE(cmd_dispatch_info); i++) { if (!strcmp_l1(cmd_dispatch_info[i].cmd, cmdbuf)) { func_cb = cmd_dispatch_info[i].cb; @@ -656,9 +659,7 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req) } } - if (req->status == 0) { - *cmdbuf = '\0'; - req->actual = 0; - usb_ep_queue(ep, req, 0); - } + *cmdbuf = '\0'; + req->actual = 0; + usb_ep_queue(ep, req, 0); } -- 1.9.1

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[U-Boot] [PATCH v2 00/23] spl: Add features for passing info from SPL to U-Boot proper
by Simon Glass 10 Mar '19

10 Mar '19

At present we have no standard way of passing information from SPL to U-Boot. Such information may be the size of DRAM banks or some information about the reset state of the machine,for example. This series first adds a bloblist, which allows a list of 'blobs' to be created, each with a tag so that subsystems can store data and retrieve it later. Then it adds the SPL 'handoff' information, which uses bloblist. Various minor sandbox enhancements are provided to make this easier, or to support testing. Changes in v2: - Fix several typos - Add back a blank line, and put one in the new function too - Drop the wildcard in the .lds file as it is not needed Simon Glass (23): log: Correct definition of log_msg_ret() spl: Add support for logging in SPL and TPL Add core support for a bloblist to convey data from SPL spl: Set up the bloblist in SPL bloblist: Locate bloblist in U-Boot test: Add a simple test for bloblist Add bloblist documentation spl: Support hash, input, pch, pci, rtc, tpm in SPL spl: Add a define for SPL_TPL_PROMPT spl: Make SPL_DISABLE_BANNER_PRINT a positive option spl: Add a comment to spl_set_bd() spl: Print a message if we are unable to load an image sandbox: Add a memory map to the sandbox README test/py: Add a way to pass flags to sandbox sandbox: Add an option to display of-platdata in SPL sandbox: Drop the deprecated 'sb' command sandbox: Add a new 'sb' command sandbox: Allow puts() output before global_data is set up sandbox: Refactor code to create os_jump_to_file() sandbox: Use malloc() and free() from os layer sandbox: Filter arguments when starting U-Boot sandbox: Boot in U-Boot through the standard call spl: Add support for passing handoff info to U-Boot proper arch/Kconfig | 1 + arch/powerpc/include/asm/spl.h | 3 - arch/sandbox/cpu/eth-raw-os.c | 9 +- arch/sandbox/cpu/os.c | 115 +++++++++----- arch/sandbox/cpu/spl.c | 31 +++- arch/sandbox/cpu/start.c | 19 +++ arch/sandbox/cpu/u-boot-spl.lds | 2 +- arch/sandbox/include/asm/handoff.h | 18 +++ arch/sandbox/include/asm/state.h | 8 + board/sandbox/README.sandbox | 14 +- cmd/Makefile | 1 + cmd/host.c | 5 - cmd/sb.c | 65 ++++++++ common/Kconfig | 84 +++++++++- common/Makefile | 5 +- common/bloblist.c | 239 +++++++++++++++++++++++++++++ common/board_f.c | 49 ++++++ common/console.c | 7 + common/init/Makefile | 1 + common/init/handoff.c | 47 ++++++ common/spl/Kconfig | 95 +++++++++++- common/spl/spl.c | 142 +++++++++++++---- configs/sandbox_spl_defconfig | 1 + doc/README.bloblist | 82 ++++++++++ doc/README.trace | 2 +- drivers/Makefile | 11 +- include/asm-generic/global_data.h | 7 + include/bloblist.h | 195 +++++++++++++++++++++++ include/handoff.h | 36 +++++ include/log.h | 10 +- include/spl.h | 41 +++++ include/test/suites.h | 1 + test/Makefile | 1 + test/bloblist.c | 187 ++++++++++++++++++++++ test/cmd_ut.c | 3 + test/dm/sf.c | 2 +- test/py/tests/test_fit.py | 12 +- test/py/tests/test_handoff.py | 14 ++ test/py/tests/test_ofplatdata.py | 31 +++- test/py/tests/test_vboot.py | 2 +- test/py/u_boot_console_base.py | 2 +- test/py/u_boot_console_sandbox.py | 18 +++ test/run | 2 +- 43 files changed, 1510 insertions(+), 110 deletions(-) create mode 100644 arch/sandbox/include/asm/handoff.h create mode 100644 cmd/sb.c create mode 100644 common/bloblist.c create mode 100644 common/init/handoff.c create mode 100644 doc/README.bloblist create mode 100644 include/bloblist.h create mode 100644 include/handoff.h create mode 100644 test/bloblist.c create mode 100644 test/py/tests/test_handoff.py -- 2.19.0.605.g01d371f741-goog

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[U-Boot] [PATCH 1/2] phy: rcar: Add R-Car Gen3 PHY driver
by Marek Vasut 08 Mar '19

08 Mar '19

Add a PHY driver for the R-Car Gen3 which allows configuring USB OTG PHY on Gen3 into host mode and toggles VBUS in case a dedicated regulator is present. Signed-off-by: Marek Vasut <marek.vasut+renesas(a)gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- drivers/phy/Kconfig | 8 ++ drivers/phy/Makefile | 1 + drivers/phy/phy-rcar-gen3.c | 161 ++++++++++++++++++++++++++++++++++++ 3 files changed, 170 insertions(+) create mode 100644 drivers/phy/phy-rcar-gen3.c diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index bcc8e22795..14d82b93ed 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -118,6 +118,14 @@ config PHY_RCAR_GEN2 PHY connected to USBHS module, PCI EHCI module and USB3.0 module and allows configuring the module multiplexing. +config PHY_RCAR_GEN3 + tristate "Renesas R-Car Gen3 USB PHY" + depends on PHY && RCAR_GEN3 && CLK && DM_REGULATOR + default y if RCAR_GEN3 + help + Support for the Renesas R-Car Gen3 USB PHY. This driver operates the + PHY connected to EHCI USB module and controls USB OTG operation. + config PHY_STM32_USBPHYC tristate "STMicroelectronics STM32 SoC USB HS PHY driver" depends on PHY && ARCH_STM32MP diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 1e1e4ca11e..8030d599e7 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o +obj-$(CONFIG_PHY_RCAR_GEN3) += phy-rcar-gen3.o obj-$(CONFIG_PHY_STM32_USBPHYC) += phy-stm32-usbphyc.o obj-$(CONFIG_MESON_GXL_USB_PHY) += meson-gxl-usb2.o meson-gxl-usb3.o obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o diff --git a/drivers/phy/phy-rcar-gen3.c b/drivers/phy/phy-rcar-gen3.c new file mode 100644 index 0000000000..b662935626 --- /dev/null +++ b/drivers/phy/phy-rcar-gen3.c @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Renesas RCar Gen3 USB PHY driver + * + * Copyright (C) 2018 Marek Vasut <marek.vasut(a)gmail.com> + */ + +#include <common.h> +#include <clk.h> +#include <div64.h> +#include <dm.h> +#include <fdtdec.h> +#include <generic-phy.h> +#include <reset.h> +#include <syscon.h> +#include <usb.h> +#include <asm/io.h> +#include <linux/bitops.h> +#include <power/regulator.h> + +/* USB2.0 Host registers (original offset is +0x200) */ +#define USB2_INT_ENABLE 0x000 +#define USB2_USBCTR 0x00c +#define USB2_SPD_RSM_TIMSET 0x10c +#define USB2_OC_TIMSET 0x110 +#define USB2_COMMCTRL 0x600 +#define USB2_OBINTSTA 0x604 +#define USB2_OBINTEN 0x608 +#define USB2_VBCTRL 0x60c +#define USB2_LINECTRL1 0x610 +#define USB2_ADPCTRL 0x630 + +/* USBCTR */ +#define USB2_USBCTR_PLL_RST BIT(1) + +/* SPD_RSM_TIMSET */ +#define USB2_SPD_RSM_TIMSET_INIT 0x014e029b + +/* OC_TIMSET */ +#define USB2_OC_TIMSET_INIT 0x000209ab + +/* COMMCTRL */ +#define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */ + +/* LINECTRL1 */ +#define USB2_LINECTRL1_DP_RPD BIT(18) +#define USB2_LINECTRL1_DM_RPD BIT(16) + +/* ADPCTRL */ +#define USB2_ADPCTRL_DRVVBUS BIT(4) + +struct rcar_gen3_phy { + fdt_addr_t regs; + struct clk clk; + struct udevice *vbus_supply; +}; + +static int rcar_gen3_phy_phy_init(struct phy *phy) +{ + struct rcar_gen3_phy *priv = dev_get_priv(phy->dev); + + /* Initialize USB2 part */ + writel(0, priv->regs + USB2_INT_ENABLE); + writel(USB2_SPD_RSM_TIMSET_INIT, priv->regs + USB2_SPD_RSM_TIMSET); + writel(USB2_OC_TIMSET_INIT, priv->regs + USB2_OC_TIMSET); + + setbits_le32(priv->regs + USB2_LINECTRL1, + USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD); + + clrbits_le32(priv->regs + USB2_COMMCTRL, USB2_COMMCTRL_OTG_PERI); + + setbits_le32(priv->regs + USB2_ADPCTRL, USB2_ADPCTRL_DRVVBUS); + + return 0; +} + +static int rcar_gen3_phy_phy_power_on(struct phy *phy) +{ + struct rcar_gen3_phy *priv = dev_get_priv(phy->dev); + int ret; + + if (priv->vbus_supply) { + ret = regulator_set_enable(priv->vbus_supply, true); + if (ret) + return ret; + } + + setbits_le32(priv->regs + USB2_USBCTR, USB2_USBCTR_PLL_RST); + clrbits_le32(priv->regs + USB2_USBCTR, USB2_USBCTR_PLL_RST); + + return 0; +} + +static int rcar_gen3_phy_phy_power_off(struct phy *phy) +{ + struct rcar_gen3_phy *priv = dev_get_priv(phy->dev); + + if (!priv->vbus_supply) + return 0; + + return regulator_set_enable(priv->vbus_supply, false); +} + +static const struct phy_ops rcar_gen3_phy_phy_ops = { + .init = rcar_gen3_phy_phy_init, + .power_on = rcar_gen3_phy_phy_power_on, + .power_off = rcar_gen3_phy_phy_power_off, +}; + +static int rcar_gen3_phy_probe(struct udevice *dev) +{ + struct rcar_gen3_phy *priv = dev_get_priv(dev); + int ret; + + priv->regs = dev_read_addr(dev); + if (priv->regs == FDT_ADDR_T_NONE) + return -EINVAL; + + ret = device_get_supply_regulator(dev, "vbus-supply", + &priv->vbus_supply); + if (ret && ret != -ENOENT) { + pr_err("Failed to get PHY regulator\n"); + return ret; + } + + /* Enable clock */ + ret = clk_get_by_index(dev, 0, &priv->clk); + if (ret) + return ret; + + ret = clk_enable(&priv->clk); + if (ret) + return ret; + + return 0; +} + +static int rcar_gen3_phy_remove(struct udevice *dev) +{ + struct rcar_gen3_phy *priv = dev_get_priv(dev); + + clk_disable(&priv->clk); + clk_free(&priv->clk); + + return 0; +} + +static const struct udevice_id rcar_gen3_phy_of_match[] = { + { .compatible = "renesas,rcar-gen3-usb2-phy", }, + { }, +}; + +U_BOOT_DRIVER(rcar_gen3_phy) = { + .name = "rcar-gen3-phy", + .id = UCLASS_PHY, + .of_match = rcar_gen3_phy_of_match, + .ops = &rcar_gen3_phy_phy_ops, + .probe = rcar_gen3_phy_probe, + .remove = rcar_gen3_phy_remove, + .priv_auto_alloc_size = sizeof(struct rcar_gen3_phy), +}; -- 2.18.0

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[U-Boot] SWUpdate - U-Boot environment library dependency
by Andreas Reichel 04 Mar '19

04 Mar '19

Hi all, as Stefano Babic was so friendly and pointed out a few things already, we come the following problematic points: For SWupdate to access U-Boot's environment, it uses code from U-Boot. Before 2015, fw_env.c was copied - hence out of version control, afterwards and since then, a lib.a produced by U-Boot has been used and renamed to libubootenv.a to link against. However, this approach creates several difficulties: * Distros like Debian cannot provide a devel package for SWUpdate like u-boot-dev, since U-Boot has its default environment code compiled board-dependently and Debian needed it board-independent. If a board-independent libubootenv.a was provided without a specific default environment, the first update process would destroy the U-Boot environment if it had had bad CRC before. (Thanks Stefano for this good point). * If we have a board with U-Boot already preinstalled and want to compile SWUpdate for it, we need the sources of this very U-Boot to get the propper lib. For example in a debian-like build system we had to compile U-Boot again, although it is already installed since we lack a dev package. * U-Boot does not provide any default means to install a development library. Thus anything we modify on-top might break with the next version. First proposal by Stefano and me would be to somehow split the default environment from the library to have a board-independent component and board specific data that is passed to U-Boot and SWUpdate somehow. Goal is to factor out U-Boot environment support for other software like SWUpdate and not patching and hacking like its the case with recipes as in openembedded atm. Thanks, Andreas -- Andreas Reichel Dipl.-Phys. (Univ.) Software Consultant Andreas.Reichel(a)tngtech.com, +49-174-3180074 TNG Technology Consulting GmbH, Betastr. 13a, 85774 Unterfoehring Geschaeftsfuehrer: Henrik Klagges, Dr. Robert Dahlke, Gerhard Mueller Sitz: Unterfoehring * Amtsgericht Muenchen * HRB 135082

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