July 2017 - U-Boot

[U-Boot] Warning due to commit 6a516ef15d79
by Stefano Babic 12 Jul '17

12 Jul '17

Hi Lothar, your recent patch : commit 306dd7dabd6472b8b66ab5106d5a6a516ef15d79 Author: Lothar Waßmann <LW(a)KARO-electronics.de> Date: Tue Jun 27 15:23:16 2017 +0200 net: fec_mxc: fix PHY initialization bug with CONFIG_DM_ETH is cause of warnings in several i.MX boards, such as: arm: + imx6ul_geam_nand + struct udevice *vqmmc_dev; + ^ + bus = fec_get_miibus(dev, dev_id); + ^ +drivers/net/fec_mxc.c:988:17: note: expected 'uint32_t {aka unsigned int}' but argument is of type 'struct udevice *' + struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id) + ^ In fact, dev is a udevice and not an int as the prototype for fec_get_miibus(). Could you take a look, please ? Thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic(a)denx.de =====================================================================

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[U-Boot] Please pull u-boot-marvell/master
by Stefan Roese 12 Jul '17

12 Jul '17

Hi Tim, please pull the following Marvell / MVEBU patches. Travis has some timeouts so I was not able to build there, but all MVEBU boards build without issues. Thanks, Stefan The following changes since commit 8d3a25685e4aac7070365a2b3c53c2c81b27930f: Merge git://git.denx.de/u-boot-dm (2017-07-11 20:28:46 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-marvell.git for you to fetch changes up to 172b2e0b561a50a3d8c4275be4ed24b0c8e18896: arm: mvebu: clearfog: fix chip name comment (2017-07-12 06:57:55 +0200) ---------------------------------------------------------------- Baruch Siach (4): tools/kwbimage: update the list of SoCs using v1 header tools/kwbimage.h: make offset marks style consistent tools/kwbimage: fix v1 header verification arm: mvebu: clearfog: fix chip name comment Igal Liberman (1): arm64: mvebu: use single defconfig for Armada8K development boards Marek Behún (6): driver/ddr: Add support for setting timing in hws_topology_map orion_wdt: Support for the Orion Watchdog arch/arm/dts: Add Turris Omnia device tree drivers/i2c/muxes/pca954x: Add pca9547 I2C mux support drivers/misc: Add basic support for ATSHA204A Crypto module marvell: armada385: Add the Turris Omnia board arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi | 55 +++ arch/arm/dts/armada-385-turris-omnia.dts | 392 +++++++++++++++ arch/arm/mach-mvebu/Kconfig | 22 + board/CZ.NIC/turris_omnia/Makefile | 7 + board/CZ.NIC/turris_omnia/kwbimage.cfg | 12 + board/CZ.NIC/turris_omnia/turris_omnia.c | 530 +++++++++++++++++++++ board/Marvell/db-88f6820-amc/db-88f6820-amc.c | 3 +- board/Marvell/db-88f6820-gp/db-88f6820-gp.c | 3 +- board/gdsys/a38x/controlcenterdc.c | 3 +- board/solidrun/clearfog/clearfog.c | 3 +- board/solidrun/clearfog/kwbimage.cfg | 2 +- configs/mvebu_db-88f7040-nand_defconfig | 72 --- configs/mvebu_db-88f7040_defconfig | 70 --- ...f8040_defconfig => mvebu_db_armada8k_defconfig} | 0 configs/turris_omnia_defconfig | 62 +++ doc/README.marvell | 53 +++ drivers/ddr/marvell/a38x/ddr3_training.c | 6 + drivers/ddr/marvell/a38x/ddr_topology_def.h | 9 + drivers/i2c/muxes/pca954x.c | 42 +- drivers/misc/Kconfig | 8 + drivers/misc/Makefile | 1 + drivers/misc/atsha204a-i2c.c | 408 ++++++++++++++++ drivers/watchdog/Kconfig | 7 + drivers/watchdog/Makefile | 1 + drivers/watchdog/orion_wdt.c | 177 +++++++ include/atsha204a-i2c.h | 69 +++ include/configs/turris_omnia.h | 178 +++++++ tools/kwbimage.c | 34 +- tools/kwbimage.h | 64 +-- 29 files changed, 2105 insertions(+), 188 deletions(-) create mode 100644 arch/arm/dts/armada-385-turris-omnia-u-boot.dtsi create mode 100644 arch/arm/dts/armada-385-turris-omnia.dts create mode 100644 board/CZ.NIC/turris_omnia/Makefile create mode 100644 board/CZ.NIC/turris_omnia/kwbimage.cfg create mode 100644 board/CZ.NIC/turris_omnia/turris_omnia.c delete mode 100644 configs/mvebu_db-88f7040-nand_defconfig delete mode 100644 configs/mvebu_db-88f7040_defconfig rename configs/{mvebu_db-88f8040_defconfig => mvebu_db_armada8k_defconfig} (100%) create mode 100644 configs/turris_omnia_defconfig create mode 100644 doc/README.marvell create mode 100644 drivers/misc/atsha204a-i2c.c create mode 100644 drivers/watchdog/orion_wdt.c create mode 100644 include/atsha204a-i2c.h create mode 100644 include/configs/turris_omnia.h

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[U-Boot] [PATCH] ARM: ti816x: Fix enabling GPIO0, enable GPIO1 as well
by Tom Rini 12 Jul '17

12 Jul '17

The TI816x has 2 GPIO banks. For bank 0 we had been clearing the enable bit when setting BIT(8). Correct this by setting it to BIT(1) | BIT(8) after we set and wait for BIT(1) (aka PRCM_MOD_EN). Enable GPIO1 as well so that when CMD_GPIO is enabled it won't crash probing the second bank. Enable CMD_GPIO on ti816x_evm. Signed-off-by: Tom Rini <trini(a)konsulko.com> --- arch/arm/mach-omap2/am33xx/clock_ti816x.c | 8 +++++++- configs/ti816x_evm_defconfig | 1 + 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/am33xx/clock_ti816x.c b/arch/arm/mach-omap2/am33xx/clock_ti816x.c index 967623d467b0..e9c7b2d99690 100644 --- a/arch/arm/mach-omap2/am33xx/clock_ti816x.c +++ b/arch/arm/mach-omap2/am33xx/clock_ti816x.c @@ -335,7 +335,13 @@ static void peripheral_enable(void) writel(PRCM_MOD_EN, &cmalwon->gpio0clkctrl); while (readl(&cmalwon->gpio0clkctrl) != PRCM_MOD_EN) ; - writel((BIT(8)), &cmalwon->gpio0clkctrl); + writel((BIT(1) | BIT(8)), &cmalwon->gpio0clkctrl); + + /* Enable gpio1 */ + writel(PRCM_MOD_EN, &cmalwon->gpio1clkctrl); + while (readl(&cmalwon->gpio1clkctrl) != PRCM_MOD_EN) + ; + writel((BIT(1) | BIT(8)), &cmalwon->gpio1clkctrl); /* Enable spi */ writel(PRCM_MOD_EN, &cmalwon->spiclkctrl); diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index 7f43ecb7ebc2..2ae72b2f77d4 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -27,6 +27,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y # CONFIG_CMD_FPGA is not set +CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set -- 1.9.1

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[U-Boot] [PATCH] ti816x: Enable ethernet support
by Tom Rini 12 Jul '17

12 Jul '17

The ti816x SoC revision of the ethernet IP block is handled by the "davinci_emac" driver, rather than the "cpsw" driver as done by later members of the family. Enable the relevant plumbing. Signed-off-by: Sriramakrishnan <srk(a)ti.com> Signed-off-by: Vitaly Wool <vitaly.wool(a)konsulko.com> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- arch/arm/include/asm/arch-am33xx/emac_defs.h | 38 ++++++++++++++ arch/arm/include/asm/arch-am33xx/hardware_ti816x.h | 1 + board/ti/ti816x/evm.c | 28 ++++++++++ configs/ti816x_evm_defconfig | 5 ++ drivers/net/davinci_emac.c | 60 ++++++++++++++-------- drivers/net/davinci_emac.h | 2 + include/configs/ti816x_evm.h | 9 ++++ 7 files changed, 122 insertions(+), 21 deletions(-) create mode 100644 arch/arm/include/asm/arch-am33xx/emac_defs.h diff --git a/arch/arm/include/asm/arch-am33xx/emac_defs.h b/arch/arm/include/asm/arch-am33xx/emac_defs.h new file mode 100644 index 000000000000..b5703f710f42 --- /dev/null +++ b/arch/arm/include/asm/arch-am33xx/emac_defs.h @@ -0,0 +1,38 @@ +/* + * Copyright (C) 2010 Texas Instruments + * + * Based on: + * + * ---------------------------------------------------------------------------- + * + * dm644x_emac.h + * + * TI DaVinci (DM644X) EMAC peripheral driver header for DV-EVM + * + * Copyright (C) 2005 Texas Instruments. + * + * ---------------------------------------------------------------------------- + * + * SPDX-License-Identifier: GPL-2.0+ + * + */ + +#ifndef _EMAC_DEFS_H_ +#define _EMAC_DEFS_H_ + +#ifdef CONFIG_TI816X +#define EMAC_BASE_ADDR (0x4A100000) +#define EMAC_WRAPPER_BASE_ADDR (0x4A100900) +#define EMAC_WRAPPER_RAM_ADDR (0x4A102000) +#define EMAC_MDIO_BASE_ADDR (0x4A100800) +#define EMAC_MDIO_BUS_FREQ (250000000UL) +#define EMAC_MDIO_CLOCK_FREQ (2000000UL) + +typedef volatile unsigned int dv_reg; +typedef volatile unsigned int *dv_reg_p; + +#define DAVINCI_EMAC_VERSION2 +#define DAVINCI_EMAC_GIG_ENABLE +#endif + +#endif /* _EMAC_DEFS_H_ */ diff --git a/arch/arm/include/asm/arch-am33xx/hardware_ti816x.h b/arch/arm/include/asm/arch-am33xx/hardware_ti816x.h index 3c680649abfa..78b79486ed47 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware_ti816x.h +++ b/arch/arm/include/asm/arch-am33xx/hardware_ti816x.h @@ -31,6 +31,7 @@ /* Control Module Base Address */ #define CTRL_BASE 0x48140000 +#define CTRL_DEVICE_BASE 0x48140600 /* PRCM Base Address */ #define PRCM_BASE 0x48180000 diff --git a/board/ti/ti816x/evm.c b/board/ti/ti816x/evm.c index 577e60f875f4..9d6c3d6b5dc9 100644 --- a/board/ti/ti816x/evm.c +++ b/board/ti/ti816x/evm.c @@ -9,6 +9,7 @@ #include <common.h> #include <spl.h> +#include <netdev.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/arch/clock.h> @@ -31,6 +32,33 @@ int board_init(void) return 0; } +int board_eth_init(bd_t *bis) +{ + uint8_t mac_addr[6]; + uint32_t mac_hi, mac_lo; + struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; + + if (!eth_getenv_enetaddr("ethaddr", mac_addr)) { + printf("<ethaddr> not set. Reading from E-fuse\n"); + /* try reading mac address from efuse */ + mac_lo = readl(&cdev->macid0l); + mac_hi = readl(&cdev->macid0h); + mac_addr[0] = mac_hi & 0xFF; + mac_addr[1] = (mac_hi & 0xFF00) >> 8; + mac_addr[2] = (mac_hi & 0xFF0000) >> 16; + mac_addr[3] = (mac_hi & 0xFF000000) >> 24; + mac_addr[4] = mac_lo & 0xFF; + mac_addr[5] = (mac_lo & 0xFF00) >> 8; + + if (is_valid_ethaddr(mac_addr)) + eth_setenv_enetaddr("ethaddr", mac_addr); + else + printf("Unable to read MAC address. Set <ethaddr>\n"); + } + + return davinci_emac_initialize(); +} + #ifdef CONFIG_SPL_BUILD static struct module_pin_mux mmc_pin_mux[] = { { OFFSET(pincntl157), PULLDOWN_EN | PULLUDDIS | MODE(0x0) }, diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index 1c6608218b00..7f43ecb7ebc2 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -35,6 +35,11 @@ CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y CONFIG_MMC_OMAP_HS=y CONFIG_SYS_NS16550=y # CONFIG_USE_PRIVATE_LIBGCC is not set diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index 5e7ebc8a99f3..d1024879a0ef 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c @@ -341,6 +341,14 @@ static int gen_auto_negotiate(int phy_addr) if (!davinci_eth_phy_read(phy_addr, MII_BMCR, &tmp)) return(0); +#ifdef DAVINCI_EMAC_GIG_ENABLE + davinci_eth_phy_read(phy_addr, MII_CTRL1000, &val); + val |= PHY_1000BTCR_1000FD; + val &= ~PHY_1000BTCR_1000HD; + davinci_eth_phy_write(phy_addr, MII_CTRL1000, val); + davinci_eth_phy_read(phy_addr, MII_CTRL1000, &val); +#endif + /* Restart Auto_negotiation */ tmp |= BMCR_ANRESTART; davinci_eth_phy_write(phy_addr, MII_BMCR, tmp); @@ -407,7 +415,8 @@ static void __attribute__((unused)) davinci_eth_gigabit_enable(int phy_addr) static int davinci_eth_open(struct eth_device *dev, bd_t *bis) { dv_reg_p addr; - u_int32_t clkdiv, cnt; + u_int32_t clkdiv, cnt, mac_control; + uint16_t __maybe_unused lpa_val; volatile emac_desc *rx_desc; int index; @@ -488,19 +497,6 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis) /* Enable ch 0 only */ writel(1, &adap_emac->RXUNICASTSET); - /* Enable MII interface and Full duplex mode */ -#if defined(CONFIG_SOC_DA8XX) || \ - (defined(CONFIG_OMAP34XX) && defined(CONFIG_DRIVER_TI_EMAC_USE_RMII)) - writel((EMAC_MACCONTROL_MIIEN_ENABLE | - EMAC_MACCONTROL_FULLDUPLEX_ENABLE | - EMAC_MACCONTROL_RMIISPEED_100), - &adap_emac->MACCONTROL); -#else - writel((EMAC_MACCONTROL_MIIEN_ENABLE | - EMAC_MACCONTROL_FULLDUPLEX_ENABLE), - &adap_emac->MACCONTROL); -#endif - /* Init MDIO & get link state */ clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV; writel((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT, @@ -513,8 +509,26 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis) if (index == -1) return(0); - emac_gigabit_enable(active_phy_addr[index]); + /* Enable MII interface */ + mac_control = EMAC_MACCONTROL_MIIEN_ENABLE; +#ifdef DAVINCI_EMAC_GIG_ENABLE + davinci_eth_phy_read(active_phy_addr[index], MII_STAT1000, &lpa_val); + if (lpa_val & PHY_1000BTSR_1000FD) { + debug_emac("eth_open : gigabit negotiated\n"); + mac_control |= EMAC_MACCONTROL_FULLDUPLEX_ENABLE; + mac_control |= EMAC_MACCONTROL_GIGABIT_ENABLE; + } +#endif + davinci_eth_phy_read(active_phy_addr[index], MII_LPA, &lpa_val); + if (lpa_val & (LPA_100FULL | LPA_10FULL)) + /* set EMAC for Full Duplex */ + mac_control |= EMAC_MACCONTROL_FULLDUPLEX_ENABLE; +#if defined(CONFIG_SOC_DA8XX) || \ + (defined(CONFIG_OMAP34XX) && defined(CONFIG_DRIVER_TI_EMAC_USE_RMII)) + mac_control |= EMAC_MACCONTROL_RMIISPEED_100; +#endif + writel(mac_control, &adap_emac->MACCONTROL); /* Start receive process */ writel(BD_TO_HW((u_int32_t)emac_rx_desc), &adap_emac->RX0HDP); @@ -619,8 +633,6 @@ static int davinci_eth_send_packet (struct eth_device *dev, return (ret_status); } - emac_gigabit_enable(active_phy_addr[index]); - /* Check packet size and if < EMAC_MIN_ETHERNET_PKT_SIZE, pad it up */ if (length < EMAC_MIN_ETHERNET_PKT_SIZE) { length = EMAC_MIN_ETHERNET_PKT_SIZE; @@ -648,8 +660,6 @@ static int davinci_eth_send_packet (struct eth_device *dev, return (ret_status); } - emac_gigabit_enable(active_phy_addr[index]); - if (readl(&adap_emac->TXINTSTATRAW) & 0x01) { ret_status = length; break; @@ -870,11 +880,19 @@ int davinci_emac_initialize(void) retval = mdio_register(mdiodev); if (retval < 0) return retval; +#ifdef DAVINCI_EMAC_GIG_ENABLE +#define PHY_CONF_REG 22 + /* Enable PHY to clock out TX_CLK */ + davinci_eth_phy_read(active_phy_addr[i], PHY_CONF_REG, &tmp); + tmp |= PHY_CONF_TXCLKEN; + davinci_eth_phy_write(active_phy_addr[i], PHY_CONF_REG, tmp); + davinci_eth_phy_read(active_phy_addr[i], PHY_CONF_REG, &tmp); +#endif } -#if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \ +#if defined(CONFIG_TI816X) || (defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \ defined(CONFIG_MACH_DAVINCI_DA850_EVM) && \ - !defined(CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE) + !defined(CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE)) for (i = 0; i < num_phy; i++) { if (phy[i].is_phy_connected(i)) phy[i].auto_negotiate(i); diff --git a/drivers/net/davinci_emac.h b/drivers/net/davinci_emac.h index 13cd68f040b9..e2ed54bac54d 100644 --- a/drivers/net/davinci_emac.h +++ b/drivers/net/davinci_emac.h @@ -40,6 +40,8 @@ /* MII Status Register */ #define MII_STATUS_REG 1 +/* PHY Configuration register */ +#define PHY_CONF_TXCLKEN (1 << 5) /* Number of statistics registers */ #define EMAC_NUM_STATS 36 diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index defcad451880..4a81b1daf84e 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -123,6 +123,15 @@ #define CONFIG_SYS_TEXT_BASE 0x80800000 +#define CONFIG_DRIVER_TI_EMAC +#define CONFIG_MII +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_NET_RETRY_COUNT 10 + /* Since SPL did pll and ddr initialization for us, * we don't need to do it twice. */ -- 1.9.1

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[U-Boot] [PATCH v4 00/17] nand: remove direct acces to nand_info array
by Grygorii Strashko 12 Jul '17

12 Jul '17

This is a preparation required for adding Nand DM support. This series introduces new API get_nand_dev_by_index() to avoid direct acces to nand_info array and updates u-boot to use it. As result, nand_info array is made static in the last patch. Changes in v4: - rebased on top of git://git.denx.de/u-boot.git/master - added patch for arch/arm/cpu/armv8/fsl-layerscape/ppa.c - added "Reviewed-by" tags Changes in v3: - preparation patches separated from original series. - fixed BeagleBoard-xM boot failure which has Nand enabled, but no Nand devices are presented on board physically. - all current direct users were converted to use get_nand_dev_by_index() and nand_info array was made static finally. link on v3: - https://www.mail-archive.com/u-boot@lists.denx.de/msg238797.html link on v2: - https://www.mail-archive.com/u-boot@lists.denx.de/msg237747.html Grygorii Strashko (17): common: env_nand: use get_nand_dev_by_index() dfu: dfu_nand: use get_nand_dev_by_index() cmd: bootm: use get_nand_dev_by_index() cmd: jffs2: use get_nand_dev_by_index() common: use get_nand_dev_by_index() fs: use get_nand_dev_by_index() cmd: nand: remove direct access to struct mtd_info->priv net: phy: cortina: use get_nand_dev_by_index() net: fm: use get_nand_dev_by_index() mtd: nand: drv: use get_nand_dev_by_index() cmd: mvebu: bubt: use get_nand_dev_by_index() board: atmel: use get_nand_dev_by_index() board: ronetix: use get_nand_dev_by_index() board: BuR: use get_nand_dev_by_index() board: toradex: use get_nand_dev_by_index() armv8: fsl-layerscape: use get_nand_dev_by_index() mtd: nand: make nand_info array static Mugunthan V N (1): cmd: nand: abstract global variable usage for dm conversion arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 15 +++--- board/BuR/common/common.c | 3 +- board/atmel/at91sam9261ek/at91sam9261ek.c | 2 +- board/atmel/at91sam9263ek/at91sam9263ek.c | 2 +- board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 2 +- board/atmel/at91sam9n12ek/at91sam9n12ek.c | 2 +- board/atmel/at91sam9rlek/at91sam9rlek.c | 2 +- board/atmel/at91sam9x5ek/at91sam9x5ek.c | 2 +- board/atmel/sama5d3xek/sama5d3xek.c | 2 +- board/atmel/sama5d4_xplained/sama5d4_xplained.c | 2 +- board/atmel/sama5d4ek/sama5d4ek.c | 2 +- board/ronetix/pm9261/pm9261.c | 2 +- board/ronetix/pm9263/pm9263.c | 2 +- board/toradex/colibri_t20/colibri_t20.c | 2 +- board/toradex/common/tdx-cfg-block.c | 12 +++-- cmd/bootm.c | 2 +- cmd/jffs2.c | 7 +-- cmd/mvebu/bubt.c | 14 +++-- cmd/nand.c | 69 ++++++++++++++----------- common/env_nand.c | 33 +++++++----- common/fb_nand.c | 2 +- common/splash_source.c | 5 +- drivers/dfu/dfu_nand.c | 12 ++--- drivers/mtd/nand/fsmc_nand.c | 2 +- drivers/mtd/nand/nand.c | 23 ++++++--- drivers/mtd/nand/omap_gpmc.c | 7 +-- drivers/mtd/nand/zynq_nand.c | 2 +- drivers/net/fm/fm.c | 3 +- drivers/net/phy/cortina.c | 3 +- fs/jffs2/jffs2_1pass.c | 9 +++- fs/jffs2/jffs2_nand_1pass.c | 6 ++- fs/yaffs2/yaffs_uboot_glue.c | 8 ++- include/nand.h | 10 +++- 33 files changed, 162 insertions(+), 109 deletions(-) -- 2.10.1

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[U-Boot] [PATCH 0/5] Add support for Adaptrum ACRS2 mainboard
by Alexandru Gagniuc 12 Jul '17

12 Jul '17

This is a series of patches to add support for our ACRS2 board. This board is already out in the wild, but we decided to change to a proper bootloader for recovery and sturdiness reasons. Because this board has been shipping, it already has a defined format for the EEPROM contents, which unfortunately, is incompatible with the format other boards use to detect the system. Because of this, the path that should do board detection in SPL is missing from this series. We don't have a set of stable bits that we can use to confidently identify the board in the context of board_detect.c. The way we currently have the detection implemented is by hacking the if statements in board.c and mux.c. While that specific change is not included, this patchset will be able to boot the board. As far as running linux on this board, it does not appear it will ever ship with a linux. Enjoy! Alex Alexandru Gagniuc (5): configs: am335x_evm: Enable FASTBOOT based on kconfig Revert "configs: am335x: usb: do not define CONFIG_DM_USB for spl" ARM: DTS: Add devicetree for Adaptrum ACRS2 mainboard configs: am335x: Enable PHY_VITESSE configs: Add defconfig for Adaptrum ACRS2 arch/arm/dts/Makefile | 1 + arch/arm/dts/am335x-adaptrum-acrs2-mb.dts | 100 ++++++++++++++++++++++++++++++ configs/am335x_adaptrum_acrs2_defconfig | 36 +++++++++++ configs/am335x_boneblack_defconfig | 5 ++ configs/am335x_boneblack_vboot_defconfig | 3 + configs/am335x_evm_defconfig | 3 + configs/am335x_evm_nor_defconfig | 5 ++ configs/am335x_evm_norboot_defconfig | 5 ++ configs/am335x_evm_spiboot_defconfig | 5 ++ configs/am335x_evm_usbspl_defconfig | 5 ++ configs/am335x_hs_evm_defconfig | 5 ++ include/configs/am335x_evm.h | 6 +- 12 files changed, 174 insertions(+), 5 deletions(-) create mode 100644 arch/arm/dts/am335x-adaptrum-acrs2-mb.dts create mode 100644 configs/am335x_adaptrum_acrs2_defconfig -- 2.9.3

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[U-Boot] Does U-boot allow snapshot restoration?
by shiwen 12 Jul '17

12 Jul '17

Hi all, This is Shiwen, good morning! :) I wan to do fast boot for arm , but I am not familiar with U-boot, as title says, I'm curious that U-boot for smdk2410 allow snapshot restoration? If allowed, can you tell me witch function do this work? Any advice will be appreciated, thanks. Have a nice day! Cheers, Shiwen

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[U-Boot] [PATCH] ls1046aqds: update the defaule mtdparts
by Bao Xiaowei 12 Jul '17

12 Jul '17

modify the include/configs/ls1046aqds.h file, according to the latest partion rules, norflash nandflash dspiflash detailed partion as follows: mtd0: 00100000 00020000 "nor_bank0_rcw" mtd1: 00200000 00020000 "nor_bank0_uboot" mtd2: 00100000 00020000 "nor_bank0_uboot_env" mtd3: 00200000 00020000 "nor_bank0_ppa" mtd4: 00300000 00020000 "nor_bank0_secure_boot" mtd5: 00600000 00020000 "nor_bank0_dppa_qe" mtd6: 00100000 00020000 "nor_bank0_dtb" mtd7: 01000000 00020000 "nor_bank0_kernel" mtd8: 02000000 00020000 "nor_bank0_rootfs" mtd9: 00100000 00020000 "nor_bank4_rcw" mtd10: 00200000 00020000 "nor_bank4_uboot" mtd11: 00200000 00020000 "nor_bank4_uboot_env" mtd12: 00100000 00020000 "nor_bank4_ppa" mtd13: 00300000 00020000 "nor_bank4_secure_boot" mtd14: 00600000 00020000 "nor_bank4_dppa_qe" mtd15: 00100000 00020000 "nor_bank4_dtb" mtd16: 01000000 00020000 "nor_bank4_kernel" mtd17: 02000000 00020000 "nor_bank4_rootfs" mtd18: 00100000 00040000 "nand_rcw" mtd19: 00200000 00040000 "nand_uboot" mtd20: 00100000 00040000 "nand_uboot_env" mtd21: 00200000 00040000 "nand_ppa" mtd22: 00300000 00040000 "nand_secure_boot" mtd23: 00600000 00040000 "nand_dppa_qe" mtd24: 00100000 00040000 "nand_dtb" mtd25: 01000000 00040000 "nand_kernel" mtd26: 02000000 00040000 "nand_rootfs" mtd27: 1c000000 00040000 "nand_free" mtd28: 01000000 00010000 "spi0_free" mtd29: 00080000 00001000 "spi1_free" mtd30: 00800000 00001000 "spi2_free" Signed-off-by: Bao Xiaowei <xiaowei.bao(a)nxp.com> --- include/configs/ls1046aqds.h | 28 +++++++++++++++++----------- 1 file changed, 17 insertions(+), 11 deletions(-) diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 5d2e819..57aed04 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -479,17 +479,23 @@ unsigned long get_board_ddr_clk(void); #define MTDPARTS_DEFAULT "mtdparts=1550000.quadspi:2m(uboot)," \ "14m(free)" #else -#define MTDPARTS_DEFAULT "mtdparts=60000000.nor:" \ - "2m@0x100000(nor_bank0_uboot),"\ - "40m@0x1100000(nor_bank0_fit)," \ - "7m(nor_bank0_user)," \ - "2m@0x4100000(nor_bank4_uboot)," \ - "40m@0x5100000(nor_bank4_fit),"\ - "-(nor_bank4_user);" \ - "7e800000.flash:" \ - "4m(nand_uboot),36m(nand_kernel)," \ - "472m(nand_free);spi0.0:2m(uboot)," \ - "14m(free)" +#define MTDPARTS_DEFAULT "mtdparts=60000000.nor:1m(nor_bank0_rcw)," \ + "2m(nor_bank0_uboot),1m(nor_bank0_uboot_env)," \ + "2m(nor_bank0_ppa),3m(nor_bank0_secure_boot)," \ + "6m(nor_bank0_dppa_qe),1m(nor_bank0_dtb)," \ + "16m(nor_bank0_kernel),32m(nor_bank0_rootfs)," \ + "1m(nor_bank4_rcw),2m(nor_bank4_uboot)," \ + "2m(nor_bank4_uboot_env),1m(nor_bank4_ppa)," \ + "3m(nor_bank4_secure_boot),6m(nor_bank4_dppa_qe)," \ + "1m(nor_bank4_dtb),16m(nor_bank4_kernel)," \ + "32m(nor_bank4_rootfs);7e800000.flash:" \ + "1m(nand_rcw),2m(nand_uboot)," \ + "1m(nand_uboot_env),2m(nand_ppa)," \ + "3m(nand_secure_boot),6m(nand_dppa_qe)," \ + "1m(nand_dtb),16m(nand_kernel)," \ + "32m(nand_rootfs),448m(nand_free);" \ + "spi0.0:16m(spi0_free);" \ + "spi0.1:512k(spi1_free);spi0.2:8m(spi2_free)" #endif #include <asm/fsl_secure_boot.h> -- 2.1.0.27.g96db324

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[U-Boot] [PATCH] rockchip: clk: rk3368: use correct (i.e. 'rk3368_clk_priv') structure for auto-alloc
by Philipp Tomsich 12 Jul '17

12 Jul '17

The clk driver for the RK3368 picked the wrong data structure's size for its auto-alloc size: the size was calculated on the structure representing the CRU hardware block instead of the priv structure. As the CRU's register file is much larger than the driver's priv, this did not cause any pain (except wasting memory). Fix this by using the correct data structure's size. Signed-off-by: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> --- drivers/clk/rockchip/clk_rk3368.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c index b16c075..18ae287 100644 --- a/drivers/clk/rockchip/clk_rk3368.c +++ b/drivers/clk/rockchip/clk_rk3368.c @@ -434,7 +434,7 @@ U_BOOT_DRIVER(rockchip_rk3368_cru) = { .name = "rockchip_rk3368_cru", .id = UCLASS_CLK, .of_match = rk3368_clk_ids, - .priv_auto_alloc_size = sizeof(struct rk3368_cru), + .priv_auto_alloc_size = sizeof(struct rk3368_clk_priv), #if CONFIG_IS_ENABLED(OF_PLATDATA) .platdata_auto_alloc_size = sizeof(struct rk3368_clk_plat), #endif -- 2.1.4

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[U-Boot] [PATCH] rockchip: spl: make boot0 hook TPL safe
by Philipp Tomsich 12 Jul '17

12 Jul '17

When building for a TPL/SPL setup (e.g. on the RK3368), we need the TPL stage to have the extra space for for the 'Rockchip SPL name' (i.e. 'RK33' word). Yet, the SPL will start execution at its first word (i.e. the first word in the SPL binary needs to be a valid instruction). To make things a bit more involved, CONFIG_SPL_BUILD is defined both for the SPL and the TPL stage. To avoid having to explicitly test for the first stage (TPL, if and only if TPL and SPL are built, SPL otherwise), this commit modifies the sequence to repeat the 'b reset' (instead of reserving 4 bytes of undefined space) at the start of the boot0 hook: if overwritten (and execution starts at the second word), the first instruction is still a 'b reset'... if not overwritten, we start on a 'b reset' as well. This solution wouldn't even require the check whether we are in the SPL/TPL build (i.e. CONFIG_SPL_BUILD), but we leave this check in for documentation purposes. Signed-off-by: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> --- arch/arm/include/asm/arch-rockchip/boot0.h | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h index 7346876..72d264b 100644 --- a/arch/arm/include/asm/arch-rockchip/boot0.h +++ b/arch/arm/include/asm/arch-rockchip/boot0.h @@ -1,3 +1,4 @@ + /* * Copyright 2017 Theobroma Systems Design und Consulting GmbH * @@ -13,7 +14,17 @@ */ #ifdef CONFIG_SPL_BUILD - .space 0x4 /* space for the 'RK33' */ + /* + * We need to add 4 bytes of space for the 'RK33' at the + * beginning of the executable. However, as we want to keep + * this generic and make it applicable to builds that are like + * the RK3368 (TPL needs this, SPL doesn't) or the RK3399 (no + * TPL, but extra space needed in the SPL), we simply repeat + * the 'b reset' with the expectation that the first one will + * be overwritten, if this is the first stage contained in the + * final image created with mkimage)... + */ + b reset /* may be overwritten --- should be 'nop' or a 'b reset' */ #endif b reset -- 2.1.4

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