May 2017 - U-Boot

[U-Boot] [PATCH v3 0/1] arm64: enable SPL with ATF support
by Kever Yang 05 May '17

05 May '17

This patch needs work with some patch for SPL support multi binary in FIT which is from Andre. The entry point of bl31 and bl33 is still using hard code because we still can not get them from the FIT image information. This patch tested on rk3399 platform. Changes in v3: - remove no neccessary Macro definition in header file. - rename some Macro with 'ATF_' prefix. Changes in v2: - Kconfig comment update with Simon's suggestion - including file ordering, - update function comment format, - use 'if' instead of '#ifdef' for bl31_entry - add ATF Kconfig option depend on ARM64 Changes in v1: - license update - split out as separate patch Kever Yang (1): spl: add support to booting with ATF common/spl/Kconfig | 14 ++++ common/spl/Makefile | 1 + common/spl/spl.c | 3 + common/spl/spl_atf.c | 97 +++++++++++++++++++++++++++ include/atf_common.h | 183 +++++++++++++++++++++++++++++++++++++++++++++++++++ include/spl.h | 1 + 6 files changed, 299 insertions(+) create mode 100644 common/spl/spl_atf.c create mode 100644 include/atf_common.h -- 1.9.1

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[U-Boot] [PATCH] sunxi: add support for Banana Pi M2 Plus board
by Icenowy Zheng 04 May '17

04 May '17

Banana Pi M2 Plus is an Allwinner H3-based SBC by Sinovoip, which has already mainline device tree file that have landed into U-Boot source tree. Add a defconfig file for it and add the MAINTAINERS items. Signed-off-by: Icenowy Zheng <icenowy(a)aosc.io> --- board/sunxi/MAINTAINERS | 5 +++++ configs/Sinovoip_BPI_M2_Plus_defconfig | 20 ++++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 configs/Sinovoip_BPI_M2_Plus_defconfig diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index f39402b89c..1c8817375d 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -280,6 +280,11 @@ S: Maintained F: configs/Sinlinx_SinA33_defconfig W: http://linux-sunxi.org/Sinlinx_SinA33 +SINOVOIP BPI M2 PLUS H3 BOARD +M: Icenowy Zheng <icenowy(a)aosc.io> +S: Maintained +F: configs/Sinovoip_BPI_M2_Plus_defconfig + SINOVOIP BPI M3 A83T BOARD M: VishnuPatekar <vishnupatekar0510(a)gmail.com> S: Maintained diff --git a/configs/Sinovoip_BPI_M2_Plus_defconfig b/configs/Sinovoip_BPI_M2_Plus_defconfig new file mode 100644 index 0000000000..e8cd4fb9ec --- /dev/null +++ b/configs/Sinovoip_BPI_M2_Plus_defconfig @@ -0,0 +1,20 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN8I_H3=y +CONFIG_DRAM_CLK=672 +CONFIG_DRAM_ZQ=3881979 +CONFIG_DRAM_ODT_EN=y +CONFIG_MACPWR="PD6" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-bananapi-m2-plus" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_CONSOLE_MUX=y +CONFIG_SPL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y -- 2.12.2

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[U-Boot] [PATCH] ARM: dts: OLinuXino Lime2 eMMC dts sync
by Olliver Schinagl 04 May '17

04 May '17

Sync the sun7i-a20-olinuxino-lime2-emmc.dts with the upstream kernel, which fixes the power-sequencing pin being wrongfully set up. Signed-off-by: Olliver Schinagl <oliver(a)schinagl.nl> --- arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts index 5ea4915f6d..81f376f2a4 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts @@ -56,11 +56,9 @@ }; &pio { - mmc2_pins_nrst: mmc2@0 { - allwinner,pins = "PC16"; - allwinner,function = "gpio_out"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + mmc2_pins_nrst: mmc2-rst-pin { + pins = "PC16"; + function = "gpio_out"; }; }; -- 2.11.0

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[U-Boot] [PATCH] drivers:usb:xhci:fsl: Implement Erratum A-010151 for FSL USB3 controller
by yinbo.zhu 04 May '17

04 May '17

From: Sriram Dash <sriram.dash(a)nxp.com> Currently the controller by default enables the Receive Detect feature in P3 mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably support receive detection in P3 mode. Enabling the USB3 controller to configure USB in P2 mode whenever the Receive Detect feature is required. Signed-off-by: Sriram Dash <sriram.dash(a)nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat(a)nxp.com> Signed-off-by: yinbo.zhu <yinbo.zhu(a)nxp.com> --- drivers/usb/host/xhci-dwc3.c | 5 +++++ drivers/usb/host/xhci-fsl.c | 7 +++++++ include/linux/usb/dwc3.h | 1 + 3 files changed, 13 insertions(+) diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c index 33961cd..adbd9b5 100644 --- a/drivers/usb/host/xhci-dwc3.c +++ b/drivers/usb/host/xhci-dwc3.c @@ -97,3 +97,8 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val) setbits_le32(&dwc3_reg->g_fladj, GFLADJ_30MHZ_REG_SEL | GFLADJ_30MHZ(val)); } + +void dwc3_set_rxdetect_power_mode(struct dwc3 *dwc3_reg, u32 val) +{ + setbits_le32(&dwc3_reg->g_usb3pipectl[0], val); +} diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c index 3a16624..ffb2242 100644 --- a/drivers/usb/host/xhci-fsl.c +++ b/drivers/usb/host/xhci-fsl.c @@ -85,6 +85,13 @@ static int fsl_xhci_core_init(struct fsl_xhci *fsl_xhci) /* Change beat burst and outstanding pipelined transfers requests */ fsl_xhci_set_beat_burst_length(fsl_xhci->dwc3_reg); + /* + * A-010151: USB controller to configure USB in P2 mode + * whenever the Receive Detect feature is required + */ + dwc3_set_rxdetect_power_mode(fsl_xhci->dwc3_reg, + DWC3_GUSB3PIPECTL_DISRXDETP3); + /* * A-010151: The dwc3 phy TSMC 28-nm HPM 0.9/1.8 V does not * reliably support Rx Detect in P3 mode(P3 is the default diff --git a/include/linux/usb/dwc3.h b/include/linux/usb/dwc3.h index c1b23b2..873b4db 100644 --- a/include/linux/usb/dwc3.h +++ b/include/linux/usb/dwc3.h @@ -220,5 +220,6 @@ void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode); void dwc3_core_soft_reset(struct dwc3 *dwc3_reg); int dwc3_core_init(struct dwc3 *dwc3_reg); void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val); +void dwc3_set_rxdetect_power_mode(struct dwc3 *dwc3_reg, u32 val); #endif #endif /* __DWC3_H_ */ -- 2.1.0.27.g96db324

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[U-Boot] [PATCHv2] sun7i: Add support for Olimex A20-OLinuXino-LIME2-eMMC
by Olliver Schinagl 04 May '17

04 May '17

This patch adds support for the Olimex OLinuXino Lime2 with eMMC flash storage. https://www.olimex.com/Products/OLinuXino/A20/A20-OLinuXino-LIME2-eMMC/ It is a assembly variant of the regular Lime2 but featuring eMMC for storage. Signed-off-by: Olliver Schinagl <oliver(a)schinagl.nl> --- Jagan, I was fairly certain that I was updated, guess I was wrong! Sorry. Changes since v1: rebase with master Note: for the board to work properly, the updated eMMC dts variant needs to be resynced from upstream. board/sunxi/MAINTAINERS | 5 +++++ configs/A20-OLinuXino-Lime2-eMMC_defconfig | 36 ++++++++++++++++++++++++++++++ 2 files changed, 41 insertions(+) create mode 100644 configs/A20-OLinuXino-Lime2-eMMC_defconfig diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index f39402b89c..24235a71a7 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -89,6 +89,11 @@ M: Iain Paton <ipaton0(a)gmail.com> S: Maintained F: configs/A20-OLinuXino-Lime2_defconfig +A20-OLINUXINO-LIME2-EMMC BOARD +M: Olliver Schinagl <oliver(a)schinagl.nl> +S: Maintained +F: configs/A20-OLinuXino-Lime2-eMMC_defconfig + A33-OLINUXINO BOARD M: Stefan Mavrodiev <stefan.mavrodiev(a)gmail.com> S: Maintained diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig new file mode 100644 index 0000000000..034ae983a5 --- /dev/null +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -0,0 +1,36 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN7I=y +CONFIG_DRAM_CLK=384 +CONFIG_MMC0_CD_PIN="PH1" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_USB0_VBUS_PIN="PC17" +CONFIG_USB0_VBUS_DET="PH5" +CONFIG_I2C1_ENABLE=y +CONFIG_SATAPWR="PC3" +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2-emmc" +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_DFU=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_PARTITION_UUIDS is not set +CONFIG_DFU_RAM=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_RGMII=y +CONFIG_SUN7I_GMAC=y +CONFIG_AXP_ALDO3_VOLT=2800 +CONFIG_AXP_ALDO4_VOLT=2800 +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Allwinner Technology" +CONFIG_G_DNL_VENDOR_NUM=0x1f3a +CONFIG_G_DNL_PRODUCT_NUM=0x1010 -- 2.11.0

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[U-Boot] [ U-Boot ] armv8/start.S : what's the difference between CONFIG_ARMV8_SPIN_TABLE and CONFIG_ARMV8_MULTIENTRY
by Cao Jie 04 May '17

04 May '17

Hi all I am new to armv8's uboot and when I research codes about armv8/start.S I'm confused by two option: CONFIG_ARMV8_SPIN_TABLE and CONFIG_ARMV8_MULTIENTRY Both option have the same function which cause slave CPUS to enter standby mode, so why we have the two option for this case? What's the difference between them? Any feedback would be appreciate. Thanks, Jay

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[U-Boot] [PATCH V4 0/4] introduce Rockchip rockusb
by Eddie Cai 03 May '17

03 May '17

rockusb is a protocol run between host pc and device. it help people get device info, flash image to device. this patch implement rockusb on device sid Changes in v4: -use enum instead of macro define -move some structure define and macro to f_rockusb.h -add some function comment as Simon required -address other comment from Simon -fix build error as Lukasz point out Changes in v3: -switch back to use g_dnl code -address comment from Lukasz and Simon -fix checkpatch error Changes in v2: -switch to use usb masstorage framework -add readme for rockusb Eddie Cai (4): usb: rockchip: add the rockusb gadget usb: rockchip: add rockusb command rockchip:usb: add a simple readme for rockusb rockchip: usb: enable rockusb on rk3288 based board arch/arm/include/asm/arch-rockchip/f_rockusb.h | 122 +++++ cmd/Kconfig | 8 + cmd/Makefile | 1 + cmd/rockusb.c | 74 +++ doc/README.rockusb | 52 ++ drivers/usb/gadget/Kconfig | 6 + drivers/usb/gadget/Makefile | 1 + drivers/usb/gadget/f_rockusb.c | 680 +++++++++++++++++++++++++ include/configs/rk3288_common.h | 2 + 9 files changed, 946 insertions(+) create mode 100644 arch/arm/include/asm/arch-rockchip/f_rockusb.h create mode 100644 cmd/rockusb.c create mode 100644 doc/README.rockusb create mode 100644 drivers/usb/gadget/f_rockusb.c -- 1.9.1

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[U-Boot] [PATCH 0/3] spl: dfu: misc fixes and reduce MLO foot print
by Ravi Babu 03 May '17

03 May '17

The patch series spl-dfu fixes includes - select spl-dfu only spl-ram supported - ignore the dfu-reset for spl-dfu - reduce the spl-dfu MLO foot print buildman ran for arm targets Ravi Babu (3): spl: Kconfig: dfu: spl-dfu depends on SPL_RAM_SUPPORT common: dfu: ignore reset for spl-dfu spl: dfu: reduce spl-dfu MLO size common/Makefile | 3 +-- common/dfu.c | 3 +++ common/spl/Kconfig | 1 + drivers/dfu/Makefile | 4 +++- include/dfu.h | 8 ++++---- 5 files changed, 12 insertions(+), 7 deletions(-) -- 1.9.1

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[U-Boot] [PATCH] sun7i: Add support for Olimex A20-OLinuXino-LIME2-eMMC
by Olliver Schinagl 03 May '17

03 May '17

This patch adds support for the Olimex OLinuXino Lime2 with eMMC flash storage. https://www.olimex.com/Products/OLinuXino/A20/A20-OLinuXino-LIME2-eMMC/ It is a assembly variant of the regular Lime2 but featuring eMMC for storage. Signed-off-by: Olliver Schinagl <oliver(a)schinagl.nl> --- Note: for the board to work properly, the updated eMMC dts variant needs to be updated from upstream. board/sunxi/MAINTAINERS | 5 +++++ configs/A20-OLinuXino-Lime2-eMMC_defconfig | 33 ++++++++++++++++++++++++++++++ 2 files changed, 38 insertions(+) create mode 100644 configs/A20-OLinuXino-Lime2-eMMC_defconfig diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 2321b8b08f..84f91fd10b 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -89,6 +89,11 @@ M: Iain Paton <ipaton0(a)gmail.com> S: Maintained F: configs/A20-OLinuXino-Lime2_defconfig +A20-OLINUXINO-LIME2-EMMC BOARD +M: Olliver Schinagl <oliver(a)schinagl.nl> +S: Maintained +F: configs/A20-OLinuXino-Lime2-eMMC_defconfig + A33-OLINUXINO BOARD M: Stefan Mavrodiev <stefan.mavrodiev(a)gmail.com> S: Maintained diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig new file mode 100644 index 0000000000..1369d2d90b --- /dev/null +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -0,0 +1,33 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN7I=y +CONFIG_DRAM_CLK=384 +CONFIG_MMC0_CD_PIN="PH1" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_USB0_VBUS_PIN="PC17" +CONFIG_USB0_VBUS_DET="PH5" +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2-emmc" +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII,SATAPWR=SUNXI_GPC(3)" +CONFIG_SPL=y +CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_DFU=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_PARTITION_UUIDS is not set +CONFIG_DFU_RAM=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_AXP_ALDO3_VOLT=2800 +CONFIG_AXP_ALDO4_VOLT=2800 +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Allwinner Technology" +CONFIG_G_DNL_VENDOR_NUM=0x1f3a +CONFIG_G_DNL_PRODUCT_NUM=0x1010 -- 2.11.0

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[U-Boot] [PATCH] arm64: zynqmp: Remove CPU_RELEASE_ADDR macro
by Michal Simek 03 May '17

03 May '17

CPU_RELEASE_ADDR is used only when CONFIG_ARMV8_MULTIENTRY is enabled. ZynqMP is running ATF which takes care about this that's why no need to have this macro. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- include/configs/xilinx_zynqmp.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 8fdb4f403b55..c2e2a51f0faf 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -29,9 +29,6 @@ #define CONFIG_SYS_MEMTEST_START 0 #define CONFIG_SYS_MEMTEST_END 1000 -/* Have release address at the end of 256MB for now */ -#define CPU_RELEASE_ADDR 0xFFFFFF0 - #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE /* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */ -- 1.9.1

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