May 2017 - U-Boot

[U-Boot] [PATCH v3] Kconfig: Finish migration of hashing commands
by Tom Rini 01 Jun '17

01 Jun '17

From: Daniel Thompson <daniel.thompson(a)linaro.org> Currently these (board agnostic) commands cannot be selected using menuconfig and friends. Fix this the obvious way. As part of this, don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v' and "we have a hashing command" as this makes the Kconfig logic odd. Signed-off-by: Daniel Thompson <daniel.thompson(a)linaro.org> [trini: Re-apply, add imply for a few cases, run moveconfig.py, also migrate CRC32_VERIFY] Signed-off-by: Tom Rini <trini(a)konsulko.com> --- README | 12 ------------ arch/Kconfig | 2 ++ arch/arm/Kconfig | 5 +++++ arch/arm/mach-exynos/Kconfig | 2 ++ arch/arm/mach-tegra/Kconfig | 1 + board/ti/common/Kconfig | 1 + cmd/Kconfig | 26 +++++++++++++++++++++++++- cmd/mem.c | 8 ++++---- common/hash.c | 14 ++++---------- configs/apalis_imx6_defconfig | 1 + configs/apalis_imx6_nospl_com_defconfig | 1 + configs/apalis_imx6_nospl_it_defconfig | 1 + configs/bcm958622hr_defconfig | 2 ++ configs/calimain_defconfig | 1 + configs/colibri_imx6_defconfig | 1 + configs/colibri_imx6_nospl_defconfig | 1 + configs/da850_am18xxevm_defconfig | 1 + configs/da850evm_defconfig | 1 + configs/da850evm_direct_nor_defconfig | 1 + configs/ea20_defconfig | 1 + configs/imx6qdl_icore_mmc_defconfig | 1 + configs/imx6qdl_icore_rqs_mmc_defconfig | 1 + configs/imx6ul_geam_mmc_defconfig | 1 + configs/imx6ul_geam_nand_defconfig | 1 + configs/imx6ul_isiot_emmc_defconfig | 1 + configs/imx6ul_isiot_mmc_defconfig | 1 + configs/imx6ul_isiot_nand_defconfig | 1 + configs/ipam390_defconfig | 1 + configs/legoev3_defconfig | 1 + configs/omapl138_lcdk_defconfig | 1 + configs/xtfpga_defconfig | 1 + include/configs/apalis_imx6.h | 2 -- include/configs/bcm23550_w1d.h | 1 - include/configs/bcm28155_ap.h | 1 - include/configs/bcm_ep_board.h | 5 ----- include/configs/calimain.h | 1 - include/configs/colibri_imx6.h | 2 -- include/configs/da850evm.h | 1 - include/configs/ea20.h | 1 - include/configs/exynos5-common.h | 3 --- include/configs/imx6qdl_icore.h | 1 - include/configs/imx6qdl_icore_rqs.h | 1 - include/configs/imx6ul_geam.h | 1 - include/configs/imx6ul_isiot.h | 1 - include/configs/ipam390.h | 1 - include/configs/legoev3.h | 1 - include/configs/omapl138_lcdk.h | 1 - include/configs/sandbox.h | 2 -- include/configs/socfpga_common.h | 2 -- include/configs/tegra-common.h | 1 - include/configs/ti_armv7_keystone2.h | 1 - include/configs/xtfpga.h | 1 - include/hash.h | 4 ---- scripts/config_whitelist.txt | 3 --- 54 files changed, 67 insertions(+), 65 deletions(-) diff --git a/README b/README index 9d351ec5ad..77d46d2b42 100644 --- a/README +++ b/README @@ -827,7 +827,6 @@ The following options need to be configured: CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support CONFIG_CMD_CACHE * icache, dcache CONFIG_CMD_CONSOLE coninfo - CONFIG_CMD_CRC32 * crc32 CONFIG_CMD_DHCP * DHCP support CONFIG_CMD_DIAG * Diagnostics CONFIG_CMD_ECHO echo arguments @@ -889,8 +888,6 @@ The following options need to be configured: CONFIG_CMD_SETGETDCR Support for DCR Register access (4xx only) CONFIG_CMD_SF * Read/write/erase SPI NOR flash - CONFIG_CMD_SHA1SUM * print sha1 memory digest - (requires CONFIG_CMD_MEMORY) CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x CONFIG_CMD_SOURCE "source" command Support CONFIG_CMD_SPI * SPI serial bus support @@ -2679,15 +2676,6 @@ The following options need to be configured: A better solution is to properly configure the firewall, but sometimes that is not allowed. -- Hashing support: - CONFIG_HASH_VERIFY - - Enable the hash verify command (hash -v). This adds to code - size a little. - - Note: There is also a sha1sum command, which should perhaps - be deprecated in favour of 'hash sha1'. - - bootcount support: CONFIG_BOOTCOUNT_LIMIT diff --git a/arch/Kconfig b/arch/Kconfig index 02e887ac86..e0e4e8486c 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -70,12 +70,14 @@ config SANDBOX select DM_SPI select DM_GPIO select DM_MMC + imply CRC32_VERIFY imply CMD_GETTIME imply CMD_HASH imply CMD_IO imply CMD_IOTRACE imply LZMA imply CMD_LZMADEC + imply HASH_VERIFY config SH bool "SuperH architecture" diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 91f50b0637..a8118ce0df 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -495,15 +495,19 @@ config TARGET_VEXPRESS_CA9X4 config TARGET_BCM23550_W1D bool "Support bcm23550_w1d" select CPU_V7 + imply CRC32_VERIFY config TARGET_BCM28155_AP bool "Support bcm28155_ap" select CPU_V7 + imply CRC32_VERIFY config TARGET_BCMCYGNUS bool "Support bcmcygnus" select CPU_V7 + imply CRC32_VERIFY imply CMD_HASH + imply HASH_VERIFY config TARGET_BCMNSP bool "Support bcmnsp" @@ -629,6 +633,7 @@ config ARCH_SOCFPGA select ARCH_MISC_INIT select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION select SYS_THUMB_BUILD + imply CRC32_VERIFY config ARCH_SUNXI bool "Support sunxi (Allwinner) SoCs" diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 5b6c5ea328..c57935e44d 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -18,7 +18,9 @@ config ARCH_EXYNOS5 select CPU_V7 select BOARD_EARLY_INIT_F select SHA_HW_ACCEL + imply CRC32_VERIFY imply CMD_HASH + imply HASH_VERIFY help Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU (and Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 940257b5ec..89d2a499e4 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -38,6 +38,7 @@ config TEGRA_COMMON select OF_CONTROL select VIDCONSOLE_AS_LCD if DM_VIDEO select BOARD_EARLY_INIT_F + imply CRC32_VERIFY config TEGRA_NO_BPMP bool "Tegra common options for SoCs without BPMP" diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig index 1187cf5433..e35afa0e51 100644 --- a/board/ti/common/Kconfig +++ b/board/ti/common/Kconfig @@ -18,6 +18,7 @@ config TI_COMMON_CMD_OPTIONS bool "Enable cmd options on TI platforms" imply CMD_ASKENV imply CMD_BOOTZ + imply CRC32_VERIFY if ARCH_KEYSTONE imply CMD_DFU if USB_GADGET_DOWNLOAD imply CMD_DHCP imply CMD_EEPROM diff --git a/cmd/Kconfig b/cmd/Kconfig index 5ee52f62cc..6f75b86e25 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -355,6 +355,12 @@ config CMD_CRC32 help Compute CRC32. +config CRC32_VERIFY + bool "crc32 -v" + depends on CMD_CRC32 + help + Add -v option to verify data against a crc32 checksum. + config CMD_EEPROM bool "eeprom - EEPROM subsystem" help @@ -410,13 +416,25 @@ config CMD_MD5SUM help Compute MD5 checksum. -config MD5SUM_VERFIY +config MD5SUM_VERIFY bool "md5sum -v" default n depends on CMD_MD5SUM help Add -v option to verify data against an MD5 checksum. +config CMD_SHA1SUM + bool "sha1sum" + select SHA1 + help + Compute SHA1 checksum. + +config SHA1SUM_VERIFY + bool "sha1sum -v" + depends on CMD_SHA1SUM + help + Add -v option to verify data against a SHA1 checksum. + config LOOPW bool "loopw" help @@ -1068,6 +1086,12 @@ config CMD_HASH saved to memory or to an environment variable. It is also possible to verify a hash against data in memory. +config HASH_VERIFY + bool "hash -v" + depends on CMD_HASH + help + Add -v option to verify data against a hash. + config CMD_TPM bool "Enable the 'tpm' command" depends on TPM diff --git a/cmd/mem.c b/cmd/mem.c index b6e200b97c..27075e54a9 100644 --- a/cmd/mem.c +++ b/cmd/mem.c @@ -1160,7 +1160,7 @@ static int do_mem_crc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) av = argv + 1; ac = argc - 1; -#ifdef CONFIG_HASH_VERIFY +#ifdef CONFIG_CRC32_VERIFY if (strcmp(*av, "-v") == 0) { flags |= HASH_FLAG_VERIFY | HASH_FLAG_ENV; av++; @@ -1238,7 +1238,7 @@ U_BOOT_CMD( #ifdef CONFIG_CMD_CRC32 -#ifndef CONFIG_HASH_VERIFY +#ifndef CONFIG_CRC32_VERIFY U_BOOT_CMD( crc32, 4, 1, do_mem_crc, @@ -1246,7 +1246,7 @@ U_BOOT_CMD( "address count [addr]\n - compute CRC32 checksum [save at addr]" ); -#else /* CONFIG_HASH_VERIFY */ +#else /* CONFIG_CRC32_VERIFY */ U_BOOT_CMD( crc32, 5, 1, do_mem_crc, @@ -1255,7 +1255,7 @@ U_BOOT_CMD( "-v address count crc\n - verify crc of memory area" ); -#endif /* CONFIG_HASH_VERIFY */ +#endif /* CONFIG_CRC32_VERIFY */ #endif diff --git a/common/hash.c b/common/hash.c index a0eded98d0..771d8fa87f 100644 --- a/common/hash.c +++ b/common/hash.c @@ -178,16 +178,9 @@ static struct hash_algo hash_algo[] = { }, }; -#if defined(CONFIG_SHA256) || defined(CONFIG_CMD_SHA1SUM) -#define MULTI_HASH -#endif - -#if defined(CONFIG_HASH_VERIFY) || defined(CONFIG_CMD_HASH) -#define MULTI_HASH -#endif - /* Try to minimize code size for boards that don't want much hashing */ -#ifdef MULTI_HASH +#if defined(CONFIG_SHA256) || defined(CONFIG_CMD_SHA1SUM) || \ + defined(CONFIG_CRC32_VERIFY) || defined(CONFIG_CMD_HASH) #define multi_hash() 1 #else #define multi_hash() 0 @@ -424,7 +417,8 @@ int hash_command(const char *algo_name, int flags, cmd_tbl_t *cmdtp, int flag, unmap_sysmem(buf); /* Try to avoid code bloat when verify is not needed */ -#ifdef CONFIG_HASH_VERIFY +#if defined(CONFIG_CRC32_VERIFY) || defined(CONFIG_SHA1SUM_VERIFY) || \ + defined(CONFIG_HASH_VERIFY) if (flags & HASH_FLAG_VERIFY) { #else if (0) { diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index f586773761..c712cf91df 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -24,6 +24,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/apalis_imx6_nospl_com_defconfig b/configs/apalis_imx6_nospl_com_defconfig index 42abbbd49d..f5f4e3de7f 100644 --- a/configs/apalis_imx6_nospl_com_defconfig +++ b/configs/apalis_imx6_nospl_com_defconfig @@ -17,6 +17,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/apalis_imx6_nospl_it_defconfig b/configs/apalis_imx6_nospl_it_defconfig index 18f0d02e55..0de47fe360 100644 --- a/configs/apalis_imx6_nospl_it_defconfig +++ b/configs/apalis_imx6_nospl_it_defconfig @@ -17,6 +17,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/bcm958622hr_defconfig b/configs/bcm958622hr_defconfig index c2713c61fa..67e18b6268 100644 --- a/configs/bcm958622hr_defconfig +++ b/configs/bcm958622hr_defconfig @@ -13,7 +13,9 @@ CONFIG_CMD_ASKENV=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_HASH=y +CONFIG_HASH_VERIFY=y CONFIG_CMD_FAT=y # CONFIG_MMC is not set CONFIG_SYS_NS16550=y diff --git a/configs/calimain_defconfig b/configs/calimain_defconfig index 489d85fc4f..48422ddffe 100644 --- a/configs/calimain_defconfig +++ b/configs/calimain_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_PROMPT="Calimain > " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_STOP_STR="\x0b" CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 6c105767fc..fcb7c53797 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -24,6 +24,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/colibri_imx6_nospl_defconfig b/configs/colibri_imx6_nospl_defconfig index bd2ac24d4a..fbf9306eeb 100644 --- a/configs/colibri_imx6_nospl_defconfig +++ b/configs/colibri_imx6_nospl_defconfig @@ -17,6 +17,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig index bb92c438fb..74b3f0398d 100644 --- a/configs/da850_am18xxevm_defconfig +++ b/configs/da850_am18xxevm_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 1120182052..3745b859ed 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_PROMPT="U-Boot > " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 1e17ce736a..99543d39e1 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -10,6 +10,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_SF=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig index be48626b3c..4ee7d5aac1 100644 --- a/configs/ea20_defconfig +++ b/configs/ea20_defconfig @@ -15,6 +15,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ea20 > " # CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_SF=y CONFIG_CMD_SPI=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index b6b1b4bc04..851dba2c26 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/imx6qdl_icore_rqs_mmc_defconfig b/configs/imx6qdl_icore_rqs_mmc_defconfig index 08e6784b4c..b6a43ae77c 100644 --- a/configs/imx6qdl_icore_rqs_mmc_defconfig +++ b/configs/imx6qdl_icore_rqs_mmc_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl-rqs> " # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index 8751a36e27..acaed604b1 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index 704c0c0374..baf1a739c3 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_DMA_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 1f501cb021..4b429c256d 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_GPIO=y diff --git a/configs/imx6ul_isiot_mmc_defconfig b/configs/imx6ul_isiot_mmc_defconfig index 5214479dcc..424089c0e4 100644 --- a/configs/imx6ul_isiot_mmc_defconfig +++ b/configs/imx6ul_isiot_mmc_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index 1b28336f36..fb2bef9a9b 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_DMA_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/ipam390_defconfig b/configs/ipam390_defconfig index 705236eb7b..3c32a6b0ec 100644 --- a/configs/ipam390_defconfig +++ b/configs/ipam390_defconfig @@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " # CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig index 86ff6a150d..589e8cf880 100644 --- a/configs/legoev3_defconfig +++ b/configs/legoev3_defconfig @@ -12,6 +12,7 @@ CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds - press 'l' to stop...\n" CONFIG_AUTOBOOT_STOP_STR="l" # CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index ff5e06de29..354438e1ef 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xb5 CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y # CONFIG_CMD_EEPROM is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index c797c257d0..9f85d63965 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -8,6 +8,7 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press <SPACE> to stop\n" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_DIAG=y diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 9220d04e79..83a09153b4 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -321,6 +321,4 @@ #define CONFIG_SUPPORT_RAW_INITRD -#define CONFIG_CRC32_VERIFY - #endif /* __CONFIG_H */ diff --git a/include/configs/bcm23550_w1d.h b/include/configs/bcm23550_w1d.h index 77d6e6aa39..9a36a4c5d7 100644 --- a/include/configs/bcm23550_w1d.h +++ b/include/configs/bcm23550_w1d.h @@ -104,7 +104,6 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* Initial upstream - boot to cmd prompt only */ diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h index 03f4ca0338..bb61e5b8c8 100644 --- a/include/configs/bcm28155_ap.h +++ b/include/configs/bcm28155_ap.h @@ -103,7 +103,6 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* Initial upstream - boot to cmd prompt only */ diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h index 957cd9e0ba..fa7eff5428 100644 --- a/include/configs/bcm_ep_board.h +++ b/include/configs/bcm_ep_board.h @@ -60,19 +60,14 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* Commands */ #define CONFIG_FAT_WRITE -/* SHA hashing */ -#define CONFIG_HASH_VERIFY - /* Enable Time Command */ /* Misc utility code */ #define CONFIG_BOUNCE_BUFFER -#define CONFIG_CRC32_VERIFY #endif /* __BCM_EP_BOARD_H */ diff --git a/include/configs/calimain.h b/include/configs/calimain.h index f5d108e359..29d3bdacac 100644 --- a/include/configs/calimain.h +++ b/include/configs/calimain.h @@ -196,7 +196,6 @@ #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 0882ef8f89..8f4022a134 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -288,6 +288,4 @@ #define CONFIG_SUPPORT_RAW_INITRD -#define CONFIG_CRC32_VERIFY - #endif /* __CONFIG_H */ diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index e0bbf94f0e..f46f466196 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -255,7 +255,6 @@ #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/ea20.h b/include/configs/ea20.h index 53ee1adc0b..fc0f5e6017 100644 --- a/include/configs/ea20.h +++ b/include/configs/ea20.h @@ -115,7 +115,6 @@ #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 6915dc1a48..378219d83a 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -131,9 +131,6 @@ #define CONFIG_ENV_SROM_BANK 1 #endif /*CONFIG_CMD_NET*/ -/* SHA hashing */ -#define CONFIG_HASH_VERIFY - /* Enable Time Command */ /* USB */ diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h index 741bdfa807..13fc48fa3a 100644 --- a/include/configs/imx6qdl_icore.h +++ b/include/configs/imx6qdl_icore.h @@ -125,7 +125,6 @@ /* FIT */ #ifdef CONFIG_FIT -# define CONFIG_HASH_VERIFY # define CONFIG_IMAGE_FORMAT_LEGACY #endif diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h index f52865b5a0..a588823da0 100644 --- a/include/configs/imx6qdl_icore_rqs.h +++ b/include/configs/imx6qdl_icore_rqs.h @@ -107,7 +107,6 @@ /* FIT */ #ifdef CONFIG_FIT -# define CONFIG_HASH_VERIFY # define CONFIG_IMAGE_FORMAT_LEGACY #endif diff --git a/include/configs/imx6ul_geam.h b/include/configs/imx6ul_geam.h index 2e12b97767..1d48726086 100644 --- a/include/configs/imx6ul_geam.h +++ b/include/configs/imx6ul_geam.h @@ -124,7 +124,6 @@ /* FIT */ #ifdef CONFIG_FIT -# define CONFIG_HASH_VERIFY # define CONFIG_IMAGE_FORMAT_LEGACY #endif diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h index 76ae159da3..a0eb6e25fe 100644 --- a/include/configs/imx6ul_isiot.h +++ b/include/configs/imx6ul_isiot.h @@ -124,7 +124,6 @@ /* FIT */ #ifdef CONFIG_FIT -# define CONFIG_HASH_VERIFY # define CONFIG_IMAGE_FORMAT_LEGACY #endif diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h index a3c0cfa60a..127e7e7396 100644 --- a/include/configs/ipam390.h +++ b/include/configs/ipam390.h @@ -205,7 +205,6 @@ #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index c5e7d629ab..f230f40d76 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -150,7 +150,6 @@ #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 9db4eeb54e..8904cd5cc7 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -249,7 +249,6 @@ #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index c62b45e51c..fbbd6cd99b 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -98,8 +98,6 @@ #define CONFIG_BOOTP_SERVERIP #define CONFIG_IP_DEFRAG -#define CONFIG_HASH_VERIFY - #define CONFIG_CMD_SANDBOX #define CONFIG_BOOTARGS "" diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index bdc6512959..fd18ae5f5d 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -15,8 +15,6 @@ #define CONFIG_DISPLAY_BOARDINFO_LATE #define CONFIG_CLOCKS -#define CONFIG_CRC32_VERIFY - #define CONFIG_SYS_BOOTMAPSZ (64 * 1024 * 1024) #define CONFIG_TIMESTAMP /* Print image info with timestamp */ diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 6982eaa1af..7ca5c0b9da 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -96,7 +96,6 @@ /* Misc utility code */ #define CONFIG_BOUNCE_BUFFER -#define CONFIG_CRC32_VERIFY #ifndef CONFIG_SPL_BUILD #include <config_distro_defaults.h> diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 3161c50abb..06b9bba80c 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -211,7 +211,6 @@ /* U-Boot general configuration */ #define CONFIG_MISC_INIT_R -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC #define CONFIG_TIMESTAMP diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 7b15f311fe..7d7d9bb983 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -138,7 +138,6 @@ #define CONFIG_AUTO_COMPLETE /* Support tab autocompletion */ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC #define CONFIG_SHOW_BOOT_PROGRESS diff --git a/include/hash.h b/include/hash.h index d81433772f..4f9a8cf1db 100644 --- a/include/hash.h +++ b/include/hash.h @@ -17,10 +17,6 @@ enum { HASH_FLAG_ENV = 1 << 1, /* Allow env vars */ }; -#if defined(CONFIG_SHA1SUM_VERIFY) || defined(CONFIG_CRC32_VERIFY) -#define CONFIG_HASH_VERIFY -#endif - struct hash_algo { const char *name; /* Name of algorithm */ int digest_size; /* Length of digest */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index e8f49ebe5d..ee95359d79 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -507,7 +507,6 @@ CONFIG_CP_CLK_FREQ CONFIG_CQSPI_DECODER CONFIG_CQSPI_REF_CLK CONFIG_CRC32 -CONFIG_CRC32_VERIFY CONFIG_CS8900 CONFIG_CS8900_BASE CONFIG_CS8900_BUS16 @@ -1074,7 +1073,6 @@ CONFIG_H264_FREQ CONFIG_H8300 CONFIG_HALEAKALA CONFIG_HARD_SPI -CONFIG_HASH_VERIFY CONFIG_HAS_DATAFLASH CONFIG_HAS_ETH0 CONFIG_HAS_ETH1 @@ -2416,7 +2414,6 @@ CONFIG_SH7780_PCI_BAR CONFIG_SH7780_PCI_LAR CONFIG_SH7780_PCI_LSR CONFIG_SH7785LCR -CONFIG_SHA1SUM_VERIFY CONFIG_SHARP_16x9 CONFIG_SHARP_LM8V31 CONFIG_SHARP_LQ035Q7DH06 -- 2.11.0

1 1

[U-Boot] Pull request: u-boot-mips/master
by Daniel Schwierzeck 01 Jun '17

01 Jun '17

Hi Tom, please pull another update for Broadcom MIPS. This contains new SoC's, new boards and new drivers and some bugfixes. Travis CI: https://travis-ci.org/danielschwierzeck/u-boot/builds/237925917 The following changes since commit ccbbada0a59fead35495409d0c2c7bcb22a40278: Merge branch 'master' of git://git.denx.de/u-boot-mmc (2017-05-30 14:07:23 -0400) are available in the git repository at: git://git.denx.de/u-boot-mips.git master for you to fetch changes up to c93bb1d7bb24930cd3591b0a5a980f77fabd1c29: mips: bmips: fix BCM3380 periph clock frequency (2017-05-31 15:45:29 +0200) ---------------------------------------------------------------- Álvaro Fernández Rojas (25): dm: watchdog: add BCM6345 watchdog driver mips: bmips: add bcm6345-wdt driver support for BCM6358 mips: bmips: add bcm6345-wdt driver support for BCM6328 mips: bmips: add bcm6345-wdt driver support for BCM63268 dm: sysreset: add watchdog-reboot driver mips: bmips: add wdt-reboot driver support for BCM6358 mips: bmips: add wdt-reboot driver support for BCM6328 mips: bmips: add wdt-reboot driver support for BCM63268 dm: cpu: bmips: rename cpu_desc specific functions dm: cpu: bmips: add BCM6348 support dm: ram: bmips: split bcm6358_get_ram_size dm: ram: bmips: add BCM6338/BCM6348 support MIPS: add support for Broadcom MIPS BCM6348 SoC family MIPS: add BMIPS Comtrend CT-5361 board dm: cpu: bmips: add BCM3380 support MIPS: add support for Broadcom MIPS BCM3380 SoC family MIPS: add BMIPS Netgear CG3100D board dm: cpu: bmips: add BCM6338 support MIPS: add support for Broadcom MIPS BCM6338 SoC family MIPS: add BMIPS Sagem F@ST1704 board mips: bmips: add board descriptions dm: serial: bcm6345: fix uart stop bits dm: serial: bcm6345: fix baud rate clock calculation mips: bmips: extend baud rates support mips: bmips: fix BCM3380 periph clock frequency arch/mips/dts/Makefile | 3 ++ arch/mips/dts/brcm,bcm3380.dtsi | 154 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/mips/dts/brcm,bcm63268.dtsi | 11 +++++++ arch/mips/dts/brcm,bcm6328.dtsi | 11 +++++++ arch/mips/dts/brcm,bcm6338.dtsi | 118 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/mips/dts/brcm,bcm6348.dtsi | 127 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/mips/dts/brcm,bcm6358.dtsi | 11 +++++++ arch/mips/dts/comtrend,ct-5361.dts | 49 +++++++++++++++++++++++++++++++ arch/mips/dts/netgear,cg3100d.dts | 96 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/mips/dts/sagem,f(a)st1704.dts | 50 ++++++++++++++++++++++++++++++++ arch/mips/mach-bmips/Kconfig | 96 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/mips/mach-bmips/include/ioremap.h | 4 ++- board/comtrend/ct5361/Kconfig | 12 ++++++++ board/comtrend/ct5361/MAINTAINERS | 6 ++++ board/comtrend/ct5361/Makefile | 5 ++++ board/comtrend/ct5361/ct-5361.c | 7 +++++ board/netgear/cg3100d/Kconfig | 12 ++++++++ board/netgear/cg3100d/MAINTAINERS | 6 ++++ board/netgear/cg3100d/Makefile | 5 ++++ board/netgear/cg3100d/cg3100d.c | 7 +++++ board/sagem/f@st1704/Kconfig | 12 ++++++++ board/sagem/f@st1704/MAINTAINERS | 6 ++++ board/sagem/f@st1704/Makefile | 5 ++++ board/sagem/f@st1704/f@st1704.c | 7 +++++ configs/comtrend_ct5361_ram_defconfig | 57 ++++++++++++++++++++++++++++++++++++ configs/netgear_cg3100d_ram_defconfig | 56 ++++++++++++++++++++++++++++++++++++ configs/sagem_f@st1704_ram_defconfig | 52 +++++++++++++++++++++++++++++++++ drivers/cpu/bmips_cpu.c | 72 ++++++++++++++++++++++++++++++++++++++++++---- drivers/ram/bmips_ram.c | 54 ++++++++++++++++++++++++++++------- drivers/serial/serial_bcm6345.c | 10 ++++--- drivers/sysreset/Kconfig | 6 ++++ drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_watchdog.c | 60 ++++++++++++++++++++++++++++++++++++++ drivers/watchdog/Kconfig | 8 ++++++ drivers/watchdog/Makefile | 1 + drivers/watchdog/bcm6345_wdt.c | 110 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ include/configs/bmips_bcm3380.h | 25 ++++++++++++++++ include/configs/bmips_bcm6338.h | 30 +++++++++++++++++++ include/configs/bmips_bcm6348.h | 30 +++++++++++++++++++ include/configs/bmips_common.h | 4 +++ include/configs/comtrend_ct5361.h | 20 +++++++++++++ include/configs/netgear_cg3100d.h | 15 ++++++++++ include/configs/sagem_f(a)st1704.h | 15 ++++++++++ include/dt-bindings/clock/bcm3380-clock.h | 23 +++++++++++++++ include/dt-bindings/clock/bcm6338-clock.h | 19 ++++++++++++ include/dt-bindings/clock/bcm6348-clock.h | 22 ++++++++++++++ include/dt-bindings/reset/bcm3380-reset.h | 16 +++++++++++ include/dt-bindings/reset/bcm6338-reset.h | 22 ++++++++++++++ include/dt-bindings/reset/bcm6348-reset.h | 22 ++++++++++++++ 49 files changed, 1550 insertions(+), 20 deletions(-) create mode 100644 arch/mips/dts/brcm,bcm3380.dtsi create mode 100644 arch/mips/dts/brcm,bcm6338.dtsi create mode 100644 arch/mips/dts/brcm,bcm6348.dtsi create mode 100644 arch/mips/dts/comtrend,ct-5361.dts create mode 100644 arch/mips/dts/netgear,cg3100d.dts create mode 100644 arch/mips/dts/sagem,f(a)st1704.dts create mode 100644 board/comtrend/ct5361/Kconfig create mode 100644 board/comtrend/ct5361/MAINTAINERS create mode 100644 board/comtrend/ct5361/Makefile create mode 100644 board/comtrend/ct5361/ct-5361.c create mode 100644 board/netgear/cg3100d/Kconfig create mode 100644 board/netgear/cg3100d/MAINTAINERS create mode 100644 board/netgear/cg3100d/Makefile create mode 100644 board/netgear/cg3100d/cg3100d.c create mode 100644 board/sagem/f@st1704/Kconfig create mode 100644 board/sagem/f@st1704/MAINTAINERS create mode 100644 board/sagem/f@st1704/Makefile create mode 100644 board/sagem/f@st1704/f@st1704.c create mode 100644 configs/comtrend_ct5361_ram_defconfig create mode 100644 configs/netgear_cg3100d_ram_defconfig create mode 100644 configs/sagem_f@st1704_ram_defconfig create mode 100644 drivers/sysreset/sysreset_watchdog.c create mode 100644 drivers/watchdog/bcm6345_wdt.c create mode 100644 include/configs/bmips_bcm3380.h create mode 100644 include/configs/bmips_bcm6338.h create mode 100644 include/configs/bmips_bcm6348.h create mode 100644 include/configs/comtrend_ct5361.h create mode 100644 include/configs/netgear_cg3100d.h create mode 100644 include/configs/sagem_f(a)st1704.h create mode 100644 include/dt-bindings/clock/bcm3380-clock.h create mode 100644 include/dt-bindings/clock/bcm6338-clock.h create mode 100644 include/dt-bindings/clock/bcm6348-clock.h create mode 100644 include/dt-bindings/reset/bcm3380-reset.h create mode 100644 include/dt-bindings/reset/bcm6338-reset.h create mode 100644 include/dt-bindings/reset/bcm6348-reset.h

2 1

[U-Boot] Please pull u-boot-marvell/master
by Stefan Roese 01 Jun '17

01 Jun '17

Hi Tom, please pull the following Marvell changes, mostly including the Armada 37xx pinctrl / gpio driver. Thanks, Stefan The following changes since commit ccbbada0a59fead35495409d0c2c7bcb22a40278: Merge branch 'master' of git://git.denx.de/u-boot-mmc (2017-05-30 14:07:23 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-marvell.git for you to fetch changes up to 6cbf7eda3cbe0f8cbaa84b4daaa86dfa2a696a77: arm: mvebu: kwbimage: inline function to fix use-after-free (2017-05-31 07:43:04 +0200) ---------------------------------------------------------------- Gregory CLEMENT (4): arm64: mvebu: Add pinctrl nodes for Armada 3700 arm64: mvebu: armada37xx: add pinctrl definition pinctrl: armada-37xx: Add pin controller support for Armada 37xx pinctrl: armada-37xx: Add gpio support Patrick Wildt (3): arm: mvebu: clearfog: reset uSOM onboard 1512 phy arm: mvebu: clearfog: generic distro bootcmd arm: mvebu: kwbimage: inline function to fix use-after-free Stefan Roese (4): pinctrl: mvebu: Enable support for the Armada 37xx pinctrl driver arm64: mvebu_db-88f3720_defconfig: Enable PINCTRL and GPIO support arm64: mvebu: armada-7040-db: Enable 10GB port 0 / SFI (KR) arm64: mvebu: Replace board specific with generic memory bank decoding arch/arm/dts/armada-3720-db.dts | 8 + arch/arm/dts/armada-37xx.dtsi | 73 ++++ arch/arm/dts/armada-7040-db.dts | 8 +- arch/arm/mach-mvebu/arm64-common.c | 66 +-- board/solidrun/clearfog/clearfog.c | 4 + configs/clearfog_defconfig | 10 +- configs/mvebu_db-88f3720_defconfig | 5 + configs/mvebu_db-88f7040-nand_defconfig | 8 +- configs/mvebu_db-88f7040_defconfig | 1 + configs/mvebu_db-88f8040_defconfig | 1 + configs/mvebu_mcbin-88f8040_defconfig | 1 + drivers/pinctrl/Makefile | 2 +- drivers/pinctrl/mvebu/Kconfig | 18 +- drivers/pinctrl/mvebu/Makefile | 3 +- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 631 ++++++++++++++++++++++++++++ include/configs/clearfog.h | 48 ++- tools/kwbimage.c | 93 ++-- 17 files changed, 851 insertions(+), 129 deletions(-) create mode 100644 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

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[U-Boot] Please pull u-boot-dm (take 2)
by Simon Glass 01 Jun '17

01 Jun '17

Hi Tom, This is similar to the last attempt, but without this offending patch which will be replaced by a little series sent today: (I'll pull in that series later) 0a2980b dm: mmc: Avoid probing block devices in find_mmc_device() The following changes since commit 380e86f361e4e2aef83295972863654fde157560: Merge git://git.denx.de/u-boot-fsl-qoriq (2017-05-26 11:19:27 -0400) are available in the git repository at: git://git.denx.de/u-boot-dm.git for you to fetch changes up to 40fcab41cbcace3ff5928f146dd15c1ee3bfac65: sandbox: Move to use live tree (2017-05-27 10:38:13 -0600) ---------------------------------------------------------------- Simon Glass (89): dm: Use dm.h header when driver mode is used dm: core: Move dev_get_addr() etc. into a separate file dm: Rename dev_addr..() functions atmel: Fix up use of dm_scan_fdt_node() dm: Fix up inclusion of common.h dm: core: Dont export dm_scan_fdt_node() dm: core: Replace of_offset with accessor (part 2) dm: core: Add ofnode to represent device tree nodes dm: core: Adjust device_bind_common() to take an ofnode dm: mmc: Don't call board_mmc_power_init() with driver model dm: mmc: Don't re-init when accessing environment dm: blk: Allow finding block devices without probing dm: blk: Add a function to find the next block device number dm: blk: Improve block device claiming dm: mmc: Check that drivers have operations dm: mmc: Rewrite mmc_blk_probe() tegra: Convert MMC to use driver model for operations dm: core: Set return value first in lists_bind_fdt() Update WARN_ON() to return a value dm: core: Add livetree definitions dm: core: Add livetree access functions dm: Add a function to create a 'live' device tree dm: Build a live tree after relocation dm: core: Rename of_device_is_compatible() dm: core: Add operations on device tree references dm: core: Add livetree address functions fdt: Update fdt_get_base_address() to use const dm: core: Add address operations on device tree references dm: core: Add a place to put extra device-tree reading functions dm: core: Add device-based 'read' functions to access DT dm: core: Implement live tree 'read' functions dm: core: Allow binding a device from a live tree dm: core: Update lists_bind_fdt() to use ofnode dm: core: Update device_bind_driver_to_node() to use ofnode dm: core: Scan the live tree when setting up driver model dm: core: Add a way to find a device by ofnode dm: regmap: Add support for livetree dm: simple-bus: Add support for livetree dm: core: Update uclass_find_device_by_phandle() for livetree sandbox: Add a way to reset sandbox state for tests dm: test: Move test running code into a separate function dm: test: Show the test filename when running dm: test: Add support for running tests with livetree dm: core: Run tests with both livetree and flat tree dm: gpio: Refactor to prepare for live tree support dm: gpio: Drop blank line in gpio_xlate_offs_flags() comment dm: gpio: sandbox: Use dev_read...() functions to access DT dm: gpio: Add live tree support cros_ec: Fix debug() statement in ec_command_inptr() cros_ec: Convert to support live tree sandbox: Add a new sandbox_flattree board test: Update 'make test' to run more tests fdt: Rename a few functions in fdt_support dm: Add more livetree helpers and definitions string: Add strchrnul() string: Add strcspn() dm: i2c: Convert uclass to livetree samsung: Move pmic header out of config file dm: pmic: Convert uclass to livetree sandbox: pmic: Convert pmic emulator to support livetree dm: regulator: Convert regulator uclass to support livetree dm: regulator: Update fixed regulator to support livetree. dm: mmc: Convert uclass to livetree dm: adc: Convert uclass to livetree dm: usb: Convert uclass to livetree sandbox: usb: Convert emulators to livetree clk: Modify xlate() method for livetree dm: clk: Update uclass to support livetree dm: clk: fixed: Update to support livetree dm: test: Separate out the bus DT offset test dm: test: Disable the fdt_offset test with livetree dm: phy: Update tests to use ut_asserteq() dm: mailbox: Update uclass to support livetree dm: phy: Update uclass to support livetree sandbox: phy: Update driver for livetree dm: power-domain: Update uclass to support livetree dm: reset: Update uclass to support livetree dm: pci: Update uclass to support livetree dm: Update the I2C eeprom driver for livetree cros_ec: Update the cros_ec keyboard driver to livetree dm: spi: Convert uclass to livetree dm: sandbox: i2c: Drop fdtdec.h header dm: sandbox: i2c_rtc: Drop fdtdec.h header dm: spi-flash: Convert uclass to livetree dm: sandbox: spi: Convert driver to support livetree dm: sandbox: sysreset: Convert driver to livetree dm: test: Fix nit with position of backslash dm: gpio: power: Convert pm8916 drivers to livetree sandbox: Move to use live tree arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 4 +- arch/arm/lib/bootm.c | 2 +- arch/arm/mach-mvebu/sata.c | 2 +- arch/arm/mach-rockchip/rk3188/sdram_rk3188.c | 2 +- arch/arm/mach-rockchip/rk3328/clk_rk3328.c | 2 +- arch/arm/mach-rockchip/rk3399/sdram_rk3399.c | 2 +- arch/arm/mach-snapdragon/clock-apq8016.c | 2 +- arch/arm/mach-tegra/tegra186/nvtboot_mem.c | 4 +- arch/arm/mach-uniphier/pinctrl-glue.c | 4 +- arch/sandbox/cpu/cpu.c | 1 + arch/sandbox/cpu/state.c | 15 +- arch/sandbox/dts/test.dts | 12 +- arch/sandbox/include/asm/state.h | 7 + board/amlogic/odroid-c2/odroid-c2.c | 2 +- board/armltd/integrator/integrator.c | 2 +- board/armltd/vexpress64/vexpress64.c | 2 +- board/beckhoff/mx53cx9020/mx53cx9020.c | 2 +- board/cadence/xtfpga/xtfpga.c | 2 +- board/cavium/thunderx/thunderx.c | 2 +- board/freescale/common/fsl_chain_of_trust.c | 1 + board/freescale/common/fsl_validate.c | 2 +- board/qualcomm/dragonboard410c/dragonboard410c.c | 12 +- board/samsung/common/board.c | 4 +- board/samsung/common/exynos5-dt.c | 2 +- board/samsung/common/misc.c | 13 + board/sandbox/MAINTAINERS | 7 + board/st/stm32f429-discovery/stm32f429-discovery.c | 2 +- board/st/stm32f746-disco/stm32f746-disco.c | 2 +- board/st/stv0991/stv0991.c | 2 +- board/toradex/apalis_imx6/apalis_imx6.c | 1 + board/toradex/colibri_imx6/colibri_imx6.c | 1 + board/toradex/colibri_pxa270/colibri_pxa270.c | 1 + board/toradex/common/tdx-cfg-block.c | 2 +- cmd/bootefi.c | 2 +- common/board_r.c | 12 + common/env_mmc.c | 3 +- common/env_sf.c | 1 + common/fdt_support.c | 28 +- configs/apalis-tk1_defconfig | 2 - configs/apalis_t30_defconfig | 2 - configs/beaver_defconfig | 2 - configs/cardhu_defconfig | 2 - configs/cei-tk1-som_defconfig | 2 - configs/colibri_t20_defconfig | 2 - configs/colibri_t30_defconfig | 2 - configs/dalmore_defconfig | 2 - configs/e2220-1170_defconfig | 2 - configs/harmony_defconfig | 2 - configs/jetson-tk1_defconfig | 2 - configs/medcom-wide_defconfig | 2 - configs/nyan-big_defconfig | 2 - configs/p2371-0000_defconfig | 2 - configs/p2371-2180_defconfig | 2 - configs/p2571_defconfig | 2 - configs/p2771-0000-000_defconfig | 2 - configs/p2771-0000-500_defconfig | 2 - configs/paz00_defconfig | 2 - configs/plutux_defconfig | 2 - configs/sandbox_defconfig | 1 + configs/sandbox_flattree_defconfig | 179 +++++ configs/seaboard_defconfig | 2 - configs/tec-ng_defconfig | 2 - configs/tec_defconfig | 2 - configs/trimslice_defconfig | 2 - configs/venice2_defconfig | 2 - configs/ventana_defconfig | 2 - configs/whistler_defconfig | 2 - drivers/adc/adc-uclass.c | 14 +- drivers/adc/exynos-adc.c | 2 +- drivers/block/blk-uclass.c | 65 +- drivers/block/dwc_ahci.c | 10 +- drivers/block/sata_ceva.c | 2 +- drivers/clk/aspeed/clk_ast2500.c | 2 +- drivers/clk/at91/clk-generated.c | 2 +- drivers/clk/at91/clk-h32mx.c | 2 +- drivers/clk/at91/clk-main.c | 2 +- drivers/clk/at91/clk-master.c | 2 +- drivers/clk/at91/clk-peripheral.c | 2 +- drivers/clk/at91/clk-plla.c | 2 +- drivers/clk/at91/clk-slow.c | 2 +- drivers/clk/at91/clk-system.c | 2 +- drivers/clk/at91/clk-utmi.c | 2 +- drivers/clk/at91/pmc.c | 11 +- drivers/clk/at91/pmc.h | 2 +- drivers/clk/at91/sckc.c | 3 +- drivers/clk/clk-uclass.c | 14 +- drivers/clk/clk_bcm6345.c | 2 +- drivers/clk/clk_fixed_rate.c | 7 +- drivers/clk/clk_stm32f7.c | 3 +- drivers/clk/clk_zynq.c | 2 +- drivers/clk/clk_zynqmp.c | 2 +- drivers/clk/exynos/clk-exynos7420.c | 4 +- drivers/clk/rockchip/clk_rk3036.c | 2 +- drivers/clk/rockchip/clk_rk3188.c | 2 +- drivers/clk/rockchip/clk_rk3288.c | 2 +- drivers/clk/rockchip/clk_rk3328.c | 2 +- drivers/clk/rockchip/clk_rk3399.c | 4 +- drivers/clk/uniphier/clk-uniphier-core.c | 4 +- drivers/core/Kconfig | 4 + drivers/core/Makefile | 7 +- drivers/core/device.c | 153 +---- drivers/core/fdtaddr.c | 143 ++++ drivers/core/lists.c | 29 +- drivers/core/of_access.c | 735 +++++++++++++++++++++ drivers/core/of_addr.c | 359 ++++++++++ drivers/core/of_extra.c | 37 ++ drivers/core/ofnode.c | 579 ++++++++++++++++ drivers/core/read.c | 140 ++++ drivers/core/regmap.c | 36 +- drivers/core/root.c | 77 ++- drivers/core/simple-bus.c | 3 +- drivers/core/uclass.c | 42 +- drivers/cpu/bmips_cpu.c | 2 +- drivers/cpu/cpu-uclass.c | 6 +- drivers/dma/ti-edma3.c | 4 +- drivers/firmware/firmware-uclass.c | 3 +- drivers/firmware/psci.c | 10 +- drivers/gpio/74x164_gpio.c | 2 +- drivers/gpio/altera_pio.c | 2 +- drivers/gpio/at91_gpio.c | 2 +- drivers/gpio/atmel_pio4.c | 5 +- drivers/gpio/bcm2835_gpio.c | 2 +- drivers/gpio/bcm6345_gpio.c | 6 +- drivers/gpio/gpio-uclass.c | 82 +-- drivers/gpio/gpio-uniphier.c | 4 +- drivers/gpio/imx_rgpio2p.c | 2 +- drivers/gpio/intel_ich6_gpio.c | 2 +- drivers/gpio/lpc32xx_gpio.c | 1 + drivers/gpio/msm_gpio.c | 2 +- drivers/gpio/mvebu_gpio.c | 2 +- drivers/gpio/mxc_gpio.c | 2 +- drivers/gpio/omap_gpio.c | 2 +- drivers/gpio/pca953x_gpio.c | 2 +- drivers/gpio/pm8916_gpio.c | 10 +- drivers/gpio/rk_gpio.c | 2 +- drivers/gpio/s5p_gpio.c | 4 +- drivers/gpio/sandbox.c | 12 +- drivers/gpio/stm32f7_gpio.c | 2 +- drivers/gpio/sunxi_gpio.c | 4 +- drivers/gpio/tegra186_gpio.c | 4 +- drivers/gpio/tegra_gpio.c | 4 +- drivers/gpio/vybrid_gpio.c | 2 +- drivers/gpio/zynq_gpio.c | 2 +- drivers/i2c/Kconfig | 1 - drivers/i2c/ast_i2c.c | 2 +- drivers/i2c/at91_i2c.c | 2 +- drivers/i2c/davinci_i2c.c | 2 +- drivers/i2c/designware_i2c.c | 2 +- drivers/i2c/exynos_hs_i2c.c | 2 +- drivers/i2c/i2c-cdns.c | 4 +- drivers/i2c/i2c-uclass.c | 28 +- drivers/i2c/i2c-uniphier-f.c | 4 +- drivers/i2c/i2c-uniphier.c | 4 +- drivers/i2c/imx_lpi2c.c | 80 +-- drivers/i2c/muxes/i2c-mux-uclass.c | 11 +- drivers/i2c/mv_i2c.c | 2 +- drivers/i2c/mvtwsi.c | 2 +- drivers/i2c/mxc_i2c.c | 14 +- drivers/i2c/omap24xx_i2c.c | 2 +- drivers/i2c/rk_i2c.c | 2 +- drivers/i2c/s3c24x0_i2c.c | 2 +- drivers/i2c/sandbox_i2c.c | 1 - drivers/i2c/tegra_i2c.c | 2 +- drivers/input/cros_ec_keyb.c | 24 +- drivers/input/key_matrix.c | 19 +- drivers/input/tegra-kbc.c | 5 +- drivers/led/led_bcm6328.c | 7 +- drivers/led/led_bcm6358.c | 7 +- drivers/led/led_gpio.c | 13 +- drivers/mailbox/mailbox-uclass.c | 20 +- drivers/mailbox/tegra-hsp.c | 4 +- drivers/misc/altera_sysid.c | 2 +- drivers/misc/cros_ec.c | 36 +- drivers/misc/cros_ec_sandbox.c | 23 +- drivers/misc/i2c_eeprom_emul.c | 7 +- drivers/misc/tegra186_bpmp.c | 6 +- drivers/misc/tegra_car.c | 4 +- drivers/mmc/atmel_sdhci.c | 2 +- drivers/mmc/bcm2835_sdhci.c | 2 +- drivers/mmc/fsl_esdhc.c | 8 +- drivers/mmc/gen_atmel_mci.c | 4 +- drivers/mmc/meson_gx_mmc.c | 4 +- drivers/mmc/mmc-uclass.c | 24 +- drivers/mmc/mmc.c | 15 +- drivers/mmc/msm_sdhci.c | 2 +- drivers/mmc/omap_hsmmc.c | 3 +- drivers/mmc/pic32_sdhci.c | 2 +- drivers/mmc/rockchip_dw_mmc.c | 2 +- drivers/mmc/rockchip_sdhci.c | 2 +- drivers/mmc/s5p_sdhci.c | 8 +- drivers/mmc/sdhci-cadence.c | 6 +- drivers/mmc/socfpga_dw_mmc.c | 2 +- drivers/mmc/sti_sdhci.c | 2 +- drivers/mmc/tangier_sdhci.c | 2 +- drivers/mmc/tegra_mmc.c | 76 ++- drivers/mmc/uniphier-sd.c | 4 +- drivers/mmc/xenon_sdhci.c | 6 +- drivers/mmc/zynq_sdhci.c | 4 +- drivers/mtd/altera_qspi.c | 2 +- drivers/mtd/cfi_flash.c | 2 +- drivers/mtd/nand/sunxi_nand.c | 2 +- drivers/mtd/nand/tegra_nand.c | 4 +- drivers/mtd/pic32_flash.c | 2 +- drivers/mtd/spi/sandbox.c | 6 +- drivers/mtd/spi/spi_flash.c | 7 +- drivers/net/ag7xxx.c | 2 +- drivers/net/altera_tse.c | 2 +- drivers/net/cpsw-common.c | 4 +- drivers/net/cpsw.c | 2 +- drivers/net/designware.c | 2 +- drivers/net/dwc_eth_qos.c | 4 +- drivers/net/ethoc.c | 6 +- drivers/net/fec_mxc.c | 2 +- drivers/net/keystone_net.c | 8 +- drivers/net/macb.c | 2 +- drivers/net/mvneta.c | 4 +- drivers/net/mvpp2.c | 8 +- drivers/net/phy/phy.c | 2 +- drivers/net/phy/ti.c | 2 +- drivers/net/pic32_eth.c | 3 +- drivers/net/sandbox-raw.c | 2 +- drivers/net/sandbox.c | 2 +- drivers/net/sun8i_emac.c | 8 +- drivers/net/sunxi_emac.c | 2 +- drivers/net/tsec.c | 2 +- drivers/net/xilinx_axi_emac.c | 2 +- drivers/net/xilinx_emaclite.c | 2 +- drivers/net/zynq_gem.c | 2 +- drivers/pci/pci-uclass.c | 26 +- drivers/pci/pcie_dw_mvebu.c | 4 +- drivers/phy/marvell/comphy_core.c | 8 +- drivers/phy/phy-uclass.c | 21 +- drivers/phy/sandbox-phy.c | 3 +- drivers/phy/ti-pipe3-phy.c | 4 +- drivers/pinctrl/ath79/pinctrl_ar933x.c | 2 +- drivers/pinctrl/ath79/pinctrl_qca953x.c | 2 +- drivers/pinctrl/exynos/pinctrl-exynos.c | 2 +- drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 3 +- drivers/pinctrl/meson/pinctrl-meson.c | 2 +- drivers/pinctrl/mvebu/pinctrl-mvebu.c | 2 +- drivers/pinctrl/nxp/pinctrl-imx.c | 2 +- drivers/pinctrl/nxp/pinctrl-imx5.c | 3 +- drivers/pinctrl/nxp/pinctrl-imx6.c | 3 +- drivers/pinctrl/nxp/pinctrl-imx7.c | 3 +- drivers/pinctrl/nxp/pinctrl-imx7ulp.c | 3 +- drivers/pinctrl/pinctrl-at91-pio4.c | 4 +- drivers/pinctrl/pinctrl-at91.c | 6 +- drivers/pinctrl/pinctrl-generic.c | 2 +- drivers/pinctrl/pinctrl-sandbox.c | 2 +- drivers/pinctrl/pinctrl-single.c | 13 +- drivers/pinctrl/pinctrl-uclass.c | 18 +- drivers/pinctrl/pinctrl_stm32.c | 2 +- drivers/pinctrl/rockchip/pinctrl_rk3188.c | 4 +- drivers/pinctrl/rockchip/pinctrl_rk3328.c | 2 +- drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 4 +- drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c | 3 +- drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 3 +- drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c | 3 +- drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c | 3 +- drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c | 3 +- drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | 3 +- drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c | 3 +- drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c | 3 +- drivers/pinctrl/uniphier/pinctrl-uniphier-sld3.c | 3 +- drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c | 3 +- drivers/power/domain/bcm6328-power-domain.c | 2 +- drivers/power/domain/power-domain-uclass.c | 19 +- drivers/power/pmic/act8846.c | 8 +- drivers/power/pmic/i2c_pmic_emul.c | 6 +- drivers/power/pmic/lp873x.c | 12 +- drivers/power/pmic/max77686.c | 8 +- drivers/power/pmic/palmas.c | 16 +- drivers/power/pmic/pfuze100.c | 8 +- drivers/power/pmic/pm8916.c | 2 +- drivers/power/pmic/pmic-uclass.c | 22 +- drivers/power/pmic/rk8xx.c | 8 +- drivers/power/pmic/s5m8767.c | 7 +- drivers/power/pmic/sandbox.c | 2 +- drivers/power/pmic/tps65090.c | 8 +- drivers/power/regulator/fixed.c | 17 +- drivers/power/regulator/regulator-uclass.c | 39 +- drivers/pwm/exynos_pwm.c | 2 +- drivers/pwm/rk_pwm.c | 2 +- drivers/pwm/tegra_pwm.c | 2 +- drivers/ram/bmips_ram.c | 4 +- drivers/ram/stm32_sdram.c | 2 +- drivers/reset/reset-bcm6345.c | 2 +- drivers/reset/reset-uclass.c | 21 +- drivers/reset/reset-uniphier.c | 4 +- drivers/rtc/i2c_rtc_emul.c | 1 - drivers/serial/altera_jtag_uart.c | 2 +- drivers/serial/altera_uart.c | 2 +- drivers/serial/atmel_usart.c | 2 +- drivers/serial/ns16550.c | 2 +- drivers/serial/serial-uclass.c | 3 +- drivers/serial/serial_ar933x.c | 2 +- drivers/serial/serial_arc.c | 2 +- drivers/serial/serial_bcm283x_mu.c | 2 +- drivers/serial/serial_bcm6345.c | 4 +- drivers/serial/serial_lpuart.c | 4 +- drivers/serial/serial_meson.c | 2 +- drivers/serial/serial_msm.c | 2 +- drivers/serial/serial_mvebu_a3700.c | 2 +- drivers/serial/serial_mxc.c | 2 +- drivers/serial/serial_pl01x.c | 2 +- drivers/serial/serial_s5p.c | 2 +- drivers/serial/serial_sti_asc.c | 2 +- drivers/serial/serial_stm32x7.c | 2 +- drivers/serial/serial_uniphier.c | 5 +- drivers/serial/serial_xuartlite.c | 2 +- drivers/serial/serial_zynq.c | 2 +- drivers/sound/max98095.c | 2 + drivers/sound/wm8994.c | 2 +- drivers/spi/altera_spi.c | 2 +- drivers/spi/ath79_spi.c | 2 +- drivers/spi/atmel_spi.c | 2 +- drivers/spi/davinci_spi.c | 2 +- drivers/spi/designware_spi.c | 2 +- drivers/spi/exynos_spi.c | 2 +- drivers/spi/fsl_dspi.c | 4 +- drivers/spi/kirkwood_spi.c | 2 +- drivers/spi/mvebu_a3700_spi.c | 2 +- drivers/spi/omap3_spi.c | 2 +- drivers/spi/pic32_spi.c | 2 +- drivers/spi/rk_spi.c | 2 +- drivers/spi/spi-uclass.c | 31 +- drivers/spi/tegra114_spi.c | 2 +- drivers/spi/tegra20_sflash.c | 2 +- drivers/spi/tegra20_slink.c | 2 +- drivers/spi/tegra210_qspi.c | 2 +- drivers/spi/ti_qspi.c | 12 +- drivers/spi/zynq_spi.c | 2 +- drivers/spmi/spmi-msm.c | 2 +- drivers/sysreset/sysreset_psci.c | 3 +- drivers/sysreset/sysreset_sandbox.c | 2 +- drivers/sysreset/sysreset_snapdragon.c | 2 +- drivers/timer/altera_timer.c | 2 +- drivers/timer/arc_timer.c | 2 +- drivers/timer/ast_timer.c | 2 +- drivers/timer/omap-timer.c | 2 +- drivers/timer/timer-uclass.c | 3 +- drivers/tpm/tpm_tis_lpc.c | 2 +- drivers/usb/emul/sandbox_flash.c | 4 +- drivers/usb/emul/sandbox_hub.c | 3 +- drivers/usb/host/dwc2.c | 2 +- drivers/usb/host/ehci-atmel.c | 2 +- drivers/usb/host/ehci-exynos.c | 2 +- drivers/usb/host/ehci-fsl.c | 2 +- drivers/usb/host/ehci-generic.c | 2 +- drivers/usb/host/ehci-marvell.c | 4 +- drivers/usb/host/ehci-msm.c | 2 +- drivers/usb/host/ehci-mx6.c | 4 +- drivers/usb/host/ehci-sunxi.c | 2 +- drivers/usb/host/ehci-tegra.c | 9 +- drivers/usb/host/ehci-vf.c | 7 +- drivers/usb/host/ehci-zynq.c | 2 +- drivers/usb/host/ohci-generic.c | 2 +- drivers/usb/host/ohci-sunxi.c | 2 +- drivers/usb/host/usb-uclass.c | 8 +- drivers/usb/host/xhci-exynos5.c | 2 +- drivers/usb/host/xhci-fsl.c | 2 +- drivers/usb/host/xhci-mvebu.c | 2 +- drivers/usb/host/xhci-rockchip.c | 6 +- drivers/usb/musb-new/sunxi.c | 1 + drivers/usb/musb-new/ti-musb.c | 4 +- drivers/video/atmel_hlcdfb.c | 6 +- drivers/video/exynos/exynos_dp.c | 4 +- drivers/video/exynos/exynos_fb.c | 2 +- drivers/video/rockchip/rk_edp.c | 2 +- drivers/video/rockchip/rk_hdmi.c | 2 +- drivers/video/rockchip/rk_lvds.c | 2 +- drivers/video/rockchip/rk_mipi.c | 2 +- drivers/video/rockchip/rk_vop.c | 2 +- drivers/video/tegra.c | 2 +- drivers/video/tegra124/dp.c | 2 +- drivers/watchdog/ast_wdt.c | 2 +- dts/Kconfig | 11 + include/asm-generic/global_data.h | 3 + include/asm-generic/gpio.h | 17 +- include/blk.h | 15 +- include/clk-uclass.h | 5 +- include/configs/s5pc210_universal.h | 1 - include/configs/trats.h | 1 - include/configs/trats2.h | 1 - include/cros_ec.h | 8 +- include/dm.h | 4 + include/dm/device-internal.h | 10 +- include/dm/device.h | 110 +-- include/dm/fdtaddr.h | 110 +++ include/dm/lists.h | 9 +- include/dm/of.h | 142 ++++ include/dm/of_access.h | 347 ++++++++++ include/dm/of_addr.h | 64 ++ include/dm/of_extra.h | 46 ++ include/dm/ofnode.h | 578 ++++++++++++++++ include/dm/read.h | 439 ++++++++++++ include/dm/root.h | 19 +- include/dm/test.h | 2 + include/dm/uclass-internal.h | 18 + include/dm/uclass.h | 17 + include/fdt_support.h | 6 +- include/fdtdec.h | 34 - include/generic-phy.h | 3 +- include/i2c.h | 3 +- include/key_matrix.h | 3 +- include/linux/compat.h | 8 +- include/linux/string.h | 28 + include/mailbox-uclass.h | 2 +- include/of_live.h | 24 + include/power-domain-uclass.h | 2 +- include/power/pmic.h | 2 +- include/reset-uclass.h | 4 +- include/spi.h | 2 +- include/test/test.h | 4 + include/test/ut.h | 2 +- lib/Makefile | 1 + lib/fdtdec.c | 33 +- lib/of_live.c | 333 ++++++++++ lib/string.c | 32 + test/dm/blk.c | 60 +- test/dm/bus.c | 16 +- test/dm/phy.c | 15 +- test/dm/test-fdt.c | 3 +- test/dm/test-main.c | 105 ++- test/run | 8 +- 425 files changed, 5744 insertions(+), 1372 deletions(-) create mode 100644 configs/sandbox_flattree_defconfig create mode 100644 drivers/core/fdtaddr.c create mode 100644 drivers/core/of_access.c create mode 100644 drivers/core/of_addr.c create mode 100644 drivers/core/of_extra.c create mode 100644 drivers/core/ofnode.c create mode 100644 drivers/core/read.c create mode 100644 include/dm/fdtaddr.h create mode 100644 include/dm/of.h create mode 100644 include/dm/of_access.h create mode 100644 include/dm/of_addr.h create mode 100644 include/dm/of_extra.h create mode 100644 include/dm/ofnode.h create mode 100644 include/dm/read.h create mode 100644 include/of_live.h create mode 100644 lib/of_live.c Regards, Simon

2 3

[U-Boot] [PATCH v3] sun50i: a64: Add initial Banana Pi M64 support
by Jagan Teki 01 Jun '17

01 Jun '17

From: Jagan Teki <jagan(a)amarulasolutions.com> BPI-M64 is a 64-bit quad-core mini single board computer using the Allwinner A64 SOC. BPI-M64 features - 1.2 Ghz Quad-Core ARM Cortex A53 - 2GB DDR3 SDRAM with 733MHz - MicroSD/eMMC(8GB) - 10/100/1000Mbps ethernet (Realtek RTL8211E/D) - Wifi + BT - IR receiver - Audio In/Out - Video In/Out - 5V 2A DC power-supply For dts file, Sync with Linux commit 4879b7ae("Merge tag 'dmaengine-4.12-rc1'"). Boot from MMC: ------------- U-Boot SPL 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31) DRAM: 2048 MiB Trying to boot from MMC1 NOTICE: BL3-1: Running on A64/H64 (1689) in SRAM A2 (@0x44000) NOTICE: Configuring SPC Controller NOTICE: BL3-1: v1.0(debug):aa75c8d NOTICE: BL3-1: Built : 18:28:27, May 24 2017 NOTICE: Configuring AXP PMIC NOTICE: PMIC: setup successful INFO: BL3-1: Initializing runtime services INFO: BL3-1: Preparing for EL3 exit to normal world INFO: BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9 U-Boot 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31 +0000) Allwinner Technology CPU: Allwinner A64 (SUN50I) Model: BananaPi-M64 DRAM: 2 GiB MMC: SUNXI SD/MMC: 0, SUNXI SD/MMC: 1 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: No ethernet found. starting USB... No controllers found Hit any key to stop autoboot: 0 Signed-off-by: Jagan Teki <jagan(a)amarulasolutions.com> --- Changes for v3: - Droped CONSOLE_MUX, bcz it is enabled by default - Sync with Linux dts file Changes for v2: - Update email-id - Tested on BPI-M64 - Added MMC Slot 2 CONFIG_ arch/arm/dts/Makefile | 1 + arch/arm/dts/sun50i-a64-bananapi-m64.dts | 121 +++++++++++++++++++++++++++++++ board/sunxi/MAINTAINERS | 5 ++ configs/bananapi_m64_defconfig | 17 +++++ 4 files changed, 144 insertions(+) create mode 100644 arch/arm/dts/sun50i-a64-bananapi-m64.dts create mode 100644 configs/bananapi_m64_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index d121a62..de54481 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -318,6 +318,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \ sun50i-h5-orangepi-prime.dtb \ sun50i-h5-orangepi-zero-plus2.dtb dtb-$(CONFIG_MACH_SUN50I) += \ + sun50i-a64-bananapi-m64.dtb \ sun50i-a64-orangepi-win.dtb \ sun50i-a64-pine64-plus.dtb \ sun50i-a64-pine64.dtb diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts new file mode 100644 index 0000000..02db114 --- /dev/null +++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts @@ -0,0 +1,121 @@ +/* + * Copyright (c) 2016 ARM Ltd. + * Copyright (C) 2017 Jagan Teki <jteki(a)openedev.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "sun50i-a64.dtsi" + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "BananaPi-M64"; + compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; +}; + +&i2c1_pins { + bias-pull-up; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + vmmc-supply = <&reg_vcc3v3>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; + cd-inverted; + disable-wp; + bus-width = <4>; + status = "okay"; +}; + +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + vmmc-supply = <&reg_vcc3v3>; + bus-width = <4>; + non-removable; + status = "okay"; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; + vmmc-supply = <&reg_vcc3v3>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 43757be..602181b 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -114,6 +114,11 @@ S: Maintained F: configs/Bananapi_M2_Ultra_defconfig F: arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts +BANANAPI M64 +M: Jagan Teki <jagan(a)amarulasolutions.com> +S: Maintained +F: configs/bananapi_m64_defconfig + COLOMBUS BOARD M: Maxime Ripard <maxime.ripard(a)free-electrons.com> S: Maintained diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig new file mode 100644 index 0000000..3908d42 --- /dev/null +++ b/configs/bananapi_m64_defconfig @@ -0,0 +1,17 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN50I=y +CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_MMC0_CD_PIN="PH13" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_ISO_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y -- 1.9.1

3 2

[U-Boot] [PATCH v3] sunxi: A64/Pine64: update device tree from Linux
by Andre Przywara 01 Jun '17

01 Jun '17

The Linux device tree for the Allwinner A64 SoC has changed a lot since the U-Boot version was merged. Let's replace the current DT with a exact copy of the Linux one as of: commit c6778ff813d2ca3e3c8733c87dc8b6831a64578b Merge: 0ff4c01 3c0e3abd Author: Linus Torvalds <torvalds(a)linux-foundation.org> Date: Tue May 9 10:07:33 2017 -0700 This is the DT used in Linux 4.12-rc1. Since U-Boot has an Ethernet driver (while Linux does not yet), we provide the required DT nodes for it in an ...-u-boot.dtsi file, to both mark them as U-Boot specific and to allow easier upgrading once Linux gets the driver and its own binding later. Compared to the existing Ethernet DT nodes we just slightly tweak the clock and reset nodes in there to match the new bindings used by Linux for those. Signed-off-by: Andre Przywara <andre.przywara(a)arm.com> --- arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 50 ++ arch/arm/dts/sun50i-a64-pine64-plus.dts | 26 +- arch/arm/dts/sun50i-a64-pine64.dts | 59 +- arch/arm/dts/sun50i-a64.dtsi | 639 ++++++--------------- include/dt-bindings/clock/sun50i-a64-ccu.h | 134 +++++ .../dt-bindings/reset/sun50i-a64-ccu.h | 109 ++-- 6 files changed, 489 insertions(+), 528 deletions(-) create mode 100644 arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi create mode 100644 include/dt-bindings/clock/sun50i-a64-ccu.h rename arch/arm/dts/sun50i-a64-pine64-common.dtsi => include/dt-bindings/reset/sun50i-a64-ccu.h (52%) diff --git a/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi b/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi new file mode 100644 index 0000000..9c61bea --- /dev/null +++ b/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi @@ -0,0 +1,50 @@ +/ { + aliases { + ethernet0 = &emac; + }; + + soc { + emac: ethernet@01c30000 { + compatible = "allwinner,sun50i-a64-emac"; + reg = <0x01c30000 0x2000>, <0x01c00030 0x4>; + reg-names = "emac", "syscon"; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + resets = <&ccu RST_BUS_EMAC>; + reset-names = "ahb"; + clocks = <&ccu CLK_BUS_EMAC>; + clock-names = "ahb"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii"; + phy = <&phy1>; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; + }; + }; +}; + +&pio { + rmii_pins: rmii_pins { + allwinner,pins = "PD10", "PD11", "PD13", "PD14", + "PD17", "PD18", "PD19", "PD20", + "PD22", "PD23"; + allwinner,function = "emac"; + allwinner,drive = <3>; + allwinner,pull = <0>; + }; + + rgmii_pins: rgmii_pins { + allwinner,pins = "PD8", "PD9", "PD10", "PD11", + "PD12", "PD13", "PD15", + "PD16", "PD17", "PD18", "PD19", + "PD20", "PD21", "PD22", "PD23"; + allwinner,function = "emac"; + allwinner,drive = <3>; + allwinner,pull = <0>; + }; +}; diff --git a/arch/arm/dts/sun50i-a64-pine64-plus.dts b/arch/arm/dts/sun50i-a64-pine64-plus.dts index 389c609..790d14d 100644 --- a/arch/arm/dts/sun50i-a64-pine64-plus.dts +++ b/arch/arm/dts/sun50i-a64-pine64-plus.dts @@ -40,33 +40,11 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -/dts-v1/; - -#include "sun50i-a64-pine64-common.dtsi" +#include "sun50i-a64-pine64.dts" / { model = "Pine64+"; compatible = "pine64,pine64-plus", "allwinner,sun50i-a64"; - chosen { - stdout-path = "serial0:115200n8"; - }; - - /* There is a model with 2GB of DRAM, but U-Boot fixes this for us. */ - memory { - reg = <0x40000000 0x40000000>; - }; -}; - -&emac { - pinctrl-names = "default"; - pinctrl-0 = <&rgmii_pins>; - phy-mode = "rgmii"; - phy = <&phy1>; - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; + /* TODO: Camera, Ethernet PHY, touchscreen, etc. */ }; - diff --git a/arch/arm/dts/sun50i-a64-pine64.dts b/arch/arm/dts/sun50i-a64-pine64.dts index ebe029e..c680ed3 100644 --- a/arch/arm/dts/sun50i-a64-pine64.dts +++ b/arch/arm/dts/sun50i-a64-pine64.dts @@ -42,17 +42,70 @@ /dts-v1/; -#include "sun50i-a64-pine64-common.dtsi" +#include "sun50i-a64.dtsi" + +#include <dt-bindings/gpio/gpio.h> / { model = "Pine64"; compatible = "pine64,pine64", "allwinner,sun50i-a64"; + aliases { + serial0 = &uart0; + }; + chosen { stdout-path = "serial0:115200n8"; }; - memory { - reg = <0x40000000 0x20000000>; + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; }; }; + +&ehci1 { + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; +}; + +&i2c1_pins { + bias-pull-up; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + vmmc-supply = <&reg_vcc3v3>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; + cd-inverted; + disable-wp; + bus-width = <4>; + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi index bef0d00..c7f669f 100644 --- a/arch/arm/dts/sun50i-a64.dtsi +++ b/arch/arm/dts/sun50i-a64.dtsi @@ -42,8 +42,9 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +#include <dt-bindings/clock/sun50i-a64-ccu.h> #include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/pinctrl/sun4i-a10.h> +#include <dt-bindings/reset/sun50i-a64-ccu.h> / { interrupt-parent = <&gic>; @@ -54,28 +55,28 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0>; enable-method = "psci"; }; - cpu@1 { + cpu1: cpu@1 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <1>; enable-method = "psci"; }; - cpu@2 { + cpu2: cpu@2 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <2>; enable-method = "psci"; }; - cpu@3 { + cpu3: cpu@3 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <3>; @@ -83,28 +84,31 @@ }; }; - psci { - compatible = "arm,psci-0.2"; - method = "smc"; + osc24M: osc24M_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "osc24M"; + }; + + osc32k: osc32k_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + clock-output-names = "osc32k"; }; - memory { - device_type = "memory"; - reg = <0x40000000 0>; + iosc: internal-osc-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <16000000>; + clock-accuracy = <300000000>; + clock-output-names = "iosc"; }; - gic: interrupt-controller@1c81000 { - compatible = "arm,gic-400"; - interrupt-controller; - #interrupt-cells = <3>; - #address-cells = <0>; - - reg = <0x01c81000 0x1000>, - <0x01c82000 0x2000>, - <0x01c84000 0x2000>, - <0x01c86000 0x2000>; - interrupts = <GIC_PPI 9 - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + psci { + compatible = "arm,psci-0.2"; + method = "smc"; }; timer { @@ -119,199 +123,6 @@ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; - clocks { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - osc24M: osc24M_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "osc24M"; - }; - - osc32k: osc32k_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "osc32k"; - }; - - pll1: pll1_clk@1c20000 { - #clock-cells = <0>; - compatible = "allwinner,sun8i-a23-pll1-clk"; - reg = <0x01c20000 0x4>; - clocks = <&osc24M>; - clock-output-names = "pll1"; - }; - - pll6: pll6_clk@1c20028 { - #clock-cells = <1>; - compatible = "allwinner,sun6i-a31-pll6-clk"; - reg = <0x01c20028 0x4>; - clocks = <&osc24M>; - clock-output-names = "pll6", "pll6x2"; - }; - - pll6d2: pll6d2_clk { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <2>; - clock-mult = <1>; - clocks = <&pll6 0>; - clock-output-names = "pll6d2"; - }; - - pll7: pll7_clk@1c2002c { - #clock-cells = <1>; - compatible = "allwinner,sun6i-a31-pll6-clk"; - reg = <0x01c2002c 0x4>; - clocks = <&osc24M>; - clock-output-names = "pll7", "pll7x2"; - }; - - cpu: cpu_clk@1c20050 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-cpu-clk"; - reg = <0x01c20050 0x4>; - clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>; - clock-output-names = "cpu"; - critical-clocks = <0>; - }; - - axi: axi_clk@1c20050 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-axi-clk"; - reg = <0x01c20050 0x4>; - clocks = <&cpu>; - clock-output-names = "axi"; - }; - - ahb1: ahb1_clk@1c20054 { - #clock-cells = <0>; - compatible = "allwinner,sun6i-a31-ahb1-clk"; - reg = <0x01c20054 0x4>; - clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>; - clock-output-names = "ahb1"; - }; - - ahb2: ahb2_clk@1c2005c { - #clock-cells = <0>; - compatible = "allwinner,sun8i-h3-ahb2-clk"; - reg = <0x01c2005c 0x4>; - clocks = <&ahb1>, <&pll6d2>; - clock-output-names = "ahb2"; - }; - - apb1: apb1_clk@1c20054 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-apb0-clk"; - reg = <0x01c20054 0x4>; - clocks = <&ahb1>; - clock-output-names = "apb1"; - }; - - apb2: apb2_clk@1c20058 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-apb1-clk"; - reg = <0x01c20058 0x4>; - clocks = <&osc32k>, <&osc24M>, <&pll6 1>, <&pll6 1>; - clock-output-names = "apb2"; - }; - - bus_gates: bus_gates_clk@1c20060 { - #clock-cells = <1>; - compatible = "allwinner,sun50i-a64-bus-gates-clk", - "allwinner,sunxi-multi-bus-gates-clk"; - reg = <0x01c20060 0x14>; - ahb1_parent { - clocks = <&ahb1>; - clock-indices = <1>, <5>, - <6>, <8>, - <9>, <10>, - <13>, <14>, - <18>, <19>, - <20>, <21>, - <23>, <24>, - <25>, <28>, - <32>, <35>, - <36>, <37>, - <40>, <43>, - <44>, <52>, - <53>, <54>, - <135>; - clock-output-names = "bus_mipidsi", "bus_ce", - "bus_dma", "bus_mmc0", - "bus_mmc1", "bus_mmc2", - "bus_nand", "bus_sdram", - "bus_ts", "bus_hstimer", - "bus_spi0", "bus_spi1", - "bus_otg", "bus_otg_ehci0", - "bus_ehci0", "bus_otg_ohci0", - "bus_ve", "bus_lcd0", - "bus_lcd1", "bus_deint", - "bus_csi", "bus_hdmi", - "bus_de", "bus_gpu", - "bus_msgbox", "bus_spinlock", - "bus_dbg"; - }; - ahb2_parent { - clocks = <&ahb2>; - clock-indices = <17>, <29>; - clock-output-names = "bus_gmac", "bus_ohci0"; - }; - apb1_parent { - clocks = <&apb1>; - clock-indices = <64>, <65>, - <69>, <72>, - <76>, <77>, - <78>; - clock-output-names = "bus_codec", "bus_spdif", - "bus_pio", "bus_ths", - "bus_i2s0", "bus_i2s1", - "bus_i2s2"; - }; - abp2_parent { - clocks = <&apb2>; - clock-indices = <96>, <97>, - <98>, <101>, - <112>, <113>, - <114>, <115>, - <116>; - clock-output-names = "bus_i2c0", "bus_i2c1", - "bus_i2c2", "bus_scr", - "bus_uart0", "bus_uart1", - "bus_uart2", "bus_uart3", - "bus_uart4"; - }; - }; - - mmc0_clk: mmc0_clk@1c20088 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-mod0-clk"; - reg = <0x01c20088 0x4>; - clocks = <&osc24M>, <&pll6 1>, <&pll7 1>; - clock-output-names = "mmc0"; - }; - - mmc1_clk: mmc1_clk@1c2008c { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-mod0-clk"; - reg = <0x01c2008c 0x4>; - clocks = <&osc24M>, <&pll6 1>, <&pll7 1>; - clock-output-names = "mmc1"; - }; - - mmc2_clk: mmc2_clk@1c20090 { - #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-mod0-clk"; - reg = <0x01c20090 0x4>; - clocks = <&osc24M>, <&pll6 1>, <&pll7 1>; - clock-output-names = "mmc2"; - }; - }; - soc { compatible = "simple-bus"; #address-cells = <1>; @@ -319,240 +130,181 @@ ranges; mmc0: mmc@1c0f000 { - compatible = "allwinner,sun50i-a64-mmc", - "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun50i-a64-mmc"; reg = <0x01c0f000 0x1000>; - clocks = <&bus_gates 8>, <&mmc0_clk>, - <&mmc0_clk>, <&mmc0_clk>; - clock-names = "ahb", "mmc", - "output", "sample"; - resets = <&ahb_rst 8>; + clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC0>; reset-names = "ahb"; interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <150000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; mmc1: mmc@1c10000 { - compatible = "allwinner,sun50i-a64-mmc", - "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun50i-a64-mmc"; reg = <0x01c10000 0x1000>; - clocks = <&bus_gates 9>, <&mmc1_clk>, - <&mmc1_clk>, <&mmc1_clk>; - clock-names = "ahb", "mmc", - "output", "sample"; - resets = <&ahb_rst 9>; + clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC1>; reset-names = "ahb"; interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <150000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; mmc2: mmc@1c11000 { - compatible = "allwinner,sun50i-a64-mmc", - "allwinner,sun5i-a13-mmc"; + compatible = "allwinner,sun50i-a64-emmc"; reg = <0x01c11000 0x1000>; - clocks = <&bus_gates 10>, <&mmc2_clk>, - <&mmc2_clk>, <&mmc2_clk>; - clock-names = "ahb", "mmc", - "output", "sample"; - resets = <&ahb_rst 10>; + clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC2>; reset-names = "ahb"; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + max-frequency = <200000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; + usb_otg: usb@01c19000 { + compatible = "allwinner,sun8i-a33-musb"; + reg = <0x01c19000 0x0400>; + clocks = <&ccu CLK_BUS_OTG>; + resets = <&ccu RST_BUS_OTG>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + status = "disabled"; + }; + + usbphy: phy@01c19400 { + compatible = "allwinner,sun50i-a64-usb-phy"; + reg = <0x01c19400 0x14>, + <0x01c1a800 0x4>, + <0x01c1b800 0x4>; + reg-names = "phy_ctrl", + "pmu0", + "pmu1"; + clocks = <&ccu CLK_USB_PHY0>, + <&ccu CLK_USB_PHY1>; + clock-names = "usb0_phy", + "usb1_phy"; + resets = <&ccu RST_USB_PHY0>, + <&ccu RST_USB_PHY1>; + reset-names = "usb0_reset", + "usb1_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + + ehci1: usb@01c1b000 { + compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; + reg = <0x01c1b000 0x100>; + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_BUS_EHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>, + <&ccu RST_BUS_EHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci1: usb@01c1b400 { + compatible = "allwinner,sun50i-a64-ohci", "generic-ohci"; + reg = <0x01c1b400 0x100>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ccu: clock@01c20000 { + compatible = "allwinner,sun50i-a64-ccu"; + reg = <0x01c20000 0x400>; + clocks = <&osc24M>, <&osc32k>; + clock-names = "hosc", "losc"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + pio: pinctrl@1c20800 { compatible = "allwinner,sun50i-a64-pinctrl"; reg = <0x01c20800 0x400>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bus_gates 69>; + clocks = <&ccu 58>; gpio-controller; #gpio-cells = <3>; interrupt-controller; - #interrupt-cells = <2>; - - uart0_pins_a: uart0@0 { - allwinner,pins = "PB8", "PB9"; - allwinner,function = "uart0"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - uart0_pins_b: uart0@1 { - allwinner,pins = "PF2", "PF3"; - allwinner,function = "uart0"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - uart1_2pins: uart1_2@0 { - allwinner,pins = "PG6", "PG7"; - allwinner,function = "uart1"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - uart1_4pins: uart1_4@0 { - allwinner,pins = "PG6", "PG7", "PG8", "PG9"; - allwinner,function = "uart1"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - uart2_2pins: uart2_2@0 { - allwinner,pins = "PB0", "PB1"; - allwinner,function = "uart2"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - uart2_4pins: uart2_4@0 { - allwinner,pins = "PB0", "PB1", "PB2", "PB3"; - allwinner,function = "uart2"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - uart3_pins_a: uart3@0 { - allwinner,pins = "PD0", "PD1"; - allwinner,function = "uart3"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - uart3_2pins_b: uart3_2@1 { - allwinner,pins = "PH4", "PH5"; - allwinner,function = "uart3"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; + #interrupt-cells = <3>; - uart3_4pins_b: uart3_4@1 { - allwinner,pins = "PH4", "PH5", "PH6", "PH7"; - allwinner,function = "uart3"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - uart4_2pins: uart4_2@0 { - allwinner,pins = "PD2", "PD3"; - allwinner,function = "uart4"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - uart4_4pins: uart4_4@0 { - allwinner,pins = "PD2", "PD3", "PD4", "PD5"; - allwinner,function = "uart4"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - mmc0_pins: mmc0@0 { - allwinner,pins = "PF0", "PF1", "PF2", "PF3", - "PF4", "PF5"; - allwinner,function = "mmc0"; - allwinner,drive = <SUN4I_PINCTRL_30_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; - }; - - mmc0_default_cd_pin: mmc0_cd_pin@0 { - allwinner,pins = "PF6"; - allwinner,function = "gpio_in"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; - }; - - mmc1_pins: mmc1@0 { - allwinner,pins = "PG0", "PG1", "PG2", "PG3", - "PG4", "PG5"; - allwinner,function = "mmc1"; - allwinner,drive = <SUN4I_PINCTRL_30_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + i2c1_pins: i2c1_pins { + pins = "PH2", "PH3"; + function = "i2c1"; }; - mmc2_pins: mmc2@0 { - allwinner,pins = "PC1", "PC5", "PC6", "PC8", - "PC9", "PC10"; - allwinner,function = "mmc2"; - allwinner,drive = <SUN4I_PINCTRL_30_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + mmc0_pins: mmc0-pins { + pins = "PF0", "PF1", "PF2", "PF3", + "PF4", "PF5"; + function = "mmc0"; + drive-strength = <30>; + bias-pull-up; }; - i2c0_pins: i2c0_pins { - allwinner,pins = "PH0", "PH1"; - allwinner,function = "i2c0"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + mmc1_pins: mmc1-pins { + pins = "PG0", "PG1", "PG2", "PG3", + "PG4", "PG5"; + function = "mmc1"; + drive-strength = <30>; + bias-pull-up; }; - i2c1_pins: i2c1_pins { - allwinner,pins = "PH2", "PH3"; - allwinner,function = "i2c1"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + mmc2_pins: mmc2-pins { + pins = "PC1", "PC5", "PC6", "PC8", "PC9", + "PC10","PC11", "PC12", "PC13", + "PC14", "PC15", "PC16"; + function = "mmc2"; + drive-strength = <30>; + bias-pull-up; }; - i2c2_pins: i2c2_pins { - allwinner,pins = "PE14", "PE15"; - allwinner,function = "i2c2"; - allwinner,drive = <SUN4I_PINCTRL_10_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + uart0_pins_a: uart0@0 { + pins = "PB8", "PB9"; + function = "uart0"; }; - rmii_pins: rmii_pins { - allwinner,pins = "PD10", "PD11", "PD13", "PD14", - "PD17", "PD18", "PD19", "PD20", - "PD22", "PD23"; - allwinner,function = "emac"; - allwinner,drive = <SUN4I_PINCTRL_40_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + uart1_pins: uart1_pins { + pins = "PG6", "PG7"; + function = "uart1"; }; - rgmii_pins: rgmii_pins { - allwinner,pins = "PD8", "PD9", "PD10", "PD11", - "PD12", "PD13", "PD15", - "PD16", "PD17", "PD18", "PD19", - "PD20", "PD21", "PD22", "PD23"; - allwinner,function = "emac"; - allwinner,drive = <SUN4I_PINCTRL_40_MA>; - allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + uart1_rts_cts_pins: uart1_rts_cts_pins { + pins = "PG8", "PG9"; + function = "uart1"; }; }; - ahb_rst: reset@1c202c0 { - #reset-cells = <1>; - compatible = "allwinner,sun6i-a31-clock-reset"; - reg = <0x01c202c0 0xc>; - }; - - apb1_rst: reset@1c202d0 { - #reset-cells = <1>; - compatible = "allwinner,sun6i-a31-clock-reset"; - reg = <0x01c202d0 0x4>; - }; - - apb2_rst: reset@1c202d8 { - #reset-cells = <1>; - compatible = "allwinner,sun6i-a31-clock-reset"; - reg = <0x01c202d8 0x4>; - }; - uart0: serial@1c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&bus_gates 112>; - resets = <&apb2_rst 16>; + clocks = <&ccu 67>; + resets = <&ccu 46>; status = "disabled"; }; @@ -562,8 +314,8 @@ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&bus_gates 113>; - resets = <&apb2_rst 17>; + clocks = <&ccu 68>; + resets = <&ccu 47>; status = "disabled"; }; @@ -573,8 +325,8 @@ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&bus_gates 114>; - resets = <&apb2_rst 18>; + clocks = <&ccu 69>; + resets = <&ccu 48>; status = "disabled"; }; @@ -584,8 +336,8 @@ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&bus_gates 115>; - resets = <&apb2_rst 19>; + clocks = <&ccu 70>; + resets = <&ccu 49>; status = "disabled"; }; @@ -595,24 +347,17 @@ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&bus_gates 116>; - resets = <&apb2_rst 20>; + clocks = <&ccu 71>; + resets = <&ccu 50>; status = "disabled"; }; - rtc: rtc@1f00000 { - compatible = "allwinner,sun6i-a31-rtc"; - reg = <0x01f00000 0x54>; - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; - }; - i2c0: i2c@1c2ac00 { compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2ac00 0x400>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bus_gates 96>; - resets = <&apb2_rst 0>; + clocks = <&ccu 63>; + resets = <&ccu 42>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -622,8 +367,8 @@ compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2b000 0x400>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bus_gates 97>; - resets = <&apb2_rst 1>; + clocks = <&ccu 64>; + resets = <&ccu 43>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -633,54 +378,50 @@ compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2b400 0x400>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&bus_gates 98>; - resets = <&apb2_rst 2>; + clocks = <&ccu 65>; + resets = <&ccu 44>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; }; - emac: ethernet@01c30000 { - compatible = "allwinner,sun50i-a64-emac"; - reg = <0x01c30000 0x2000>, <0x01c00030 0x4>; - reg-names = "emac", "syscon"; - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; - resets = <&ahb_rst 17>; - reset-names = "ahb"; - clocks = <&bus_gates 17>; - clock-names = "ahb"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; + gic: interrupt-controller@1c81000 { + compatible = "arm,gic-400"; + reg = <0x01c81000 0x1000>, + <0x01c82000 0x2000>, + <0x01c84000 0x2000>, + <0x01c86000 0x2000>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + interrupt-controller; + #interrupt-cells = <3>; }; - usbphy: phy@1c1b810 { - compatible = "allwinner,sun50i-a64-usb-phy", - "allwinner,sun8i-a33-usb-phy"; - reg = <0x01c1b810 0x14>, <0x01c1b800 0x4>; - reg-names = "phy_ctrl", "pmu1"; - status = "disabled"; - #phy-cells = <1>; + rtc: rtc@1f00000 { + compatible = "allwinner,sun6i-a31-rtc"; + reg = <0x01f00000 0x54>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; }; - ehci1: usb@01c1b000 { - compatible = "allwinner,sun50i-a64-ehci", - "generic-ehci"; - reg = <0x01c1b000 0x100>; - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; + r_ccu: clock@1f01400 { + compatible = "allwinner,sun50i-a64-r-ccu"; + reg = <0x01f01400 0x100>; + clocks = <&osc24M>, <&osc32k>, <&iosc>; + clock-names = "hosc", "losc", "iosc"; + #clock-cells = <1>; + #reset-cells = <1>; }; - ohci1: usb@01c1b400 { - compatible = "allwinner,sun50i-a64-ohci", - "generic-ohci"; - reg = <0x01c1b400 0x100>; - interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "enabled"; + r_pio: pinctrl@01f02c00 { + compatible = "allwinner,sun50i-a64-r-pinctrl"; + reg = <0x01f02c00 0x400>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&r_ccu 3>, <&osc24M>, <&osc32k>; + clock-names = "apb", "hosc", "losc"; + gpio-controller; + #gpio-cells = <3>; + interrupt-controller; + #interrupt-cells = <3>; }; }; }; diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h b/include/dt-bindings/clock/sun50i-a64-ccu.h new file mode 100644 index 0000000..370c0a0 --- /dev/null +++ b/include/dt-bindings/clock/sun50i-a64-ccu.h @@ -0,0 +1,134 @@ +/* + * Copyright (C) 2016 Maxime Ripard <maxime.ripard(a)free-electrons.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_ +#define _DT_BINDINGS_CLK_SUN50I_A64_H_ + +#define CLK_BUS_MIPI_DSI 28 +#define CLK_BUS_CE 29 +#define CLK_BUS_DMA 30 +#define CLK_BUS_MMC0 31 +#define CLK_BUS_MMC1 32 +#define CLK_BUS_MMC2 33 +#define CLK_BUS_NAND 34 +#define CLK_BUS_DRAM 35 +#define CLK_BUS_EMAC 36 +#define CLK_BUS_TS 37 +#define CLK_BUS_HSTIMER 38 +#define CLK_BUS_SPI0 39 +#define CLK_BUS_SPI1 40 +#define CLK_BUS_OTG 41 +#define CLK_BUS_EHCI0 42 +#define CLK_BUS_EHCI1 43 +#define CLK_BUS_OHCI0 44 +#define CLK_BUS_OHCI1 45 +#define CLK_BUS_VE 46 +#define CLK_BUS_TCON0 47 +#define CLK_BUS_TCON1 48 +#define CLK_BUS_DEINTERLACE 49 +#define CLK_BUS_CSI 50 +#define CLK_BUS_HDMI 51 +#define CLK_BUS_DE 52 +#define CLK_BUS_GPU 53 +#define CLK_BUS_MSGBOX 54 +#define CLK_BUS_SPINLOCK 55 +#define CLK_BUS_CODEC 56 +#define CLK_BUS_SPDIF 57 +#define CLK_BUS_PIO 58 +#define CLK_BUS_THS 59 +#define CLK_BUS_I2S0 60 +#define CLK_BUS_I2S1 61 +#define CLK_BUS_I2S2 62 +#define CLK_BUS_I2C0 63 +#define CLK_BUS_I2C1 64 +#define CLK_BUS_I2C2 65 +#define CLK_BUS_SCR 66 +#define CLK_BUS_UART0 67 +#define CLK_BUS_UART1 68 +#define CLK_BUS_UART2 69 +#define CLK_BUS_UART3 70 +#define CLK_BUS_UART4 71 +#define CLK_BUS_DBG 72 +#define CLK_THS 73 +#define CLK_NAND 74 +#define CLK_MMC0 75 +#define CLK_MMC1 76 +#define CLK_MMC2 77 +#define CLK_TS 78 +#define CLK_CE 79 +#define CLK_SPI0 80 +#define CLK_SPI1 81 +#define CLK_I2S0 82 +#define CLK_I2S1 83 +#define CLK_I2S2 84 +#define CLK_SPDIF 85 +#define CLK_USB_PHY0 86 +#define CLK_USB_PHY1 87 +#define CLK_USB_HSIC 88 +#define CLK_USB_HSIC_12M 89 + +#define CLK_USB_OHCI0 91 + +#define CLK_USB_OHCI1 93 + +#define CLK_DRAM_VE 95 +#define CLK_DRAM_CSI 96 +#define CLK_DRAM_DEINTERLACE 97 +#define CLK_DRAM_TS 98 +#define CLK_DE 99 +#define CLK_TCON0 100 +#define CLK_TCON1 101 +#define CLK_DEINTERLACE 102 +#define CLK_CSI_MISC 103 +#define CLK_CSI_SCLK 104 +#define CLK_CSI_MCLK 105 +#define CLK_VE 106 +#define CLK_AC_DIG 107 +#define CLK_AC_DIG_4X 108 +#define CLK_AVS 109 +#define CLK_HDMI 110 +#define CLK_HDMI_DDC 111 + +#define CLK_DSI_DPHY 113 +#define CLK_GPU 114 + +#endif /* _DT_BINDINGS_CLK_SUN50I_H_ */ diff --git a/arch/arm/dts/sun50i-a64-pine64-common.dtsi b/include/dt-bindings/reset/sun50i-a64-ccu.h similarity index 52% rename from arch/arm/dts/sun50i-a64-pine64-common.dtsi rename to include/dt-bindings/reset/sun50i-a64-ccu.h index 9ec81c6..db60b29 100644 --- a/arch/arm/dts/sun50i-a64-pine64-common.dtsi +++ b/include/dt-bindings/reset/sun50i-a64-ccu.h @@ -1,17 +1,17 @@ /* - * Copyright (c) 2016 ARM Ltd. + * Copyright (C) 2016 Maxime Ripard <maxime.ripard(a)free-electrons.com> * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * - * a) This library is free software; you can redistribute it and/or + * a) This file is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of the * License, or (at your option) any later version. * - * This library is distributed in the hope that it will be useful, + * This file is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. @@ -40,54 +40,59 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -#include "sun50i-a64.dtsi" +#ifndef _DT_BINDINGS_RST_SUN50I_A64_H_ +#define _DT_BINDINGS_RST_SUN50I_A64_H_ -/ { +#define RST_USB_PHY0 0 +#define RST_USB_PHY1 1 +#define RST_USB_HSIC 2 +#define RST_DRAM 3 +#define RST_MBUS 4 +#define RST_BUS_MIPI_DSI 5 +#define RST_BUS_CE 6 +#define RST_BUS_DMA 7 +#define RST_BUS_MMC0 8 +#define RST_BUS_MMC1 9 +#define RST_BUS_MMC2 10 +#define RST_BUS_NAND 11 +#define RST_BUS_DRAM 12 +#define RST_BUS_EMAC 13 +#define RST_BUS_TS 14 +#define RST_BUS_HSTIMER 15 +#define RST_BUS_SPI0 16 +#define RST_BUS_SPI1 17 +#define RST_BUS_OTG 18 +#define RST_BUS_EHCI0 19 +#define RST_BUS_EHCI1 20 +#define RST_BUS_OHCI0 21 +#define RST_BUS_OHCI1 22 +#define RST_BUS_VE 23 +#define RST_BUS_TCON0 24 +#define RST_BUS_TCON1 25 +#define RST_BUS_DEINTERLACE 26 +#define RST_BUS_CSI 27 +#define RST_BUS_HDMI0 28 +#define RST_BUS_HDMI1 29 +#define RST_BUS_DE 30 +#define RST_BUS_GPU 31 +#define RST_BUS_MSGBOX 32 +#define RST_BUS_SPINLOCK 33 +#define RST_BUS_DBG 34 +#define RST_BUS_LVDS 35 +#define RST_BUS_CODEC 36 +#define RST_BUS_SPDIF 37 +#define RST_BUS_THS 38 +#define RST_BUS_I2S0 39 +#define RST_BUS_I2S1 40 +#define RST_BUS_I2S2 41 +#define RST_BUS_I2C0 42 +#define RST_BUS_I2C1 43 +#define RST_BUS_I2C2 44 +#define RST_BUS_SCR 45 +#define RST_BUS_UART0 46 +#define RST_BUS_UART1 47 +#define RST_BUS_UART2 48 +#define RST_BUS_UART3 49 +#define RST_BUS_UART4 50 - aliases { - serial0 = &uart0; - ethernet0 = &emac; - }; - - soc { - reg_vcc3v3: vcc3v3 { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - }; -}; - -&mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>, <&mmc0_default_cd_pin>; - vmmc-supply = <&reg_vcc3v3>; - cd-gpios = <&pio 5 6 0>; - cd-inverted; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; - status = "okay"; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - status = "okay"; -}; - -&usbphy { - status = "okay"; -}; - -&ohci1 { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; +#endif /* _DT_BINDINGS_RST_SUN50I_A64_H_ */ -- 2.9.0

3 3

[U-Boot] [PATCH 1/4] x86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1
by Bin Meng 01 Jun '17

01 Jun '17

The default value of "fsp,mrc-init-tseg-size" should be 1 (1MB) per FSP default settings. 0 is not valid. Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- arch/x86/cpu/baytrail/fsp_configs.c | 2 +- arch/x86/dts/bayleybay.dts | 2 +- arch/x86/dts/baytrail_som-db5800-som-6867.dts | 2 +- arch/x86/dts/conga-qeval20-qa3-e3845.dts | 2 +- arch/x86/dts/dfi-bt700.dtsi | 2 +- arch/x86/dts/minnowmax.dts | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c index d49b8d2..365e0dd 100644 --- a/arch/x86/cpu/baytrail/fsp_configs.c +++ b/arch/x86/cpu/baytrail/fsp_configs.c @@ -148,7 +148,7 @@ void update_fsp_configs(struct fsp_config_data *config, fsp_upd->mrc_init_tseg_size = fdtdec_get_int(blob, node, "fsp,mrc-init-tseg-size", - 0); + 1); fsp_upd->mrc_init_mmio_size = fdtdec_get_int(blob, node, "fsp,mrc-init-mmio-size", 0x800); diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts index 1ae058d..42a8131 100644 --- a/arch/x86/dts/bayleybay.dts +++ b/arch/x86/dts/bayleybay.dts @@ -236,7 +236,7 @@ fsp { compatible = "intel,baytrail-fsp"; - fsp,mrc-init-tseg-size = <0>; + fsp,mrc-init-tseg-size = <1>; fsp,mrc-init-mmio-size = <0x800>; fsp,mrc-init-spd-addr1 = <0xa0>; fsp,mrc-init-spd-addr2 = <0xa2>; diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts b/arch/x86/dts/baytrail_som-db5800-som-6867.dts index aa8bfb8..d4199a3 100644 --- a/arch/x86/dts/baytrail_som-db5800-som-6867.dts +++ b/arch/x86/dts/baytrail_som-db5800-som-6867.dts @@ -259,7 +259,7 @@ fsp { compatible = "intel,baytrail-fsp"; - fsp,mrc-init-tseg-size = <0>; + fsp,mrc-init-tseg-size = <1>; fsp,mrc-init-mmio-size = <0x800>; fsp,mrc-init-spd-addr1 = <0xa0>; fsp,mrc-init-spd-addr2 = <0xa2>; diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts index 898e9c9..904197a 100644 --- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts +++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts @@ -246,7 +246,7 @@ fsp { compatible = "intel,baytrail-fsp"; - fsp,mrc-init-tseg-size = <0>; + fsp,mrc-init-tseg-size = <1>; fsp,mrc-init-mmio-size = <0x800>; fsp,mrc-init-spd-addr1 = <0xa0>; fsp,mrc-init-spd-addr2 = <0xa2>; diff --git a/arch/x86/dts/dfi-bt700.dtsi b/arch/x86/dts/dfi-bt700.dtsi index 546981a..a369e73 100644 --- a/arch/x86/dts/dfi-bt700.dtsi +++ b/arch/x86/dts/dfi-bt700.dtsi @@ -248,7 +248,7 @@ fsp { compatible = "intel,baytrail-fsp"; - fsp,mrc-init-tseg-size = <0>; + fsp,mrc-init-tseg-size = <1>; fsp,mrc-init-mmio-size = <0x800>; fsp,mrc-init-spd-addr1 = <0xa0>; fsp,mrc-init-spd-addr2 = <0xa2>; diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index af64c68..4d55abb 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -260,7 +260,7 @@ fsp { compatible = "intel,baytrail-fsp"; - fsp,mrc-init-tseg-size = <0>; + fsp,mrc-init-tseg-size = <1>; fsp,mrc-init-mmio-size = <0x800>; fsp,mrc-init-spd-addr1 = <0xa0>; fsp,mrc-init-spd-addr2 = <0xa2>; -- 2.9.2

3 17

[U-Boot] [PATCH v4 0/5] Extend xhci-dwc3
by patrice.chotard＠st.com 01 Jun '17

01 Jun '17

From: Patrice Chotard <patrice.chotard(a)st.com> This series extend xhci-dwc3.c drivers by : _ converting it to DM model, _ adding dual role mode support from DT _ adding new generic_phy_valid() method in PHY framework _ adding support of generic PHY framework v4: _ set phy->dev to NULL in case of generic_phy_get_by_index() v3: _ introduce generic_phy_valid() method _ add Reviewed-by v2: _ use dev_get_addr() in PATCH 1 and removed useless piece of code Patrice Chotard (5): usb: host: xhci-dwc3: Convert driver to DM usb: host: xhci-dwc3: Add dual role mode support from DT drivers: phy: Set phy->dev to NULL when generic_phy_get_by_index() fails drivers: phy: add generic_phy_valid() method usb: host: xhci-dwc3: Add generic PHY support drivers/phy/phy-uclass.c | 7 ++++ drivers/usb/host/xhci-dwc3.c | 91 ++++++++++++++++++++++++++++++++++++++++++++ include/generic-phy.h | 8 ++++ 3 files changed, 106 insertions(+) -- 1.9.1

3 12

[U-Boot] [PATCH 1/3] nds32: mmc: Support ftsdc010 DM.
by Andes 01 Jun '17

01 Jun '17

From: rick <rick(a)andestech.com> Support Andestech ftsdc010 SD/MMC device tree flow on AG101P/AE3XX platforms. Signed-off-by: rick <rick(a)andestech.com> --- drivers/mmc/Kconfig | 12 ++++ drivers/mmc/Makefile | 1 + drivers/mmc/ftsdc010_mci.c | 140 ++++++++++++++++++++++++++++++++++---------- drivers/mmc/ftsdc010_mci.h | 54 +++++++++++++++++ drivers/mmc/nds32_mmc.c | 139 +++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 316 insertions(+), 30 deletions(-) create mode 100644 drivers/mmc/ftsdc010_mci.h create mode 100644 drivers/mmc/nds32_mmc.c diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 0dd4443..ca1376a 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -377,6 +377,18 @@ config GENERIC_ATMEL_MCI the SD Memory Card Specification V2.0, the SDIO V2.0 specification and CE-ATA V1.1. +config MMC_NDS32 + bool "Andestech SD/MMC controller support" + depends on DM_MMC && OF_CONTROL + help + This enables support for the Andestech SD/MMM controller, which is + based on Faraday IP. + +config FTSDC010 + bool "Ftsdc010 SD/MMC controller Support" + help + This SD/MMC controller is present in Andestech SoCs which is based on Faraday IP. + endif config TEGRA124_MMC_DISABLE_EXT_LOOPBACK diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index a078649..08a552a 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -44,6 +44,7 @@ obj-$(CONFIG_S3C_SDI) += s3c_sdi.o obj-$(CONFIG_MMC_SANDBOX) += sandbox_mmc.o obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o obj-$(CONFIG_SH_SDHI) += sh_sdhi.o +obj-$(CONFIG_MMC_NDS32) += nds32_mmc.o # SDHCI obj-$(CONFIG_MMC_SDHCI) += sdhci.o diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c index 652a718..ec0bc6b 100644 --- a/drivers/mmc/ftsdc010_mci.c +++ b/drivers/mmc/ftsdc010_mci.c @@ -12,24 +12,15 @@ #include <part.h> #include <mmc.h> -#include <asm/io.h> +#include <linux/io.h> #include <linux/errno.h> #include <asm/byteorder.h> #include <faraday/ftsdc010.h> +#include "ftsdc010_mci.h" #define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ >> 4) /* 250 ms */ #define CFG_RST_TIMEOUT CONFIG_SYS_HZ /* 1 sec reset timeout */ -struct ftsdc010_chip { - void __iomem *regs; - uint32_t wprot; /* write protected (locked) */ - uint32_t rate; /* actual SD clock in Hz */ - uint32_t sclk; /* FTSDC010 source clock in Hz */ - uint32_t fifo; /* fifo depth in bytes */ - uint32_t acmd; - struct mmc_config cfg; /* mmc configuration */ -}; - static inline int ftsdc010_send_cmd(struct mmc *mmc, struct mmc_cmd *mmc_cmd) { struct ftsdc010_chip *chip = mmc->priv; @@ -127,9 +118,8 @@ static void ftsdc010_clkset(struct mmc *mmc, uint32_t rate) static int ftsdc010_wait(struct ftsdc010_mmc __iomem *regs, uint32_t mask) { int ret = -ETIMEDOUT; - uint32_t st, ts; - - for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) { + uint32_t st, timeout = 10000000; + while (timeout--) { st = readl(&regs->status); if (!(st & mask)) continue; @@ -147,10 +137,16 @@ static int ftsdc010_wait(struct ftsdc010_mmc __iomem *regs, uint32_t mask) /* * u-boot mmc api */ - +#ifdef CONFIG_DM_MMC_OPS +static int ftsdc010_request(struct udevice *dev, struct mmc_cmd *cmd, + struct mmc_data *data) +{ + struct mmc *mmc = mmc_get_mmc_dev(dev); +#else static int ftsdc010_request(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) { +#endif int ret = -EOPNOTSUPP; uint32_t len = 0; struct ftsdc010_chip *chip = mmc->priv; @@ -251,8 +247,14 @@ static int ftsdc010_request(struct mmc *mmc, struct mmc_cmd *cmd, return ret; } +#ifdef CONFIG_DM_MMC_OPS +static int ftsdc010_set_ios(struct udevice *dev) +{ + struct mmc *mmc = mmc_get_mmc_dev(dev); +#else static int ftsdc010_set_ios(struct mmc *mmc) { +#endif struct ftsdc010_chip *chip = mmc->priv; struct ftsdc010_mmc __iomem *regs = chip->regs; @@ -274,20 +276,46 @@ static int ftsdc010_set_ios(struct mmc *mmc) return 0; } -static int ftsdc010_init(struct mmc *mmc) +#ifdef CONFIG_DM_MMC_OPS +static int ftsdc010_get_cd(struct udevice *dev) { + struct mmc *mmc = mmc_get_mmc_dev(dev); +#else +static int ftsdc010_getcd(struct mmc *mmc) +{ +#endif struct ftsdc010_chip *chip = mmc->priv; struct ftsdc010_mmc __iomem *regs = chip->regs; - uint32_t ts; - if (readl(&regs->status) & FTSDC010_STATUS_CARD_DETECT) - return -ENOMEDIUM; + return 0; + + return 1; +} +#ifdef CONFIG_DM_MMC_OPS +static int ftsdc010_get_wp(struct udevice *dev) +{ + struct mmc *mmc = mmc_get_mmc_dev(dev); +#else +static int ftsdc010_getwp(struct mmc *mmc) +{ +#endif + struct ftsdc010_chip *chip = mmc->priv; + struct ftsdc010_mmc __iomem *regs = chip->regs; if (readl(&regs->status) & FTSDC010_STATUS_WRITE_PROT) { printf("ftsdc010: write protected\n"); chip->wprot = 1; } + return 0; +} + +static int ftsdc010_init(struct mmc *mmc) +{ + struct ftsdc010_chip *chip = mmc->priv; + struct ftsdc010_mmc __iomem *regs = chip->regs; + uint32_t ts; + chip->fifo = (readl(&regs->feature) & 0xff) << 2; /* 1. chip reset */ @@ -311,11 +339,70 @@ static int ftsdc010_init(struct mmc *mmc) return 0; } +#ifdef CONFIG_DM_MMC_OPS +int ftsdc010_probe(struct udevice *dev) +{ + struct mmc *mmc = mmc_get_mmc_dev(dev); + return ftsdc010_init(mmc); +} + +const struct dm_mmc_ops dm_ftsdc010_ops = { + .send_cmd = ftsdc010_request, + .set_ios = ftsdc010_set_ios, + .get_cd = ftsdc010_get_cd, + .get_wp = ftsdc010_get_wp, +}; + +#else static const struct mmc_ops ftsdc010_ops = { .send_cmd = ftsdc010_request, .set_ios = ftsdc010_set_ios, + .getcd = ftsdc010_getcd, + .getwp = ftsdc010_getwp, .init = ftsdc010_init, }; +#endif + +void ftsdc_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth, + uint caps, u32 max_clk, u32 min_clk) +{ + cfg->name = name; + cfg->f_min = min_clk; + cfg->f_max = max_clk; + cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; + cfg->host_caps = caps; + if (buswidth == 8) { + cfg->host_caps |= MMC_MODE_8BIT; + cfg->host_caps &= ~MMC_MODE_4BIT; + } else { + cfg->host_caps |= MMC_MODE_4BIT; + cfg->host_caps &= ~MMC_MODE_8BIT; + } + cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz; + cfg->part_type = PART_TYPE_DOS; + cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; +} + +void set_bus_width(struct ftsdc010_mmc __iomem *regs, struct mmc_config *cfg) +{ + switch (readl(&regs->bwr) & FTSDC010_BWR_CAPS_MASK) { + case FTSDC010_BWR_CAPS_4BIT: + cfg->host_caps |= MMC_MODE_4BIT; + break; + case FTSDC010_BWR_CAPS_8BIT: + cfg->host_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT; + break; + default: + break; + } +} + +#ifdef CONFIG_BLK +int ftsdc010_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg) +{ + return mmc_bind(dev, mmc, cfg); +} +#else int ftsdc010_mmc_init(int devid) { @@ -345,19 +432,11 @@ int ftsdc010_mmc_init(int devid) #endif chip->cfg.name = "ftsdc010"; +#ifndef CONFIG_DM_MMC_OPS chip->cfg.ops = &ftsdc010_ops; +#endif chip->cfg.host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz; - switch (readl(&regs->bwr) & FTSDC010_BWR_CAPS_MASK) { - case FTSDC010_BWR_CAPS_4BIT: - chip->cfg.host_caps |= MMC_MODE_4BIT; - break; - case FTSDC010_BWR_CAPS_8BIT: - chip->cfg.host_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT; - break; - default: - break; - } - + set_bus_width(regs , &chip->cfg); chip->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34; chip->cfg.f_max = chip->sclk / 2; chip->cfg.f_min = chip->sclk / 0x100; @@ -373,3 +452,4 @@ int ftsdc010_mmc_init(int devid) return 0; } +#endif diff --git a/drivers/mmc/ftsdc010_mci.h b/drivers/mmc/ftsdc010_mci.h new file mode 100644 index 0000000..f74015e --- /dev/null +++ b/drivers/mmc/ftsdc010_mci.h @@ -0,0 +1,54 @@ +/* + * Faraday FTSDC010 Secure Digital Memory Card Host Controller + * + * Copyright (C) 2011 Andes Technology Corporation + * Macpaul Lin, Andes Technology Corporation <macpaul(a)andestech.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <mmc.h> + +#ifndef __FTSDC010_MCI_H +#define __FTSDC010_MCI_H + +struct ftsdc010_chip { + void __iomem *regs; + uint32_t wprot; /* write protected (locked) */ + uint32_t rate; /* actual SD clock in Hz */ + uint32_t sclk; /* FTSDC010 source clock in Hz */ + uint32_t fifo; /* fifo depth in bytes */ + uint32_t acmd; + struct mmc_config cfg; /* mmc configuration */ + const char *name; + void *ioaddr; + unsigned int quirks; + unsigned int caps; + unsigned int version; + unsigned int clock; + unsigned int bus_hz; + unsigned int div; + int dev_index; + int dev_id; + int buswidth; + u32 fifoth_val; + struct mmc *mmc; + void *priv; + bool fifo_mode; +}; + + +#ifdef CONFIG_DM_MMC_OPS +/* Export the operations to drivers */ +int ftsdc010_probe(struct udevice *dev); +extern const struct dm_mmc_ops dm_ftsdc010_ops; +#endif +void ftsdc_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth, + uint caps, u32 max_clk, u32 min_clk); +void set_bus_width(struct ftsdc010_mmc __iomem *regs, struct mmc_config *cfg); + +#ifdef CONFIG_BLK +int ftsdc010_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg); +#endif + + +#endif /* __FTSDC010_MCI_H */ diff --git a/drivers/mmc/nds32_mmc.c b/drivers/mmc/nds32_mmc.c new file mode 100644 index 0000000..ec25fe9 --- /dev/null +++ b/drivers/mmc/nds32_mmc.c @@ -0,0 +1,139 @@ +/* + * Andestech ATFSDC010 SD/MMC driver + * + * (C) Copyright 2016 + * Rick Chen, NDS32 Software Engineering, rick(a)andestech.com + + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <dt-structs.h> +#include <faraday/ftsdc010.h> +#include <errno.h> +#include <mapmem.h> +#include <pwrseq.h> +#include <syscon.h> +#include <mmc.h> +#include <linux/err.h> +#include "ftsdc010_mci.h" + +DECLARE_GLOBAL_DATA_PTR; + +#if CONFIG_IS_ENABLED(OF_PLATDATA) +struct nds_mmc { + fdt32_t bus_width; + bool cap_mmc_highspeed; + bool cap_sd_highspeed; + fdt32_t card_detect_delay; + fdt32_t clock_freq_min_max[2]; + struct phandle_2_cell clocks[4]; + bool disable_wp; + fdt32_t fifo_depth; + fdt32_t interrupts[3]; + fdt32_t num_slots; + fdt32_t reg[2]; + fdt32_t vmmc_supply; +}; +#endif + +struct nds_mmc_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct nds_mmc dtplat; +#endif + struct mmc_config cfg; + struct mmc mmc; +}; + +struct ftsdc_priv { + struct clk clk; + struct ftsdc010_chip chip; + int fifo_depth; + bool fifo_mode; + u32 minmax[2]; +}; + +static int nds32_mmc_ofdata_to_platdata(struct udevice *dev) +{ +#if !CONFIG_IS_ENABLED(OF_PLATDATA) + struct ftsdc_priv *priv = dev_get_priv(dev); + struct ftsdc010_chip *chip = &priv->chip; + chip->name = dev->name; + chip->ioaddr = (void *)dev_get_addr(dev); + chip->buswidth = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "bus-width", 4); + chip->priv = dev; + /* use non-removeable as sdcard and emmc as judgement */ + if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "non-removable")) + chip->dev_index = 0; + else + chip->dev_index = 1; + + priv->fifo_depth = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "fifo-depth", 0); + priv->fifo_mode = fdtdec_get_bool(gd->fdt_blob, dev->of_offset, + "fifo-mode"); + if (fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, + "clock-freq-min-max", priv->minmax, 2)) + return -EINVAL; +#endif + chip->sclk = priv->minmax[1]; + chip->regs = chip->ioaddr; + return 0; +} + +static int nds32_mmc_probe(struct udevice *dev) +{ + struct nds_mmc_plat *plat = dev_get_platdata(dev); + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct ftsdc_priv *priv = dev_get_priv(dev); + struct ftsdc010_chip *chip = &priv->chip; + struct udevice *pwr_dev __maybe_unused; +#if CONFIG_IS_ENABLED(OF_PLATDATA) + int ret; + struct nds_mmc *dtplat = &plat->dtplat; + chip->name = dev->name; + chip->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]); + chip->buswidth = dtplat->bus_width; + chip->priv = dev; + chip->dev_index = 0; + priv->fifo_depth = dtplat->fifo_depth; + priv->fifo_mode = 0; + memcpy(priv->minmax, dtplat->clock_freq_min_max, sizeof(priv->minmax)); + ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->clk); + if (ret < 0) + return ret; +#endif + ftsdc_setup_cfg(&plat->cfg, dev->name, chip->buswidth, chip->caps, + priv->minmax[1] , priv->minmax[0]); + chip->mmc = &plat->mmc; + chip->mmc->priv = &priv->chip; + chip->mmc->dev = dev; + upriv->mmc = chip->mmc; + return ftsdc010_probe(dev); +} + +static int nds32_mmc_bind(struct udevice *dev) +{ + struct nds_mmc_plat *plat = dev_get_platdata(dev); + return ftsdc010_bind(dev, &plat->mmc, &plat->cfg); +} + +static const struct udevice_id nds32_mmc_ids[] = { + { .compatible = "andestech,atsdc010" }, + { } +}; + +U_BOOT_DRIVER(nds32_mmc_drv) = { + .name = "nds32_mmc", + .id = UCLASS_MMC, + .of_match = nds32_mmc_ids, + .ofdata_to_platdata = nds32_mmc_ofdata_to_platdata, + .ops = &dm_ftsdc010_ops, + .bind = nds32_mmc_bind, + .probe = nds32_mmc_probe, + .priv_auto_alloc_size = sizeof(struct ftsdc_priv), + .platdata_auto_alloc_size = sizeof(struct nds_mmc_plat), +}; -- 1.7.9.5

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[U-Boot] [PATCH v5 0/16] sunxi: Add support for the CHIP Pro
by Maxime Ripard 01 Jun '17

01 Jun '17

The CHIP Pro is a SoM made by NextThing Co, and that embeds a GR8 SIP, an AXP209 PMIC, a WiFi BT chip and a 512MB SLC NAND. Since the first Allwinner device coming whit an SLC NAND that doesn't have the shortcomings (and breakages) the MLC NAND has, we can finally enable the NAND support on a board by default. This is the occasion to introduce a bunch of additions needed imo to be able to come up with a sane NAND support for our users. The biggest pain point is that the BROM uses a different ECC and randomizer configuration than for the rest of the NAND. In order to lessen the number of bitflips, you also need to pad with random data the SPL image. Since it's quite tedious to do right (and most users won't be able to figure it out) and since if it is not done right, it will eventually turn into an unusable system (which is bad UX), we think that the best solution is to generate an SPL image that already embeds all this. We'll possible have to do the same thing for the U-Boot image (at least for the random padding) on MLC NANDs. The only drawback from that is that you need to flash it raw, instead of using the usual nand write, but it's just a different command, nothing major anyway. In order to flash it, from a device switched in FEL, on your host: sunxi-fel spl spl/sunxi-spl.bin sunxi-fel write 0x4a000000 u-boot-dtb.bin sunxi-fel write 0x43000000 spl/sunxi-spl-with-ecc.bin sunxi-fel exe 0x4a000000 And on the board, once u-boot is running (assuming the NAND is already erased): nand write.raw.noverify 0x43000000 0 40 nand write.raw.noverify 0x43000000 0x400000 40 nand write 0x4a000000 0x800000 0xc0000 I also encountered some weird bug in the private libgcc that prevents U-Boot from loading. Disabling CONFIG_USE_PRIVATE_LIBGCC fixes that. Let me know what you think, Maxime Changes from v4: - Rebased on top of last pull request - Removed irrelevant config options Changes from v3: - Bring new Kconfig patches from Boris - Do not define Kconfig defaults in our board Kconfig but directly in the option declaration - Sync the DT with the kernel - Fixed build breakages Changes from v2: - Move CMD_NAND and CMD_UBI default to cmd/Kconfig - Define the env Kconfig options only for ARCH_SUNXI to avoid build breakages - Define CMD_MTDPARTS only for ARCH_SUNXI Changes from v1: - Allowed to build lib/bch.c for the host, and used that in the image builder - Fixed a bug in the NAND driver - Wrote a documentation on how to flash a NAND image on an Allwinner board - Fixed a few compilation breakages and issues - Moved U-boot offset out of the config header and into Kconfig - Moved the environment into UBI - Moved the environment selection to Kconfig - Moved the CMD_MTDPARTS options to Kconfig - Provide MTDIDS_DEFAULT and MTDPARTS_DEFAULT options through Kconfig - Added the tags from everyone Boris Brezillon (3): mtd: ubi: Select RBTREE option from MTD_UBI Kconfig entry cmd: Expose a Kconfig option to enable UBIFS commands cmd: nand: Expose optional suboptions in Kconfig Hans de Goede (1): sunxi: Enable UBI and NAND support Maxime Ripard (12): nand: sunxi: Fix modulo by zero error bch: Allow to build for the host tools: sunxi: Add spl image builder common: Move environment choice to Kconfig cmd: Add Kconfig option for CMD_MTDPARTS and related options mtd: sunxi: Select the U-Boot location config option mtd: sunxi: Change U-Boot offset sunxi: Add the default mtdids and mtdparts to our env nand: sunxi: Add options for the SPL NAND configuration scripts: sunxi: Build an raw SPL image sunxi: Sync GR8 DTS and AXP209 with the kernel sunxi: Add support for the CHIP Pro Makefile | 3 +- arch/arm/dts/Makefile | 1 +- arch/arm/dts/axp209.dtsi | 6 +- arch/arm/dts/sun5i-gr8-chip-pro.dts | 266 +++++++- arch/arm/dts/sun5i-gr8.dtsi | 1132 ++++++++++++++++++++++++++++- board/sunxi/README.nand | 54 +- cmd/Kconfig | 50 +- cmd/mtdparts.c | 8 +- common/Kconfig | 69 ++- configs/CHIP_pro_defconfig | 33 +- drivers/mtd/nand/Kconfig | 19 +- drivers/mtd/nand/sunxi_nand_spl.c | 7 +- drivers/mtd/ubi/Kconfig | 1 +- include/configs/sunxi-common.h | 33 +- include/environment.h | 2 +- lib/Kconfig | 5 +- lib/bch.c | 48 +- scripts/Makefile.spl | 15 +- tools/.gitignore | 1 +- tools/Makefile | 2 +- tools/sunxi-spl-image-builder.c | 484 ++++++++++++- 21 files changed, 2224 insertions(+), 15 deletions(-) create mode 100644 arch/arm/dts/sun5i-gr8-chip-pro.dts create mode 100644 arch/arm/dts/sun5i-gr8.dtsi create mode 100644 board/sunxi/README.nand create mode 100644 configs/CHIP_pro_defconfig create mode 100644 tools/sunxi-spl-image-builder.c base-commit: 35affe7698e95c058a1f6c7eb2e1bf35f82461c9 -- git-series 0.8.11

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