May 2017 - U-Boot

[U-Boot] [PATCH v2] net: macb: Fix GMAC not work when enable DM_ETH
by Wenyou Yang 02 Jun '17

02 Jun '17

Always search the PHY to determine the macb->phy_addr before using the PHY to fix "No PHY present" error. Fix the wrong test of the GMAC's phy interface mode, it should be PHY_INTERFACE_MODE_RGMII. Signed-off-by: Wenyou Yang <wenyou.yang(a)atmel.com> Reviewed-by: Simon Glass <sjg(a)chromium.org> --- Changes in v2: - Fix the wrong missed RMII phy interface mode. - Add Reviewed-by tag. drivers/net/macb.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/net/macb.c b/drivers/net/macb.c index 402e866817..8e9b38f34f 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -447,7 +447,6 @@ static void macb_phy_reset(struct macb_device *macb, const char *name) name, status); } -#ifdef CONFIG_MACB_SEARCH_PHY static int macb_phy_find(struct macb_device *macb, const char *name) { int i; @@ -468,7 +467,6 @@ static int macb_phy_find(struct macb_device *macb, const char *name) return 0; } -#endif /* CONFIG_MACB_SEARCH_PHY */ #ifdef CONFIG_DM_ETH static int macb_phy_init(struct udevice *dev, const char *name) @@ -488,11 +486,9 @@ static int macb_phy_init(struct macb_device *macb, const char *name) int i; arch_get_mdio_control(name); -#ifdef CONFIG_MACB_SEARCH_PHY /* Auto-detect phy_addr */ if (!macb_phy_find(macb, name)) return 0; -#endif /* CONFIG_MACB_SEARCH_PHY */ /* Check if the PHY is up to snuff... */ phy_id = macb_mdio_read(macb, MII_PHYSID1); @@ -667,7 +663,8 @@ static int _macb_init(struct macb_device *macb, const char *name) * to select interface between RMII and MII. */ #ifdef CONFIG_DM_ETH - if (macb->phy_interface == PHY_INTERFACE_MODE_RMII) + if ((macb->phy_interface == PHY_INTERFACE_MODE_RMII) || + (macb->phy_interface == PHY_INTERFACE_MODE_RGMII)) gem_writel(macb, UR, GEM_BIT(RGMII)); else gem_writel(macb, UR, 0); -- 2.11.0

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[U-Boot] [PATCH] arm64: mvebu: armada-7040-db: Enable 10GB port 0 / SFI (KR)
by Stefan Roese 02 Jun '17

02 Jun '17

This patch enables the mvpp2 port 0 usage on the Armada 7k DB by setting the correct PHY type (KR / SFI) for the COMPHY driver and enabling the ethernet0 device node in the dts. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Stefan Chulski <stefanc(a)marvell.com> Cc: Kostya Porotchkin <kostap(a)marvell.com> Cc: Nadav Haklai <nadavh(a)marvell.com> --- arch/arm/dts/armada-7040-db.dts | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/armada-7040-db.dts b/arch/arm/dts/armada-7040-db.dts index 84e0dbdc3d..54b888ac22 100644 --- a/arch/arm/dts/armada-7040-db.dts +++ b/arch/arm/dts/armada-7040-db.dts @@ -168,8 +168,7 @@ }; phy2 { - phy-type = <PHY_TYPE_SGMII0>; - phy-speed = <PHY_SPEED_1_25G>; + phy-type = <PHY_TYPE_KR>; }; phy3 { @@ -223,6 +222,11 @@ status = "okay"; }; +&cpm_eth0 { + status = "okay"; + phy-mode = "sfi"; /* lane-2 */ +}; + &cpm_eth1 { status = "okay"; phy = <&phy0>; -- 2.12.2

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[U-Boot] [PATCH 0/2] armv8/ls104xa: add Tx internal delays for the RGMII PHYs
by Madalin Bucur 02 Jun '17

02 Jun '17

The RGMII PHYs used by the ls1043ardb/ls1046ardb boards require internal delay on Tx. Changing the fix-up code to reflect this. Madalin Bucur (2): armv8/ls1043a: RGMII PHY requires internal delay on Tx armv8/ls1046a: RGMII PHY requires internal delay on Tx drivers/net/fm/ls1043.c | 4 ++-- drivers/net/fm/ls1046.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) -- 2.1.0

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[U-Boot] [PATCHv2] net: zynq_gem: Do not return -ENOSYS on success
by Olliver Schinagl 02 Jun '17

02 Jun '17

The .read_rom_hwaddr net_ops hook does not check the return value, which is why it was never caught that we are currently returning 0 if the read_rom_hwaddr function return -ENOSYS and -ENOSYS otherwise. In this case we can simplify this by just returning the result of the function. Signed-off-by: Olliver Schinagl <oliver(a)schinagl.nl> --- Changes since v1: Check pdata for NULL before dereferencing. drivers/net/zynq_gem.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 86dd03feda..52beedfad0 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -589,14 +589,12 @@ __weak int zynq_board_read_rom_ethaddr(unsigned char *ethaddr) static int zynq_gem_read_rom_mac(struct udevice *dev) { - int retval; struct eth_pdata *pdata = dev_get_platdata(dev); - retval = zynq_board_read_rom_ethaddr(pdata->enetaddr); - if (retval == -ENOSYS) - retval = 0; + if (!pdata) + return -ENOSYS; - return retval; + return zynq_board_read_rom_ethaddr(pdata->enetaddr); } static int zynq_gem_miiphy_read(struct mii_dev *bus, int addr, -- 2.11.0

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[U-Boot] [PATCH v2] net: designware: Add phy supply support
by Jacob Chen 02 Jun '17

02 Jun '17

Some board need a regulator for gmac phy, so add this code to handle it. Signed-off-by: Jacob Chen <jacob2.chen(a)rock-chips.com> --- drivers/net/designware.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/net/designware.c b/drivers/net/designware.c index f9fb8e0..0fcd125 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -18,6 +18,7 @@ #include <linux/compiler.h> #include <linux/err.h> #include <asm/io.h> +#include <power/regulator.h> #include "designware.h" DECLARE_GLOBAL_DATA_PTR; @@ -661,6 +662,22 @@ int designware_eth_probe(struct udevice *dev) ulong ioaddr; int ret; +#if defined(CONFIG_DM_REGULATOR) + struct udevice *phy_supply; + + ret = device_get_supply_regulator(dev, "phy-supply", + &phy_supply); + if (ret) { + debug("%s: No phy supply\n", dev->name); + } else { + ret = regulator_set_enable(phy_supply, true); + if (ret) { + puts("Error enabling phy supply\n"); + return ret; + } + } +#endif + #ifdef CONFIG_DM_PCI /* * If we are on PCI bus, either directly attached to a PCI root port, -- 1.9.1

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[U-Boot] [PATCH v3] net: Kconfig:make PHY_GIGE and individual Micrel PHYs selectable
by Philipp Tomsich 02 Jun '17

02 Jun '17

This change migrate the following configuration options for Kconfig: * PHY_GIGE, indicates that a controller (with an appropriate PHY) is Gigabit capable and enables extra support in the miiutil for parsing the status of Gigabit PHYs * adds configuration options for Micrel KSZ9021 and KSZ9031 GbE PHYs, which previously had to enabled through a board-specific config file Signed-off-by: Philipp Tomsich <philipp.tomsich(a)theobroma-systems.com> --- Changes in v3: - add a label to the PHY_GIGE option to make it selectable via menuconf - automatically select PHY_GIGE when a KSZ9021 or KSZ9031 is selected - fix indentations (convert spaces to tabs) - adds help text for PHY_MICREL Changes in v2: - migrate PHY_GIGE to Kconfig drivers/net/Kconfig | 8 ++++++++ drivers/net/phy/Kconfig | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 42 insertions(+) diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 70e3661..653ee5a 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -22,6 +22,13 @@ menuconfig NETDEVICES if NETDEVICES +config PHY_GIGE + bool "Enable GbE PHY status parsing and configuration" + help + Enables support for parsing the status output and for + configuring GbE PHYs (affects the inner workings of some + commands and miiphyutil.c). + config AG7XXX bool "Atheros AG7xxx Ethernet MAC support" depends on DM_ETH && ARCH_ATH79 @@ -165,6 +172,7 @@ config SUN8I_EMAC bool "Allwinner Sun8i Ethernet MAC support" depends on DM_ETH select PHYLIB + select PHY_GIGE help This driver supports the Allwinner based SUN8I/SUN50I Ethernet MAC. It can be found in H3/A64/A83T based SoCs and compatible with both diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 1d514e9..e2dfd88 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -44,6 +44,40 @@ config PHY_MARVELL config PHY_MICREL bool "Micrel Ethernet PHYs support" + help + Enable support for the GbE PHYs manufactured by Micrel (now + a part of Microchip). This includes drivers for the KSZ804, + KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, KSZ8721 + either/or KSZ9021 (see the "Micrel KSZ9021 family support" + config option for details), and KSZ9031 (if configured). + +if PHY_MICREL + +config PHY_MICREL_KSZ9021 + bool "Micrel KSZ9021 family support" + select PHY_GIGE + help + Enable support for the Micrel KSZ9021 GbE PHY family. If + enabled, the extended register read/write for KSZ9021 PHYs + is supported through the 'mdio' command and any RGMII signal + delays configured in the device tree will be applied to the + PHY during initialisation. + + Note that the KSZ9021 uses the same part number os the + KSZ8921BL, so enabling this option disables support for the + KSZ8721BL. + +config PHY_MICREL_KSZ9031 + bool "Micrel KSZ9031 family support" + select PHY_GIGE + help + Enable support for the Micrel KSZ9031 GbE PHY family. If + enabled, the extended register read/write for KSZ9021 PHYs + is supported through the 'mdio' command and any RGMII signal + delays configured in the device tree will be applied to the + PHY during initialisatioin. + +endif # PHY_MICREL config PHY_MSCC bool "Microsemi Corp Ethernet PHYs support" -- 1.9.1

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[U-Boot] [PATCH 0/5] sun50i: a64/h5: Add orangepi boards
by Jagan Teki 02 Jun '17

02 Jun '17

From: Jagan Teki <jagan(a)openedev.com> This series add Allwinner Cortex A-53 boards from OrangePI. - Orangepi Win/WinPlus - Orangepi Prime - Orangepi Zero Plus 2 thanks! Jagan. Jagan Teki (5): sun50i: a64: Add initial Orangepi Win/WinPlus support arm64: dts: sun50i: Add sun50i-h5.dtsi arm64: dts: sun50i: h5: orangepi-pc2: Use GPIO flag binding macro sun50i: h5: Add initial Orangepi Prime support sun50i: h5: Add initial Orangepi Zero Plus 2 support arch/arm/dts/Makefile | 5 +- arch/arm/dts/sun50i-a64-orangepi-win.dts | 102 ++++++++++++++++++++++++ arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 38 +-------- arch/arm/dts/sun50i-h5-orangepi-prime.dts | 104 +++++++++++++++++++++++++ arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts | 93 ++++++++++++++++++++++ arch/arm/dts/sun50i-h5.dtsi | 79 +++++++++++++++++++ board/sunxi/MAINTAINERS | 15 ++++ configs/orangepi_prime_defconfig | 17 ++++ configs/orangepi_win_defconfig | 16 ++++ configs/orangepi_zero_plus2_defconfig | 17 ++++ 10 files changed, 451 insertions(+), 35 deletions(-) create mode 100644 arch/arm/dts/sun50i-a64-orangepi-win.dts create mode 100644 arch/arm/dts/sun50i-h5-orangepi-prime.dts create mode 100644 arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts create mode 100644 arch/arm/dts/sun50i-h5.dtsi create mode 100644 configs/orangepi_prime_defconfig create mode 100644 configs/orangepi_win_defconfig create mode 100644 configs/orangepi_zero_plus2_defconfig -- 2.7.4

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[U-Boot] [PATCH v1 0/5] Enable PPA in SPL for ARMv8 Layerscape SoCs
by York Sun 02 Jun '17

02 Jun '17

This is the first step to move NXP Layerscape SoCs to run at EL2. With PPA (an implementation of trusted firmware) loaded during SPL stage, the rest of U-Boot (and subsequently loaded RAM version) runs at EL2. Eventually non-SPL boot will also moves to this direction. York Sun (5): armv8: layerscape: Make U-Boot EL2 safe armv8: layerscape: Enabling loading PPA during SPL stage armv8: ls1043ardb: Enable loading PPA during SPL stage for SD boot armv8: ls1046a: Enable spl_board_init() function armv8: ls1046ardb: Enable loading PPA during SPL stage for SD boot arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 13 +++++++ arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 11 +++++- arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 16 ++++++++- arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 7 ++++ arch/arm/cpu/armv8/fsl-layerscape/soc.c | 14 ++++++-- arch/arm/cpu/armv8/fsl-layerscape/spl.c | 41 ++++++++++++++++++++++- arch/arm/cpu/armv8/sec_firmware.c | 2 +- arch/arm/cpu/armv8/start.S | 3 ++ arch/arm/include/asm/arch-fsl-layerscape/config.h | 1 + board/freescale/common/ns_access.c | 5 ++- configs/ls1043ardb_sdcard_defconfig | 1 + configs/ls1046ardb_sdcard_defconfig | 1 + include/configs/ls1046a_common.h | 1 + 13 files changed, 109 insertions(+), 7 deletions(-) -- 2.7.4

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[U-Boot] [PATCH 1/2][v5] armv8: ls2080a: Reorganise NAND_BOOT code in config flag
by Santan Kumar 02 Jun '17

02 Jun '17

Add CONFIG_NAND_BOOT config flag to organise NAND_BOOT specific code in config flag like -nand-boot specfic errata errata_rcw_src() -CONFIG_SYS_NAND_U_BOOT_DST,etc Signed-off-by: Santan Kumar <santan.kumar(a)nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain(a)nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini(a)nxp.com> --- Changes in v5: Rebase in latest code base arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +- configs/ls2080aqds_nand_defconfig | 1 + include/configs/ls2080a_common.h | 2 ++ include/configs/ls2080aqds.h | 4 +++- 4 files changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 9e3cdd7..76e3af0 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -134,7 +134,7 @@ void erratum_a009635(void) static void erratum_rcw_src(void) { -#if defined(CONFIG_SPL) +#if defined(CONFIG_SPL) && defined(CONFIG_NAND_BOOT) u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE; u32 __iomem *dcfg_dcsr = (u32 __iomem *)DCFG_DCSR_BASE; u32 val; diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index aa4f134..2797e43 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -10,6 +10,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_NAND_BOOT=y CONFIG_SYS_EXTRA_OPTIONS="NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 427f623..12078c3 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -222,8 +222,10 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_TEXT_BASE 0x1800a000 +#ifdef CONFIG_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_DST 0x80400000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST +#endif #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 #define CONFIG_SYS_MONITOR_LEN (640 * 1024) diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index beacb99..4c48562 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -197,7 +197,8 @@ unsigned long get_board_ddr_clk(void); FTIM2_GPCM_TWP(0x3E)) #define CONFIG_SYS_CS3_FTIM3 0x0 -#if defined(CONFIG_SPL) && defined(CONFIG_NAND) +#if defined(CONFIG_SPL) +#if defined(CONFIG_NAND_BOOT) #define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT #define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR_EARLY #define CONFIG_SYS_CSPR1_FINAL CONFIG_SYS_NOR0_CSPR @@ -233,6 +234,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SYS_NAND_U_BOOT_OFFS (256 * 1024) #define CONFIG_SYS_NAND_U_BOOT_SIZE (640 * 1024) +#endif #else #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY -- 1.9.1

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[U-Boot] [PATCH v5] QE: add QE support on SD boot
by Zhao Qiang 02 Jun '17

02 Jun '17

modify u_qe_init to upload QE firmware from SD card when it is SD boot Signed-off-by: Zhao Qiang <qiang.zhao(a)nxp.com> --- Changes for v2: - fix issue of memory leak Changes for v3: - add CONFIG_SYS_QE_FMAN_FW_IN_NOR to ls1021a Changes for v4: - rebase due to memory-mapping conflict Changes for v5: - fix compile issue for PowerPC drivers/qe/qe.c | 36 +++++++++++++++++++++++++++++++++++- include/configs/ls1021aqds.h | 1 + include/configs/ls1021atwr.h | 1 + include/configs/ls1043a_common.h | 2 ++ include/configs/ls1043ardb.h | 4 +--- 5 files changed, 40 insertions(+), 4 deletions(-) diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index 4f0a278..24e764d 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -8,6 +8,7 @@ */ #include <common.h> +#include <malloc.h> #include <command.h> #include <linux/errno.h> #include <asm/io.h> @@ -17,6 +18,10 @@ #include <asm/arch/immap_ls102xa.h> #endif +#ifdef CONFIG_SYS_QE_FMAN_FW_IN_MMC +#include <mmc.h> +#endif + #define MPC85xx_DEVDISR_QE_DISABLE 0x1 qe_map_t *qe_immr = NULL; @@ -194,8 +199,37 @@ void u_qe_init(void) { qe_immr = (qe_map_t *)(CONFIG_SYS_IMMR + QE_IMMR_OFFSET); - u_qe_upload_firmware((const void *)CONFIG_SYS_QE_FW_ADDR); + void *addr = (void *)CONFIG_SYS_QE_FW_ADDR; +#ifdef CONFIG_SYS_QE_FMAN_FW_IN_MMC + int dev = CONFIG_SYS_MMC_ENV_DEV; + u32 cnt = CONFIG_SYS_QE_FMAN_FW_LENGTH / 512; + u32 blk = CONFIG_SYS_QE_FW_ADDR / 512; + + if (mmc_initialize(gd->bd)) { + printf("%s: mmc_initialize() failed\n", __func__); + return; + } + addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH); + struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV); + + if (!mmc) { + free(addr); + printf("\nMMC cannot find device for ucode\n"); + } else { + printf("\nMMC read: dev # %u, block # %u, count %u ...\n", + dev, blk, cnt); + mmc_init(mmc); + (void)mmc->block_dev.block_read(&mmc->block_dev, blk, cnt, + addr); + /* flush cache after read */ + flush_cache((ulong)addr, cnt * 512); + } +#endif + u_qe_upload_firmware(addr); out_be32(&qe_immr->iram.iready, QE_IRAM_READY); +#ifdef CONFIG_SYS_QE_FMAN_FW_IN_MMC + free(addr); +#endif } #endif diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 5fcaf85..fb077fb 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -125,6 +125,7 @@ unsigned long get_board_ddr_clk(void); #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \ !defined(CONFIG_QSPI_BOOT) #define CONFIG_U_QE +#define CONFIG_SYS_QE_FMAN_FW_IN_NOR #endif /* diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 2a20dec..240c2e2 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -150,6 +150,7 @@ #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \ !defined(CONFIG_QSPI_BOOT) #define CONFIG_U_QE +#define CONFIG_SYS_QE_FMAN_FW_IN_NOR #endif /* diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 155da92..56f5ee6 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -219,6 +219,7 @@ */ #define CONFIG_SYS_QE_FMAN_FW_IN_MMC #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800) +#define CONFIG_SYS_QE_FW_ADDR (512 * 0x4a08) #elif defined(CONFIG_QSPI_BOOT) #define CONFIG_SYS_QE_FW_IN_SPIFLASH #define CONFIG_SYS_FMAN_FW_ADDR 0x40900000 @@ -230,6 +231,7 @@ #define CONFIG_SYS_QE_FMAN_FW_IN_NOR /* FMan fireware Pre-load address */ #define CONFIG_SYS_FMAN_FW_ADDR 0x60900000 +#define CONFIG_SYS_QE_FW_ADDR 0x60940000 #endif #define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index a162378..2ce7ddd 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -277,11 +277,9 @@ /* QE */ #ifndef SPL_NO_QE -#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \ - !defined(CONFIG_QSPI_BOOT) +#if !defined(CONFIG_NAND_BOOT) && !defined(CONFIG_QSPI_BOOT) #define CONFIG_U_QE #endif -#define CONFIG_SYS_QE_FW_ADDR 0x60940000 #endif /* USB */ -- 2.1.0.27.g96db324

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