February 2017 - U-Boot

[U-Boot] [PATCH] board: ti: am57xx: enable input on mmc clock
by Sekhar Nori 09 Apr '17

09 Apr '17

As per the latest pinmux data available for AM572x EVM, rev A3, input should be enabled on MMC clock lines for MMC2/2/3 for stable operation. Further, AM572x TRM, SPRUHZ6, Revised June 2016, in section 18.4.6.1.1 "Pad Configuration Registers" states that input should be enabled for MMC 2/3/4 clock lines. Enable input on MMC1 and MMC3 clock to match the latest pinmux data. Input is already enabled on MMC2 clock for BeagleBoard x15. Further, input is already enabled on all MMCx clocks for other AM57xx boards (AM572x and AM571x IDK). Tested with HS and UHS SD card on AM572x EVM Rev A3. Signed-off-by: Sekhar Nori <nsekhar(a)ti.com> --- board/ti/am57xx/mux_data.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/ti/am57xx/mux_data.h b/board/ti/am57xx/mux_data.h index 2f5243ee7ad9..42150b0401cf 100644 --- a/board/ti/am57xx/mux_data.h +++ b/board/ti/am57xx/mux_data.h @@ -212,7 +212,7 @@ const struct pad_conf_entry core_padconf_array_essential_x15[] = { {MCASP5_FSX, (M3 | PIN_OUTPUT_PULLDOWN)}, /* mcasp5_fsx.uart9_txd */ {MCASP5_AXR0, (M3 | PIN_INPUT_PULLDOWN)}, /* mcasp5_axr0.uart9_ctsn */ {MCASP5_AXR1, (M3 | PIN_OUTPUT_PULLUP)}, /* mcasp5_axr1.uart9_rtsn */ - {MMC1_CLK, (M0 | PIN_OUTPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ + {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ @@ -221,7 +221,7 @@ const struct pad_conf_entry core_padconf_array_essential_x15[] = { {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */ {GPIO6_10, (M10 | PIN_OUTPUT_PULLDOWN)}, /* gpio6_10.ehrpwm2A */ {GPIO6_11, (M0 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 */ - {MMC3_CLK, (M0 | PIN_OUTPUT_PULLUP | MANUAL_MODE)}, /* mmc3_clk.mmc3_clk */ + {MMC3_CLK, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_clk.mmc3_clk */ {MMC3_CMD, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_cmd.mmc3_cmd */ {MMC3_DAT0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat0.mmc3_dat0 */ {MMC3_DAT1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat1.mmc3_dat1 */ -- 2.9.0

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[U-Boot] [PATCH] env_mmc: Allow SPL to use any MMC device to load/save the environment
by Jean-Jacques Hiblot 09 Apr '17

09 Apr '17

SPL has been restricted to use only dev 0 based on the assumption that only one MMC device is registered. This is not always the case and many platforms now register several devices as expected by the spl mmc boot code For those platform SPL_ENV_SUPPORT is broken if dev is forced to 0. A word of warning: this commit may break SPL_ENV_SUPPORT on platforms that do not register the same MMC controllers in SPL and in u-boot (mostly iMX6 based platforms). Fortunately none of those activate SPL_ENV_SUPPORT in their default configuration. Signed-off-by: Jean-Jacques Hiblot <jjhiblot(a)ti.com> --- common/env_mmc.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/common/env_mmc.c b/common/env_mmc.c index 16f6a17..a5d14d4 100644 --- a/common/env_mmc.c +++ b/common/env_mmc.c @@ -82,10 +82,6 @@ static int mmc_set_env_part(struct mmc *mmc) int dev = mmc_get_env_dev(); int ret = 0; -#ifdef CONFIG_SPL_BUILD - dev = 0; -#endif - env_mmc_orig_hwpart = mmc_get_blk_desc(mmc)->hwpart; ret = blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part); if (ret) @@ -116,9 +112,6 @@ static void fini_mmc_for_env(struct mmc *mmc) #ifdef CONFIG_SYS_MMC_ENV_PART int dev = mmc_get_env_dev(); -#ifdef CONFIG_SPL_BUILD - dev = 0; -#endif blk_select_hwpart_devnum(IF_TYPE_MMC, dev, env_mmc_orig_hwpart); #endif } @@ -223,10 +216,6 @@ void env_relocate_spec(void) ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env1, 1); ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env2, 1); -#ifdef CONFIG_SPL_BUILD - dev = 0; -#endif - mmc = find_mmc_device(dev); errmsg = init_mmc_for_env(mmc); @@ -306,10 +295,6 @@ void env_relocate_spec(void) int dev = mmc_get_env_dev(); const char *errmsg; -#ifdef CONFIG_SPL_BUILD - dev = 0; -#endif - mmc = find_mmc_device(dev); errmsg = init_mmc_for_env(mmc); -- 1.9.1

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[U-Boot] [RFC PATCH v3 00/16] GPT over MTD
by Patrick Delaunay 07 Apr '17

07 Apr '17

I have a request to support GPT over MTD to be able to have dynamic MTD informations without U-Boot environment(CONFIG_ENV_IS_NOWHERE is a other requirement of my project). The idea is to use the GPT header to save partitioning information directly in flash device (NOR or NAND), then the MTD variables are rebuild from these GPT partitions and can be used by DISTRO to search bootable binary. I make a first prototyping for this request but I want ask you if this feature is acceptable for U-Boot and if this patches, after some update and cleanups, would be merged in U-Boot mainline. Do you see already some blocking points ? - added code is under a new CONFIG : CONFIG_EFI_PARTITION_MTD - for implementation details, see doc/README.gpt.mtd TODO: - full support for modified command today I limit the support for the command used by DISTRO macro: + gpt write + part list - DISTRO macro update for automatic boot on GPT bootable partition found in MTD devices the current level is tested manually on sandbox with : > make O=sandbox sandbox_defconfig > make O=sandbox > dd if=/dev/zero of=spi.bin bs=1M count=4 > sandbox/u-boot -d sandbox/arch/sandbox/dts/test.dtb => sf probe SF: Detected M25P16 with page size 256 Bytes, erase size 64 KiB, total 2 MiB => setenv nor_part "name=part1,size=64KiB;name=part2,size=128KiB;\ name=boot,type=linux,bootable,size=512KiB" => gpt write nor 0 $nor_part Writing GPT: success! => part list nor 0 Part Start LBA End LBA Name Attributes Type GUID Partition GUID 1 0x00000080 0x000000ff "part1" attrs: 0x0000000000000000 type: ebd0a0a2-b9e5-4433-87c0-68b6b72699c7 type: data guid: d117f98e-6f2c-0040-00b2-331a19f91cb2 2 0x00000100 0x000001ff "part2" attrs: 0x0000000000000000 type: ebd0a0a2-b9e5-4433-87c0-68b6b72699c7 type: data guid: 25718777-d0ad-0000-8060-02cb591c9737 3 0x00000200 0x000005ff "boot" attrs: 0x0000000000000004 type: 0fc63daf-8483-4772-8e79-3d69d8477de4 type: linux guid: 8a4bb8b4-e304-0040-0036-aff5c9c495b1 => setenv mtdids "nor0=nor0" => setenv mtdparts "mtdparts=" => mtdparts gpt nor0 => mtdparts device nor0 <nor0>, # parts = 3 #: name size offset mask_flags 0: part1 0x00010000 0x00010000 0 1: part2 0x00020000 0x00020000 0 2: boot 0x00080000 0x00040000 0 active partition: nor0,0 - (part1) 0x00010000 @ 0x00010000 defaults: mtdids : none mtdparts: none => part list nor 0 -bootable nor_boot_part => printenv nor_boot_part nor_boot_part=3 test filtering feature (can be used to mask some partitions to linux according the GUID) 1/ only add MTD for some guid = linux 2/ then add MTD for some guid = data => mtdparts delall => setenv mtdparts "mtdparts=" => setenv mtdids "nor0=nor0" => mtdparts gpt nor0 linux => mtdparts device nor0 <nor0>, # parts = 1 #: name size offset mask_flags 0: boot 0x00080000 0x00040000 0 active partition: nor0,0 - (boot) 0x00080000 @ 0x00040000 defaults: mtdids : none mtdparts: none => mtdparts gpt nor0 data => mtdparts device nor0 <nor0>, # parts = 3 #: name size offset mask_flags 0: part1 0x00010000 0x00010000 0 1: part2 0x00020000 0x00020000 0 2: boot 0x00080000 0x00040000 0 active partition: nor0,2 - (boot) 0x00080000 @ 0x00040000 defaults: mtdids : none mtdparts: none Changes in v3: - solve issue in compute partition_entry_lba update : missing / lba_size - rework and split patches for unrelated change after review from Cristophe Kerello and Simon Glass - rebase on v2017.03-rc1 Changes in v2: - split serie to reduce patches size (separate disk part and cmd impact and add precursor patch) - split large function Patrick Delaunay (16): uuid: add a function for GUID string parsing disk: part: refactor part_print_efi to prepare GPT over MTD disk: part: refactor part_get_info_efi to prepare GPT over MTD disk: part: prepare_backup_gpt_header rework disk: part: compute partition_entry_lba disk: part: efi: export internal function disk: part: add support of GPT partitioning over MTD cmd: gpt: remove blk_desc parameter in static function cmd: gpt: use error number in set_gpt_info cmd: gpt: add print_gpt_info_err cmd: gpt: update write command to support GPT over MTD cmd: part: update command to support GPT over MTD cmd: mtdparts: move PART_ADD_DESC_MAXLEN cmd: mtdparts: update command to support GPT over MTD uuid: remove dependency with io.h sandbox: GPT over MTD test cmd/gpt.c | 128 +++++++++---- cmd/mtdparts.c | 144 ++++++++++++++- cmd/part.c | 48 ++++- configs/sandbox_defconfig | 3 + disk/Kconfig | 17 ++ disk/Makefile | 1 + disk/part_efi.c | 140 +++++++------- disk/part_efi_int.h | 36 ++++ disk/part_efi_mtd.c | 457 ++++++++++++++++++++++++++++++++++++++++++++++ doc/README.gpt.mtd | 189 +++++++++++++++++++ include/configs/sandbox.h | 6 + include/part.h | 13 +- include/uuid.h | 1 + lib/uuid.c | 48 ++++- 14 files changed, 1108 insertions(+), 123 deletions(-) create mode 100644 disk/part_efi_int.h create mode 100644 disk/part_efi_mtd.c create mode 100644 doc/README.gpt.mtd -- 1.9.1

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[U-Boot] [PATCH] defconfig: am43xx_hs_evm: Sync HS defconfig with non-HS defconfig
by Andrew F. Davis 07 Apr '17

07 Apr '17

The non-HS defconfig has been modified without equivalent changes being applied to the HS defconfig. Sync these here. Signed-off-by: Andrew F. Davis <afd(a)ti.com> --- configs/am43xx_hs_evm_defconfig | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index 8bb1b3535a..05365ee61a 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -10,12 +10,15 @@ CONFIG_FIT=y CONFIG_FIT_IMAGE_POST_PROCESS=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1, NAND" +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,NAND" CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_STACK_R=y +CONFIG_SPL_ETH_SUPPORT=y CONFIG_SPL_MTD_SUPPORT=y +CONFIG_SPL_NET_SUPPORT=y +CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set @@ -41,6 +44,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ISO_PARTITION=y CONFIG_OF_CONTROL=y +CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm" CONFIG_DM=y # CONFIG_BLK is not set CONFIG_DFU_MMC=y @@ -53,8 +57,8 @@ CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_DM_ETH=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_DM_SPI=y -- 2.11.0

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[U-Boot] [PATCH v2] sun8i_emac: configure PHY reset GPIO via DM
by Philipp Tomsich 07 Apr '17

07 Apr '17

This ports the logic for having a GPIO as a reset-output for the mdio_reset function over from designware.c to the (closely related) sun8i_emac driver. Changes in v2: * use the "snps,"-namespace, as the same node binds to the stmmac (i.e. designware) driver on Linux and the Linux DTS is leading Philipp Tomsich (1): sun8i_emac: configure PHY reset GPIO via DM drivers/net/sun8i_emac.c | 86 ++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 80 insertions(+), 6 deletions(-) -- 1.9.1

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[U-Boot] [PATCH v4 00/17] arm: rpi: Enable USB, Ethernet, MMC, Video driver model on Raspberry Pi
by Simon Glass 06 Apr '17

06 Apr '17

Raspberry Pi uses a DWC2 USB controller and a SMSC USB Ethernet adaptor. Driver model support for these is available. This series does the following: - Enable CONFIG_DM_ETH and CONFIG_DM_USB on Raspberry Pi - Convert the MMC driver to driver model - Convert the video driver to driver model - Fixes a driver model video bug which accessed beyond the frame buffer - Fixes start-up of MMC with driver model (e.g. at present it does not support env_fat) - Clean up a few loose ends With Ethernet active the device list looks something like this: U-Boot> dm tree Class Probed Name ---------------------------------------- root [ + ] root_driver simple_bus [ + ] |-- soc gpio [ + ] | |-- gpio@7e200000 serial [ + ] | |-- serial@7e215040 mmc [ + ] | |-- sdhci@7e300000 blk [ + ] | | `-- sdhci(a)7e300000.blk video [ + ] | |-- hdmi@7e902000 vidconsole0 [ + ] | | `-- hdmi(a)7e902000.vidconsole0 usb [ + ] | `-- usb@7e980000 usb_hub [ + ] | `-- usb_hub usb_hub [ + ] | `-- usb_hub eth [ + ] | `-- smsc95xx_eth simple_bus [ ] `-- clocks Changes in v4: - Add patches to convert video and MMC to driver model also - Rebase to master Changes in v3: - Drop applied patches from series - Drop patch to introduce usbethaddr for driver model Simon Glass (17): dm: mmc: Set up the MMC device when controller is probed dm: video: Correct line clearing code string: Use memcpy() within memmove() when we can arm: rpi: Drop the GPIO device addresses arm: rpi: Drop CONFIG_CONS_INDEX dm: arm: rpi: Move to driver model for USB dm: arm: rpi: Use driver model for Ethernet arm: rpi: Add a file to handle messages arm: rpi: Add a function to obtain the MMC clock dm: mmc: rpi: Convert Raspberry Pi to driver model for MMC dm: arm: rpi: Drop CONFIG_OF_EMBED video: arm: rpi: Move the video query out of the driver video: arm: rpi: Move the video settings out of the driver dm: video: Refactor lcd_simplefb to prepare for driver model dm: video: Add driver-model support to lcd_simplefb dm: video: arm: rpi: Convert to use driver model for video arm: rpi: Add a TODO to move all messages into the msg handler arch/arm/mach-bcm283x/Makefile | 2 +- arch/arm/mach-bcm283x/include/mach/gpio.h | 5 - arch/arm/mach-bcm283x/include/mach/msg.h | 51 ++++++++++ arch/arm/mach-bcm283x/msg.c | 154 ++++++++++++++++++++++++++++++ board/raspberrypi/rpi/rpi.c | 62 +----------- common/lcd_simplefb.c | 47 +++++++-- configs/rpi_2_defconfig | 6 +- configs/rpi_3_32b_defconfig | 6 +- configs/rpi_3_defconfig | 6 +- configs/rpi_defconfig | 6 +- drivers/mmc/bcm2835_sdhci.c | 81 ++++++++++++---- drivers/mmc/mmc-uclass.c | 12 +++ drivers/video/bcm2835.c | 140 +++++++-------------------- drivers/video/console_normal.c | 3 +- include/configs/rpi.h | 17 +--- lib/string.c | 11 +-- 16 files changed, 382 insertions(+), 227 deletions(-) create mode 100644 arch/arm/mach-bcm283x/include/mach/msg.h create mode 100644 arch/arm/mach-bcm283x/msg.c -- 2.11.0.483.g087da7b7c-goog

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[U-Boot] [PATCH v3 1/2] mx6sabresd: Make SPL DDR configuration to match the DCD table
by Fabio Estevam 05 Apr '17

05 Apr '17

From: Fabio Estevam <fabio.estevam(a)nxp.com> When using SPL on i.mx6 we frequently notice some DDR initialization mismatches between the SPL code and the non-SPL code. This causes stability issues like the ones reported at 7dbda25ecd6d7c ("mx6ul_14x14_evk: Pass refsel and refr fields to avoid hang") and also: http://lists.denx.de/pipermail/u-boot/2016-September/266355.html . As the non-SPL code have been tested for long time and proves to be reliable, let's configure the DDR in the exact same way as the non-SPL case. The idea is simple: just use the DCD table and write directly to the DDR registers. Retrieved the DCD tables from: board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg and board/freescale/mx6sabresd/mx6qp.cfg (NXP U-Boot branch imx_v2015.04_4.1.15_1.0.0_ga) This method makes it easier for people converting from non-SPL to SPL code. Other benefit is that the SPL binary size is reduced from 44 kB to 39.9 kB. Signed-off-by: Fabio Estevam <fabio.estevam(a)nxp.com> --- Changes since v1: - Use the correct mx6qp dcd table - Create ddr_init() to write the DCD values - Specify where the DCD tables come from board/freescale/mx6sabresd/mx6sabresd.c | 351 ++++++++++++++++++-------------- 1 file changed, 197 insertions(+), 154 deletions(-) diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index f836ecb..3c36395 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -682,125 +682,6 @@ int checkboard(void) #include <spl.h> #include <libfdt.h> -const struct mx6dq_iomux_ddr_regs mx6_ddr_ioregs = { - .dram_sdclk_0 = 0x00020030, - .dram_sdclk_1 = 0x00020030, - .dram_cas = 0x00020030, - .dram_ras = 0x00020030, - .dram_reset = 0x00020030, - .dram_sdcke0 = 0x00003000, - .dram_sdcke1 = 0x00003000, - .dram_sdba2 = 0x00000000, - .dram_sdodt0 = 0x00003030, - .dram_sdodt1 = 0x00003030, - .dram_sdqs0 = 0x00000030, - .dram_sdqs1 = 0x00000030, - .dram_sdqs2 = 0x00000030, - .dram_sdqs3 = 0x00000030, - .dram_sdqs4 = 0x00000030, - .dram_sdqs5 = 0x00000030, - .dram_sdqs6 = 0x00000030, - .dram_sdqs7 = 0x00000030, - .dram_dqm0 = 0x00020030, - .dram_dqm1 = 0x00020030, - .dram_dqm2 = 0x00020030, - .dram_dqm3 = 0x00020030, - .dram_dqm4 = 0x00020030, - .dram_dqm5 = 0x00020030, - .dram_dqm6 = 0x00020030, - .dram_dqm7 = 0x00020030, -}; - -const struct mx6dq_iomux_ddr_regs mx6dqp_ddr_ioregs = { - .dram_sdclk_0 = 0x00000030, - .dram_sdclk_1 = 0x00000030, - .dram_cas = 0x00000030, - .dram_ras = 0x00000030, - .dram_reset = 0x00000030, - .dram_sdcke0 = 0x00003000, - .dram_sdcke1 = 0x00003000, - .dram_sdba2 = 0x00000000, - .dram_sdodt0 = 0x00003030, - .dram_sdodt1 = 0x00003030, - .dram_sdqs0 = 0x00000030, - .dram_sdqs1 = 0x00000030, - .dram_sdqs2 = 0x00000030, - .dram_sdqs3 = 0x00000030, - .dram_sdqs4 = 0x00000030, - .dram_sdqs5 = 0x00000030, - .dram_sdqs6 = 0x00000030, - .dram_sdqs7 = 0x00000030, - .dram_dqm0 = 0x00000030, - .dram_dqm1 = 0x00000030, - .dram_dqm2 = 0x00000030, - .dram_dqm3 = 0x00000030, - .dram_dqm4 = 0x00000030, - .dram_dqm5 = 0x00000030, - .dram_dqm6 = 0x00000030, - .dram_dqm7 = 0x00000030, -}; - -const struct mx6dq_iomux_grp_regs mx6_grp_ioregs = { - .grp_ddr_type = 0x000C0000, - .grp_ddrmode_ctl = 0x00020000, - .grp_ddrpke = 0x00000000, - .grp_addds = 0x00000030, - .grp_ctlds = 0x00000030, - .grp_ddrmode = 0x00020000, - .grp_b0ds = 0x00000030, - .grp_b1ds = 0x00000030, - .grp_b2ds = 0x00000030, - .grp_b3ds = 0x00000030, - .grp_b4ds = 0x00000030, - .grp_b5ds = 0x00000030, - .grp_b6ds = 0x00000030, - .grp_b7ds = 0x00000030, -}; - -const struct mx6_mmdc_calibration mx6_mmcd_calib = { - .p0_mpwldectrl0 = 0x001F001F, - .p0_mpwldectrl1 = 0x001F001F, - .p1_mpwldectrl0 = 0x00440044, - .p1_mpwldectrl1 = 0x00440044, - .p0_mpdgctrl0 = 0x434B0350, - .p0_mpdgctrl1 = 0x034C0359, - .p1_mpdgctrl0 = 0x434B0350, - .p1_mpdgctrl1 = 0x03650348, - .p0_mprddlctl = 0x4436383B, - .p1_mprddlctl = 0x39393341, - .p0_mpwrdlctl = 0x35373933, - .p1_mpwrdlctl = 0x48254A36, -}; - -const struct mx6_mmdc_calibration mx6dqp_mmcd_calib = { - .p0_mpwldectrl0 = 0x001B001E, - .p0_mpwldectrl1 = 0x002E0029, - .p1_mpwldectrl0 = 0x001B002A, - .p1_mpwldectrl1 = 0x0019002C, - .p0_mpdgctrl0 = 0x43240334, - .p0_mpdgctrl1 = 0x0324031A, - .p1_mpdgctrl0 = 0x43340344, - .p1_mpdgctrl1 = 0x03280276, - .p0_mprddlctl = 0x44383A3E, - .p1_mprddlctl = 0x3C3C3846, - .p0_mpwrdlctl = 0x2E303230, - .p1_mpwrdlctl = 0x38283E34, -}; - -/* MT41K128M16JT-125 */ -static struct mx6_ddr3_cfg mem_ddr = { - .mem_speed = 1600, - .density = 2, - .width = 16, - .banks = 8, - .rowaddr = 14, - .coladdr = 10, - .pagesz = 2, - .trcd = 1375, - .trcmin = 4875, - .trasmin = 3500, -}; - static void ccgr_init(void) { struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; @@ -831,44 +712,209 @@ static void gpr_init(void) } } -/* - * This section requires the differentiation between iMX6 Sabre boards, but - * for now, it will configure only for the mx6q variant. - */ -static void spl_dram_init(void) +static int mx6q_dcd_table[] = { + 0x020e0798, 0x000C0000, + 0x020e0758, 0x00000000, + 0x020e0588, 0x00000030, + 0x020e0594, 0x00000030, + 0x020e056c, 0x00000030, + 0x020e0578, 0x00000030, + 0x020e074c, 0x00000030, + 0x020e057c, 0x00000030, + 0x020e058c, 0x00000000, + 0x020e059c, 0x00000030, + 0x020e05a0, 0x00000030, + 0x020e078c, 0x00000030, + 0x020e0750, 0x00020000, + 0x020e05a8, 0x00000030, + 0x020e05b0, 0x00000030, + 0x020e0524, 0x00000030, + 0x020e051c, 0x00000030, + 0x020e0518, 0x00000030, + 0x020e050c, 0x00000030, + 0x020e05b8, 0x00000030, + 0x020e05c0, 0x00000030, + 0x020e0774, 0x00020000, + 0x020e0784, 0x00000030, + 0x020e0788, 0x00000030, + 0x020e0794, 0x00000030, + 0x020e079c, 0x00000030, + 0x020e07a0, 0x00000030, + 0x020e07a4, 0x00000030, + 0x020e07a8, 0x00000030, + 0x020e0748, 0x00000030, + 0x020e05ac, 0x00000030, + 0x020e05b4, 0x00000030, + 0x020e0528, 0x00000030, + 0x020e0520, 0x00000030, + 0x020e0514, 0x00000030, + 0x020e0510, 0x00000030, + 0x020e05bc, 0x00000030, + 0x020e05c4, 0x00000030, + 0x021b0800, 0xa1390003, + 0x021b080c, 0x001F001F, + 0x021b0810, 0x001F001F, + 0x021b480c, 0x001F001F, + 0x021b4810, 0x001F001F, + 0x021b083c, 0x43270338, + 0x021b0840, 0x03200314, + 0x021b483c, 0x431A032F, + 0x021b4840, 0x03200263, + 0x021b0848, 0x4B434748, + 0x021b4848, 0x4445404C, + 0x021b0850, 0x38444542, + 0x021b4850, 0x4935493A, + 0x021b081c, 0x33333333, + 0x021b0820, 0x33333333, + 0x021b0824, 0x33333333, + 0x021b0828, 0x33333333, + 0x021b481c, 0x33333333, + 0x021b4820, 0x33333333, + 0x021b4824, 0x33333333, + 0x021b4828, 0x33333333, + 0x021b08b8, 0x00000800, + 0x021b48b8, 0x00000800, + 0x021b0004, 0x00020036, + 0x021b0008, 0x09444040, + 0x021b000c, 0x555A7975, + 0x021b0010, 0xFF538F64, + 0x021b0014, 0x01FF00DB, + 0x021b0018, 0x00001740, + 0x021b001c, 0x00008000, + 0x021b002c, 0x000026d2, + 0x021b0030, 0x005A1023, + 0x021b0040, 0x00000027, + 0x021b0000, 0x831A0000, + 0x021b001c, 0x04088032, + 0x021b001c, 0x00008033, + 0x021b001c, 0x00048031, + 0x021b001c, 0x09408030, + 0x021b001c, 0x04008040, + 0x021b0020, 0x00005800, + 0x021b0818, 0x00011117, + 0x021b4818, 0x00011117, + 0x021b0004, 0x00025576, + 0x021b0404, 0x00011006, + 0x021b001c, 0x00000000, +}; + +static int mx6qp_dcd_table[] = { + 0x020e0798, 0x000c0000, + 0x020e0758, 0x00000000, + 0x020e0588, 0x00000030, + 0x020e0594, 0x00000030, + 0x020e056c, 0x00000030, + 0x020e0578, 0x00000030, + 0x020e074c, 0x00000030, + 0x020e057c, 0x00000030, + 0x020e058c, 0x00000000, + 0x020e059c, 0x00000030, + 0x020e05a0, 0x00000030, + 0x020e078c, 0x00000030, + 0x020e0750, 0x00020000, + 0x020e05a8, 0x00000030, + 0x020e05b0, 0x00000030, + 0x020e0524, 0x00000030, + 0x020e051c, 0x00000030, + 0x020e0518, 0x00000030, + 0x020e050c, 0x00000030, + 0x020e05b8, 0x00000030, + 0x020e05c0, 0x00000030, + 0x020e0774, 0x00020000, + 0x020e0784, 0x00000030, + 0x020e0788, 0x00000030, + 0x020e0794, 0x00000030, + 0x020e079c, 0x00000030, + 0x020e07a0, 0x00000030, + 0x020e07a4, 0x00000030, + 0x020e07a8, 0x00000030, + 0x020e0748, 0x00000030, + 0x020e05ac, 0x00000030, + 0x020e05b4, 0x00000030, + 0x020e0528, 0x00000030, + 0x020e0520, 0x00000030, + 0x020e0514, 0x00000030, + 0x020e0510, 0x00000030, + 0x020e05bc, 0x00000030, + 0x020e05c4, 0x00000030, + 0x021b0800, 0xa1390003, + 0x021b080c, 0x001b001e, + 0x021b0810, 0x002e0029, + 0x021b480c, 0x001b002a, + 0x021b4810, 0x0019002c, + 0x021b083c, 0x43240334, + 0x021b0840, 0x0324031a, + 0x021b483c, 0x43340344, + 0x021b4840, 0x03280276, + 0x021b0848, 0x44383A3E, + 0x021b4848, 0x3C3C3846, + 0x021b0850, 0x2e303230, + 0x021b4850, 0x38283E34, + 0x021b081c, 0x33333333, + 0x021b0820, 0x33333333, + 0x021b0824, 0x33333333, + 0x021b0828, 0x33333333, + 0x021b481c, 0x33333333, + 0x021b4820, 0x33333333, + 0x021b4824, 0x33333333, + 0x021b4828, 0x33333333, + 0x021b08c0, 0x24912249, + 0x021b48c0, 0x24914289, + 0x021b08b8, 0x00000800, + 0x021b48b8, 0x00000800, + 0x021b0004, 0x00020036, + 0x021b0008, 0x24444040, + 0x021b000c, 0x555A7955, + 0x021b0010, 0xFF320F64, + 0x021b0014, 0x01ff00db, + 0x021b0018, 0x00001740, + 0x021b001c, 0x00008000, + 0x021b002c, 0x000026d2, + 0x021b0030, 0x005A1023, + 0x021b0040, 0x00000027, + 0x021b0400, 0x14420000, + 0x021b0000, 0x831A0000, + 0x021b0890, 0x00400C58, + 0x00bb0008, 0x00000000, + 0x00bb000c, 0x2891E41A, + 0x00bb0038, 0x00000564, + 0x00bb0014, 0x00000040, + 0x00bb0028, 0x00000020, + 0x00bb002c, 0x00000020, + 0x021b001c, 0x04088032, + 0x021b001c, 0x00008033, + 0x021b001c, 0x00048031, + 0x021b001c, 0x09408030, + 0x021b001c, 0x04008040, + 0x021b0020, 0x00005800, + 0x021b0818, 0x00011117, + 0x021b4818, 0x00011117, + 0x021b0004, 0x00025576, + 0x021b0404, 0x00011006, + 0x021b001c, 0x00000000, +}; + +static void ddr_init(int *table, int size) { - struct mx6_ddr_sysinfo sysinfo = { - /* width of data bus:0=16,1=32,2=64 */ - .dsize = 2, - /* config for full 4GB range so that get_mem_size() works */ - .cs_density = 32, /* 32Gb per CS */ - /* single chip select */ - .ncs = 1, - .cs1_mirror = 0, - .rtt_wr = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Wr = RZQ/4 */ - .rtt_nom = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Nom = RZQ/4 */ - .walat = 1, /* Write additional latency */ - .ralat = 5, /* Read additional latency */ - .mif3_mode = 3, /* Command prediction working mode */ - .bi_on = 1, /* Bank interleaving enabled */ - .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ - .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */ - .ddr_type = DDR_TYPE_DDR3, - .refsel = 1, /* Refresh cycles at 32KHz */ - .refr = 7, /* 8 refresh commands per refresh cycle */ - }; + int i; - if (is_mx6dqp()) { - mx6dq_dram_iocfg(64, &mx6dqp_ddr_ioregs, &mx6_grp_ioregs); - mx6_dram_cfg(&sysinfo, &mx6dqp_mmcd_calib, &mem_ddr); - } else { - mx6dq_dram_iocfg(64, &mx6_ddr_ioregs, &mx6_grp_ioregs); - mx6_dram_cfg(&sysinfo, &mx6_mmcd_calib, &mem_ddr); - } + for (i = 0; i < size / 2 ; i++) + writel(table[2 * i + 1], table[2 * i]); +} + +static void spl_dram_init(void) +{ + if (is_mx6dq()) + ddr_init(mx6q_dcd_table, ARRAY_SIZE(mx6q_dcd_table)); + else if (is_mx6dqp()) + ddr_init(mx6qp_dcd_table, ARRAY_SIZE(mx6qp_dcd_table)); } void board_init_f(ulong dummy) { + /* DDR initialization */ + spl_dram_init(); + /* setup AIPS and disable watchdog */ arch_cpu_init(); @@ -884,9 +930,6 @@ void board_init_f(ulong dummy) /* UART clocks enabled and gd valid - init serial console */ preloader_console_init(); - /* DDR initialization */ - spl_dram_init(); - /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); -- 2.7.4

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[U-Boot] unused-const-variable warnings in FSL DDR driver
by Thomas Schaefer 04 Apr '17

04 Apr '17

Hi York, When compiling latest u-boot with gcc 6.3 compiler, I get several 'unused-const-variable' warnings in options.c file of FSL DDR driver. Affected variables are for (DIMM_SLOTS_PER_CTLR==2) configuration (e.g. dual_0S[4]) and warnings could be fixed with the patch applied. What do you think? Best regards, Thomas

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[U-Boot] [PATCH 00/10] sunxi: Add basic PSCI support to enable SMP on the A80's first cluster
by Chen-Yu Tsai 03 Apr '17

03 Apr '17

Hi everyone, This series adds basic PSCI support for the A80 to enable SMP on the first cluster. This at least allows people to use more than one core. The term "basic" is used because the series does not add support for multi-cluster cache and power management. The PSCI code is based on existing code for all the single cluster SoCs, and the kernel patches for MCPM SMP I did some time ago. Unfortunately only SMP works at this time. The last patch does not actually work. While the system is indeed booted non-secure, tested by trying to write to secure SRAM and the results not sticking, reads from the GIC CPU interface shows that it's still returning the secure copy of registers, and since we use a secure monitor FIQ to do core power down, the FIQ gets passed to the kernel. The patch is included so people with in-depth ARM knowledge could probably help work out what is wrong. Regards ChenYu Chen-Yu Tsai (10): ARM: PSCI: Set ARMV7_PSCI_NR_CPUS default to 8 for sun9i/A80 sunxi: Add CCI-400 and CPUCFG registers base address for sun9i/A80 sunxi: Add base address of secure SRAM B for sun9i/A80 sunxi: Use secure SRAM B for secure RAM for sun9i/A80 sunxi: Add PRCM register definition for sun9i/A80 sunxi: Add CPUCFG register definitions for sun9i/A80 sunxi: Add support for TZPC on sun9i/A80 sunxi: Add basic PSCI implementation for A80 sunxi: Enable PSCI on sun9i/A80 sunxi: Add PSCI core power off support for A80's first cluster arch/arm/cpu/armv7/Kconfig | 1 + arch/arm/cpu/armv7/sunxi/Makefile | 5 + arch/arm/cpu/armv7/sunxi/psci-mcpm.c | 322 +++++++++++++++++++++++++ arch/arm/cpu/armv7/sunxi/tzpc.c | 6 + arch/arm/include/asm/arch-sunxi/cpu_sun9i.h | 5 + arch/arm/include/asm/arch-sunxi/cpucfg_sun9i.h | 51 ++++ arch/arm/include/asm/arch-sunxi/prcm_sun9i.h | 55 +++++ arch/arm/include/asm/arch-sunxi/tzpc.h | 4 + arch/arm/mach-sunxi/board.c | 3 +- board/sunxi/Kconfig | 4 + include/configs/sun9i.h | 4 + 11 files changed, 459 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv7/sunxi/psci-mcpm.c create mode 100644 arch/arm/include/asm/arch-sunxi/cpucfg_sun9i.h create mode 100644 arch/arm/include/asm/arch-sunxi/prcm_sun9i.h -- 2.10.2

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[U-Boot] [PATCH] ARM: dts: uniphier: move aliases node up to make fdtgrep happy
by Masahiro Yamada 03 Apr '17

03 Apr '17

Currently, fdtgrep would not accept uniphier-ph1-ld20-ref.dtb and uniphier-ph1-ld11-ref.dtb unless the aliases node comes the first in the root node. $ make -s uniphier_pxs2_ld6b_defconfig $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-ld20-ref [snip] LDS spl/u-boot-spl.lds LD spl/u-boot-spl OBJCOPY spl/u-boot-spl-nodtb.bin FDTGREP spl/u-boot-spl.dtb Error at 'fdt_find_regions': FDT_ERR_BADLAYOUT /aliases node must come before all other nodes Error: FDT_ERR_BADMAGIC make[1]: *** [spl/u-boot-spl.dtb] Error 1 make: *** [spl/u-boot-spl] Error 2 This commit moves the aliases node as the error message from the fdtgrep tool suggests, although this requirement does not sound reasonable to me. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- Simon, I'd like to avoid this patch if possible. Not figured out the root cause of the problem yet? arch/arm/dts/uniphier-ph1-ld11-ref.dts | 18 +++++++++--------- arch/arm/dts/uniphier-ph1-ld20-ref.dts | 18 +++++++++--------- 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/arm/dts/uniphier-ph1-ld11-ref.dts b/arch/arm/dts/uniphier-ph1-ld11-ref.dts index a624a49..88e7f53 100644 --- a/arch/arm/dts/uniphier-ph1-ld11-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld11-ref.dts @@ -14,15 +14,6 @@ model = "UniPhier PH1-LD11 Reference Board"; compatible = "socionext,ph1-ld11-ref", "socionext,ph1-ld11"; - memory { - device_type = "memory"; - reg = <0 0x80000000 0 0x40000000>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - aliases { serial0 = &serial0; serial1 = &serial1; @@ -35,6 +26,15 @@ i2c4 = &i2c4; i2c5 = &i2c5; }; + + memory { + device_type = "memory"; + reg = <0 0x80000000 0 0x40000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; }; &ethsc { diff --git a/arch/arm/dts/uniphier-ph1-ld20-ref.dts b/arch/arm/dts/uniphier-ph1-ld20-ref.dts index 108adeb..a55d90c 100644 --- a/arch/arm/dts/uniphier-ph1-ld20-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld20-ref.dts @@ -14,15 +14,6 @@ model = "UniPhier PH1-LD20 Reference Board"; compatible = "socionext,ph1-ld20-ref", "socionext,ph1-ld20"; - memory { - device_type = "memory"; - reg = <0 0x80000000 0 0xc0000000>; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - aliases { serial0 = &serial0; serial1 = &serial1; @@ -35,6 +26,15 @@ i2c4 = &i2c4; i2c5 = &i2c5; }; + + memory { + device_type = "memory"; + reg = <0 0x80000000 0 0xc0000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; }; &ethsc { -- 1.9.1

2 4