February 2017 - U-Boot

[U-Boot] [PATCH 5/5][v8] arch: powerpc: update the eLBC IP input clock
by Prabhakar Kushwaha 02 Feb '17

02 Feb '17

eLBC IP clock is always a constant divisor of platform clock pre-defined per SoC. Clock ratio register (LCRR) used in current implementation governs eLBC IP output cloc. Update sys_info->freq_localbus to represent eLBC input clock with value constant divisor of platform clock. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> --- Changes for v5: Added first time in patch Changes for v6: Updated subject description Changes for v7: Fix compilation warning and updated Kconfig eLBC comparision Changes for v8: Sending as it is README | 3 +++ arch/powerpc/cpu/mpc85xx/Kconfig | 18 ++++++++++++++++++ arch/powerpc/cpu/mpc85xx/speed.c | 28 ++-------------------------- arch/powerpc/cpu/mpc86xx/speed.c | 15 +-------------- 4 files changed, 24 insertions(+), 40 deletions(-) diff --git a/README b/README index 9fda381..b27e757 100644 --- a/README +++ b/README @@ -507,6 +507,9 @@ The following options need to be configured: CONFIG_SYS_FSL_IFC_CLK_DIV Defines divider of platform clock(clock input to IFC controller). + CONFIG_SYS_FSL_LBC_CLK_DIV + Defines divider of platform clock(clock input to eLBC controller). + CONFIG_SYS_FSL_PBL_PBI It enables addition of RCW (Power on reset configuration) in built image. Please refer doc/README.pblimage for more details diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index c06a4db..592b581 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1337,6 +1337,24 @@ config SYS_FSL_IFC_CLK_DIV Defines divider of platform clock(clock input to IFC controller). +config SYS_FSL_LBC_CLK_DIV + int "Divider of platform clock" + depends on FSL_ELBC || ARCH_MPC8540 || \ + ARCH_MPC8548 || ARCH_MPC8541 || \ + ARCH_MPC8555 || ARCH_MPC8560 || \ + ARCH_MPC8568 + + default 2 if ARCH_P2041 || \ + ARCH_P3041 || \ + ARCH_P4080 || \ + ARCH_P5020 || \ + ARCH_P5040 + default 1 + + help + Defines divider of platform clock(clock input to + eLBC controller). + source "board/freescale/b4860qds/Kconfig" source "board/freescale/bsc9131rdb/Kconfig" source "board/freescale/bsc9132qds/Kconfig" diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index adba092..cb8281e 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -607,32 +607,8 @@ void get_sys_info(sys_info_t *sys_info) #endif /* CONFIG_FSL_CORENET */ #if defined(CONFIG_FSL_LBC) - uint lcrr_div; -#if defined(CONFIG_SYS_LBC_LCRR) - /* We will program LCRR to this value later */ - lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV; -#else - lcrr_div = in_be32(&(LBC_BASE_ADDR)->lcrr) & LCRR_CLKDIV; -#endif - if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) { -#if defined(CONFIG_FSL_CORENET) - /* If this is corenet based SoC, bit-representation - * for four times the clock divider values. - */ - lcrr_div *= 4; -#elif !defined(CONFIG_ARCH_MPC8540) && !defined(CONFIG_ARCH_MPC8541) && \ - !defined(CONFIG_ARCH_MPC8555) && !defined(CONFIG_ARCH_MPC8560) - /* - * Yes, the entire PQ38 family use the same - * bit-representation for twice the clock divider values. - */ - lcrr_div *= 2; -#endif - sys_info->freq_localbus = sys_info->freq_systembus / lcrr_div; - } else { - /* In case anyone cares what the unknown value is */ - sys_info->freq_localbus = lcrr_div; - } + sys_info->freq_localbus = sys_info->freq_systembus / + CONFIG_SYS_FSL_LBC_CLK_DIV; #endif #if defined(CONFIG_FSL_IFC) diff --git a/arch/powerpc/cpu/mpc86xx/speed.c b/arch/powerpc/cpu/mpc86xx/speed.c index 05f23db..51b47b8 100644 --- a/arch/powerpc/cpu/mpc86xx/speed.c +++ b/arch/powerpc/cpu/mpc86xx/speed.c @@ -24,7 +24,6 @@ void get_sys_info(sys_info_t *sys_info) volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile ccsr_gur_t *gur = &immap->im_gur; uint plat_ratio, e600_ratio; - uint lcrr_div; plat_ratio = (gur->porpllsr) & 0x0000003e; plat_ratio >>= 1; @@ -78,19 +77,7 @@ void get_sys_info(sys_info_t *sys_info) break; } -#if defined(CONFIG_SYS_LBC_LCRR) - /* We will program LCRR to this value later */ - lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV; -#else - lcrr_div = in_be32(&immap->im_lbc.lcrr) & LCRR_CLKDIV; -#endif - if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) { - sys_info->freq_localbus = sys_info->freq_systembus - / (lcrr_div * 2); - } else { - /* In case anyone cares what the unknown value is */ - sys_info->freq_localbus = lcrr_div; - } + sys_info->freq_localbus = sys_info->freq_systembus; } -- 2.7.4

1 0

[U-Boot] [PATCH 4/5][v8] arch: powerpc: Move CONFIG_FSL_ELBC to Kconfig
by Prabhakar Kushwaha 02 Feb '17

02 Feb '17

Enable ELBC from Kconfig. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> --- Changes for v5: Added first time in the patch set Changes for v6: Sending as it is Changes for v7: Fix compiliation error Changes for v8: Fix compiliation for ids8313 arch/powerpc/cpu/mpc85xx/Kconfig | 20 ++++++++++++++++++++ include/configs/MPC8536DS.h | 1 - include/configs/MPC8569MDS.h | 2 -- include/configs/MPC8572DS.h | 1 - include/configs/P1022DS.h | 1 - include/configs/P1023RDB.h | 1 - include/configs/P2041RDB.h | 1 - include/configs/UCP1020.h | 1 - include/configs/controlcenterd.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/cyrus.h | 1 - include/configs/km/kmp204x-common.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/p1_twr.h | 1 - include/configs/xpedite537x.h | 1 - include/configs/xpedite550x.h | 1 - 16 files changed, 20 insertions(+), 16 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 83df733..c06a4db 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -455,6 +455,7 @@ config ARCH_MPC8536 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_MPC8540 bool @@ -478,6 +479,7 @@ config ARCH_MPC8544 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_MPC8548 bool @@ -524,6 +526,7 @@ config ARCH_MPC8569 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 + select FSL_ELBC config ARCH_MPC8572 bool @@ -538,6 +541,7 @@ config ARCH_MPC8572 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1010 bool @@ -572,6 +576,7 @@ config ARCH_P1011 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1020 bool @@ -585,6 +590,7 @@ config ARCH_P1020 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1021 bool @@ -598,6 +604,7 @@ config ARCH_P1021 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1022 bool @@ -613,6 +620,7 @@ config ARCH_P1022 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1023 bool @@ -624,6 +632,7 @@ config ARCH_P1023 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_ELBC config ARCH_P1024 bool @@ -637,6 +646,7 @@ config ARCH_P1024 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P1025 bool @@ -650,6 +660,7 @@ config ARCH_P1025 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P2020 bool @@ -664,6 +675,7 @@ config ARCH_P2020 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_2 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_ELBC config ARCH_P2041 bool @@ -685,6 +697,7 @@ config ARCH_P2041 select SYS_FSL_QORIQ_CHASSIS1 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_ELBC config ARCH_P3041 bool @@ -708,6 +721,7 @@ config ARCH_P3041 select SYS_FSL_QORIQ_CHASSIS1 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_ELBC config ARCH_P4080 bool @@ -742,6 +756,7 @@ config ARCH_P4080 select SYS_FSL_QORIQ_CHASSIS1 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_ELBC config ARCH_P5020 bool @@ -762,6 +777,7 @@ config ARCH_P5020 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_ELBC config ARCH_P5040 bool @@ -782,6 +798,7 @@ config ARCH_P5040 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_ELBC config ARCH_QEMU_E500 bool @@ -1277,6 +1294,9 @@ config SYS_PPC_E500_USE_DEBUG_TLB config FSL_IFC bool +config FSL_ELBC + bool + config SYS_PPC_E500_DEBUG_TLB int "Temporary TLB entry for external debugger" depends on SYS_PPC_E500_USE_DEBUG_TLB diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index bc703ce..2267771 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -37,7 +37,6 @@ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif -#define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCI1 1 /* Enable PCI controller 1 */ #define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 2b0d98b..5cec847 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -10,8 +10,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_FSL_ELBC 1 /* Has Enhance localbus controller */ - #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index b933d21..3d4c8a8 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -28,7 +28,6 @@ /* High Level Configuration Options */ #define CONFIG_MP 1 /* support multiple processors */ -#define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */ #define CONFIG_PCIE1 1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 1 /* PCIE controller 2 (slot 2) */ #define CONFIG_PCIE3 1 /* PCIE controller 3 (ULI bridge) */ diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 89eec12..04b0682 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -96,7 +96,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_PCIE3 /* PCIE controller 3 (ULI bridge) */ diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index 1369035..58a3507 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -25,7 +25,6 @@ /* High Level Configuration Options */ #define CONFIG_MP /* support multiple processors */ -#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index f58fda1..1c3f43c 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -41,7 +41,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index ad1a387..5f34a6d 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -14,7 +14,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_FSL_ELBC #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index b1d67b2..666e8c6 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -137,7 +137,6 @@ /* * Local Bus Definitions */ -#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_SYS_ELBC_BASE 0xe0000000 #ifdef CONFIG_PHYS_64BIT diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 0f48f38..9b0afd7 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -59,7 +59,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index 18a9156..2069346 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -49,7 +49,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 8669fcd..efd3b28 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -35,7 +35,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 5d70878..e376240 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -260,7 +260,6 @@ #define CONFIG_MP -#define CONFIG_FSL_ELBC #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index 52c544c..1ae7cf8 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -40,7 +40,6 @@ #define CONFIG_MP -#define CONFIG_FSL_ELBC #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index 5d78560..2f133d2 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -29,7 +29,6 @@ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ -#define CONFIG_FSL_ELBC 1 /* * Multicore config diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 6346f84..4ac25a6 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -30,7 +30,6 @@ #define CONFIG_PCI_INDIRECT_BRIDGE 1 /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ -#define CONFIG_FSL_ELBC 1 /* * Multicore config -- 2.7.4

1 0

[U-Boot] [PATCH 3/5][v8] arch: arm: update the IFC IP input clock
by Prabhakar Kushwaha 02 Feb '17

02 Feb '17

IFC IP clock is always a constant divisor of platform clock pre-defined per SoC. Clock control register (CCR) used in current implementation governs IFC IP output clock. Update sys_info->freq_localbus to represent IFC input clock with value constant divisor of platform clock. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> --- Changes for v2: Split the patch in 2 patch set Changes for v3: Rebased on top of u-boot commit Changes for v4: Sending as it is Changes for v5: Sending as it is Changes for v6: Subject updated Changes for v7: Sending as it is Changes for v4: Sending as it is arch/arm/cpu/armv7/ls102xa/clock.c | 9 +-------- arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 10 ++-------- arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c | 10 ++-------- 3 files changed, 5 insertions(+), 24 deletions(-) diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c b/arch/arm/cpu/armv7/ls102xa/clock.c index 7a337e1..b7d61ad 100644 --- a/arch/arm/cpu/armv7/ls102xa/clock.c +++ b/arch/arm/cpu/armv7/ls102xa/clock.c @@ -19,10 +19,6 @@ DECLARE_GLOBAL_DATA_PTR; void get_sys_info(struct sys_info *sys_info) { struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); -#ifdef CONFIG_FSL_IFC - struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; - u32 ccr; -#endif struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_LS1_CLK_ADDR); unsigned int cpu; const u8 core_cplx_pll[6] = { @@ -74,10 +70,7 @@ void get_sys_info(struct sys_info *sys_info) } #if defined(CONFIG_FSL_IFC) - ccr = in_be32(&ifc_regs.gregs->ifc_ccr); - ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1; - - sys_info->freq_localbus = sys_info->freq_systembus / ccr; + sys_info->freq_localbus = sys_info->freq_systembus; #endif } diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c index 3da7037..2d7775e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c @@ -22,10 +22,6 @@ DECLARE_GLOBAL_DATA_PTR; void get_sys_info(struct sys_info *sys_info) { struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); -#ifdef CONFIG_FSL_IFC - struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; - u32 ccr; -#endif #if (defined(CONFIG_FSL_ESDHC) &&\ defined(CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK)) ||\ defined(CONFIG_SYS_DPAA_FMAN) @@ -156,10 +152,8 @@ void get_sys_info(struct sys_info *sys_info) #endif #if defined(CONFIG_FSL_IFC) - ccr = ifc_in32(&ifc_regs.gregs->ifc_ccr); - ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1; - - sys_info->freq_localbus = sys_info->freq_systembus / ccr; + sys_info->freq_localbus = sys_info->freq_systembus / + CONFIG_SYS_FSL_IFC_CLK_DIV; #endif } diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c index f8fefc7..ab46431 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c @@ -26,10 +26,6 @@ DECLARE_GLOBAL_DATA_PTR; void get_sys_info(struct sys_info *sys_info) { struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); -#ifdef CONFIG_FSL_IFC - struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; - u32 ccr; -#endif struct ccsr_clk_cluster_group __iomem *clk_grp[2] = { (void *)(CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR), (void *)(CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR) @@ -128,10 +124,8 @@ void get_sys_info(struct sys_info *sys_info) } #if defined(CONFIG_FSL_IFC) - ccr = ifc_in32(&ifc_regs.gregs->ifc_ccr); - ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1; - - sys_info->freq_localbus = sys_info->freq_systembus / ccr; + sys_info->freq_localbus = sys_info->freq_systembus / + CONFIG_SYS_FSL_IFC_CLK_DIV; #endif } -- 2.7.4

1 0

[U-Boot] [PATCH 2/5][v8] arch: powerpc: update the IFC IP input clock
by Prabhakar Kushwaha 02 Feb '17

02 Feb '17

IFC IP clock is always a constant divisor of platform clock pre-defined per SoC. Clock control register (CCR) used in current implementation governs IFC IP output clock. Update sys_info->freq_localbus to represent IFC input clock with value constant divisor of platform clock. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> --- Changes for v2: Split the patch in 2 patch set Changes for v3: Rebased on top of u-boot commit Changes for v4: fix compilation error Changes for v5: Adding FSL_IFC as dependency Changes for v6: Updated subject description Changes for v7: Sending as it is Changes for v8: Sending as it is README | 3 +++ arch/powerpc/cpu/mpc85xx/Kconfig | 16 ++++++++++++++++ arch/powerpc/cpu/mpc85xx/speed.c | 10 ++-------- 3 files changed, 21 insertions(+), 8 deletions(-) diff --git a/README b/README index a95348a..9fda381 100644 --- a/README +++ b/README @@ -504,6 +504,9 @@ The following options need to be configured: CONFIG_SYS_FSL_IFC_LE Defines the IFC controller register space as Little Endian + CONFIG_SYS_FSL_IFC_CLK_DIV + Defines divider of platform clock(clock input to IFC controller). + CONFIG_SYS_FSL_PBL_PBI It enables addition of RCW (Power on reset configuration) in built image. Please refer doc/README.pblimage for more details diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index a3db014..83df733 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1301,6 +1301,22 @@ config SYS_PPC_E500_DEBUG_TLB symbol should be set to the TLB1 entry to be used for this purpose. If unsure, do not change. +config SYS_FSL_IFC_CLK_DIV + int "Divider of platform clock" + depends on FSL_IFC + default 2 if ARCH_B4420 || \ + ARCH_B4860 || \ + ARCH_T1024 || \ + ARCH_T1023 || \ + ARCH_T1040 || \ + ARCH_T1042 || \ + ARCH_T4160 || \ + ARCH_T4240 + default 1 + help + Defines divider of platform clock(clock input to + IFC controller). + source "board/freescale/b4860qds/Kconfig" source "board/freescale/bsc9131rdb/Kconfig" source "board/freescale/bsc9132qds/Kconfig" diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index fcf5d92..adba092 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -27,10 +27,6 @@ DECLARE_GLOBAL_DATA_PTR; void get_sys_info(sys_info_t *sys_info) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); -#ifdef CONFIG_FSL_IFC - struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; - u32 ccr; -#endif #ifdef CONFIG_FSL_CORENET volatile ccsr_clk_t *clk = (void *)(CONFIG_SYS_FSL_CORENET_CLK_ADDR); unsigned int cpu; @@ -640,10 +636,8 @@ void get_sys_info(sys_info_t *sys_info) #endif #if defined(CONFIG_FSL_IFC) - ccr = ifc_in32(&ifc_regs.gregs->ifc_ccr); - ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1; - - sys_info->freq_localbus = sys_info->freq_systembus / ccr; + sys_info->freq_localbus = sys_info->freq_systembus / + CONFIG_SYS_FSL_IFC_CLK_DIV; #endif } -- 2.7.4

1 0

[U-Boot] [PATCH] cmd: move CONFIG_CMD_UNZIP and CONFIG_CMD_ZIP to Kconfig
by Masahiro Yamada 02 Feb '17

02 Feb '17

CONFIG_CMD_ZIP is not defined by any board. I am moving CONFIG_CMD_UNZIP to defconfig files except UniPhier SoC family. I am the maintainer of UniPhier platform, so I know "select CMD_ZIP" is better for this platform. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- README | 6 ------ arch/arm/mach-uniphier/Kconfig | 1 + cmd/Kconfig | 10 ++++++++++ configs/brxre1_defconfig | 1 + configs/dragonboard410c_defconfig | 1 + configs/ethernut5_defconfig | 1 + configs/hikey_defconfig | 1 + configs/icnova-a20-swac_defconfig | 3 ++- configs/vexpress_aemv8a_dram_defconfig | 1 + configs/vexpress_aemv8a_juno_defconfig | 1 + configs/vexpress_aemv8a_semi_defconfig | 1 + configs/xilinx_zynqmp_ep_defconfig | 1 + configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 + configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 + configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 1 + configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 1 + configs/xilinx_zynqmp_zcu102_defconfig | 1 + configs/xilinx_zynqmp_zcu102_revB_defconfig | 1 + include/config_cmd_all.h | 1 - include/configs/brxre1.h | 1 - include/configs/dragonboard410c.h | 1 - include/configs/ethernut5.h | 1 - include/configs/hikey.h | 1 - include/configs/uniphier.h | 4 ---- include/configs/vexpress_aemv8a.h | 1 - include/configs/xilinx_zynqmp.h | 2 -- 26 files changed, 27 insertions(+), 19 deletions(-) diff --git a/README b/README index 9c992c1..89c12b0 100644 --- a/README +++ b/README @@ -1765,12 +1765,6 @@ The following options need to be configured: can be displayed via the splashscreen support or the bmp command. -- Do compressing for memory range: - CONFIG_CMD_ZIP - - If this option is set, it would use zlib deflate method - to compress the specified memory at its best effort. - - Compression support: CONFIG_GZIP diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index cd9ba6b..5739325 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -13,6 +13,7 @@ config ARCH_UNIPHIER_32BIT config ARCH_UNIPHIER_64BIT bool select ARM64 + select CMD_UNZIP select SPL_SEPARATE_BSS if SPL select ARMV8_MULTIENTRY if SPL select ARMV8_SPIN_TABLE if SPL diff --git a/cmd/Kconfig b/cmd/Kconfig index 4a0d489..a5b0315 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -346,6 +346,16 @@ config CMD_MEMINFO help Display memory information. +config CMD_UNZIP + bool "unzip" + help + Uncompress a zip-compressed memory region. + +config CMD_ZIP + bool "zip" + help + Compresses a memory region with zlib deflate method. + endmenu menu "Device access commands" diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index 0b7b082..dfa8712 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_CRC32 is not set +CONFIG_CMD_UNZIP=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index 8f206e2..e94f7b3 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -9,6 +9,7 @@ CONFIG_SYS_PROMPT="dragonboard410c => " # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMINFO=y +CONFIG_CMD_UNZIP=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index c831aab..4d1b4b0 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -8,6 +8,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set CONFIG_CMD_ASKENV=y +CONFIG_CMD_UNZIP=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 8dd330a..b112be2 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -7,6 +7,7 @@ CONFIG_DISTRO_DEFAULTS=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y # CONFIG_CMD_IMLS is not set +CONFIG_CMD_UNZIP=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_GPIO=y diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig index 567eb9b..5ef0e47 100644 --- a/configs/icnova-a20-swac_defconfig +++ b/configs/icnova-a20-swac_defconfig @@ -13,9 +13,10 @@ CONFIG_VIDEO_LCD_POWER="PH22" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,CMD_BMP,CMD_UNZIP" +CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,CMD_BMP" CONFIG_SPL=y # CONFIG_CMD_IMLS is not set +CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_SPL_DOS_PARTITION is not set diff --git a/configs/vexpress_aemv8a_dram_defconfig b/configs/vexpress_aemv8a_dram_defconfig index c899be0..db492af 100644 --- a/configs/vexpress_aemv8a_dram_defconfig +++ b/configs/vexpress_aemv8a_dram_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_PROMPT="VExpress64# " # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set CONFIG_CMD_MEMTEST=y +CONFIG_CMD_UNZIP=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_FPGA is not set diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index 2267362..537301c 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_PROMPT="VExpress64# " # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set CONFIG_CMD_MEMTEST=y +CONFIG_CMD_UNZIP=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_FPGA is not set diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 02740a4..2720a71 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_PROMPT="VExpress64# " # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set CONFIG_CMD_MEMTEST=y +CONFIG_CMD_UNZIP=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_FPGA is not set diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig index 49c0786..6b568b4 100644 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_XIMG is not set # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set +CONFIG_CMD_UNZIP=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set CONFIG_CMD_GPT=y diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index a3585d0..4d7bcf3 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y +CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig index 3693d9b..822b25d 100644 --- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y +CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y CONFIG_CMD_NAND=y diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig index a4c73f8..89813df 100644 --- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y +CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig index f981b21..b8fe33e 100644 --- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y +CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/xilinx_zynqmp_zcu102_defconfig b/configs/xilinx_zynqmp_zcu102_defconfig index 7b65fe0..b13bf5b 100644 --- a/configs/xilinx_zynqmp_zcu102_defconfig +++ b/configs/xilinx_zynqmp_zcu102_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y +CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig index 4bed589..2489d89 100644 --- a/configs/xilinx_zynqmp_zcu102_revB_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="ZynqMP> " # CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y +CONFIG_CMD_UNZIP=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index a0d4e94..a8befe3 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -49,7 +49,6 @@ #define CONFIG_CMD_TERMINAL /* built-in Serial Terminal */ #define CONFIG_CMD_UBIFS /* UBIFS Support */ #define CONFIG_CMD_UNIVERSE /* Tundra Universe Support */ -#define CONFIG_CMD_UNZIP /* unzip from memory to memory */ #define CONFIG_CMD_ZFS /* ZFS Support */ #endif /* _CONFIG_CMD_ALL_H */ diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h index 02094b5..82ee7c6 100644 --- a/include/configs/brxre1.h +++ b/include/configs/brxre1.h @@ -22,7 +22,6 @@ #define CONFIG_VIDEO_BMP_GZIP #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (1366*767*4) -#define CONFIG_CMD_UNZIP #define CONFIG_CMD_BMP #define CONFIG_BMP_24BMP #define CONFIG_BMP_32BPP diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index da1c589..9b7f43f 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -57,7 +57,6 @@ /*#define CONFIG_SUPPORT_EMMC_BOOT */ #define CONFIG_CMD_REGINFO /* Register dump */ #define CONFIG_CMD_TFTP -#define CONFIG_CMD_UNZIP /* Partition table support */ #define HAVE_BLOCK_DEVICE /* Needed for partition commands */ diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index a3c40d6..55d65ef 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -95,7 +95,6 @@ #define CONFIG_CMD_REISER #define CONFIG_CMD_SAVES #define CONFIG_CMD_UBIFS -#define CONFIG_CMD_UNZIP #endif /* NAND flash */ diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 9ec8140..899d62d 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -74,7 +74,6 @@ #define CONFIG_FS_EXT4 /* Command line configuration */ -#define CONFIG_CMD_UNZIP #define CONFIG_CMD_ENV #define CONFIG_MTD_PARTITIONS diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 22962392e..b453d8f 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -15,10 +15,6 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 -#ifdef CONFIG_ARM64 -#define CONFIG_CMD_UNZIP -#endif - /*----------------------------------------------------------------------- * MMU and Cache Setting *----------------------------------------------------------------------*/ diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 3a4bfe8..35ac60a 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -126,7 +126,6 @@ #endif /*#define CONFIG_MENU_SHOW*/ -#define CONFIG_CMD_UNZIP #define CONFIG_CMD_ENV /* BOOTP options */ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 4759373..73830b2 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -207,8 +207,6 @@ #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) -#define CONFIG_CMD_UNZIP - #define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_CLOCKS -- 2.7.4

2 1

[U-Boot] [PATCH 1/5][v7] arch: powerpc: Move CONFIG_FSL_IFC to Kconfig
by Prabhakar Kushwaha 02 Feb '17

02 Feb '17

Enable IFC from Kconfig. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha(a)nxp.com> --- Changes for v5: Added first time Changes for v6: Sending as it is Changes for v7: Sending as it is arch/powerpc/cpu/mpc85xx/Kconfig | 17 +++++++++++++++++ include/configs/B4860QDS.h | 1 - include/configs/BSC9131RDB.h | 1 - include/configs/BSC9132QDS.h | 1 - include/configs/C29XPCIE.h | 1 - include/configs/P1010RDB.h | 1 - include/configs/T102xQDS.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T1040QDS.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/t4qds.h | 1 - 14 files changed, 17 insertions(+), 13 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 38ea4c1..a3db014 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -374,6 +374,7 @@ config ARCH_B4420 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config ARCH_B4860 bool @@ -398,6 +399,7 @@ config ARCH_B4860 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config ARCH_BSC9131 bool @@ -410,6 +412,7 @@ config ARCH_BSC9131 select SYS_FSL_HAS_SEC select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select FSL_IFC config ARCH_BSC9132 bool @@ -426,6 +429,7 @@ config ARCH_BSC9132 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_IFC config ARCH_C29X bool @@ -438,6 +442,7 @@ config ARCH_C29X select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_6 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_IFC config ARCH_MPC8536 bool @@ -553,6 +558,7 @@ config ARCH_P1010 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB + select FSL_IFC config ARCH_P1011 bool @@ -795,6 +801,7 @@ config ARCH_T1023 select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC config ARCH_T1024 bool @@ -811,6 +818,7 @@ config ARCH_T1024 select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC config ARCH_T1040 bool @@ -828,6 +836,7 @@ config ARCH_T1040 select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC config ARCH_T1042 bool @@ -845,6 +854,7 @@ config ARCH_T1042 select SYS_FSL_QORIQ_CHASSIS2 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 + select FSL_IFC config ARCH_T2080 bool @@ -866,6 +876,7 @@ config ARCH_T2080 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config ARCH_T2081 bool @@ -885,6 +896,7 @@ config ARCH_T2081 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config ARCH_T4160 bool @@ -905,6 +917,7 @@ config ARCH_T4160 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config ARCH_T4240 bool @@ -928,6 +941,7 @@ config ARCH_T4240 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 + select FSL_IFC config BOOKE bool @@ -1260,6 +1274,9 @@ config SYS_PPC64 config SYS_PPC_E500_USE_DEBUG_TLB bool +config FSL_IFC + bool + config SYS_PPC_E500_DEBUG_TLB int "Temporary TLB entry for external debugger" depends on SYS_PPC_E500_USE_DEBUG_TLB diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index fc99b96..2fdb869 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -63,7 +63,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 77f0927..4116234 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -46,7 +46,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_TSEC_ENET diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index f336f28..b2c8b03 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -68,7 +68,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index e1ce7ad..8f68748 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -68,7 +68,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 1d01e7f..3594e56 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -130,7 +130,6 @@ #endif /* High Level Configuration Options */ -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_SYS_HAS_SERDES /* common SERDES init code */ diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 2c3b660..0319f18 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -23,7 +23,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 79c34ef..459435f 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -23,7 +23,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 15a29cb..9de6185 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -51,7 +51,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCIE1 /* PCIE controller 1 */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 45aaf90..b778ace 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -162,7 +162,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_PCIE1 /* PCIE controller 1 */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 606c928..d6f647a 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -33,7 +33,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 825bf25..53bd684 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -27,7 +27,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index be18f66..2b03801 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -73,7 +73,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_FSL_CAAM /* Enable SEC/CAAM */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index 15c0e89..7803a84 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -26,7 +26,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_FSL_IFC /* Enable IFC Support */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ -- 2.7.4

2 2

[U-Boot] [PATCH] serial: 16550: properly initialize fcr field of ns16550_platdata
by Oleksandr Tymoshenko 02 Feb '17

02 Feb '17

Default fcr value is initialized in ns16550_serial_ofdata_to_platdata but this function is only called if OF_CONTROL option is enabled while the field is used whenever DM_SERIAL is set. So for configs that do not have OF_CONTROL default fcr value is set to zero which leads to loosing characters when serial port input is faster than reading routine i.e. when copy-pasting long line to U-Boot prompt. As a fix initialize fcr field in probe method Signed-off-by: Oleksandr Tymoshenko <gonzo(a)bluezbox.com> Cc: Marek Vasut <marex(a)denx.de> Cc: Tom Rini <trini(a)konsulko.com> Cc: Simon Glass <sjg(a)chromium.org> --- drivers/serial/ns16550.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 2df4a1f..2b30a4f 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -352,6 +352,7 @@ int ns16550_serial_probe(struct udevice *dev) struct NS16550 *const com_port = dev_get_priv(dev); com_port->plat = dev_get_platdata(dev); + com_port->plat->fcr = UART_FCR_DEFVAL; NS16550_init(com_port, -1); return 0; @@ -437,7 +438,6 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) return -EINVAL; } - plat->fcr = UART_FCR_DEFVAL; if (port_type == PORT_JZ4780) plat->fcr |= UART_FCR_UME; -- 2.9.2

4 5

[U-Boot] Please pull u-boot-mpc85xx master
by york sun 02 Feb '17

02 Feb '17

Tom, The following changes since commit cf4128e53caa4f7b0a6586fc3f10690d5c05db31: Merge git://www.denx.de/git/u-boot-marvell (2017-01-26 12:26:24 -0500) are available in the git repository at: git://git.denx.de/u-boot-mpc85xx.git for you to fetch changes up to de8c9317a891c1b30c465df1eb793c2861001919: powerpc: mpc5200: Correct return value of memcpy function (2017-02-01 08:14:39 -0800) ---------------------------------------------------------------- Mark Marshall (2): powerpc: mpc85xx: Use symbolic names for cache control bits powerpc: mpc5200: Correct return value of memcpy function mario.six(a)gdsys.cc (2): powerpc: mpc83xx: Minimize r1 modification powerpc: mpc83xx: Enable pre-relocation malloc arch/powerpc/cpu/mpc83xx/cpu_init.c | 3 +-- arch/powerpc/cpu/mpc83xx/spl_minimal.c | 6 +----- arch/powerpc/cpu/mpc83xx/start.S | 36 +++++++++++++++++++++++++++++----- arch/powerpc/cpu/mpc85xx/start.S | 8 ++++---- arch/powerpc/lib/memcpy_mpc5200.c | 2 +- 5 files changed, 38 insertions(+), 17 deletions(-) Thanks. York

2 1

[U-Boot] [PULL] Please pull u-boot-imx
by Stefano Babic 02 Feb '17

02 Feb '17

Hi Tom, please pull from u-boot-imx, thanks ! The following changes since commit cf4128e53caa4f7b0a6586fc3f10690d5c05db31: Merge git://www.denx.de/git/u-boot-marvell (2017-01-26 12:26:24 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master for you to fetch changes up to 11bd5e7b62070c7ca0188230edc4c5e7fdfe1349: BOARD: MCCMON6: Provide support for iMX6q based mccmon6 board (2017-01-30 16:24:47 +0100) ---------------------------------------------------------------- Breno Lima (3): udoo_neo: Add fdt_addr_r environment variable udoo_neo: Remove trailing semicolon and space udoo_neo: Remove ramdiskaddr environment variable Fabio Estevam (2): mx6qsabreauto: Pass the correct parallel NOR width README: mxc_hab: Adapt the CONFIG_SECURE_BOOT text to Kconfig Gary Bisson (1): imx: nitrogen6x: fix USB host initialization Lukasz Majewski (1): BOARD: MCCMON6: Provide support for iMX6q based mccmon6 board Marcin Niestroj (1): ARM: imx6ul: Move liteSOM source to SoC directory Martin Kaiser (1): tools: imximage: refactor header length calculations for imximage v1 Patrick Bruenn (1): arm: dts: imx53-cx9020: fix packetloss on fec_mxc Peng Fan (4): imx: mx6sx: add dts for mx6sxsabreauto board imx: mx6sxsabreauto: enable pinctrl driver imx: dts: mx6sxsabreauto: enable i2c2/3 imx: mx6sxsabreauto: enable more dm drivers Stefan Agner (1): imx_common: check for bmode Serial Downloader arch/arm/Kconfig | 2 - arch/arm/Makefile | 1 - arch/arm/cpu/armv7/mx6/Kconfig | 14 +- arch/arm/cpu/armv7/mx6/Makefile | 1 + arch/arm/{mach-litesom => cpu/armv7/mx6}/litesom.c | 0 arch/arm/dts/Makefile | 1 + arch/arm/dts/imx53-cx9020.dts | 20 +- arch/arm/dts/imx6sx-pinfunc.h | 1558 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/dts/imx6sx-sabreauto.dts | 188 ++++++++++++++++++ arch/arm/dts/imx6sx.dtsi | 1298 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/arm/imx-common/spl.c | 6 +- arch/arm/{mach-litesom/include/mach => include/asm/arch-mx6}/litesom.h | 4 +- arch/arm/mach-litesom/Kconfig | 6 - arch/arm/mach-litesom/Makefile | 6 - board/freescale/mx6sxsabreauto/mx6sxsabreauto.c | 258 ++++++------------------- board/grinn/liteboard/board.c | 2 +- board/liebherr/mccmon6/Kconfig | 12 ++ board/liebherr/mccmon6/MAINTAINERS | 7 + board/liebherr/mccmon6/Makefile | 8 + board/liebherr/mccmon6/mccmon6.c | 490 ++++++++++++++++++++++++++++++++++++++++++++++ board/liebherr/mccmon6/mon6_imximage_nor.cfg | 9 + board/liebherr/mccmon6/mon6_imximage_sd.cfg | 9 + board/liebherr/mccmon6/spl.c | 317 ++++++++++++++++++++++++++++++ configs/mccmon6_nor_defconfig | 33 ++++ configs/mccmon6_sd_defconfig | 34 ++++ configs/mx6sxsabreauto_defconfig | 17 ++ doc/README.mxc_hab | 5 +- include/configs/mccmon6.h | 321 ++++++++++++++++++++++++++++++ include/configs/mx6qsabreauto.h | 1 + include/configs/mx6sxsabreauto.h | 7 - include/configs/nitrogen6x.h | 2 + include/configs/udoo_neo.h | 4 +- include/dt-bindings/clock/imx6sx-clock.h | 280 +++++++++++++++++++++++++++ tools/imximage.c | 38 ++-- 34 files changed, 4692 insertions(+), 267 deletions(-) rename arch/arm/{mach-litesom => cpu/armv7/mx6}/litesom.c (100%) create mode 100644 arch/arm/dts/imx6sx-pinfunc.h create mode 100644 arch/arm/dts/imx6sx-sabreauto.dts create mode 100644 arch/arm/dts/imx6sx.dtsi rename arch/arm/{mach-litesom/include/mach => include/asm/arch-mx6}/litesom.h (68%) delete mode 100644 arch/arm/mach-litesom/Kconfig delete mode 100644 arch/arm/mach-litesom/Makefile create mode 100644 board/liebherr/mccmon6/Kconfig create mode 100644 board/liebherr/mccmon6/MAINTAINERS create mode 100644 board/liebherr/mccmon6/Makefile create mode 100644 board/liebherr/mccmon6/mccmon6.c create mode 100644 board/liebherr/mccmon6/mon6_imximage_nor.cfg create mode 100644 board/liebherr/mccmon6/mon6_imximage_sd.cfg create mode 100644 board/liebherr/mccmon6/spl.c create mode 100644 configs/mccmon6_nor_defconfig create mode 100644 configs/mccmon6_sd_defconfig create mode 100644 include/configs/mccmon6.h create mode 100644 include/dt-bindings/clock/imx6sx-clock.h -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic(a)denx.de =====================================================================

2 1

[U-Boot] Help defining an address in the environment
by John, Michael 01 Feb '17

01 Feb '17

Hello, I'm trying to define an address value in the U-Boot environment and my issue is the macro needs expended and arithmetic done before stringification. I'm finding this to be difficult to define using just the preprocessor. Below is the code showing what I'm trying to do. Some other headers define a base address and some offsets: ============ CODE ============= #define IIM_BASE_ADDR 0x63F98000 /* define in different header */ #define IIM_BANK_AREA_1_OFFSET 0x00000C00 /* define in different header */ #define IIM_MAC_OCTET_1 (IIM_BASE_ADDR + IIM_BANK_AREA_1_OFFSET + 0x24) /* IIM, bank 1, row 9 */ #define xstr(s) str(s) #define str(s) #s ..... #define CONFIG_EXTRA_ENV_SETTINGS \ "octet_addr=" xstr(IIM_MAC_OCTET_1) "\0" \ ============CODE END ========== What I want is for the 'octet_addr' variable to equal '0x63F98C24', so I could use it with 'itest' to do a check, but what I get is 'octet_addr' equals '(IIM_BASE_ADDR + IIM_BANK_AREA_1_OFFSET + 0x24)'. I'm not seeing a way to do what I want with just macros and the preprocessor. Is there a way I could define some environment variable from inside a function? Thanks for any help. -Michael

1 0