December 2017 - U-Boot

[U-Boot] [PATCH 3/5] mx6sl: Select MX6SL option via Kconfig
by Breno Lima 17 Dec '17

17 Dec '17

From: Breno Lima <breno.lima(a)nxp.com> Currently the MX6SL option is selected via CONFIG_SYS_EXTRA_OPTIONS, but it is better to select it directly via Kconfig. Signed-off-by: Breno Lima <breno.lima(a)nxp.com> --- arch/arm/mach-imx/mx6/Kconfig | 2 ++ configs/mx6slevk_defconfig | 2 +- configs/mx6slevk_spinor_defconfig | 2 +- configs/mx6slevk_spl_defconfig | 2 +- configs/warp_defconfig | 2 +- 5 files changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index bee7eab..4f8bb8f 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -244,6 +244,7 @@ config TARGET_MX6SABRESD config TARGET_MX6SLEVK bool "mx6slevk" + select MX6SL select SUPPORT_SPL config TARGET_MX6SLLEVK @@ -395,6 +396,7 @@ config TARGET_WANDBOARD config TARGET_WARP bool "WaRP" + select MX6SL select BOARD_LATE_INIT config TARGET_XPRESS diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 7b1ddac..aafddfa 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_TARGET_MX6SLEVK=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index 4b9c04e..0d3cb59 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_TARGET_MX6SLEVK=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg" CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 05a5c9e..0dbd308 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -10,7 +10,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6SL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y diff --git a/configs/warp_defconfig b/configs/warp_defconfig index 5e7eef0..2ac1c6c 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_TARGET_WARP=y # CONFIG_CMD_BMODE is not set -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp/imximage.cfg,MX6SL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -- 2.7.4

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[U-Boot] [PATCH 5/5] imx: Kconfig: Add HAS_CAAM option
by Breno Lima 17 Dec '17

17 Dec '17

From: Breno Lima <breno.lima(a)nxp.com> Currently CONFIG_SECURE_BOOT is selecting FSL_CAAM for all i.MX devices, this causes the following error when building mx6sl boards since this SoC doesn't have the CAAM block: In file included from drivers/crypto/fsl/jobdesc.c:12:0: drivers/crypto/fsl/jobdesc.c: In function 'inline_cnstr_jobdesc_blob_dek': include/fsl_sec.h:268:25: error: 'CAAM_ARB_BASE_ADDR' undeclared (first use in this function) #define SEC_MEM_PAGE1 (CAAM_ARB_BASE_ADDR + 0x1000) ^ drivers/crypto/fsl/jobdesc.c:140:21: note: in expansion of macro 'SEC_MEM_PAGE1' memcpy((uint32_t *)SEC_MEM_PAGE1, (uint32_t *)plain_txt, in_sz); ^ include/fsl_sec.h:268:25: note: each undeclared identifier is reported only once for each function it appears in #define SEC_MEM_PAGE1 (CAAM_ARB_BASE_ADDR + 0x1000) ^ drivers/crypto/fsl/jobdesc.c:140:21: note: in expansion of macro 'SEC_MEM_PAGE1' memcpy((uint32_t *)SEC_MEM_PAGE1, (uint32_t *)plain_txt, in_sz); ^ scripts/Makefile.build:280: recipe for target 'drivers/crypto/fsl/jobdesc.o' failed make[3]: *** [drivers/crypto/fsl/jobdesc.o] Error 1 scripts/Makefile.build:425: recipe for target 'drivers/crypto/fsl' failed make[2]: *** [drivers/crypto/fsl] Error 2 scripts/Makefile.build:425: recipe for target 'drivers/crypto' failed make[1]: *** [drivers/crypto] Error 2 Add HAS_CAAM configuration to avoid this error. Signed-off-by: Breno Lima <breno.lima(a)nxp.com> --- arch/arm/mach-imx/Kconfig | 5 ++++- arch/arm/mach-imx/mx6/Kconfig | 7 +++++++ arch/arm/mach-imx/mx7/Kconfig | 1 + 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index cd8b8d2..a6f67c8 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -1,3 +1,6 @@ +config HAS_CAAM + bool + config IMX_CONFIG string @@ -28,7 +31,7 @@ config USE_IMXIMG_PLUGIN config SECURE_BOOT bool "Support i.MX HAB features" depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5 - select FSL_CAAM + select FSL_CAAM if HAS_CAAM imply CMD_DEKBLOB help This option enables the support for secure boot (HAB). diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 279f088..8f98d9f 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -14,28 +14,34 @@ config MX6 imply CMD_FUSE config MX6D + select HAS_CAAM select MX6_SMP bool config MX6DL + select HAS_CAAM select MX6_SMP bool config MX6Q + select HAS_CAAM select MX6_SMP bool config MX6QDL + select HAS_CAAM select MX6_SMP bool config MX6S + select HAS_CAAM bool config MX6SL bool config MX6SX + select HAS_CAAM select ROM_UNIFIED_SECTIONS bool @@ -44,6 +50,7 @@ config MX6SLL bool config MX6UL + select HAS_CAAM select SYS_L2CACHE_OFF select ROM_UNIFIED_SECTIONS bool diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig index 365501d..4f8b4e1 100644 --- a/arch/arm/mach-imx/mx7/Kconfig +++ b/arch/arm/mach-imx/mx7/Kconfig @@ -10,6 +10,7 @@ config MX7 default y config MX7D + select HAS_CAAM select ROM_UNIFIED_SECTIONS imply CMD_FUSE bool -- 2.7.4

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[U-Boot] [PATCH] mx6: Fix SPL boot device detection
by Jiri Luznicky 17 Dec '17

17 Dec '17

The boot device is selected according to BOOT_CFG1[7:4] fuse. Any value equal or higher then 0x8 is used for nand. Currently, only values up to 0x8 are handled by the switch. Add rest of the values up to 0xf to cover all nand cases. Signed-off-by: Jiri Luznicky <jiri(a)luznicky.cz> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/include/asm/mach-imx/sys_proto.h | 9 ++++++++- arch/arm/mach-imx/spl.c | 9 ++++++++- board/engicam/common/board.c | 9 ++++++++- 3 files changed, 24 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index a80a392a73..455d5e291d 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -81,7 +81,14 @@ enum imx6_bmode { IMX6_BMODE_ESD, IMX6_BMODE_MMC, IMX6_BMODE_EMMC, - IMX6_BMODE_NAND, + IMX6_BMODE_NAND1, + IMX6_BMODE_NAND2, + IMX6_BMODE_NAND3, + IMX6_BMODE_NAND4, + IMX6_BMODE_NAND5, + IMX6_BMODE_NAND6, + IMX6_BMODE_NAND7, + IMX6_BMODE_NAND8, }; static inline u8 imx6_is_bmode_from_gpr9(void) diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c index d0d1b73aa6..a91fffad93 100644 --- a/arch/arm/mach-imx/spl.c +++ b/arch/arm/mach-imx/spl.c @@ -91,7 +91,14 @@ u32 spl_boot_device(void) case IMX6_BMODE_EMMC: return BOOT_DEVICE_MMC1; /* NAND Flash: 8.5.2, Table 8-10 */ - case IMX6_BMODE_NAND: + case IMX6_BMODE_NAND1: + case IMX6_BMODE_NAND2: + case IMX6_BMODE_NAND3: + case IMX6_BMODE_NAND4: + case IMX6_BMODE_NAND5: + case IMX6_BMODE_NAND6: + case IMX6_BMODE_NAND7: + case IMX6_BMODE_NAND8: return BOOT_DEVICE_NAND; } return BOOT_DEVICE_NONE; diff --git a/board/engicam/common/board.c b/board/engicam/common/board.c index f633c71916..b70ce0b8ad 100644 --- a/board/engicam/common/board.c +++ b/board/engicam/common/board.c @@ -69,7 +69,14 @@ int board_late_init(void) #endif env_set("modeboot", "mmcboot"); break; - case IMX6_BMODE_NAND: + case IMX6_BMODE_NAND1: + case IMX6_BMODE_NAND2: + case IMX6_BMODE_NAND3: + case IMX6_BMODE_NAND4: + case IMX6_BMODE_NAND5: + case IMX6_BMODE_NAND6: + case IMX6_BMODE_NAND7: + case IMX6_BMODE_NAND8: env_set("modeboot", "nandboot"); break; default: -- 2.11.0

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[U-Boot] OMAP34XX FDT, OF_CONTROL, and bootargs
by Derald D. Woods 16 Dec '17

16 Dec '17

All, Are there users of OMAP34XX boards (i.e. OMAP35x Platform) that have U-Boot booting Linux without an appended devicetree? And with 'bootargs' being passed to the kernel command line? I have been working on OMAP3 EVM and would like to know if there are any known issues, that may not be widely known, due to the age of the SOC family in question. I work with a couple of OMAP36XX boards (i.e. DM3730) that seem to boot just fine with an appended devicetree and bootargs are passed properly. I already know the chips are old. I am just probing for information from the community. Thanks. Derald D. Woods

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[U-Boot] Please pull u-boot-dm (take 2)
by Simon Glass 16 Dec '17

16 Dec '17

Hi Tom, I dropped the translation patch until Tegra can be fixed to work with it. This is storing up problems though, since in the meantime others might rely on the current behaviour. https://travis-ci.org/sglass68/u-boot/builds/315684225 The following changes since commit cf71338ee7a1dc16f13a4f1b89f32c624210df45: ata: Migrate CONFIG_MVSATA_IDE to Kconfig (2017-12-12 18:16:06 -0500) are available in the Git repository at: git://git.denx.de/u-boot-dm.git for you to fetch changes up to 854dfbf99b89c114ba100905e1500b8ace60e0f9: power: pmic/regulator: Add basic support for TPS65910 (2017-12-12 19:53:45 -0700) ---------------------------------------------------------------- Felix Brack (2): power: extend prefix match to regulator-name property power: pmic/regulator: Add basic support for TPS65910 Philipp Tomsich (1): dm: reset: have the reset-command perform a COLD reset Simon Glass (13): binman: Add a function to read ELF symbols binman: Add support for including spl/u-boot-spl.dtb binman: Add support for including spl/u-boot-spl-nodtb.bin binman: Drop a stale comment about the 'board' feature binman: Add tests binaries with binman symbols binman: Adjust size of test SPL binary binman: Support enabling debug in tests binman: Support accessing binman tables at run time binman: arm: Include the binman symbol table binman: Add binman symbol support to SPL binman: Add binman support to spl_ram.c binman: Add documentation for the symbol feature binman: tegra: Convert to use binman Stefan Roese (1): dm: blk: Use uclass_find_first/next_device() in blk_first/next_device() Makefile | 6 + arch/arm/config.mk | 6 +- arch/arm/cpu/u-boot-spl.lds | 7 + arch/arm/dts/tegra-u-boot.dtsi | 40 +++++ arch/arm/dts/tegra114-u-boot.dtsi | 3 + arch/arm/dts/tegra124-nyan-big-u-boot.dtsi | 2 + arch/arm/dts/tegra124-u-boot.dtsi | 3 + arch/arm/dts/tegra20-u-boot.dtsi | 11 +- arch/arm/dts/tegra210-u-boot.dtsi | 3 + arch/arm/dts/tegra30-u-boot.dtsi | 3 + arch/arm/mach-tegra/Kconfig | 1 + arch/sandbox/dts/sandbox_pmic.dtsi | 6 + common/spl/spl.c | 16 +- common/spl/spl_ram.c | 19 ++- doc/device-tree-bindings/regulator/regulator.txt | 16 +- drivers/block/blk-uclass.c | 7 +- drivers/power/pmic/Kconfig | 8 + drivers/power/pmic/Makefile | 1 + drivers/power/pmic/pmic-uclass.c | 11 +- drivers/power/pmic/pmic_tps65910_dm.c | 98 +++++++++++ drivers/power/regulator/Kconfig | 8 + drivers/power/regulator/Makefile | 1 + drivers/power/regulator/tps65910_regulator.c | 459 ++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/sysreset/sysreset-uclass.c | 2 +- include/binman_sym.h | 93 ++++++++++ include/power/sandbox_pmic.h | 5 +- include/power/tps65910_pmic.h | 130 ++++++++++++++ include/spl.h | 11 ++ test/dm/regulator.c | 2 + tools/binman/README | 32 +++- tools/binman/binman.py | 11 +- tools/binman/control.py | 3 + tools/binman/elf.py | 129 ++++++++++++++ tools/binman/elf_test.py | 122 ++++++++++++++ tools/binman/etype/entry.py | 8 + tools/binman/etype/u_boot_spl.py | 6 + tools/binman/etype/u_boot_spl_bss_pad.py | 7 +- tools/binman/etype/u_boot_spl_dtb.py | 17 ++ tools/binman/etype/u_boot_spl_nodtb.py | 17 ++ tools/binman/etype/u_boot_with_ucode_ptr.py | 9 +- tools/binman/ftest.py | 68 ++++++-- tools/binman/image.py | 79 ++++++++- tools/binman/image_test.py | 46 +++++ tools/binman/test/21_image_pad.dts | 2 +- tools/binman/test/24_sorted.dts | 4 +- tools/binman/test/28_pack_4gb_outside.dts | 4 +- tools/binman/test/29_x86-rom.dts | 6 +- tools/binman/test/51_u_boot_spl_dtb.dts | 13 ++ tools/binman/test/52_u_boot_spl_nodtb.dts | 11 ++ tools/binman/test/53_symbols.dts | 20 +++ tools/binman/test/Makefile | 18 +- tools/binman/test/bss_data.c | 2 +- tools/binman/test/u_boot_binman_syms | Bin 0 -> 4921 bytes tools/binman/test/u_boot_binman_syms.c | 14 ++ tools/binman/test/u_boot_binman_syms.lds | 30 ++++ tools/binman/test/u_boot_binman_syms_bad | Bin 0 -> 4890 bytes tools/binman/test/u_boot_binman_syms_bad.c | 1 + tools/binman/test/u_boot_binman_syms_bad.lds | 29 ++++ tools/binman/test/u_boot_binman_syms_size | Bin 0 -> 4825 bytes tools/binman/test/u_boot_binman_syms_size.c | 12 ++ tools/binman/test/u_boot_ucode_ptr.c | 2 +- 61 files changed, 1638 insertions(+), 62 deletions(-) create mode 100644 arch/arm/dts/tegra-u-boot.dtsi create mode 100644 arch/arm/dts/tegra114-u-boot.dtsi create mode 100644 arch/arm/dts/tegra124-u-boot.dtsi create mode 100644 arch/arm/dts/tegra210-u-boot.dtsi create mode 100644 arch/arm/dts/tegra30-u-boot.dtsi create mode 100644 drivers/power/pmic/pmic_tps65910_dm.c create mode 100644 drivers/power/regulator/tps65910_regulator.c create mode 100644 include/binman_sym.h create mode 100644 include/power/tps65910_pmic.h create mode 100644 tools/binman/elf.py create mode 100644 tools/binman/elf_test.py create mode 100644 tools/binman/etype/u_boot_spl_dtb.py create mode 100644 tools/binman/etype/u_boot_spl_nodtb.py create mode 100644 tools/binman/image_test.py create mode 100644 tools/binman/test/51_u_boot_spl_dtb.dts create mode 100644 tools/binman/test/52_u_boot_spl_nodtb.dts create mode 100644 tools/binman/test/53_symbols.dts create mode 100755 tools/binman/test/u_boot_binman_syms create mode 100644 tools/binman/test/u_boot_binman_syms.c create mode 100644 tools/binman/test/u_boot_binman_syms.lds create mode 100755 tools/binman/test/u_boot_binman_syms_bad create mode 120000 tools/binman/test/u_boot_binman_syms_bad.c create mode 100644 tools/binman/test/u_boot_binman_syms_bad.lds create mode 100755 tools/binman/test/u_boot_binman_syms_size create mode 100644 tools/binman/test/u_boot_binman_syms_size.c Regards, Simon

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[U-Boot] [PATCH] ARM SOCFPGA: add resetmgr command so reset can be deasserted in bootcmd (for example on peripheral dma interfaces after fpga has been programmed).
by Frank Mori Hess 16 Dec '17

16 Dec '17

--- arch/arm/mach-socfpga/reset_manager_gen5.c | 31 +++++++++++++++++++++++++++++ + 1 file changed, 31 insertions(+) diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach- socfpga/reset_manager_gen5.c index aa88adb414..6ad5d2a362 100644 --- a/arch/arm/mach-socfpga/reset_manager_gen5.c +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c @@ -114,3 +114,34 @@ void socfpga_bridges_reset(int enable) return; } #endif + +int resetmgr_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unsigned long bank; + unsigned long offset; + unsigned long assert; + + if (argc != 4) + return CMD_RET_USAGE; + + bank = simple_strtoul(argv[1], NULL, 0); + offset = simple_strtoul(argv[2], NULL, 0); + assert = simple_strtoul(argv[3], NULL, 0); + socfpga_per_reset(RSTMGR_DEFINE(bank, offset), assert); + return 0; +} + +U_BOOT_CMD( + resetmgr, 4, 1, resetmgr_cmd, + "SoCFPGA HPS reset manager control", + "resetmgr bank offset assert\n" + " bank - Bank of reset to assert/deassert.\n" + " 0 ... mpumodrst\n" + " 1 ... permodrst\n" + " 2 ... per2modrst\n" + " 3 ... brgmodrst\n" + " 4 ... miscmodrst\n" + " offset - Offset of reset to assert/deassert.\n" + " assert - 1 to assert reset, 0 to deassert.\n" + "" +); -- 2.11.0

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[U-Boot] MXC Spi driver
by Amartya Shreyank (RBEI/ESD2) 15 Dec '17

15 Dec '17

Hi, While trying to configure ECSPI for imx6 I get this error: drivers/spi/built-in.o: In function `mxc_spi_probe': /home/aaw1kor/nrcs/u-boot-imx/drivers/spi/mxc_spi.c:508: undefined reference to `dev_get_addr' Search for this function does not show up in any other files. I'm assuming this was supposed to be devfdt_get_addr. Best regards, Shreyank Amartya RBEI/ESD2

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Re: [U-Boot] [PATCH] ARM SOCFPGA: add resetmgr command so reset can be deasserted in bootcmd (for example on peripheral dma interfaces after fpga has been programmed).
by Marek Vasut 15 Dec '17

15 Dec '17

On 12/15/2017 06:07 PM, Frank Mori Hess wrote: Please always CC the list. Do NOT top-post. > Would you consider it more worthwhile if it included the > reset_config.h generated by Quartus (currently ignored by mainline > u-boot) and figured out which reset lines needed to be deasserted on > its own? What is your goal here ? > Or, what if that function was integrated into the "bridge" > command? No, that's for controlling the bridges. > Are you against defining commands? I am against polluting U-Boot with ad-hoc commands without any concept. > If so, why does the > "bridge" command exist anyways, wasn't there a bridge_enable_handoff > in the u-boot env before that did the same thing? Because that one didn't work. Notice that the bridge command runs some assembly locked to cacheline. > The current > situation is poor, if you have anything in your fpga that uses dma > then reset_config.h is ignored and the dma simply doesn't work. It is > up to the end user to figure out why. The altera version of u-boot > has a reset_deassert_peripherals_handoff which handles this stuff, I'm > not sure what the rationale was for dropping it although it did seem > to get called way too early as far as the dma reset deassert goes. Going back to my initial question -- what is your usecase and your aim here ? Usually you use FPGA manager in Linux to load the FPGA. > On Fri, Dec 15, 2017 at 2:14 AM, Marek Vasut <marex(a)denx.de> wrote: >> On 12/14/2017 10:03 PM, Frank Mori Hess wrote: >> >> Commit message is missing, SoB line is missing etc >> https://www.denx.de/wiki/U-Boot/Patches#General_Patch_Submission_Rules >> >> But you can really just do mw to the correct address or create a U-Boot >> script , so this command is not really needed, is it ? >> -- Best regards, Marek Vasut

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[U-Boot] [PATCH v2] drivers: core: Add translation in live tree case
by Mario Six 15 Dec '17

15 Dec '17

The function dev_read_addr calls ofnode_get_addr_index in the live tree case, which does not apply bus translations to the address read from the device tree. This results in illegal addresses on boards that rely on bus translations being applied. Fix this situation by applying bus translations in the live tree case as well. Signed-off-by: Mario Six <mario.six(a)gdsys.cc> --- Changes v1 -> v2: * Added IS_ENABLED(CONFIG_OF_TRANSLATE) case distinction --- drivers/core/ofnode.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 0030ab962e..513bebd32f 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -200,13 +200,19 @@ fdt_addr_t ofnode_get_addr_index(ofnode node, int index) uint flags; u64 size; int na; + __be32 addr; prop_val = of_get_address(ofnode_to_np(node), index, &size, &flags); if (!prop_val) return FDT_ADDR_T_NONE; na = of_n_addr_cells(ofnode_to_np(node)); - return of_read_number(prop_val, na); + addr = of_read_number(prop_val, na); + + if (IS_ENABLED(CONFIG_OF_TRANSLATE)) + return of_translate_address(ofnode_to_np(node), &addr); + else + return addr; } else { return fdt_get_base_address(gd->fdt_blob, ofnode_to_offset(node)); -- 2.11.0

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[U-Boot] [PATCH v3 1/2] drivers/reset: support rockchip reset drivers
by Kever Yang 15 Dec '17

15 Dec '17

From: Elaine Zhang <zhangqing(a)rock-chips.com> Create driver to support all Rockchip SoCs soft reset. Example of usage: i2c driver: ret = reset_get_by_name(dev, "i2c", &reset_ctl); if (ret) { error("reset_get_by_name() failed: %d\n", ret); } reset_assert(&reset_ctl); udelay(50); reset_deassert(&reset_ctl); i2c dts node: resets = <&cru SRST_P_I2C1>, <&cru SRST_I2C1>; reset-names = "p_i2c", "i2c"; Signed-off-by: Elaine Zhang <zhangqing(a)rock-chips.com> Signed-off-by: Kever Yang <kever.yang(a)rock-chips.com> --- Changes in v3: None Changes in v2: - fix Kconfig more than 80 length - use MACRO for reset bits in one reg - use rkclr/set_reg for reg access - add rockchip_reset_bind() - use dev_read_addr_size() instead of fdtdec_ drivers/reset/Kconfig | 9 +++ drivers/reset/Makefile | 1 + drivers/reset/reset-rockchip.c | 133 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 143 insertions(+) create mode 100644 drivers/reset/reset-rockchip.c diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index ce46e27..97a78d7 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -74,4 +74,13 @@ config AST2500_RESET resets that are supported by watchdog. The main limitation though is that some reset signals, like I2C or MISC reset multiple devices. +config RESET_ROCKCHIP + bool "Reset controller driver for Rockchip SoCs" + depends on DM_RESET && CLK + default y + help + Support for reset controller on rockchip SoC. The main limitation + though is that some reset signals, like I2C or MISC reset multiple + devices. + endmenu diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 252cefe..7d7e080 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -12,3 +12,4 @@ obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o +obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o diff --git a/drivers/reset/reset-rockchip.c b/drivers/reset/reset-rockchip.c new file mode 100644 index 0000000..01047a2 --- /dev/null +++ b/drivers/reset/reset-rockchip.c @@ -0,0 +1,133 @@ +/* + * (C) Copyright 2017 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <dm.h> +#include <reset-uclass.h> +#include <linux/io.h> +#include <asm/arch/hardware.h> +#include <dm/lists.h> +/* + * Each reg has 16 bits reset signal for devices + * Note: Not including rk2818 and older SoCs + */ +#define ROCKCHIP_RESET_NUM_IN_REG 16 + +struct rockchip_reset_priv { + void __iomem *base; + /* Rockchip reset reg locate at cru controller */ + u32 reset_reg_offset; + /* Rockchip reset reg number */ + u32 reset_reg_num; +}; + +static int rockchip_reset_request(struct reset_ctl *reset_ctl) +{ + struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev); + + debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_num=%d)\n", __func__, + reset_ctl, reset_ctl->dev, reset_ctl->id, priv->reset_reg_num); + + if (reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG >= priv->reset_reg_num) + return -EINVAL; + + return 0; +} + +static int rockchip_reset_free(struct reset_ctl *reset_ctl) +{ + debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl, + reset_ctl->dev, reset_ctl->id); + + return 0; +} + +static int rockchip_reset_assert(struct reset_ctl *reset_ctl) +{ + struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev); + int bank = reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG; + int offset = reset_ctl->id % ROCKCHIP_RESET_NUM_IN_REG; + + debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__, + reset_ctl, reset_ctl->dev, reset_ctl->id, + priv->base + (bank * 4)); + + rk_setreg(priv->base + (bank * 4), BIT(offset)); + + return 0; +} + +static int rockchip_reset_deassert(struct reset_ctl *reset_ctl) +{ + struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev); + int bank = reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG; + int offset = reset_ctl->id % ROCKCHIP_RESET_NUM_IN_REG; + + debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_addr=%p)\n", __func__, + reset_ctl, reset_ctl->dev, reset_ctl->id, + priv->base + (bank * 4)); + + rk_clrreg(priv->base + (bank * 4), BIT(offset)); + + return 0; +} + +struct reset_ops rockchip_reset_ops = { + .request = rockchip_reset_request, + .free = rockchip_reset_free, + .rst_assert = rockchip_reset_assert, + .rst_deassert = rockchip_reset_deassert, +}; + +static int rockchip_reset_probe(struct udevice *dev) +{ + struct rockchip_reset_priv *priv = dev_get_priv(dev); + fdt_addr_t addr; + fdt_size_t size; + + addr = dev_read_addr_size(dev, "reg", &size); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + if ((priv->reset_reg_offset == 0) && (priv->reset_reg_num == 0)) + return -EINVAL; + + addr += priv->reset_reg_offset; + priv->base = ioremap(addr, size); + + debug("%s(base=%p) (reg_offset=%x, reg_num=%d)\n", __func__, + priv->base, priv->reset_reg_offset, priv->reset_reg_num); + + return 0; +} + +int rockchip_reset_bind(struct udevice *pdev, u32 reg_offset, u32 reg_number) +{ + struct udevice *rst_dev; + struct rockchip_reset_priv *priv; + int ret; + + ret = device_bind_driver_to_node(pdev, "rockchip_reset", "reset", + dev_ofnode(pdev), &rst_dev); + if (ret) { + debug("Warning: No rockchip reset driver: ret=%d\n", ret); + return ret; + } + priv = malloc(sizeof(struct rockchip_reset_priv)); + priv->reset_reg_offset = reg_offset; + priv->reset_reg_num = reg_number; + rst_dev->priv = priv; + + return 0; +} + +U_BOOT_DRIVER(rockchip_reset) = { + .name = "rockchip_reset", + .id = UCLASS_RESET, + .probe = rockchip_reset_probe, + .ops = &rockchip_reset_ops, + .priv_auto_alloc_size = sizeof(struct rockchip_reset_priv), +}; -- 1.9.1

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