December 2017 - U-Boot

[U-Boot] [PATCH v7 0/2] DW SPI: Get clock value from Device Tree
by Eugeniy Paltsev 26 Dec '17

26 Dec '17

As discussed with Marek during the LINUX-PITER here is v* patch: Add option to set spi controller clock frequency via device tree using standard clock bindings. Define dw_spi_get_clk function as 'weak' as some targets (like SOCFPGA_GEN5 and SOCFPGA_ARRIA10) fon't use standard clock API and implement dw_spi_get_clk their own way in their clock manager. Get rid of clock_manager.h include in designware_spi.c as we don't use cm_get_spi_controller_clk_hz function anymore - we use redefined dw_spi_get_clk in SOCFPGA clock managers (clock_manager_gen5.c and clock_manager_arria10.c) instead. Changes v6->v7: * Cleanup error handling. * Don't free clock after we successfully requeste it. Changes v5->v6: * Put the clock handle into the private data Changes v4->v5: * Get rid of usless ifdef in dw_spi_get_clk function Eugeniy Paltsev (2): SOCFPGA: clock manager: implement dw_spi_get_clk function DW SPI: Get clock value from Device Tree arch/arm/mach-socfpga/clock_manager_arria10.c | 9 +++++ arch/arm/mach-socfpga/clock_manager_gen5.c | 9 +++++ drivers/spi/designware_spi.c | 47 +++++++++++++++++++++++++-- 3 files changed, 63 insertions(+), 2 deletions(-) -- 2.9.3

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[U-Boot] [PATCH v2 14/18] rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driver
by David Wu 26 Dec '17

26 Dec '17

Spam detection software, running on the system "lists.denx.de", has identified this incoming email as possible spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see @@CONTACT_ADDRESS@@ for details. Content preview: Clean the iomux definitions at grf_rk322x.h, and move them into pinctrl-driver for resolving the compiling error of redefinition. After that, define the uart2 iomux at rk322x-board file. Signed-off-by: David Wu <david.wu(a)rock-chips.com> --- [...] Content analysis details: (6.5 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- 0.6 RCVD_IN_SORBS_WEB RBL: SORBS: sender is an abusable web server [58.22.7.114 listed in dnsbl.sorbs.net] 2.7 RCVD_IN_PSBL RBL: Received via a relay in PSBL [211.157.147.133 listed in psbl.surriel.com] 2.4 RCVD_IN_MSPIKE_L5 RBL: Very bad reputation (-5) [211.157.147.133 listed in bl.mailspike.net] 0.8 UPPERCASE_50_75 message body is 50-75% uppercase 0.0 RCVD_IN_MSPIKE_BL Mailspike blacklisted

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[U-Boot] [PATCH v2 17/18] net: gmac_rockchip: Add support for the RK3228 GMAC
by David Wu 26 Dec '17

26 Dec '17

Spam detection software, running on the system "lists.denx.de", has identified this incoming email as possible spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see @@CONTACT_ADDRESS@@ for details. Content preview: The GMAC in the RK3228 once again is identical to the incarnation in the RK3288 and the RK3399, except for where some of the configuration and control registers are located in the GRF. This adds the RK3368-specific logic necessary to reuse this driver. [...] Content analysis details: (5.7 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- 2.7 RCVD_IN_PSBL RBL: Received via a relay in PSBL [211.157.147.133 listed in psbl.surriel.com] 0.6 RCVD_IN_SORBS_WEB RBL: SORBS: sender is an abusable web server [58.22.7.114 listed in dnsbl.sorbs.net] 2.4 RCVD_IN_MSPIKE_L5 RBL: Very bad reputation (-5) [211.157.147.133 listed in bl.mailspike.net] 0.0 RCVD_IN_MSPIKE_BL Mailspike blacklisted

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[U-Boot] [PATCH 01/12] riscv: cpu: Add nx25 to support RISC-V
by Andes 25 Dec '17

25 Dec '17

From: Rick Chen <rick(a)andestech.com> Add Andes nx25 cpu core (called AndesStar V5) to support RISC-V arch Verifications: 1. startup and relocation ok. 2. boot from rom or ram both ok. 2. timer driver ok. 3. uart driver ok 4. mmc driver ok 5. spi driver ok. 6. 32/64 bit both ok. Detail verification message please see doc/README.ae250. Signed-off-by: Rick Chen <rick(a)andestech.com> Signed-off-by: Rick Chen <rickchen36(a)gmail.com> Signed-off-by: Greentime Hu <green.hu(a)gmail.com> Cc: Padmarao Begari <Padmarao.Begari(a)microsemi.com> --- arch/riscv/cpu/nx25/Makefile | 10 ++ arch/riscv/cpu/nx25/cpu.c | 33 +++++ arch/riscv/cpu/nx25/start.S | 291 ++++++++++++++++++++++++++++++++++++++++ arch/riscv/cpu/nx25/u-boot.lds | 69 ++++++++++ 4 files changed, 403 insertions(+), 0 deletions(-) create mode 100644 arch/riscv/cpu/nx25/Makefile create mode 100644 arch/riscv/cpu/nx25/cpu.c create mode 100644 arch/riscv/cpu/nx25/start.S create mode 100644 arch/riscv/cpu/nx25/u-boot.lds diff --git a/arch/riscv/cpu/nx25/Makefile b/arch/riscv/cpu/nx25/Makefile new file mode 100644 index 0000000..5fcf100 --- /dev/null +++ b/arch/riscv/cpu/nx25/Makefile @@ -0,0 +1,10 @@ +# +# Copyright (C) 2017 Andes Technology Corporation +# Rick Chen, Andes Technology Corporation <rick(a)andestech.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +extra-y = start.o + +obj-y := cpu.o diff --git a/arch/riscv/cpu/nx25/cpu.c b/arch/riscv/cpu/nx25/cpu.c new file mode 100644 index 0000000..5478f4f --- /dev/null +++ b/arch/riscv/cpu/nx25/cpu.c @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2017 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation <rick(a)andestech.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* CPU specific code */ +#include <common.h> +#include <command.h> +#include <watchdog.h> +#include <asm/cache.h> + +/* + * cleanup_before_linux() is called just before we call linux + * it prepares the processor for linux + * + * we disable interrupt and caches. + */ +int cleanup_before_linux(void) +{ + disable_interrupts(); + + /* turn off I/D-cache */ + + return 0; +} + +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + disable_interrupts(); + panic("nx25-ae250 wdt not support yet.\n"); +} diff --git a/arch/riscv/cpu/nx25/start.S b/arch/riscv/cpu/nx25/start.S new file mode 100644 index 0000000..6a07663 --- /dev/null +++ b/arch/riscv/cpu/nx25/start.S @@ -0,0 +1,291 @@ +/* + * Startup Code for RISC-V Core + * + * Copyright (c) 2017 Microsemi Corporation. + * Copyright (c) 2017 Padmarao Begari <Padmarao.Begari(a)microsemi.com> + * + * Copyright (C) 2017 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation <rick(a)andestech.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm-offsets.h> +#include <config.h> +#include <common.h> +#include <elf.h> +#include <asm/encoding.h> + +#ifdef CONFIG_32BIT +#define LREG lw +#define SREG sw +#define REGBYTES 4 +#define RELOC_TYPE R_RISCV_32 +#define SYM_INDEX 0x8 +#define SYM_SIZE 0x10 +#else +#define LREG ld +#define SREG sd +#define REGBYTES 8 +#define RELOC_TYPE R_RISCV_64 +#define SYM_INDEX 0x20 +#define SYM_SIZE 0x18 +#endif + +.section .text +.globl _start +_start: + j handle_reset + +nmi_vector: + j nmi_vector + +trap_vector: + j trap_entry + +.global trap_entry +handle_reset: + la t0, trap_entry + csrw mtvec, t0 + csrwi mstatus, 0 + csrwi mie, 0 + +/* + * Do CPU critical regs init only at reboot, + * not when booting from ram + */ +#ifdef CONFIG_INIT_CRITICAL + jal cpu_init_crit /* Do CPU critical regs init */ +#endif + +/* + * Set stackpointer in internal/ex RAM to call board_init_f + */ +call_board_init_f: + li t0, -16 + li t1, CONFIG_SYS_INIT_SP_ADDR + and sp, t1, t0 /* force 16 byte alignment */ + +#ifdef CONFIG_DEBUG_UART + jal debug_uart_init +#endif + +call_board_init_f_0: + mv a0, sp + jal board_init_f_alloc_reserve + mv sp, a0 + jal board_init_f_init_reserve + + mv a0, zero /* a0 <-- boot_flags = 0 */ + la t5, board_init_f + jr t5 /* jump to board_init_f() */ + +/* + * void relocate_code (addr_sp, gd, addr_moni) + * + * This "function" does not return, instead it continues in RAM + * after relocating the monitor code. + * + */ +.globl relocate_code +relocate_code: + mv s2, a0 /* save addr_sp */ + mv s3, a1 /* save addr of gd */ + mv s4, a2 /* save addr of destination */ + +/* + *Set up the stack + */ +stack_setup: + mv sp, s2 + la t0, _start + sub t6, s4, t0 /* t6 <- relocation offset */ + beq t0, s4, clear_bss /* skip relocation */ + + mv t1, s4 /* t1 <- scratch for copy_loop */ + la t3, __bss_start + sub t3, t3, t0 /* t3 <- __bss_start_ofs */ + add t2, t0, t3 /* t2 <- source end address */ + +copy_loop: + LREG t5, 0(t0) + addi t0, t0, REGBYTES + SREG t5, 0(t1) + addi t1, t1, REGBYTES + blt t0, t2, copy_loop + +/* + * Update dynamic relocations after board_init_f + */ +fix_rela_dyn: + la t1, __rel_dyn_start + la t2, __rel_dyn_end + beq t1, t2, clear_bss + add t1, t1, t6 /* t1 <- rela_dyn_start in RAM */ + add t2, t2, t6 /* t2 <- rela_dyn_end in RAM */ + +/* + * skip first reserved entry: address, type, addend + */ + bne t1, t2, 7f + +6: + LREG t5, -(REGBYTES*2)(t1) /* t5 <-- relocation info:type */ + li t3, R_RISCV_RELATIVE /* reloc type R_RISCV_RELATIVE */ + bne t5, t3, 8f /* skip non-RISCV_RELOC entries */ + LREG t3, -(REGBYTES*3)(t1) + LREG t5, -(REGBYTES)(t1) /* t5 <-- addend */ + add t5, t5, t6 /* t5 <-- location to fix up in RAM */ + add t3, t3, t6 /* t3 <-- location to fix up in RAM */ + SREG t5, 0(t3) +7: + addi t1, t1, (REGBYTES*3) + ble t1, t2, 6b + +8: + la t4, __dyn_sym_start + add t4, t4, t6 + +9: + LREG t5, -(REGBYTES*2)(t1) /* t5 <-- relocation info:type */ + srli t0, t5, SYM_INDEX /* t0 <--- sym table index */ + andi t5, t5, 0xFF /* t5 <--- relocation type */ + li t3, RELOC_TYPE + bne t5, t3, 10f /* skip non-addned entries */ + + LREG t3, -(REGBYTES*3)(t1) + li t5, SYM_SIZE + mul t0, t0, t5 + add s1, t4, t0 + LREG t5, REGBYTES(s1) + add t5, t5, t6 /* t5 <-- location to fix up in RAM */ + add t3, t3, t6 /* t3 <-- location to fix up in RAM */ + SREG t5, 0(t3) +10: + addi t1, t1, (REGBYTES*3) + ble t1, t2, 9b + +/* + * trap update +*/ + la t0, trap_entry + add t0, t0, t6 + csrw mtvec, t0 + +clear_bss: + la t0, __bss_start /* t0 <- rel __bss_start in FLASH */ + add t0, t0, t6 /* t0 <- rel __bss_start in RAM */ + la t1, __bss_end /* t1 <- rel __bss_end in FLASH */ + add t1, t1, t6 /* t1 <- rel __bss_end in RAM */ + li t2, 0x00000000 /* clear */ + beq t0, t1, call_board_init_r + +clbss_l: + SREG t2, 0(t0) /* clear loop... */ + addi t0, t0, REGBYTES + bne t0, t1, clbss_l + +/* + * We are done. Do not return, instead branch to second part of board + * initialization, now running from RAM. + */ +call_board_init_r: + la t0, board_init_r + mv t4, t0 /* offset of board_init_r() */ + add t4, t4, t6 /* real address of board_init_r() */ +/* + * setup parameters for board_init_r + */ + mv a0, s3 /* gd_t */ + mv a1, s4 /* dest_addr */ + +/* + * jump to it ... + */ + jr t4 /* jump to board_init_r() */ + +/* + * trap entry + */ +trap_entry: + addi sp, sp, -32*REGBYTES + SREG x1, 1*REGBYTES(sp) + SREG x2, 2*REGBYTES(sp) + SREG x3, 3*REGBYTES(sp) + SREG x4, 4*REGBYTES(sp) + SREG x5, 5*REGBYTES(sp) + SREG x6, 6*REGBYTES(sp) + SREG x7, 7*REGBYTES(sp) + SREG x8, 8*REGBYTES(sp) + SREG x9, 9*REGBYTES(sp) + SREG x10, 10*REGBYTES(sp) + SREG x11, 11*REGBYTES(sp) + SREG x12, 12*REGBYTES(sp) + SREG x13, 13*REGBYTES(sp) + SREG x14, 14*REGBYTES(sp) + SREG x15, 15*REGBYTES(sp) + SREG x16, 16*REGBYTES(sp) + SREG x17, 17*REGBYTES(sp) + SREG x18, 18*REGBYTES(sp) + SREG x19, 19*REGBYTES(sp) + SREG x20, 20*REGBYTES(sp) + SREG x21, 21*REGBYTES(sp) + SREG x22, 22*REGBYTES(sp) + SREG x23, 23*REGBYTES(sp) + SREG x24, 24*REGBYTES(sp) + SREG x25, 25*REGBYTES(sp) + SREG x26, 26*REGBYTES(sp) + SREG x27, 27*REGBYTES(sp) + SREG x28, 28*REGBYTES(sp) + SREG x29, 29*REGBYTES(sp) + SREG x30, 30*REGBYTES(sp) + SREG x31, 31*REGBYTES(sp) + csrr a0, mcause + csrr a1, mepc + mv a2, sp + jal handle_trap + csrw mepc, a0 + +/* + * Remain in M-mode after mret + */ + li t0, MSTATUS_MPP + csrs mstatus, t0 + LREG x1, 1*REGBYTES(sp) + LREG x2, 2*REGBYTES(sp) + LREG x3, 3*REGBYTES(sp) + LREG x4, 4*REGBYTES(sp) + LREG x5, 5*REGBYTES(sp) + LREG x6, 6*REGBYTES(sp) + LREG x7, 7*REGBYTES(sp) + LREG x8, 8*REGBYTES(sp) + LREG x9, 9*REGBYTES(sp) + LREG x10, 10*REGBYTES(sp) + LREG x11, 11*REGBYTES(sp) + LREG x12, 12*REGBYTES(sp) + LREG x13, 13*REGBYTES(sp) + LREG x14, 14*REGBYTES(sp) + LREG x15, 15*REGBYTES(sp) + LREG x16, 16*REGBYTES(sp) + LREG x17, 17*REGBYTES(sp) + LREG x18, 18*REGBYTES(sp) + LREG x19, 19*REGBYTES(sp) + LREG x20, 20*REGBYTES(sp) + LREG x21, 21*REGBYTES(sp) + LREG x22, 22*REGBYTES(sp) + LREG x23, 23*REGBYTES(sp) + LREG x24, 24*REGBYTES(sp) + LREG x25, 25*REGBYTES(sp) + LREG x26, 26*REGBYTES(sp) + LREG x27, 27*REGBYTES(sp) + LREG x28, 28*REGBYTES(sp) + LREG x29, 29*REGBYTES(sp) + LREG x30, 30*REGBYTES(sp) + LREG x31, 31*REGBYTES(sp) + addi sp, sp, 32*REGBYTES + mret + +#ifdef CONFIG_INIT_CRITICAL +cpu_init_crit: + ret +#endif diff --git a/arch/riscv/cpu/nx25/u-boot.lds b/arch/riscv/cpu/nx25/u-boot.lds new file mode 100644 index 0000000..936fd77 --- /dev/null +++ b/arch/riscv/cpu/nx25/u-boot.lds @@ -0,0 +1,69 @@ +/* + * Copyright (C) 2017 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation <rick(a)andestech.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +OUTPUT_ARCH("riscv") +ENTRY(_start) + +SECTIONS +{ + . = ALIGN(4); + .text : + { + arch/riscv/cpu/nx25/start.o (.text) + *(.text) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { + __global_pointer$ = . + 0x800; + *(.data*) + } + . = ALIGN(4); + + .got : { + __got_start = .; + *(.got.plt) *(.got) + __got_end = .; + } + + . = ALIGN(4); + + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + . = ALIGN(4); + + /DISCARD/ : { *(.rela.plt*) } + .rela.dyn : { + __rel_dyn_start = .; + *(.rela*) + __rel_dyn_end = .; + } + + . = ALIGN(4); + + .dynsym : { + __dyn_sym_start = .; + *(.dynsym) + __dyn_sym_end = .; + } + + . = ALIGN(4); + + _end = .; + + .bss : { + __bss_start = .; + *(.bss) + . = ALIGN(4); + __bss_end = .; + } + +} -- 1.7.1

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[U-Boot] [PATCH] arm: socfpga: Guard commands with CONFIG_SPL_BUILD tests
by Tom Rini 24 Dec '17

24 Dec '17

In order for these commands to not be included in SPL we need to guard compilation with CONFIG_SPL_BUILD checks. Reorganize some sections of code slightly in order to avoid new warnings and mark the command functions as static as they should have been before. Cc: Marek Vasut <marex(a)denx.de> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- arch/arm/mach-socfpga/clock_manager.c | 4 +++- arch/arm/mach-socfpga/misc_gen5.c | 13 ++++++++----- 2 files changed, 11 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-socfpga/clock_manager.c b/arch/arm/mach-socfpga/clock_manager.c index cb6ae036961d..6b76221025af 100644 --- a/arch/arm/mach-socfpga/clock_manager.c +++ b/arch/arm/mach-socfpga/clock_manager.c @@ -59,7 +59,8 @@ int set_cpu_clk_info(void) return 0; } -int do_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +#ifndef CONFIG_SPL_BUILD +static int do_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { cm_print_clock_quick_summary(); return 0; @@ -70,3 +71,4 @@ U_BOOT_CMD( "display clocks", "" ); +#endif diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c index 91ddb79f7310..a7dcaccbb793 100644 --- a/arch/arm/mach-socfpga/misc_gen5.c +++ b/arch/arm/mach-socfpga/misc_gen5.c @@ -30,14 +30,10 @@ static struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE; static struct socfpga_system_manager *sysmgr_regs = (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; -static struct socfpga_reset_manager *reset_manager_base = - (struct socfpga_reset_manager *)SOCFPGA_RSTMGR_ADDRESS; static struct nic301_registers *nic301_regs = (struct nic301_registers *)SOCFPGA_L3REGS_ADDRESS; static struct scu_registers *scu_regs = (struct scu_registers *)SOCFPGA_MPUSCU_ADDRESS; -static struct socfpga_sdr_ctrl *sdr_ctrl = - (struct socfpga_sdr_ctrl *)SDR_CTRLGRP_ADDRESS; /* * DesignWare Ethernet initialization @@ -292,6 +288,12 @@ int arch_early_init_r(void) return 0; } +#ifndef CONFIG_SPL_BUILD +static struct socfpga_reset_manager *reset_manager_base = + (struct socfpga_reset_manager *)SOCFPGA_RSTMGR_ADDRESS; +static struct socfpga_sdr_ctrl *sdr_ctrl = + (struct socfpga_sdr_ctrl *)SDR_CTRLGRP_ADDRESS; + static void socfpga_sdram_apply_static_cfg(void) { const u32 applymask = 0x8; @@ -321,7 +323,7 @@ static void socfpga_sdram_apply_static_cfg(void) : : "r"(val), "r"(&sdr_ctrl->static_cfg) : "memory", "cc"); } -int do_bridge(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +static int do_bridge(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { if (argc != 2) return CMD_RET_USAGE; @@ -357,3 +359,4 @@ U_BOOT_CMD( "bridge disable - Enable HPS-to-FPGA, FPGA-to-HPS, LWHPS-to-FPGA bridges\n" "" ); +#endif -- 2.7.4

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[U-Boot] [PATCH] x86: Move commands from under arch/x86 to cmd/x86/
by Tom Rini 23 Dec '17

23 Dec '17

We only need to compile and link these files when building for full U-Boot. Move them to under cmd/x86/ to make sure they aren't linked in and undiscarded due to u_boot_list_2_cmd_* being included). Cc: Bin Meng <bmeng.cn(a)gmail.com> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- arch/x86/lib/Makefile | 1 - arch/x86/lib/cmd_mtrr.c | 139 ----------------------------------------- arch/x86/lib/fsp/Makefile | 1 - arch/x86/lib/fsp/cmd_fsp.c | 152 --------------------------------------------- cmd/Makefile | 2 + cmd/x86/Makefile | 6 ++ cmd/x86/cmd_fsp.c | 152 +++++++++++++++++++++++++++++++++++++++++++++ cmd/x86/cmd_mtrr.c | 139 +++++++++++++++++++++++++++++++++++++++++ 8 files changed, 299 insertions(+), 293 deletions(-) delete mode 100644 arch/x86/lib/cmd_mtrr.c delete mode 100644 arch/x86/lib/fsp/cmd_fsp.c create mode 100644 cmd/x86/Makefile create mode 100644 cmd/x86/cmd_fsp.c create mode 100644 cmd/x86/cmd_mtrr.c diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index 7d729ea0f7dc..f6be13fe9492 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -23,7 +23,6 @@ obj-y += interrupts.o obj-y += lpc-uclass.o obj-y += mpspec.o obj-$(CONFIG_ENABLE_MRC_CACHE) += mrccache.o -obj-y += cmd_mtrr.o obj-y += northbridge-uclass.o obj-$(CONFIG_I8259_PIC) += i8259.o obj-$(CONFIG_I8254_TIMER) += i8254.o diff --git a/arch/x86/lib/cmd_mtrr.c b/arch/x86/lib/cmd_mtrr.c deleted file mode 100644 index f632f495ede3..000000000000 --- a/arch/x86/lib/cmd_mtrr.c +++ /dev/null @@ -1,139 +0,0 @@ -/* - * (C) Copyright 2014 Google, Inc - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/msr.h> -#include <asm/mtrr.h> - -static const char *const mtrr_type_name[MTRR_TYPE_COUNT] = { - "Uncacheable", - "Combine", - "2", - "3", - "Through", - "Protect", - "Back", -}; - -static int do_mtrr_list(void) -{ - int i; - - printf("Reg Valid Write-type %-16s %-16s %-16s\n", "Base ||", - "Mask ||", "Size ||"); - for (i = 0; i < MTRR_COUNT; i++) { - const char *type = "Invalid"; - uint64_t base, mask, size; - bool valid; - - base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); - mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); - size = ~mask & ((1ULL << CONFIG_CPU_ADDR_BITS) - 1); - size |= (1 << 12) - 1; - size += 1; - valid = mask & MTRR_PHYS_MASK_VALID; - type = mtrr_type_name[base & MTRR_BASE_TYPE_MASK]; - printf("%d %-5s %-12s %016llx %016llx %016llx\n", i, - valid ? "Y" : "N", type, base & ~MTRR_BASE_TYPE_MASK, - mask & ~MTRR_PHYS_MASK_VALID, size); - } - - return 0; -} - -static int do_mtrr_set(uint reg, int argc, char * const argv[]) -{ - const char *typename = argv[0]; - struct mtrr_state state; - uint32_t start, size; - uint64_t base, mask; - int i, type = -1; - bool valid; - - if (argc < 3) - return CMD_RET_USAGE; - for (i = 0; i < MTRR_TYPE_COUNT; i++) { - if (*typename == *mtrr_type_name[i]) - type = i; - } - if (type == -1) { - printf("Invalid type name %s\n", typename); - return CMD_RET_USAGE; - } - start = simple_strtoul(argv[1], NULL, 16); - size = simple_strtoul(argv[2], NULL, 16); - - base = start | type; - valid = native_read_msr(MTRR_PHYS_MASK_MSR(reg)) & MTRR_PHYS_MASK_VALID; - mask = ~((uint64_t)size - 1); - mask &= (1ULL << CONFIG_CPU_ADDR_BITS) - 1; - if (valid) - mask |= MTRR_PHYS_MASK_VALID; - - printf("base=%llx, mask=%llx\n", base, mask); - mtrr_open(&state); - wrmsrl(MTRR_PHYS_BASE_MSR(reg), base); - wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask); - mtrr_close(&state); - - return 0; -} - -static int mtrr_set_valid(int reg, bool valid) -{ - struct mtrr_state state; - uint64_t mask; - - mtrr_open(&state); - mask = native_read_msr(MTRR_PHYS_MASK_MSR(reg)); - if (valid) - mask |= MTRR_PHYS_MASK_VALID; - else - mask &= ~MTRR_PHYS_MASK_VALID; - wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask); - mtrr_close(&state); - - return 0; -} - -static int do_mtrr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - const char *cmd; - uint reg; - - cmd = argv[1]; - if (argc < 2 || *cmd == 'l') - return do_mtrr_list(); - argc -= 2; - argv += 2; - if (argc <= 0) - return CMD_RET_USAGE; - reg = simple_strtoul(argv[0], NULL, 16); - if (reg >= MTRR_COUNT) { - printf("Invalid register number\n"); - return CMD_RET_USAGE; - } - if (*cmd == 'e') - return mtrr_set_valid(reg, true); - else if (*cmd == 'd') - return mtrr_set_valid(reg, false); - else if (*cmd == 's') - return do_mtrr_set(reg, argc - 1, argv + 1); - else - return CMD_RET_USAGE; - - return 0; -} - -U_BOOT_CMD( - mtrr, 6, 1, do_mtrr, - "Use x86 memory type range registers (32-bit only)", - "[list] - list current registers\n" - "set <reg> <type> <start> <size> - set a register\n" - "\t<type> is Uncacheable, Combine, Through, Protect, Back\n" - "disable <reg> - disable a register\n" - "ensable <reg> - enable a register" -); diff --git a/arch/x86/lib/fsp/Makefile b/arch/x86/lib/fsp/Makefile index afe83dd32437..c7a248f7f2e7 100644 --- a/arch/x86/lib/fsp/Makefile +++ b/arch/x86/lib/fsp/Makefile @@ -4,7 +4,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += cmd_fsp.o obj-y += fsp_car.o obj-y += fsp_common.o obj-y += fsp_dram.o diff --git a/arch/x86/lib/fsp/cmd_fsp.c b/arch/x86/lib/fsp/cmd_fsp.c deleted file mode 100644 index 2a99cfe0d034..000000000000 --- a/arch/x86/lib/fsp/cmd_fsp.c +++ /dev/null @@ -1,152 +0,0 @@ -/* - * Copyright (C) 2014-2015, Bin Meng <bmeng.cn(a)gmail.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <command.h> -#include <asm/fsp/fsp_support.h> - -DECLARE_GLOBAL_DATA_PTR; - -static char *hob_type[] = { - "reserved", - "Hand-off", - "Mem Alloc", - "Res Desc", - "GUID Ext", - "FV", - "CPU", - "Mem Pool", - "reserved", - "FV2", - "Load PEIM", - "Capsule", -}; - -static int do_hdr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - struct fsp_header *hdr = find_fsp_header(); - u32 img_addr = hdr->img_base; - char *sign = (char *)&hdr->sign; - int i; - - printf("FSP : binary 0x%08x, header 0x%08x\n", - CONFIG_FSP_ADDR, (int)hdr); - printf("Header : sign "); - for (i = 0; i < sizeof(hdr->sign); i++) - printf("%c", *sign++); - printf(", size %d, rev %d\n", hdr->hdr_len, hdr->hdr_rev); - printf("Image : rev "); - if (hdr->hdr_rev == FSP_HEADER_REVISION_1) { - printf("%d.%d", - (hdr->img_rev >> 8) & 0xff, hdr->img_rev & 0xff); - } else { - printf("%d.%d.%d.%d", - (hdr->img_rev >> 24) & 0xff, (hdr->img_rev >> 16) & 0xff, - (hdr->img_rev >> 8) & 0xff, hdr->img_rev & 0xff); - } - printf(", id "); - for (i = 0; i < ARRAY_SIZE(hdr->img_id); i++) - printf("%c", hdr->img_id[i]); - printf(", addr 0x%08x, size %d\n", img_addr, hdr->img_size); - if (hdr->hdr_rev == FSP_HEADER_REVISION_2) { - printf("GFX :%ssupported\n", - hdr->img_attr & FSP_ATTR_GRAPHICS_SUPPORT ? " " : " un"); - } - printf("VPD : addr 0x%08x, size %d\n", - hdr->cfg_region_off + img_addr, hdr->cfg_region_size); - printf("\nNumber of APIs Supported : %d\n", hdr->api_num); - printf("\tTempRamInit : 0x%08x\n", hdr->fsp_tempram_init + img_addr); - printf("\tFspInit : 0x%08x\n", hdr->fsp_init + img_addr); - printf("\tFspNotify : 0x%08x\n", hdr->fsp_notify + img_addr); - if (hdr->hdr_rev == FSP_HEADER_REVISION_2) { - printf("\tMemoryInit : 0x%08x\n", - hdr->fsp_mem_init + img_addr); - printf("\tTempRamExit : 0x%08x\n", - hdr->fsp_tempram_exit + img_addr); - printf("\tSiliconInit : 0x%08x\n", - hdr->fsp_silicon_init + img_addr); - } - - return 0; -} - -static int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - const struct hob_header *hdr; - uint type; - char *desc; - int i = 0; - - hdr = gd->arch.hob_list; - - printf("HOB list address: 0x%08x\n\n", (unsigned int)hdr); - - printf("# | Address | Type | Len | "); - printf("%42s\n", "GUID"); - printf("---|----------|-----------|------|-"); - printf("------------------------------------------\n"); - while (!end_of_hob(hdr)) { - printf("%02x | %08x | ", i, (unsigned int)hdr); - type = hdr->type; - if (type == HOB_TYPE_UNUSED) - desc = "*Unused*"; - else if (type == HOB_TYPE_EOH) - desc = "*EOH*"; - else if (type >= 0 && type <= ARRAY_SIZE(hob_type)) - desc = hob_type[type]; - else - desc = "*Invalid*"; - printf("%-9s | %04x | ", desc, hdr->len); - - if (type == HOB_TYPE_MEM_ALLOC || type == HOB_TYPE_RES_DESC || - type == HOB_TYPE_GUID_EXT) { - struct efi_guid *guid = (struct efi_guid *)(hdr + 1); - int j; - - printf("%08x-%04x-%04x", guid->data1, - guid->data2, guid->data3); - for (j = 0; j < ARRAY_SIZE(guid->data4); j++) - printf("-%02x", guid->data4[j]); - } else { - printf("%42s", "Not Available"); - } - printf("\n"); - hdr = get_next_hob(hdr); - i++; - } - - return 0; -} - -static cmd_tbl_t fsp_commands[] = { - U_BOOT_CMD_MKENT(hdr, 0, 1, do_hdr, "", ""), - U_BOOT_CMD_MKENT(hob, 0, 1, do_hob, "", ""), -}; - -static int do_fsp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - cmd_tbl_t *fsp_cmd; - int ret; - - if (argc < 2) - return CMD_RET_USAGE; - fsp_cmd = find_cmd_tbl(argv[1], fsp_commands, ARRAY_SIZE(fsp_commands)); - argc -= 2; - argv += 2; - if (!fsp_cmd || argc > fsp_cmd->maxargs) - return CMD_RET_USAGE; - - ret = fsp_cmd->cmd(fsp_cmd, flag, argc, argv); - - return cmd_process_error(fsp_cmd, ret); -} - -U_BOOT_CMD( - fsp, 2, 1, do_fsp, - "Show Intel Firmware Support Package (FSP) related information", - "hdr - Print FSP header information\n" - "fsp hob - Print FSP Hand-Off Block (HOB) information" -); diff --git a/cmd/Makefile b/cmd/Makefile index 00e38696daaf..ab45bf434a96 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -150,6 +150,8 @@ obj-$(CONFIG_CMD_PMIC) += pmic.o obj-$(CONFIG_CMD_REGULATOR) += regulator.o obj-$(CONFIG_CMD_BLOB) += blob.o + +obj-$(CONFIG_X86) += x86/ endif # !CONFIG_SPL_BUILD # core command diff --git a/cmd/x86/Makefile b/cmd/x86/Makefile new file mode 100644 index 000000000000..c36010634410 --- /dev/null +++ b/cmd/x86/Makefile @@ -0,0 +1,6 @@ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += cmd_mtrr.o +obj-$(CONFIG_HAVE_FSP) += cmd_fsp.o diff --git a/cmd/x86/cmd_fsp.c b/cmd/x86/cmd_fsp.c new file mode 100644 index 000000000000..2a99cfe0d034 --- /dev/null +++ b/cmd/x86/cmd_fsp.c @@ -0,0 +1,152 @@ +/* + * Copyright (C) 2014-2015, Bin Meng <bmeng.cn(a)gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <command.h> +#include <asm/fsp/fsp_support.h> + +DECLARE_GLOBAL_DATA_PTR; + +static char *hob_type[] = { + "reserved", + "Hand-off", + "Mem Alloc", + "Res Desc", + "GUID Ext", + "FV", + "CPU", + "Mem Pool", + "reserved", + "FV2", + "Load PEIM", + "Capsule", +}; + +static int do_hdr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + struct fsp_header *hdr = find_fsp_header(); + u32 img_addr = hdr->img_base; + char *sign = (char *)&hdr->sign; + int i; + + printf("FSP : binary 0x%08x, header 0x%08x\n", + CONFIG_FSP_ADDR, (int)hdr); + printf("Header : sign "); + for (i = 0; i < sizeof(hdr->sign); i++) + printf("%c", *sign++); + printf(", size %d, rev %d\n", hdr->hdr_len, hdr->hdr_rev); + printf("Image : rev "); + if (hdr->hdr_rev == FSP_HEADER_REVISION_1) { + printf("%d.%d", + (hdr->img_rev >> 8) & 0xff, hdr->img_rev & 0xff); + } else { + printf("%d.%d.%d.%d", + (hdr->img_rev >> 24) & 0xff, (hdr->img_rev >> 16) & 0xff, + (hdr->img_rev >> 8) & 0xff, hdr->img_rev & 0xff); + } + printf(", id "); + for (i = 0; i < ARRAY_SIZE(hdr->img_id); i++) + printf("%c", hdr->img_id[i]); + printf(", addr 0x%08x, size %d\n", img_addr, hdr->img_size); + if (hdr->hdr_rev == FSP_HEADER_REVISION_2) { + printf("GFX :%ssupported\n", + hdr->img_attr & FSP_ATTR_GRAPHICS_SUPPORT ? " " : " un"); + } + printf("VPD : addr 0x%08x, size %d\n", + hdr->cfg_region_off + img_addr, hdr->cfg_region_size); + printf("\nNumber of APIs Supported : %d\n", hdr->api_num); + printf("\tTempRamInit : 0x%08x\n", hdr->fsp_tempram_init + img_addr); + printf("\tFspInit : 0x%08x\n", hdr->fsp_init + img_addr); + printf("\tFspNotify : 0x%08x\n", hdr->fsp_notify + img_addr); + if (hdr->hdr_rev == FSP_HEADER_REVISION_2) { + printf("\tMemoryInit : 0x%08x\n", + hdr->fsp_mem_init + img_addr); + printf("\tTempRamExit : 0x%08x\n", + hdr->fsp_tempram_exit + img_addr); + printf("\tSiliconInit : 0x%08x\n", + hdr->fsp_silicon_init + img_addr); + } + + return 0; +} + +static int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + const struct hob_header *hdr; + uint type; + char *desc; + int i = 0; + + hdr = gd->arch.hob_list; + + printf("HOB list address: 0x%08x\n\n", (unsigned int)hdr); + + printf("# | Address | Type | Len | "); + printf("%42s\n", "GUID"); + printf("---|----------|-----------|------|-"); + printf("------------------------------------------\n"); + while (!end_of_hob(hdr)) { + printf("%02x | %08x | ", i, (unsigned int)hdr); + type = hdr->type; + if (type == HOB_TYPE_UNUSED) + desc = "*Unused*"; + else if (type == HOB_TYPE_EOH) + desc = "*EOH*"; + else if (type >= 0 && type <= ARRAY_SIZE(hob_type)) + desc = hob_type[type]; + else + desc = "*Invalid*"; + printf("%-9s | %04x | ", desc, hdr->len); + + if (type == HOB_TYPE_MEM_ALLOC || type == HOB_TYPE_RES_DESC || + type == HOB_TYPE_GUID_EXT) { + struct efi_guid *guid = (struct efi_guid *)(hdr + 1); + int j; + + printf("%08x-%04x-%04x", guid->data1, + guid->data2, guid->data3); + for (j = 0; j < ARRAY_SIZE(guid->data4); j++) + printf("-%02x", guid->data4[j]); + } else { + printf("%42s", "Not Available"); + } + printf("\n"); + hdr = get_next_hob(hdr); + i++; + } + + return 0; +} + +static cmd_tbl_t fsp_commands[] = { + U_BOOT_CMD_MKENT(hdr, 0, 1, do_hdr, "", ""), + U_BOOT_CMD_MKENT(hob, 0, 1, do_hob, "", ""), +}; + +static int do_fsp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + cmd_tbl_t *fsp_cmd; + int ret; + + if (argc < 2) + return CMD_RET_USAGE; + fsp_cmd = find_cmd_tbl(argv[1], fsp_commands, ARRAY_SIZE(fsp_commands)); + argc -= 2; + argv += 2; + if (!fsp_cmd || argc > fsp_cmd->maxargs) + return CMD_RET_USAGE; + + ret = fsp_cmd->cmd(fsp_cmd, flag, argc, argv); + + return cmd_process_error(fsp_cmd, ret); +} + +U_BOOT_CMD( + fsp, 2, 1, do_fsp, + "Show Intel Firmware Support Package (FSP) related information", + "hdr - Print FSP header information\n" + "fsp hob - Print FSP Hand-Off Block (HOB) information" +); diff --git a/cmd/x86/cmd_mtrr.c b/cmd/x86/cmd_mtrr.c new file mode 100644 index 000000000000..f632f495ede3 --- /dev/null +++ b/cmd/x86/cmd_mtrr.c @@ -0,0 +1,139 @@ +/* + * (C) Copyright 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/msr.h> +#include <asm/mtrr.h> + +static const char *const mtrr_type_name[MTRR_TYPE_COUNT] = { + "Uncacheable", + "Combine", + "2", + "3", + "Through", + "Protect", + "Back", +}; + +static int do_mtrr_list(void) +{ + int i; + + printf("Reg Valid Write-type %-16s %-16s %-16s\n", "Base ||", + "Mask ||", "Size ||"); + for (i = 0; i < MTRR_COUNT; i++) { + const char *type = "Invalid"; + uint64_t base, mask, size; + bool valid; + + base = native_read_msr(MTRR_PHYS_BASE_MSR(i)); + mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); + size = ~mask & ((1ULL << CONFIG_CPU_ADDR_BITS) - 1); + size |= (1 << 12) - 1; + size += 1; + valid = mask & MTRR_PHYS_MASK_VALID; + type = mtrr_type_name[base & MTRR_BASE_TYPE_MASK]; + printf("%d %-5s %-12s %016llx %016llx %016llx\n", i, + valid ? "Y" : "N", type, base & ~MTRR_BASE_TYPE_MASK, + mask & ~MTRR_PHYS_MASK_VALID, size); + } + + return 0; +} + +static int do_mtrr_set(uint reg, int argc, char * const argv[]) +{ + const char *typename = argv[0]; + struct mtrr_state state; + uint32_t start, size; + uint64_t base, mask; + int i, type = -1; + bool valid; + + if (argc < 3) + return CMD_RET_USAGE; + for (i = 0; i < MTRR_TYPE_COUNT; i++) { + if (*typename == *mtrr_type_name[i]) + type = i; + } + if (type == -1) { + printf("Invalid type name %s\n", typename); + return CMD_RET_USAGE; + } + start = simple_strtoul(argv[1], NULL, 16); + size = simple_strtoul(argv[2], NULL, 16); + + base = start | type; + valid = native_read_msr(MTRR_PHYS_MASK_MSR(reg)) & MTRR_PHYS_MASK_VALID; + mask = ~((uint64_t)size - 1); + mask &= (1ULL << CONFIG_CPU_ADDR_BITS) - 1; + if (valid) + mask |= MTRR_PHYS_MASK_VALID; + + printf("base=%llx, mask=%llx\n", base, mask); + mtrr_open(&state); + wrmsrl(MTRR_PHYS_BASE_MSR(reg), base); + wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask); + mtrr_close(&state); + + return 0; +} + +static int mtrr_set_valid(int reg, bool valid) +{ + struct mtrr_state state; + uint64_t mask; + + mtrr_open(&state); + mask = native_read_msr(MTRR_PHYS_MASK_MSR(reg)); + if (valid) + mask |= MTRR_PHYS_MASK_VALID; + else + mask &= ~MTRR_PHYS_MASK_VALID; + wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask); + mtrr_close(&state); + + return 0; +} + +static int do_mtrr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + const char *cmd; + uint reg; + + cmd = argv[1]; + if (argc < 2 || *cmd == 'l') + return do_mtrr_list(); + argc -= 2; + argv += 2; + if (argc <= 0) + return CMD_RET_USAGE; + reg = simple_strtoul(argv[0], NULL, 16); + if (reg >= MTRR_COUNT) { + printf("Invalid register number\n"); + return CMD_RET_USAGE; + } + if (*cmd == 'e') + return mtrr_set_valid(reg, true); + else if (*cmd == 'd') + return mtrr_set_valid(reg, false); + else if (*cmd == 's') + return do_mtrr_set(reg, argc - 1, argv + 1); + else + return CMD_RET_USAGE; + + return 0; +} + +U_BOOT_CMD( + mtrr, 6, 1, do_mtrr, + "Use x86 memory type range registers (32-bit only)", + "[list] - list current registers\n" + "set <reg> <type> <start> <size> - set a register\n" + "\t<type> is Uncacheable, Combine, Through, Protect, Back\n" + "disable <reg> - disable a register\n" + "ensable <reg> - enable a register" +); -- 2.7.4

2 2

[U-Boot] How to restore NVRAM on MTD partition from backup
by A.W.C. 22 Dec '17

22 Dec '17

Hi, U-Boot 2009.03 on custom board. How to restore NVRAM on MTD partition from backup use U-boot memory commands, by uploading backup over serial line? (kermit mode or ymodem mode) NAND flash type. Regards, Alex

2 1

[U-Boot] [PATCH 0/3] efi_selftest: beautify test output
by Heinrich Schuchardt 22 Dec '17

22 Dec '17

Remove some superfluous messages if no error occurs. Do not cut off device paths in test output. Heinrich Schuchardt (3): efi_selftest: avoid superfluous messages for event services efi_selftest: avoid superfluous messages for task priority levels efi_selftest: do not cut off u16 strings when printing lib/efi_selftest/efi_selftest_console.c | 16 ++++++++++------ lib/efi_selftest/efi_selftest_events.c | 8 +++++--- lib/efi_selftest/efi_selftest_tpl.c | 15 +++++++++------ 3 files changed, 24 insertions(+), 15 deletions(-) -- 2.15.1

1 3

[U-Boot] [PATCH 1/1] efi_loader: use correct format string for unsigned long
by Heinrich Schuchardt 22 Dec '17

22 Dec '17

virt_size is of type unsigned long. So it should be printed with %ul. Signed-off-by: Heinrich Schuchardt <xypron.glpk(a)gmx.de> --- lib/efi_loader/efi_image_loader.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c index af29cc4f04..849d7ce377 100644 --- a/lib/efi_loader/efi_image_loader.c +++ b/lib/efi_loader/efi_image_loader.c @@ -133,8 +133,8 @@ void *efi_load_pe(void *efi, struct efi_loaded_image *loaded_image_info) image_size = opt->SizeOfImage; efi_reloc = efi_alloc(virt_size, EFI_LOADER_DATA); if (!efi_reloc) { - printf("%s: Could not allocate %ld bytes\n", - __func__, virt_size); + printf("%s: Could not allocate %lu bytes\n", + __func__, virt_size); return NULL; } entry = efi_reloc + opt->AddressOfEntryPoint; @@ -147,8 +147,8 @@ void *efi_load_pe(void *efi, struct efi_loaded_image *loaded_image_info) image_size = opt->SizeOfImage; efi_reloc = efi_alloc(virt_size, EFI_LOADER_DATA); if (!efi_reloc) { - printf("%s: Could not allocate %ld bytes\n", - __func__, virt_size); + printf("%s: Could not allocate %lu bytes\n", + __func__, virt_size); return NULL; } entry = efi_reloc + opt->AddressOfEntryPoint; -- 2.15.1

1 0

[U-Boot] [PATCH v2 00/16] efi_loader: implement driver management
by Heinrich Schuchardt 22 Dec '17

22 Dec '17

This series implements the OpenProtocolInformation, ConnectController, and DisconnectController boot services. The EFI application creating a new device will call ConnectController to request the installation of all necessary drivers. Before deleting the device it will call DisconectController to remove all child controllers and to detach the driver. E.g. iPXE may be used to connect an iSCSI target. It then creates a handle by installing the EFI_BLOCK_IO_PROTOCOL. It calls ConnectController and expects U-Boot to create the partition handles and to provide the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL. (The driver connecting to the EFI_BLOCK_IO_PROTOCOL is not yet implemented in U-Boot.) A self test is provided for the driver management. The bootefi selftest now creates colored output. Two bug fixes are included. To complete the implementation of the EFI boot services the following future work is needed: * manage events in a linked list (see Rob's proposal) * implement ReinstallProtocol and RegisterProtocolNotify --- v2: Clean up debug output in efi_add_protocol (patch 8). Correctly return EFI_NOT_FOUND if no driver is uninstalled in DisconnectController (patch 11). Define a local structure as static (patch 15). Heinrich Schuchardt (16): efi_selftest: colored test output efi_loader: simplify efi_remove_all_protocols efi_selftest: do not try to close device path protocol efi_loader: list of open protocol infos efi_loader: open_info in OpenProtocol efi_loader: open_info in CloseProtocol efi_loader: implement OpenProtocolInformation efi_loader: debug output installed device path efi_loader: implement ConnectController efi_loader: fix signature of efi_disconnect_controller efi_loader: implement DisconnectController efi_loader: disconnect controllers in UninstallProtocol efi_selftest: remove todo in manage protocols efi_selftest: remove todo in device path test efi_selftest: test for (Dis)ConnectController efi_loader: consistently use efi_handle_t for handles cmd/bootefi.c | 10 +- include/efi_api.h | 48 +- include/efi_loader.h | 38 +- include/efi_selftest.h | 27 +- lib/efi_loader/efi_boottime.c | 755 +++++++++++++++++++++--- lib/efi_loader/efi_console.c | 6 +- lib/efi_selftest/Makefile | 1 + lib/efi_selftest/efi_selftest.c | 25 +- lib/efi_selftest/efi_selftest_console.c | 13 +- lib/efi_selftest/efi_selftest_controllers.c | 385 ++++++++++++ lib/efi_selftest/efi_selftest_devicepath.c | 48 +- lib/efi_selftest/efi_selftest_manageprotocols.c | 22 +- 12 files changed, 1211 insertions(+), 167 deletions(-) create mode 100644 lib/efi_selftest/efi_selftest_controllers.c -- 2.15.1

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