September 2016 - U-Boot

[U-Boot] [PATCH v2] ARM: tegra: increase console buffer size and sys args num
by Peter.Chubb＠data61.csiro.au 02 Sep '16

02 Sep '16

From: Bryan Wu <pengw(a)nvidia.com> The Linux-for-Tegra kernel uses a very long command line. The default value of CONFIG_SYS_CBSIZE is too small to printf out the long command line and causes a message like: bootarg overflow 602+0+0+1 > 512 on the console, and the board refuses to boot. The default value of CONFIG_SYS_MAXARGS is too small to add a long long command line, and the kernel won't boot without the complete bootargs. Increasing these two config options solves this problem. Signed-off-by: Bryan Wu <pengw(a)nvidia.com> Signed-off-by: Peter Chubb <Peter.Chubb(a)data61.csiro.au> Acked-by: Stephen Warren <swarren(a)nvidia.com> --- include/configs/tegra-common.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 7b0940a..6bfd7b2 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -76,11 +76,12 @@ * Increasing the size of the IO buffer as default nfsargs size is more * than 256 and so it is not possible to edit it */ -#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 32 /* max number of command args */ +#define CONFIG_SYS_MAXARGS 64 /* max number of command args */ + /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) -- 2.9.3

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[U-Boot] ARM: tegra: jetson-tk1: Increase console buffer size
by Peter Chubb 02 Sep '16

02 Sep '16

U-Boot's console buffer size needs to be bigger to allow the default image on NVIDIA's Linux4Tegra to boot. Otherwise one sees: bootarg overflow 602+0+0+1 > 512 on the console, and the board refuses to boot. Signed-off-by: Peter Chubb <peter.chubb(a)data61.csiro.au> --- include/configs/tegra-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 7b0940a..8e874d3 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -76,7 +76,7 @@ * Increasing the size of the IO buffer as default nfsargs size is more * than 256 and so it is not possible to edit it */ -#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE (256 * 3) /* Console I/O Buffer Size */ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -- 2.9.3 -- Dr Peter Chubb Tel: +61 2 9490 5852 http://www.data61.csiro.au http://ts.data61.csiro.au Software Systems Research Group/NICTA/Data61

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[U-Boot] [PATCH] nand: Fix some more NULL name tests
by Scott Wood 02 Sep '16

02 Sep '16

Now that nand_info[] is an array of pointers we need to test the pointer itself rather than using name as a proxy for NULLness. Fixes: b616d9b0a708eb9 ("nand: Embed mtd_info in struct nand_chip") Signed-off-by: Scott Wood <oss(a)buserror.net> Cc: Lukasz Majewski <l.majewski(a)samsung.com> Cc: Tony Lindgren <tony(a)atomide.com> --- cmd/nand.c | 2 +- drivers/dfu/dfu_nand.c | 4 ++-- drivers/mtd/nand/omap_gpmc.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/cmd/nand.c b/cmd/nand.c index c25e25a..c16ec77 100644 --- a/cmd/nand.c +++ b/cmd/nand.c @@ -191,7 +191,7 @@ int do_nand_env_oob(cmd_tbl_t *cmdtp, int argc, char *const argv[]) struct mtd_info *mtd = nand_info[0]; char *cmd = argv[1]; - if (CONFIG_SYS_MAX_NAND_DEVICE == 0 || !mtd->name) { + if (CONFIG_SYS_MAX_NAND_DEVICE == 0 || !mtd) { puts("no devices available\n"); return 1; } diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c index 9fb874c..23f1571 100644 --- a/drivers/dfu/dfu_nand.c +++ b/drivers/dfu/dfu_nand.c @@ -39,7 +39,7 @@ static int nand_block_op(enum dfu_op op, struct dfu_entity *dfu, if (nand_curr_device < 0 || nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE || - !nand_info[nand_curr_device]->name) { + !nand_info[nand_curr_device]) { printf("%s: invalid nand device\n", __func__); return -1; } @@ -148,7 +148,7 @@ static int dfu_flush_medium_nand(struct dfu_entity *dfu) if (nand_curr_device < 0 || nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE || - !nand_info[nand_curr_device]->name) { + !nand_info[nand_curr_device]) { printf("%s: invalid nand device\n", __func__); return -1; } diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index 6e201d6..af618fc 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -899,7 +899,7 @@ int __maybe_unused omap_nand_switch_ecc(uint32_t hardware, uint32_t eccstrength) if (nand_curr_device < 0 || nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE || - !nand_info[nand_curr_device]->name) { + !nand_info[nand_curr_device]) { printf("nand: error: no NAND devices found\n"); return -ENODEV; } -- 2.7.4

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[U-Boot] [PATCH] Trimslice config: update for Trimslice so SPI flash works
by Stephen Arnold 02 Sep '16

02 Sep '16

From: Steve Arnold <stephen.arnold42(a)gmail.com> This updates the defaults for trimslice so it matches the last vendor config. Use the tegra-uboot-flasher tools to create mmc and spi flash images and flash to the device. Can optionally replace boot.scr with extlinux.conf configuration. Tested on Trimslice Diskless (with SSD). Signed-off-by: Stephen L Arnold <nerdboy(a)gentoo.org> Cc: Tom Warren <TWarren(a)nvidia.com> --- Assumptions, caveats, and unknowns: - changes should be isolated to Trimslice - unknown if other Trimslice models use different values - only one Compulab dts u-boot release, so probably not - only tested on a single model, Trimslice Diskless include/configs/tegra-common-post.h | 2 ++ include/configs/tegra20-common.h | 6 ++++++ include/configs/trimslice.h | 14 ++++++++++++++ 3 files changed, 22 insertions(+) --- diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index b206ce4..3021d8e 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -75,7 +75,9 @@ #define BOARD_EXTRA_ENV_SETTINGS #endif +#ifndef CONFIG_SYS_LOAD_ADDR #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#endif #ifndef CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS #define CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 00e85c4..b1b8819 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -32,7 +32,9 @@ /*----------------------------------------------------------------------- * Physical Memory Map */ +#ifndef CONFIG_TARGET_TRIMSLICE #define CONFIG_SYS_TEXT_BASE 0x00110000 +#endif /* * Memory layout for where various images get loaded by boot scripts: @@ -58,6 +60,7 @@ * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ +#ifndef CONFIG_TARGET_TRIMSLICE #define CONFIG_LOADADDR 0x01000000 #define MEM_LAYOUT_ENV_SETTINGS \ "scriptaddr=0x10000000\0" \ @@ -65,6 +68,7 @@ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ "fdt_addr_r=0x02000000\0" \ "ramdisk_addr_r=0x02100000\0" +#endif /* Defines for SPL */ #define CONFIG_SPL_TEXT_BASE 0x00108000 @@ -92,7 +96,9 @@ */ #define CONFIG_USB_EHCI_TXFIFO_THRESH 10 #define CONFIG_EHCI_IS_TDI +#ifndef CONFIG_TARGET_TRIMSLICE #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 +#endif #define CONFIG_SYS_NAND_SELF_INIT #define CONFIG_SYS_NAND_ONFI_DETECTION diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index b761640..47149eb 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -14,6 +14,20 @@ /* High-level configuration options */ #define CONFIG_TEGRA_BOARD_STRING "Compulab Trimslice" +/* default trimslice settings (different than tegra20-common.h) */ +#define CONFIG_SYS_LOAD_ADDR 0x00A00800 +#define CONFIG_SYS_TEXT_BASE 0x0010E000 + +#define CONFIG_LOADADDR 0x00408000 +#define MEM_LAYOUT_ENV_SETTINGS \ + "scriptaddr=0x10000000\0" \ + "pxefile_addr_r=0x10100000\0" \ + "kernel_addr_r=0x01000000\0" \ + "fdt_addr_r=0x02000000\0" \ + "ramdisk_addr_r=0x02100000\0" + +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 + /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_TEGRA_UARTA_GPU -- 2.8.1

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Re: [U-Boot] [U-Boot-DM] FPGA driver over PCI bus
by Marek Vasut 01 Sep '16

01 Sep '16

On 09/01/2016 04:46 PM, Max Ruttenberg wrote: > Hi, Hi, > I'm find myself clueless in regards to writing a driver for an FPGA over a > PCI bus. This U-Boot is running on an NXP t102xrdb board family, if that > matters. > > The documentation in doc/driver-model/pci-info.txt mentions that I can use > a macro named U_BOOT_PCI_DEVICE as alternative to listing my device in a > device tree. > > I found an example of this in drivers/net/e1000.c, and I tried to follow it > as much as was applicable (this is an ethernet driver, which my driver is > not). > > But when U-Boot starts up, my "bind" function is never called, even though > I can tell that my device with the corresponding vendor and device id is > detected using the "pci [bus]" command. > > I appreciate any help I can get. Switching to the u-boot list and Ccing Simon. What is loaded in your FPGA ? -- Best regards, Marek Vasut

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[U-Boot] [PATCH] fsl_sfp : Modify macros as per changes in SFP v3.4
by Sumit Garg 01 Sep '16

01 Sep '16

In SFP v3.4 support for 8 keys in SRK table has been added which leads to corresponding changes in OSPR key revocation field. So modify OSPR_KEY_REVOC_XXX macros accordingly. Signed-off-by: Sumit Garg <sumit.garg(a)nxp.com> --- include/fsl_sfp.h | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) diff --git a/include/fsl_sfp.h b/include/fsl_sfp.h index 2976a2c..42ff942 100644 --- a/include/fsl_sfp.h +++ b/include/fsl_sfp.h @@ -32,7 +32,7 @@ /* Number of SRKH registers */ #define NUM_SRKH_REGS 8 -#if defined(CONFIG_SYS_FSL_SFP_VER_3_2) || \ +#if defined(CONFIG_SYS_FSL_SFP_VER_3_2) || \ defined(CONFIG_SYS_FSL_SFP_VER_3_4) struct ccsr_sfp_regs { u32 ospr; /* 0x200 */ @@ -57,7 +57,7 @@ struct ccsr_sfp_regs { u32 srk_hash[NUM_SRKH_REGS]; /* 0x23c Super Root Key Hash */ u32 oem_uid; /* 0x9c OEM Unique ID */ u8 reserved2[0x04]; - u32 ovpr; /* 0xA4 Intent To Secure */ + u32 ovpr; /* 0xA4 Intent To Secure */ u8 reserved4[0x08]; u32 fsl_uid; /* 0xB0 FSL Unique ID */ u8 reserved5[0x04]; @@ -68,19 +68,26 @@ struct ccsr_sfp_regs { #else struct ccsr_sfp_regs { u8 reserved0[0x40]; - u32 ospr; /* 0x40 OEM Security Policy Register */ + u32 ospr; /* 0x40 OEM Security Policy Register */ u8 reserved2[0x38]; u32 srk_hash[8]; /* 0x7c Super Root Key Hash */ - u32 oem_uid; /* 0x9c OEM Unique ID */ + u32 oem_uid; /* 0x9c OEM Unique ID */ u8 reserved4[0x4]; - u32 ovpr; /* 0xA4 OEM Validation Policy Register */ + u32 ovpr; /* 0xA4 OEM Validation Policy Register */ u8 reserved8[0x8]; - u32 fsl_uid; /* 0xB0 FSL Unique ID */ + u32 fsl_uid; /* 0xB0 FSL Unique ID */ }; #endif + #define ITS_MASK 0x00000004 #define ITS_BIT 2 -#define OSPR_KEY_REVOC_SHIFT 13 -#define OSPR_KEY_REVOC_MASK 0x0000e000 + +#if defined(CONFIG_SYS_FSL_SFP_VER_3_4) +#define OSPR_KEY_REVOC_SHIFT 9 +#define OSPR_KEY_REVOC_MASK 0x0000fe00 +#else +#define OSPR_KEY_REVOC_SHIFT 13 +#define OSPR_KEY_REVOC_MASK 0x0000e000 +#endif /* CONFIG_SYS_FSL_SFP_VER_3_4 */ #endif -- 1.8.1.4

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[U-Boot] [PATCH] armv7: ls102xa: add lowlevel init
by Xiaoliang Yang 01 Sep '16

01 Sep '16

Add lowlevel init in ls102xa, and delete the CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h Signed-off-by: Xiaoliang Yang <xiaoliang.yang(a)nxp.com> --- arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/ls102xa/soc.c | 4 ++++ include/configs/ls1021atwr.h | 1 - 3 files changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 0d4bfbc..c1eeefd 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -12,7 +12,7 @@ obj-y += cache_v7.o cache_v7_asm.o obj-y += cpu.o cp15.o obj-y += syslib.o -ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI)$(CONFIG_ARCH_SOCFPGA),) +ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI)$(CONFIG_ARCH_SOCFPGA)$(CONFIG_LS102XA),) ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y) obj-y += lowlevel_init.o endif diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c index b1b0c71..659a2d0 100644 --- a/arch/arm/cpu/armv7/ls102xa/soc.c +++ b/arch/arm/cpu/armv7/ls102xa/soc.c @@ -58,6 +58,10 @@ unsigned int get_soc_major_rev(void) return major; } +void s_init(void) +{ +} + int arch_soc_init(void) { struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 2f19950..f62ac7f 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -20,7 +20,6 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_DEEP_SLEEP #ifdef CONFIG_DEEP_SLEEP -- 2.1.0.27.g96db324

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[U-Boot] ext4 delete file fails when ext4 extents enabled in filesystem
by Thomas Schaefer 01 Sep '16

01 Sep '16

Hi Stefan, applying patch [U-Boot,v4,06/13]ext4 and Michael Walles patch [U-Boot,v4,3/4]ext4, I'm now able to write into directories on ext4 fs from u-boot. However, when deleting a given file (i.e. when writing to an existing filename), u-boot crashes when ext4 extents are enabled. Some debugging showd that blknr from 'read_allocated_block' function returns negative value. I can only guess, maybe its due to 64 bit values calculated from ee_start_hi and ee_start_lo entries in the ext4_extent structure. When disabling extents in the ext4 fs, deleting a given file is working. Best regards, Thomas Schäfer

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[U-Boot] [PATCH 1/4] ARM64: zynqmp: Add USB boot mode
by Michal Simek 01 Sep '16

01 Sep '16

Add USB boot mode. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- arch/arm/include/asm/arch-zynqmp/hardware.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index bcb243416a2a..10d67d0fb7b0 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -69,6 +69,7 @@ struct iou_scntr_secure { #define SD_MODE1 0x00000005 /* sd 1 */ #define NAND_MODE 0x00000004 #define EMMC_MODE 0x00000006 +#define USB_MODE 0x00000007 #define JTAG_MODE 0x00000000 #define BOOT_MODE_USE_ALT 0x100 #define BOOT_MODE_ALT_SHIFT 12 -- 1.9.1

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[U-Boot] [PATCH] ARM64: zynqmp: Move BSS location to the beginning of ram
by Michal Simek 01 Sep '16

01 Sep '16

With SPL_DFU support memory layout needs to be cleanup that's why move bss to the start of memory. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- include/configs/xilinx_zynqmp.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index d3587c06df04..6e4910535a5d 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -257,8 +257,8 @@ #define CONFIG_SPL_MAX_SIZE 0x20000 /* Just random location in OCM */ -#define CONFIG_SPL_BSS_START_ADDR 0x1000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x2000000 +#define CONFIG_SPL_BSS_START_ADDR 0x0 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_LIBCOMMON_SUPPORT -- 1.9.1

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