September 2016 - U-Boot

[U-Boot] [Patch v4 0/8] Add LS1046ARDB&QDS board support
by Gong Qianyu 05 Sep '16

05 Sep '16

Hi all, This is version 4 patchset mainly to add support for both LS1046ARDB&QDS board. It should be based on two DDR patches to work well on LS1046ARDB or LS1046AQDS. The two patches are: http://patchwork.ozlabs.org/patch/663534/ http://patchwork.ozlabs.org/patch/663535/ PCIe and USB are not supported yet due to lack of some driver patches and I'll add them once they're ready for upstream. Please help to review. Thanks very much! Changes in v4: - Extend SPL max size and pad_to size for SD boot. - Add LS1046AQDS board support patch. Changes in v3: - Remove redundant sd rcw .cfg files. - Adjust the format of memory map in readme. - Add emmc boot support. Changes in v2: - Add ERRATUM_A008511. - Use values directly instead of macros for SATA ECC. - Add >60 characters' paragraph for the board help. - Fix the memory map in readme. - Remove unused flash r/w functions. - Remove DDR3 defines. - Revise some commit messages. Mingkai Hu (2): armv8: fsl-layerscape: Increase L2 Data RAM latency and L2 Tag RAM latency armv8: ls1046ardb: Add LS1046ARDB board support Shaohui Xie (5): ddr: fsl: fix a compile issue Export memset for standalone AQ FW load apps armv8: fsl-layerscape: add define CONFIG_STANDALONE_LOAD_ADDR for standalone app armv8: ls1046a: disable SATA ECC in DCSR armv8: ls1046aqds: Add LS1046AQDS board support Shengzhou Liu (1): armv8: ls1046a: Enable DDR erratum for ls1046a arch/arm/Kconfig | 24 + arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 15 + arch/arm/cpu/armv8/fsl-layerscape/soc.c | 4 + arch/arm/dts/Makefile | 3 + arch/arm/dts/fsl-ls1046a-qds-duart.dts | 16 + arch/arm/dts/fsl-ls1046a-qds-lpuart.dts | 16 + arch/arm/dts/fsl-ls1046a-qds.dtsi | 81 ++++ arch/arm/dts/fsl-ls1046a-rdb.dts | 44 ++ arch/arm/dts/fsl-ls1046a.dtsi | 220 +++++++++ arch/arm/include/asm/arch-fsl-layerscape/config.h | 8 + board/freescale/common/vid.c | 8 +- board/freescale/ls1046aqds/Kconfig | 15 + board/freescale/ls1046aqds/MAINTAINERS | 11 + board/freescale/ls1046aqds/Makefile | 9 + board/freescale/ls1046aqds/README | 70 +++ board/freescale/ls1046aqds/ddr.c | 140 ++++++ board/freescale/ls1046aqds/ddr.h | 44 ++ board/freescale/ls1046aqds/eth.c | 415 +++++++++++++++++ board/freescale/ls1046aqds/ls1046aqds.c | 313 +++++++++++++ board/freescale/ls1046aqds/ls1046aqds_pbi.cfg | 17 + board/freescale/ls1046aqds/ls1046aqds_qixis.h | 39 ++ board/freescale/ls1046aqds/ls1046aqds_rcw_nand.cfg | 7 + .../freescale/ls1046aqds/ls1046aqds_rcw_sd_ifc.cfg | 8 + .../ls1046aqds/ls1046aqds_rcw_sd_qspi.cfg | 8 + board/freescale/ls1046ardb/Kconfig | 16 + board/freescale/ls1046ardb/MAINTAINERS | 9 + board/freescale/ls1046ardb/Makefile | 10 + board/freescale/ls1046ardb/README | 76 ++++ board/freescale/ls1046ardb/cpld.c | 158 +++++++ board/freescale/ls1046ardb/cpld.h | 49 ++ board/freescale/ls1046ardb/ddr.c | 140 ++++++ board/freescale/ls1046ardb/ddr.h | 44 ++ board/freescale/ls1046ardb/eth.c | 77 ++++ board/freescale/ls1046ardb/ls1046ardb.c | 136 ++++++ board/freescale/ls1046ardb/ls1046ardb_pbi.cfg | 22 + board/freescale/ls1046ardb/ls1046ardb_rcw_emmc.cfg | 7 + board/freescale/ls1046ardb/ls1046ardb_rcw_sd.cfg | 7 + configs/ls1046aqds_defconfig | 28 ++ configs/ls1046aqds_lpuart_defconfig | 29 ++ configs/ls1046aqds_nand_defconfig | 30 ++ configs/ls1046aqds_qspi_defconfig | 30 ++ configs/ls1046aqds_sdcard_ifc_defconfig | 30 ++ configs/ls1046aqds_sdcard_qspi_defconfig | 31 ++ configs/ls1046ardb_emmc_defconfig | 26 ++ configs/ls1046ardb_qspi_defconfig | 25 ++ configs/ls1046ardb_sdcard_defconfig | 26 ++ drivers/ddr/fsl/fsl_ddr_gen4.c | 7 +- include/_exports.h | 1 + include/configs/ls1046a_common.h | 209 +++++++++ include/configs/ls1046aqds.h | 498 +++++++++++++++++++++ include/configs/ls1046ardb.h | 242 ++++++++++ include/exports.h | 2 +- 52 files changed, 3494 insertions(+), 6 deletions(-) -- 2.1.0.27.g96db324 Regards, Qianyu

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[U-Boot] [PATCH] armv8: Remove the codes about switching to EL1 before jumping to kernel
by Alison Wang 05 Sep '16

05 Sep '16

As CONFIG_ARMV8_SWITCH_TO_EL1 is not used now, this patch is to remove CONFIG_ARMV8_SWITCH_TO_EL1 and the corresponding functions. Signed-off-by: Alison Wang <alison.wang(a)nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 13 -------- arch/arm/cpu/armv8/start.S | 5 +-- arch/arm/cpu/armv8/transition.S | 6 ---- arch/arm/include/asm/macro.h | 47 ---------------------------- arch/arm/include/asm/system.h | 1 - arch/arm/lib/bootm.c | 3 -- arch/arm/mach-exynos/soc.c | 1 - include/configs/vexpress_aemv8a.h | 1 - include/configs/xilinx_zynqmp.h | 2 -- 9 files changed, 1 insertion(+), 78 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S index 5af6b73..d3a0117 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S @@ -325,19 +325,12 @@ ENTRY(secondary_boot_func) #endif bl secondary_switch_to_el2 -#ifdef CONFIG_ARMV8_SWITCH_TO_EL1 - bl secondary_switch_to_el1 -#endif slave_cpu: wfe ldr x0, [x11] cbz x0, slave_cpu -#ifndef CONFIG_ARMV8_SWITCH_TO_EL1 mrs x1, sctlr_el2 -#else - mrs x1, sctlr_el1 -#endif tbz x1, #25, cpu_is_le rev x0, x0 /* BE to LE conversion */ cpu_is_le: @@ -350,12 +343,6 @@ ENTRY(secondary_switch_to_el2) 1: armv8_switch_to_el2_m x0 ENDPROC(secondary_switch_to_el2) -ENTRY(secondary_switch_to_el1) - switch_el x0, 0f, 1f, 0f -0: ret -1: armv8_switch_to_el1_m x0, x1 -ENDPROC(secondary_switch_to_el1) - /* Ensure that the literals used by the secondary boot code are * assembled within it (this is required so that we can protect * this area with a single memreserve region diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 670e323..ab434a6 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -242,12 +242,9 @@ WEAK(lowlevel_init) #endif /* - * All slaves will enter EL2 and optionally EL1. + * All slaves will enter EL2. */ bl armv8_switch_to_el2 -#ifdef CONFIG_ARMV8_SWITCH_TO_EL1 - bl armv8_switch_to_el1 -#endif #endif /* CONFIG_ARMV8_MULTIENTRY */ diff --git a/arch/arm/cpu/armv8/transition.S b/arch/arm/cpu/armv8/transition.S index 253a39b..209d5c8 100644 --- a/arch/arm/cpu/armv8/transition.S +++ b/arch/arm/cpu/armv8/transition.S @@ -15,9 +15,3 @@ ENTRY(armv8_switch_to_el2) 0: ret 1: armv8_switch_to_el2_m x0 ENDPROC(armv8_switch_to_el2) - -ENTRY(armv8_switch_to_el1) - switch_el x0, 0f, 1f, 0f -0: ret -1: armv8_switch_to_el1_m x0, x1 -ENDPROC(armv8_switch_to_el1) diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h index 9bb0efa..c1b3452 100644 --- a/arch/arm/include/asm/macro.h +++ b/arch/arm/include/asm/macro.h @@ -167,53 +167,6 @@ lr .req x30 eret .endm -.macro armv8_switch_to_el1_m, xreg1, xreg2 - /* Initialize Generic Timers */ - mrs \xreg1, cnthctl_el2 - orr \xreg1, \xreg1, #0x3 /* Enable EL1 access to timers */ - msr cnthctl_el2, \xreg1 - msr cntvoff_el2, xzr - - /* Initilize MPID/MPIDR registers */ - mrs \xreg1, midr_el1 - mrs \xreg2, mpidr_el1 - msr vpidr_el2, \xreg1 - msr vmpidr_el2, \xreg2 - - /* Disable coprocessor traps */ - mov \xreg1, #0x33ff - msr cptr_el2, \xreg1 /* Disable coprocessor traps to EL2 */ - msr hstr_el2, xzr /* Disable coprocessor traps to EL2 */ - mov \xreg1, #3 << 20 - msr cpacr_el1, \xreg1 /* Enable FP/SIMD at EL1 */ - - /* Initialize HCR_EL2 */ - mov \xreg1, #(1 << 31) /* 64bit EL1 */ - orr \xreg1, \xreg1, #(1 << 29) /* Disable HVC */ - msr hcr_el2, \xreg1 - - /* SCTLR_EL1 initialization - * - * setting RES1 bits (29,28,23,22,20,11) to 1 - * and RES0 bits (31,30,27,21,17,13,10,6) + - * UCI,EE,EOE,WXN,nTWE,nTWI,UCT,DZE,I,UMA,SED,ITD, - * CP15BEN,SA0,SA,C,A,M to 0 - */ - mov \xreg1, #0x0800 - movk \xreg1, #0x30d0, lsl #16 - msr sctlr_el1, \xreg1 - - /* Return to the EL1_SP1 mode from EL2 */ - mov \xreg1, sp - msr sp_el1, \xreg1 /* Migrate SP */ - mrs \xreg1, vbar_el2 - msr vbar_el1, \xreg1 /* Migrate VBAR */ - mov \xreg1, #0x3c5 - msr spsr_el2, \xreg1 /* EL1_SP1 | D | A | I | F */ - msr elr_el2, lr - eret -.endm - #if defined(CONFIG_GICV3) .macro gic_wait_for_interrupt_m xreg1 0 : wfi diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 2bdc0be..3a22661 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -101,7 +101,6 @@ int __asm_flush_l3_cache(void); void __asm_switch_ttbr(u64 new_ttbr); void armv8_switch_to_el2(void); -void armv8_switch_to_el1(void); void gic_init(void); void gic_send_sgi(unsigned long sgino); void wait_for_wakeup(void); diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index 0838d89..e3c9832 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -194,9 +194,6 @@ static void do_nonsec_virt_switch(void) smp_kick_all_cpus(); dcache_disable(); /* flush cache before swtiching to EL2 */ armv8_switch_to_el2(); -#ifdef CONFIG_ARMV8_SWITCH_TO_EL1 - armv8_switch_to_el1(); -#endif } #endif diff --git a/arch/arm/mach-exynos/soc.c b/arch/arm/mach-exynos/soc.c index f9c7468..c27a389 100644 --- a/arch/arm/mach-exynos/soc.c +++ b/arch/arm/mach-exynos/soc.c @@ -28,6 +28,5 @@ void enable_caches(void) void lowlevel_init(void) { armv8_switch_to_el2(); - armv8_switch_to_el1(); } #endif diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 46cf83b..05bae44 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -12,7 +12,6 @@ #ifndef CONFIG_SEMIHOSTING #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING #endif -#define CONFIG_ARMV8_SWITCH_TO_EL1 #endif #define CONFIG_REMAKE_ELF diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index e776e32..c858491 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -13,8 +13,6 @@ #define CONFIG_REMAKE_ELF -/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */ - #define CONFIG_SYS_NO_FLASH /* Generic Interrupt Controller Definitions */ -- 2.1.0.27.g96db324

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[U-Boot] Passing squashfs of unknown size to linux
by kkaras 05 Sep '16

05 Sep '16

Hi, I would like to pass a rootfs.squashfs image to linux with the initrd in the bootargs parameter, but I can only get it to work by including the size of the image (e.g. ",21M"). Is there a way to make this work without hardcoding the size of the image in u-boot? This is my current configuration: /set bootargs 'console=ttymxc0,115200 root=/dev/ram0 ro initrd=0x83800000,21M rootfstype=squashfs' bootz 0x80800000 - 0x83000000/ During production, the rootfs.squashfs image is transferred to RAM without involving u-boot, so u-boot does not know the size of the image. The tool loading the image into RAM obviously know the size, but I do not have a shell into u-boot, so there is no easy way to tell u-boot. I have considered prepending the size of the image, to the image it self, and have u-boot extract it from RAM. However, I'm wondering if there is a better method? -- View this message in context: http://u-boot.10912.n7.nabble.com/Passing-squashfs-of-unknown-size-to-linux… Sent from the U-Boot mailing list archive at Nabble.com.

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[U-Boot] [PATCH v2 0/4] Migrate Vybrid USB driver to driver model
by Sanchayan Maity 04 Sep '16

04 Sep '16

Hello, This is the second version of the patchset for migrating Vybrid USB driver to driver model. Compare to the first version, this version takes care of dr_mode property and correctly handles OTG as well when gpio is specified for use as ID detection pin. This is an essential requirement for OTG as Vybrid USB controller is not a true OTG though it can be configured as either host or device. The ID pin which is unique for OTG operation is not present on Vybrid. The problem with client that I was observing was related to sequence numbers. While trying to implement the OTG functionality I observed that if during probe of USB0 if it returns ENODEV, the probe of USB1 provides a sequence number of 0 while we expect 1. The code relies on sequence numbers for initialising the appropriate peripherals. I use the bind operation to force a sequence number. This also seems to solve the problems I was having with USB client and mentioned in the previous version of the patchset. Host and client functionality are both functional with this patch. Patch series is based on top of latest u-boot master at the moment of this writing. Tested on Toradex Colibri Vybrid VF61 module. Thanks to Lukasz and Stefan for their comments. V1 Patches: [1]. https://patchwork.ozlabs.org/patch/655370/ [2]. https://patchwork.ozlabs.org/patch/655371/ [3]. https://patchwork.ozlabs.org/patch/655372/ [4]. https://patchwork.ozlabs.org/patch/655373/ Sanchayan Maity (4): usb: host: ehci-vf: Migrate Vybrid USB to driver model ARM: dts: vf: Add device tree node for USB on Vybrid ARM: dts: vf-colibri: Enable USB device tree node for Colibri Vybrid configs: colibri_vf_defconfig: Enable USB driver model for Colibri Vybrid arch/arm/dts/vf-colibri.dtsi | 11 +++ arch/arm/dts/vf.dtsi | 14 +++ configs/colibri_vf_defconfig | 1 + drivers/usb/host/ehci-vf.c | 208 +++++++++++++++++++++++++++++++++++++++++-- 4 files changed, 227 insertions(+), 7 deletions(-) -- 2.9.2

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[U-Boot] [PATCH] spi: zynq: Use variable to remove u32 to u64 conversions
by Michal Simek 04 Sep '16

04 Sep '16

Current code generates warning when it is compiled for arm64: Warnings: In file included from drivers/spi/zynq_spi.c:14:0: drivers/spi/zynq_spi.c: In function ‘zynq_spi_init_hw’: drivers/spi/zynq_spi.c:95:9: warning: large integer implicitly truncated to unsigned type [-Woverflow] writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, &regs->enr); ^ ./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’ #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) ^ drivers/spi/zynq_spi.c: In function ‘zynq_spi_release_bus’: drivers/spi/zynq_spi.c:177:9: warning: large integer implicitly truncated to unsigned type [-Woverflow] writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, &regs->enr); ^ ./arch/arm/include/asm/io.h:146:34: note: in definition of macro ‘writel’ #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) ^ This patch is using one variable to do conversion via u32 variable. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- drivers/spi/zynq_spi.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c index 09ae1be7e987..7a176a2cd6dd 100644 --- a/drivers/spi/zynq_spi.c +++ b/drivers/spi/zynq_spi.c @@ -92,7 +92,8 @@ static void zynq_spi_init_hw(struct zynq_spi_priv *priv) u32 confr; /* Disable SPI */ - writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, &regs->enr); + confr = ZYNQ_SPI_ENR_SPI_EN_MASK; + writel(~confr, &regs->enr); /* Disable Interrupts */ writel(ZYNQ_SPI_IXR_ALL_MASK, &regs->idr); @@ -173,8 +174,10 @@ static int zynq_spi_release_bus(struct udevice *dev) struct udevice *bus = dev->parent; struct zynq_spi_priv *priv = dev_get_priv(bus); struct zynq_spi_regs *regs = priv->regs; + u32 confr; - writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, &regs->enr); + confr = ZYNQ_SPI_ENR_SPI_EN_MASK; + writel(~confr, &regs->enr); return 0; } -- 1.9.1

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[U-Boot] Please pull u-boot-sunxi master (v2016.09 fixes)
by Hans de Goede 03 Sep '16

03 Sep '16

Hi Tom, Here is a sunxi pull-req with some recent fixes for v2016.09. The main reason for this pull-req is a couple of fixes for the sun8i ethernet support (which is new in v2016.0). Besides that this also adds 3 new boards which were pending in sunxi-next. The following changes since commit b615267633996a9410a88b54a55965d8b021f6f8: ARM: tegra: Add support for TK1-SOM board from Colorado Engineering (2016-09-01 09:24:30 -0700) are available in the git repository at: http://git.denx.de/u-boot-sunxi.git master for you to fetch changes up to de300ea5db009d58fbafa0736d37457feaab770b: sunxi: Add defconfig and dts file for the Orange Pi Plus2E SBC (2016-09-03 13:05:43 +0200) ---------------------------------------------------------------- Chen-Yu Tsai (1): sunxi: Fix H3 EMAC syscon register address Hans de Goede (3): sunxi: Sync h3-orangepi dts files with kernel sunxi: Enable emac on H3 orangepi boards sunxi: Add defconfig and dts file for the Orange Pi Plus2E SBC Icenowy Zheng (2): sunxi: add proper device tree for iNet D978 rev2 boards sunxi: Add iNet D978 rev2 defconfig Stefan Mavrodiev (1): sunxi: Add support for A33-OLinuXino board arch/arm/dts/Makefile | 5 +- arch/arm/dts/sun8i-a33-inet-d978-rev2.dts | 88 ++++++++++++ arch/arm/dts/sun8i-a33-olinuxino.dts | 226 ++++++++++++++++++++++++++++++ arch/arm/dts/sun8i-h3-orangepi-2.dts | 11 ++ arch/arm/dts/sun8i-h3-orangepi-pc.dts | 1 + arch/arm/dts/sun8i-h3-orangepi-plus.dts | 72 ++++------ arch/arm/dts/sun8i-h3-orangepi-plus2e.dts | 83 +++++++++++ arch/arm/dts/sun8i-h3.dtsi | 5 +- board/sunxi/MAINTAINERS | 11 ++ configs/A33-OLinuXino_defconfig | 43 ++++++ configs/iNet_D978_rev2_defconfig | 26 ++++ configs/orangepi_2_defconfig | 1 + configs/orangepi_plus2e_defconfig | 19 +++ configs/orangepi_plus_defconfig | 3 +- 14 files changed, 542 insertions(+), 52 deletions(-) create mode 100644 arch/arm/dts/sun8i-a33-inet-d978-rev2.dts create mode 100644 arch/arm/dts/sun8i-a33-olinuxino.dts create mode 100644 arch/arm/dts/sun8i-h3-orangepi-plus2e.dts create mode 100644 configs/A33-OLinuXino_defconfig create mode 100644 configs/iNet_D978_rev2_defconfig create mode 100644 configs/orangepi_plus2e_defconfig Regards, Hans

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[U-Boot] [PATCH v2] sunxi: Add support for A33-OLinuXino board
by Stefan Mavrodiev 03 Sep '16

03 Sep '16

A33-OLinuXino is A33 development board designed by Olimex LTD. It has AXP223 PMU, 1GB DRAM, a micro SD card, one USB-OTG connector, headphone and mic jacks, connector for LiPo battery and optional 4GB NAND Flash. It has two 40-pin headers. One for LCD panel, and one for additional modules. Also there is CSI/DSI connector. The dts files are identical to the ones submitted to the upstream kernel. Signed-off-by: Stefan Mavrodiev <stefan.mavrodiev(a)gmail.com> --- Changes for v2: - Reworked defconfig - Synced dts with upstream kernel - Added maintainer arch/arm/dts/Makefile | 1 + arch/arm/dts/sun8i-a33-olinuxino.dts | 226 +++++++++++++++++++++++++++++++++++ board/sunxi/MAINTAINERS | 5 + configs/A33-OLinuXino_defconfig | 43 +++++++ 4 files changed, 275 insertions(+) create mode 100644 arch/arm/dts/sun8i-a33-olinuxino.dts create mode 100644 configs/A33-OLinuXino_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7d1944f..f2de09a 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -243,6 +243,7 @@ dtb-$(CONFIG_MACH_SUN8I_A23) += \ sun8i-a23-q8-tablet.dtb dtb-$(CONFIG_MACH_SUN8I_A33) += \ sun8i-a33-ga10h-v1.1.dtb \ + sun8i-a33-olinuxino.dtb \ sun8i-a33-q8-tablet.dtb \ sun8i-a33-sinlinx-sina33.dtb \ sun8i-r16-parrot.dtb diff --git a/arch/arm/dts/sun8i-a33-olinuxino.dts b/arch/arm/dts/sun8i-a33-olinuxino.dts new file mode 100644 index 0000000..9ea637e --- /dev/null +++ b/arch/arm/dts/sun8i-a33-olinuxino.dts @@ -0,0 +1,226 @@ +/* + * Copyright 2016 - Stefan Mavrodiev <stefan.mavrodiev(a)gmail.com> + * Olimex LTD. <support(a)olimex.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-a33.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + model = "Olimex A33-OLinuXino"; + compatible = "olimex,a33-olinuxino","allwinner,sun8i-a33"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pin_olinuxino>; + + green { + label = "a33-olinuxino:green:usr"; + gpios = <&pio 1 7 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino>; + vmmc-supply = <&reg_dcdc1>; + bus-width = <4>; + cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ + cd-inverted; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&pio { + led_pin_olinuxino: led_pins@0 { + allwinner,pins = "PB7"; + allwinner,function = "gpio_out"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 { + allwinner,pins = "PB4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + usb0_id_detect_pin: usb0_id_detect_pin@0 { + allwinner,pins = "PB3"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; +}; + +&r_rsb { + status = "okay"; + + axp22x: pmic@3a3 { + compatible = "x-powers,axp223"; + reg = <0x3a3>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + eldoin-supply = <&reg_dcdc1>; + x-powers,drive-vbus-en; + }; +}; + +#include "axp22x.dtsi" + +&reg_aldo1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-io"; +}; + +&reg_aldo2 { + regulator-always-on; + regulator-min-microvolt = <2350000>; + regulator-max-microvolt = <2650000>; + regulator-name = "vdd-dll"; +}; + +&reg_aldo3 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-avcc"; +}; + +&reg_dc1sw { + regulator-name = "vcc-lcd"; +}; + +&reg_dc5ldo { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpus"; +}; + +&reg_dcdc1 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3"; +}; + +&reg_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-sys"; +}; + +&reg_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +&reg_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vcc-dram"; +}; + +&reg_drivevbus { + regulator-name = "usb0-vbus"; + status = "okay"; +}; + +&reg_rtc_ldo { + regulator-name = "vcc-rtc"; +}; + +&simplefb_lcd { + vcc-lcd-supply = <&reg_dc1sw>; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_b>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usb_power_supply { + status = "okay"; +}; + +&usbphy { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>; + usb0_id_det-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ + usb0_vbus_power-supply = <&usb_power_supply>; + usb0_vbus-supply = <&reg_drivevbus>; + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 7072bd8..e9ba0f4 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -88,6 +88,11 @@ M: Iain Paton <ipaton0(a)gmail.com> S: Maintained F: configs/A20-OLinuXino-Lime2_defconfig +A33-OLINUXINO BOARD +M: Stefan Mavrodiev <stefan.mavrodiev(a)gmail.com> +S: Maintained +F: configs/A33-OLinuXino_defconfig + AINOL AW1 BOARD M: Paul Kocialkowski <contact(a)paulk.fr> S: Maintained diff --git a/configs/A33-OLinuXino_defconfig b/configs/A33-OLinuXino_defconfig new file mode 100644 index 0000000..a175a40 --- /dev/null +++ b/configs/A33-OLinuXino_defconfig @@ -0,0 +1,43 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN8I_A33=y + +CONFIG_DRAM_CLK=432 +CONFIG_DRAM_ZQ=15291 +CONFIG_DRAM_ODT_EN=y + +CONFIG_MMC0_CD_PIN="PB4" +CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" +CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" +CONFIG_AXP_GPIO=y +CONFIG_USB0_ID_DET="PB3" +CONFIG_USB_MUSB_HOST=y +CONFIG_USB_MUSB_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-olinuxino" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y + +CONFIG_VIDEO=y +# CONFIG_VIDEO_VGA_VIA_LCD is not set +CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:3,vmode:0" +CONFIG_VIDEO_LCD_DCLK_PHASE=0 +CONFIG_VIDEO_LCD_POWER="" +CONFIG_VIDEO_LCD_RESET="" +CONFIG_VIDEO_LCD_BL_EN="PB2" +CONFIG_VIDEO_LCD_BL_PWM="PH0" +CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW=y + +CONFIG_AXP_DCDC1_VOLT=3300 -- 2.9.3

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[U-Boot] [PATCH] sunxi: Fix H3 EMAC syscon register address
by Chen-Yu Tsai 03 Sep '16

03 Sep '16

The sun8i-emac driver follows an old version of the proposed DT bindings, where the EMAC clock and EPHY control register range is listed directly, rather than through a syscon phandle. Add back the syscon register range to avoid an invalid data access. We should fix the driver once the Linux kernel bindings have been finalized. Signed-off-by: Chen-Yu Tsai <wens(a)csie.org> --- arch/arm/dts/sun8i-h3.dtsi | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi index 6babaf37177f..afa60793a235 100644 --- a/arch/arm/dts/sun8i-h3.dtsi +++ b/arch/arm/dts/sun8i-h3.dtsi @@ -466,9 +466,8 @@ emac: ethernet@1c30000 { compatible = "allwinner,sun8i-h3-emac"; - syscon = <&syscon>; - reg = <0x01c30000 0x104>; - reg-names = "emac"; + reg = <0x01c30000 0x104>, <0x01c00030 0x4>; + reg-names = "emac", "syscon"; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; resets = <&ccu RST_BUS_EMAC>, <&ccu RST_BUS_EPHY>; reset-names = "ahb", "ephy"; -- 2.9.3

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[U-Boot] [PATCH 0/5] imx6ul: Board updates
by Jagan Teki 03 Sep '16

03 Sep '16

The idea of this series is to use the existing imx6ul code common to all supported boards with common and meaningful names and show how the new board used with the existing code. Jagan Teki (5): imx: mx6ul: Refactor common code as mx6ul configs: mx6ul: Update comment in license notes spi: Kconfig: Move FSL_QSPI entry to non-dm place configs: mx6ul: Move SPI/SPI-FLASH configs to defconfig imx: mx6ul: Add initial board support for Engicam GEAM6UL arch/arm/cpu/armv7/mx6/Kconfig | 8 +++++++- board/freescale/mx6ul/Kconfig | 12 ++++++++++++ board/freescale/mx6ul/MAINTAINERS | 12 ++++++++++++ board/freescale/{mx6ul_14x14_evk => mx6ul}/Makefile | 2 +- board/freescale/{mx6ul_14x14_evk => mx6ul}/README | 0 .../{mx6ul_14x14_evk/mx6ul_14x14_evk.c => mx6ul/board.c} | 0 board/freescale/mx6ul_14x14_evk/Kconfig | 12 ------------ board/freescale/mx6ul_14x14_evk/MAINTAINERS | 7 ------- configs/mx6ul_14x14_evk_defconfig | 4 ++++ configs/mx6ul_9x9_evk_defconfig | 4 ++++ configs/mx6ul_geam_kit_defconfig | 11 +++++++++++ drivers/spi/Kconfig | 14 +++++++------- include/configs/{mx6ul_14x14_evk.h => mx6ul.h} | 6 +----- 13 files changed, 59 insertions(+), 33 deletions(-) create mode 100644 board/freescale/mx6ul/Kconfig create mode 100644 board/freescale/mx6ul/MAINTAINERS rename board/freescale/{mx6ul_14x14_evk => mx6ul}/Makefile (76%) rename board/freescale/{mx6ul_14x14_evk => mx6ul}/README (100%) rename board/freescale/{mx6ul_14x14_evk/mx6ul_14x14_evk.c => mx6ul/board.c} (100%) delete mode 100644 board/freescale/mx6ul_14x14_evk/Kconfig delete mode 100644 board/freescale/mx6ul_14x14_evk/MAINTAINERS create mode 100644 configs/mx6ul_geam_kit_defconfig rename include/configs/{mx6ul_14x14_evk.h => mx6ul.h} (97%) -- 2.7.4

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[U-Boot] [PATCH] README.imx6: Fix Boundary Devices name
by Fabio Estevam 02 Sep '16

02 Sep '16

From: Fabio Estevam <fabio.estevam(a)nxp.com> Correct name is "Boundary Devices". Signed-off-by: Fabio Estevam <fabio.estevam(a)nxp.com> --- doc/README.imx6 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/README.imx6 b/doc/README.imx6 index 1823fb2..73b8b0b 100644 --- a/doc/README.imx6 +++ b/doc/README.imx6 @@ -91,7 +91,7 @@ Word 0x00000002: 9f027772 00000004 2. Using imx_usb_loader for first install with SPL -------------------------------------------------- -imx_usb_loader is a very nice tool by BoundaryDevice that +imx_usb_loader is a very nice tool by Boundary Devices that allow to install U-Boot without a JTAG debugger, using the USB boot mode as described in the manual. It is a replacement for Freescale's MFGTOOLS. -- 1.9.1

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