May 2016 - U-Boot

[U-Boot] Enumerate Buetooth Dongle via xHCI fails set configuration command
by Mohammed Mohisin 18 May '16

18 May '16

Trying to enumerate a bluetooth dongle. The connected bluetooth dongle has 2 interfaces. Pls see the bottom of the mail for device and config descriptors. We are using interface 0 having 3 end points - Interrupt IN, Bulk OUT and Bulk In. For enumeration we are still using uboot's "usb_new_device()" function. As part of "usb_new_device" function, we call "usb_set_configuration()" --> "xhci_set_configuration()" --> xhci_configure_endpoints(udev, false); and fails here returning error code 17" Here are the steps to reproduce: 1) Program the latest uboot image on any board having usb 3.0 We are using Marvell's A38X. 2) Connect the bluetooth 4.0 dongle for example: "Air console" 3) set usbType 3 4) usb start u will see the below error: ------------------------------- set configuration 1 usb_control_msg: request: 0x9, requesttype: 0x0, value 0x1 index 0x0 length 0x0 EP STATE RUNNING. ERROR: Configure Endpoint command returned completion code 17. Failed to configure xHC endpoint failed to set default configuration len 177, status 80000000 Freeing device node: 1 hub: disabling port 2 Any help is highly appreciated. Regards --------------------------------------------------- ---------------------------------------------------- Manufacturer: Version: 136.9.1 Serial Number: Device Handle: 0x1020000 USB Version Compliance: 2.9 Class Code: 0xE0 Subclass Code: 0x1 Protocol: 0x1 Vendor ID: 0xA12 Product ID: 0x1 Max. Packet Size of Endpoint Zero: 64 Number of Configurations: 1 Speed: Full Selected Configuration: 1 Selected Interface: 0 Configuration: Number: 1 Number of Interfaces: 2 Description: Attributes: Self-powered Max Power: 100 mA Interface: Number: 0 Description: Class Code: 224 Subclass: 1 Protocol: 1 Number of Endpoints: 3 Endpoint: Number: 1 Transfer Type: INTERRUPT Transfer Direction: Device to Host Max Packet: 16 Interval: 1 Endpoint: Number: 2 Transfer Type: BULK Transfer Direction: Host to Device Max Packet: 64 Interval: 1 Endpoint: Number: 2 Transfer Type: BULK Transfer Direction: Device to Host Max Packet: 64 Interval: 1 Interface: Number: 1 Description: Class Code: 224 Subclass: 1 Protocol: 1 Number of Endpoints: 2 Endpoint: Number: 3 Transfer Type: ISOCHRONOUS Transfer Direction: Host to Device Max Packet: 0 Interval: 1 Endpoint: Number: 3 Transfer Type: ISOCHRONOUS Transfer Direction: Device to Host Max Packet: 0 Interval: 1 >

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[U-Boot] "make clean" not traversing into board-specific directories?
by Joerg.Scheuermann＠continental-corporation.com 18 May '16

18 May '16

Hello, I am using u-boot 2015.04 and have a mechanism implemented in the board-specific Makefile for our board, which uses xsltproc to generate header-files from xml input files - this part is working by now. what is still not working is the removal of those generated files upon calling "make clean", and after some initial inspection I found out, that the board-specific directories are completely ignored when calling "make clean"! - why is that the case, can't those directories not also be visited when cleaning things up? - where and what would I need to change for being able to clean board-specific things, please? (e.g. $BOARDDIR is empty for "make clean" - whereas it does contain the correct value for "make all") Mit freundlichen Grüßen/Best regards, Jörg Scheuermann

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[U-Boot] [PATCH] test/py: Add support for extending timeout for large files
by Michal Simek 18 May '16

18 May '16

Slow network or big image filesize is not able to be finished in 30s. Add option to user to extend timeout(in miliseconds). env__net_tftp_readable_file = { "fn": "192.168.0.105:zc706/image.ub", "addr": 0x20000000, "size": 20484981, "crc32": "873a30ae", "timeout": 50000, } Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- test/py/tests/test_net.py | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/test/py/tests/test_net.py b/test/py/tests/test_net.py index 4ab58b44248a..4f4a876c1335 100644 --- a/test/py/tests/test_net.py +++ b/test/py/tests/test_net.py @@ -46,6 +46,7 @@ env__net_tftp_readable_file = { "addr": 0x10000000, "size": 5058624, "crc32": "c2244b26", + "timeout": 50000, } """ @@ -140,6 +141,11 @@ def test_net_tftpboot(u_boot_console): if not addr: addr = u_boot_utils.find_ram_base(u_boot_console) + timeout = f.get('timeout', None) + if timeout: + orig_timeout = u_boot_console.p.timeout + u_boot_console.p.timeout = timeout + fn = f['fn'] output = u_boot_console.run_command('tftpboot %x %s' % (addr, fn)) expected_text = 'Bytes transferred = ' @@ -157,3 +163,6 @@ def test_net_tftpboot(u_boot_console): output = u_boot_console.run_command('crc32 %x $filesize' % addr) assert expected_crc in output + + if timeout: + u_boot_console.p.timeout = orig_timeout -- 1.9.1

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[U-Boot] omap3 spi registers
by Martin Hejnfelt 18 May '16

18 May '16

Hi, I am working with a board based off the am335x CPU and I am going to use SPI through u-boot. I've therefore been fiddling with u-boot and enabling spi0 through devicetree and all, which works fine (at least probing and so on). I am using CONFIG_DM_SPI for this, and u-boot-2016.05-rc3. However when I try to access the SPI peripheral, u-boot hanged. Debugging through this showed that the culprit lies within the spi_reset call inside omap3_spi.c when the SPI bus is being claimed. The function tries to write to the sysconfig register, based 0x110 off the BASE. Problem is that the base defined in device tree include I am basing myself off (am335x.dtsi) is 0x48030000, and the offset is defined to 0x10, which means the register being written to is 0x48030010 and not 0x48030110 as it is supposed to, again resulting in the hang due to the endless do-while loop in spi_reset. This I guess is due to this part priv->regs = (struct mcspi *)dev_get_addr(dev); of omap3_spi_probe as it reads the reg property off the device tree. OK, so for my question, what is really the correct way to fix this? 0x48030000 is the "real" base of McSPI0, although the first 0x100 part is revision stuff according to the technical datasheet of the am335x. If I change the reg value of the device tree to 0x48030100 then it does not hang, reset seems to work fine, however I have no idea of the influences this will have (the device tree is also used in the kernel and so on), I would guess its not the "right" way. Any input/output is appreciated. Best regards, Martin Hejnfelt

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[U-Boot] [PATCH] test/py: Detect timeout in phy negotiation
by Michal Simek 18 May '16

18 May '16

If timeout happen it should be reported as fault. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- test/py/tests/test_net.py | 3 +++ 1 file changed, 3 insertions(+) diff --git a/test/py/tests/test_net.py b/test/py/tests/test_net.py index 4f4a876c1335..833a8fd5b3e3 100644 --- a/test/py/tests/test_net.py +++ b/test/py/tests/test_net.py @@ -81,6 +81,7 @@ def test_net_dhcp(u_boot_console): u_boot_console.run_command('setenv autoload no') output = u_boot_console.run_command('dhcp') + assert 'TIMEOUT' not in output assert 'DHCP client bound to address ' in output global net_set_up @@ -117,6 +118,7 @@ def test_net_ping(u_boot_console): pytest.skip('Network not initialized') output = u_boot_console.run_command('ping $serverip') + assert 'TIMEOUT' not in output assert 'is alive' in output @pytest.mark.buildconfigspec('cmd_net') @@ -152,6 +154,7 @@ def test_net_tftpboot(u_boot_console): sz = f.get('size', None) if sz: expected_text += '%d' % sz + assert 'TIMEOUT' not in output assert expected_text in output expected_crc = f.get('crc32', None) -- 1.9.1

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[U-Boot] [PATCH 1/2] powerpc/mpc85xx: SECURE BOOT- Enable chain of trust in SPL
by Sumit Garg 18 May '16

18 May '16

As part of Chain of Trust for Secure boot, the SPL U-Boot will validate the next level U-boot image. Add a new function spl_validate_uboot to perform the validation. Enable hardware crypto operations in SPL using SEC block. In case of Secure Boot, PAMU is not bypassed. For allowing SEC block access to CPC configured as SRAM, configure PAMU. Reviewed-by: Ruchika Gupta <ruchika.gupta(a)nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal(a)nxp.com> Signed-off-by: Sumit Garg <sumit.garg(a)nxp.com> --- arch/powerpc/cpu/mpc8xxx/fsl_pamu.c | 8 +++++ arch/powerpc/cpu/mpc8xxx/pamu_table.c | 8 +++++ arch/powerpc/include/asm/fsl_secure_boot.h | 26 +++++++++++++++ board/freescale/common/fsl_chain_of_trust.c | 50 +++++++++++++++++++++++++++++ common/Makefile | 2 ++ drivers/Makefile | 1 + drivers/crypto/fsl/jr.c | 16 +++++++++ drivers/mtd/nand/fsl_ifc_spl.c | 24 ++++++++++++++ include/fsl_validate.h | 1 + 9 files changed, 136 insertions(+) diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c index 9421f1e..ede8e66 100644 --- a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c +++ b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c @@ -239,15 +239,23 @@ int pamu_init(void) spaact_size = sizeof(struct paace) * NUM_SPAACT_ENTRIES; /* Allocate space for Primary PAACT Table */ +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_PPAACT_ADDR)) + ppaact = (void *)CONFIG_SPL_PPAACT_ADDR; +#else ppaact = memalign(PAMU_TABLE_ALIGNMENT, ppaact_size); if (!ppaact) return -1; +#endif memset(ppaact, 0, ppaact_size); /* Allocate space for Secondary PAACT Table */ +#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SPAACT_ADDR)) + sec = (void *)CONFIG_SPL_SPAACT_ADDR; +#else sec = memalign(PAMU_TABLE_ALIGNMENT, spaact_size); if (!sec) return -1; +#endif memset(sec, 0, spaact_size); ppaact_phys = virt_to_phys((void *)ppaact); diff --git a/arch/powerpc/cpu/mpc8xxx/pamu_table.c b/arch/powerpc/cpu/mpc8xxx/pamu_table.c index 26c5ea4..a8e6f51 100644 --- a/arch/powerpc/cpu/mpc8xxx/pamu_table.c +++ b/arch/powerpc/cpu/mpc8xxx/pamu_table.c @@ -28,6 +28,14 @@ void construct_pamu_addr_table(struct pamu_addr_tbl *tbl, int *num_entries) i++; #endif +#if (defined(CONFIG_SPL_BUILD) && (CONFIG_SYS_INIT_L3_VADDR)) + tbl->start_addr[i] = + (uint64_t)virt_to_phys((void *)CONFIG_SYS_INIT_L3_VADDR); + tbl->size[i] = 256 * 1024; /* 256K CPC flash */ + tbl->end_addr[i] = tbl->start_addr[i] + tbl->size[i] - 1; + + i++; +#endif debug("PAMU address\t\t\tsize\n"); for (j = 0; j < i ; j++) debug("%llx \t\t\t%llx\n", tbl->start_addr[j], tbl->size[j]); diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index c45cace..e801517 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -72,6 +72,30 @@ #ifdef CONFIG_CHAIN_OF_TRUST +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_DM 1 +#define CONFIG_SPL_CRYPTO_SUPPORT +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +/* + * PPAACT and SPAACT table for PAMU must be placed on DDR after DDR init + * due to space crunch on CPC and thus malloc will not work. + */ +#define CONFIG_SPL_PPAACT_ADDR 0x2e000000 +#define CONFIG_SPL_SPAACT_ADDR 0x2f000000 +#define CONFIG_SPL_JR0_LIODN_S 454 +#define CONFIG_SPL_JR0_LIODN_NS 458 +/* + * Define the key hash for U-Boot here if public/private key pair used to + * sign U-boot are different from the SRK hash put in the fuse + * Example of defining KEY_HASH is + * #define CONFIG_SPL_UBOOT_KEY_HASH \ + * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" + * else leave it defined as NULL + */ + +#define CONFIG_SPL_UBOOT_KEY_HASH NULL +#endif /* ifdef CONFIG_SPL_BUILD */ + #define CONFIG_CMD_ESBC_VALIDATE #define CONFIG_CMD_BLOB #define CONFIG_FSL_SEC_MON @@ -87,6 +111,7 @@ #define CONFIG_FSL_CAAM #endif +#ifndef CONFIG_SPL_BUILD /* fsl_setenv_chain_of_trust() must be called from * board_late_init() */ @@ -124,5 +149,6 @@ #endif /* #ifdef CONFIG_BOOTSCRIPT_COPY_RAM */ #include <config_fsl_chain_trust.h> +#endif /* #ifndef CONFIG_SPL_BUILD */ #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ #endif diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c index ecfcc82..d24149b 100644 --- a/board/freescale/common/fsl_chain_of_trust.c +++ b/board/freescale/common/fsl_chain_of_trust.c @@ -6,7 +6,17 @@ #include <common.h> #include <fsl_validate.h> +#include <fsl_secboot_err.h> #include <fsl_sfp.h> +#include <dm/root.h> + +#ifdef CONFIG_ADDR_MAP +#include <asm/mmu.h> +#endif + +#ifdef CONFIG_FSL_CORENET +#include <asm/fsl_pamu.h> +#endif #ifdef CONFIG_LS102XA #include <asm/arch/immap_ls102xa.h> @@ -52,6 +62,7 @@ int fsl_check_boot_mode_secure(void) return 0; } +#ifndef CONFIG_SPL_BUILD int fsl_setenv_chain_of_trust(void) { /* Check Boot Mode @@ -68,3 +79,42 @@ int fsl_setenv_chain_of_trust(void) setenv("bootcmd", CONFIG_CHAIN_BOOT_CMD); return 0; } +#endif + +#ifdef CONFIG_SPL_BUILD +void spl_validate_uboot(uint32_t hdr_addr, uint32_t img_addr) +{ + int res; + + /* Check Boot Mode + * If Boot Mode is Non-Secure, skip validation + */ + if (fsl_check_boot_mode_secure() == 0) + return; + + printf("SPL: Validating U-Boot image\n"); + +#ifdef CONFIG_ADDR_MAP + init_addr_map(); +#endif + +#ifdef CONFIG_FSL_CORENET + if (pamu_init() < 0) + fsl_secboot_handle_error(ERROR_ESBC_PAMU_INIT); +#endif + +#ifdef CONFIG_FSL_CAAM + if (sec_init() < 0) + fsl_secboot_handle_error(ERROR_ESBC_SEC_INIT); +#endif + +#if defined(CONFIG_DM) + dm_init_and_scan(false); +#endif + res = fsl_secboot_validate(hdr_addr, CONFIG_SPL_UBOOT_KEY_HASH, + img_addr); + + if (res == 0) + printf("SPL: Validation of U-boot successful\n"); +} +#endif diff --git a/common/Makefile b/common/Makefile index 117178a..b070780 100644 --- a/common/Makefile +++ b/common/Makefile @@ -89,6 +89,8 @@ obj-$(CONFIG_USB_KEYBOARD) += usb_kbd.o endif # !CONFIG_SPL_BUILD ifdef CONFIG_SPL_BUILD +# core +obj-$(CONFIG_SPL_CRYPTO_SUPPORT) += hash.o obj-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o obj-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o obj-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o diff --git a/drivers/Makefile b/drivers/Makefile index e7eab66..943959b 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -36,6 +36,7 @@ obj-$(CONFIG_SPL_WATCHDOG_SUPPORT) += watchdog/ obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += usb/host/ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/ obj-$(CONFIG_SPL_SATA_SUPPORT) += block/ +obj-$(CONFIG_SPL_CRYPTO_SUPPORT) += crypto/ else diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index b766470..29950cc 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -550,10 +550,26 @@ int sec_init(void) sec_out32(&sec->mcfgr, mcr); #ifdef CONFIG_FSL_CORENET +#ifdef CONFIG_SPL_BUILD + /* For SPL Build, Set the Liodns in SEC JR0 for + * creating PAMU entries corresponding to these. + * For normal build, these are set in set_liodns(). + */ + liodn_ns = CONFIG_SPL_JR0_LIODN_NS & JRNSLIODN_MASK; + liodn_s = CONFIG_SPL_JR0_LIODN_S & JRSLIODN_MASK; + + liodnr = sec_in32(&sec->jrliodnr[0].ls) & + ~(JRNSLIODN_MASK | JRSLIODN_MASK); + liodnr = liodnr | + (liodn_ns << JRNSLIODN_SHIFT) | + (liodn_s << JRSLIODN_SHIFT); + sec_out32(&sec->jrliodnr[0].ls, liodnr); +#else liodnr = sec_in32(&sec->jrliodnr[0].ls); liodn_ns = (liodnr & JRNSLIODN_MASK) >> JRNSLIODN_SHIFT; liodn_s = (liodnr & JRSLIODN_MASK) >> JRSLIODN_SHIFT; #endif +#endif ret = jr_init(); if (ret < 0) { diff --git a/drivers/mtd/nand/fsl_ifc_spl.c b/drivers/mtd/nand/fsl_ifc_spl.c index cbeb74a..30aa966 100644 --- a/drivers/mtd/nand/fsl_ifc_spl.c +++ b/drivers/mtd/nand/fsl_ifc_spl.c @@ -11,6 +11,9 @@ #include <asm/io.h> #include <fsl_ifc.h> #include <linux/mtd/nand.h> +#ifdef CONFIG_CHAIN_OF_TRUST +#include <fsl_validate.h> +#endif static inline int is_blank(uchar *addr, int page_size) { @@ -268,6 +271,27 @@ void nand_boot(void) */ flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE); #endif + +#ifdef CONFIG_CHAIN_OF_TRUST + /* + * As U-Boot header is appended at end of U-boot image, so + * calculate U-boot header address using U-boot header size. + */ +#define CONFIG_U_BOOT_HDR_ADDR \ + ((CONFIG_SYS_NAND_U_BOOT_START + \ + CONFIG_SYS_NAND_U_BOOT_SIZE) - \ + CONFIG_U_BOOT_HDR_SIZE) + spl_validate_uboot(CONFIG_U_BOOT_HDR_ADDR, + CONFIG_SYS_NAND_U_BOOT_START); + /* + * In case of failure in validation, spl_validate_uboot would + * not return back in case of Production environment with ITS=1. + * Thus U-Boot will not start. + * In Development environment (ITS=0 and SB_EN=1), the function + * may return back in case of non-fatal failures. + */ +#endif + uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START; uboot(); } diff --git a/include/fsl_validate.h b/include/fsl_validate.h index 83efcf4..a064954 100644 --- a/include/fsl_validate.h +++ b/include/fsl_validate.h @@ -207,4 +207,5 @@ int fsl_secboot_blob_decap(cmd_tbl_t *cmdtp, int flag, int argc, int fsl_check_boot_mode_secure(void); int fsl_setenv_chain_of_trust(void); +void spl_validate_uboot(uint32_t hdr_addr, uint32_t img_addr); #endif -- 1.8.1.4

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[U-Boot] [PATCH] imx: correct speed grading info for i.MX6UL
by Peng Fan 18 May '16

18 May '16

Correct speed grading info for i.MX6UL Signed-off-by: Peng Fan <peng.fan(a)nxp.com> Cc: Stefano Babic <sbabic(a)denx.de> --- arch/arm/cpu/armv7/mx6/soc.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index d4b22ad..aaa1adb 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -108,6 +108,12 @@ u32 get_cpu_rev(void) #define OCOTP_CFG3_SPEED_1GHZ 2 #define OCOTP_CFG3_SPEED_1P2GHZ 3 +/* + * For i.MX6UL + */ +#define OCOTP_CFG3_SPEED_528MHZ 1 +#define OCOTP_CFG3_SPEED_696MHZ 2 + u32 get_cpu_speed_grade_hz(void) { struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; @@ -120,6 +126,15 @@ u32 get_cpu_speed_grade_hz(void) val >>= OCOTP_CFG3_SPEED_SHIFT; val &= 0x3; + if (is_cpu_type(MXC_CPU_MX6UL)) { + if (val == OCOTP_CFG3_SPEED_528MHZ) + return 528000000; + else if (val == OCOTP_CFG3_SPEED_696MHZ) + return 69600000; + else + return 0; + } + switch (val) { /* Valid for IMX6DQ */ case OCOTP_CFG3_SPEED_1P2GHZ: -- 2.6.2

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[U-Boot] Porting Linux's MTD/NAND changes into U-Boot
by Boris Brezillon 18 May '16

18 May '16

Hi Scott, I've recently contributed a lot of MTD/NAND related patches (and intend to continue doing so). Some of them are transversal changes touching the MTD and NAND framework internals, which implies patching all NAND drivers along with the core changes. All those changes are required to properly handle modern NANDs (MLC/TLC NANDs), and I need them to add proper NAND support to the sunxi platform (and more particularly to the C.H.I.P from NextThing Co.). So my question is, how should I port those changes to U-Boot? I see that your doing "synchronization commits", but in my case this mean including a bunch of driver specific changes into this "sync commit". I think it's also worth mentioning that I plan to heavily rework the Linux NAND framework to improve NAND performances on modern NAND controllers and clarify the NAND chip / NAND controller concepts, and other people are also working on merging the BBT code of the NAND and OneNAND framework. Which unfortunately means that we're not done porting invasive changes to U-Boot :-/. Any advice is welcome. Thanks, Boris -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com

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[U-Boot] [PATCH 4/8] sun8i: Add TZPC setup for A83t
by tpearson＠raptorengineering.com 18 May '16

18 May '16

Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- arch/arm/cpu/armv7/sunxi/Makefile | 1 + arch/arm/cpu/armv7/sunxi/tzpc.c | 10 ++++++++++ arch/arm/include/asm/arch-sunxi/tzpc.h | 10 ++++++++++ arch/arm/mach-sunxi/board.c | 2 +- 4 files changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index 4d2274a..4dd449b 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -11,6 +11,7 @@ obj-y += timer.o obj-$(CONFIG_MACH_SUN6I) += tzpc.o obj-$(CONFIG_MACH_SUN8I_H3) += tzpc.o +obj-$(CONFIG_MACH_SUN8I_A83T) += tzpc.o ifndef CONFIG_SPL_BUILD ifdef CONFIG_ARMV7_PSCI diff --git a/arch/arm/cpu/armv7/sunxi/tzpc.c b/arch/arm/cpu/armv7/sunxi/tzpc.c index 6c8a0fd..7723853 100644 --- a/arch/arm/cpu/armv7/sunxi/tzpc.c +++ b/arch/arm/cpu/armv7/sunxi/tzpc.c @@ -24,4 +24,14 @@ void tzpc_init(void) writel(SUN8I_H3_TZPC_DECPORT1_ALL, &tzpc->decport1_set); writel(SUN8I_H3_TZPC_DECPORT2_ALL, &tzpc->decport2_set); #endif + +#ifdef SUN8I_A83T_TZPC_DECPORT0_ALL + /* Emable non-secure access to RAM */ + writel(R0SIZE, &tzpc->r0size); + + /* Enable non-secure access to all peripherals */ + writel(SUN8I_A83T_TZPC_DECPORT0_ALL, &tzpc->decport0_set); + writel(SUN8I_A83T_TZPC_DECPORT1_ALL, &tzpc->decport1_set); + writel(SUN8I_A83T_TZPC_DECPORT2_ALL, &tzpc->decport2_set); +#endif } diff --git a/arch/arm/include/asm/arch-sunxi/tzpc.h b/arch/arm/include/asm/arch-sunxi/tzpc.h index 95c55cd..bcf0713 100644 --- a/arch/arm/include/asm/arch-sunxi/tzpc.h +++ b/arch/arm/include/asm/arch-sunxi/tzpc.h @@ -29,6 +29,16 @@ struct sunxi_tzpc { #define SUN8I_H3_TZPC_DECPORT1_ALL 0xff #define SUN8I_H3_TZPC_DECPORT2_ALL 0x7f +#define SUN8I_A83T_TZPC_DECPORT0_ALL 0xbe +#define SUN8I_A83T_TZPC_DECPORT1_ALL 0x7f +#define SUN8I_A83T_TZPC_DECPORT2_ALL 0x10 + +/* + * TZPC Register Value : + * R0SIZE: 0x10 : Size of secured ram (64Kib) + */ +#define R0SIZE 0x10 + void tzpc_init(void); #endif /* _SUNXI_TZPC_H */ diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 20149da..4e0f7f9 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -183,7 +183,7 @@ void s_init(void) "orr r0, r0, #1 << 6\n" "mcr p15, 0, r0, c1, c0, 1\n"); #endif -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3 +#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3 || defined CONFIG_MACH_SUN8I_A83T /* Enable non-secure access to some peripherals */ tzpc_init(); #endif -- 2.8.0.rc3

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[U-Boot] [PATCH 3/8] sun8i: Extend stack size to allow for up to 8 CPUs
by tpearson＠raptorengineering.com 18 May '16

18 May '16

--- arch/arm/cpu/armv7/psci.S | 1 + arch/arm/cpu/armv7/sunxi/psci_sun6i.S | 4 ++-- arch/arm/cpu/armv7/sunxi/psci_sun7i.S | 4 ++-- 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S index 87c0c0b..18a0cc2 100644 --- a/arch/arm/cpu/armv7/psci.S +++ b/arch/arm/cpu/armv7/psci.S @@ -203,6 +203,7 @@ ENTRY(psci_get_cpu_stack_top) add r5, r5, #0x2000 @ Skip two pages lsr r5, r5, #12 @ Align to start of page lsl r5, r5, #12 + add r5, r5, #0x1000 @ Skip an additional page sub r5, r5, #4 @ reserve 1 word for target PC sub r0, r5, r0 @ here's our stack! diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S index 90b5bfd..d35b63e 100644 --- a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S +++ b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S @@ -32,8 +32,8 @@ * ._secure_text section * text_end to ALIGN_PAGE(text_end): * nothing - * ALIGN_PAGE(text_end) to ALIGN_PAGE(text_end) + 0x1000) - * 1kB of stack per CPU (4 CPUs max). + * ALIGN_PAGE(text_end) to ALIGN_PAGE(text_end) + 0x2000) + * 1kB of stack per CPU (8 CPUs max). */ .pushsection ._secure.text, "ax" diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S index e15d587..b8ac50e 100644 --- a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S +++ b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S @@ -32,8 +32,8 @@ * ._secure_text section * text_end to ALIGN_PAGE(text_end): * nothing - * ALIGN_PAGE(text_end) to ALIGN_PAGE(text_end) + 0x1000) - * 1kB of stack per CPU (4 CPUs max). + * ALIGN_PAGE(text_end) to ALIGN_PAGE(text_end) + 0x2000) + * 1kB of stack per CPU (8 CPUs max). */ .pushsection ._secure.text, "ax" -- 2.8.0.rc3

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