April 2016 - U-Boot

[U-Boot] [PATCH 0/2] pinctrl: add support for exynos7420 pinctrl driver
by Thomas Abraham 12 Apr '16

12 Apr '16

This patch series adds initial support for Exynos7420 pinctrl driver. The portions of the code that are reusable on other Exynos SoCs has been factored out into a different file. The pin state configurations are looked up from the device tree and the bindings are similar to the bindings used in the linux kernel. This patch series adds just the Exynos7420 pinctrl driver support. The rest of the Exynos7420 SoC support will be posted later. Thomas Abraham (2): pinctrl: add the DM_UC_FLAG_SEQ_ALIAS flag for numbering the devices pinctrl: Add pinctrl driver support for Exynos7420 SoC drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/exynos/Kconfig | 10 ++ drivers/pinctrl/exynos/Makefile | 9 ++ drivers/pinctrl/exynos/pinctrl-exynos.c | 141 +++++++++++++++++++++++++++ drivers/pinctrl/exynos/pinctrl-exynos.h | 77 +++++++++++++++ drivers/pinctrl/exynos/pinctrl-exynos7420.c | 121 +++++++++++++++++++++++ drivers/pinctrl/pinctrl-uclass.c | 1 + 8 files changed, 361 insertions(+), 0 deletions(-) create mode 100644 drivers/pinctrl/exynos/Kconfig create mode 100644 drivers/pinctrl/exynos/Makefile create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos.c create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos.h create mode 100644 drivers/pinctrl/exynos/pinctrl-exynos7420.c

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[U-Boot] [PATCH 3/4] ath79: ar933x: use BIT macro for bit shift operation
by Wills Wang 12 Apr '16

12 Apr '16

used a uniform BIT macro for register bit-field shift Signed-off-by: Wills Wang <wills.wang(a)live.com> --- arch/mips/mach-ath79/ar933x/ddr.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/mips/mach-ath79/ar933x/ddr.c b/arch/mips/mach-ath79/ar933x/ddr.c index 74e8e80..91452bc 100644 --- a/arch/mips/mach-ath79/ar933x/ddr.c +++ b/arch/mips/mach-ath79/ar933x/ddr.c @@ -21,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR; #define DDR_CTRL_UPD_EMRS BIT(1) #define DDR_CTRL_UPD_MRS BIT(0) -#define DDR_REFRESH_EN (1 << 14) +#define DDR_REFRESH_EN BIT(14) #define DDR_REFRESH_M 0x3ff #define DDR_REFRESH(x) ((x) & 0x3ff) #define DDR_REFRESH_VAL_25M (DDR_REFRESH_EN | DDR_REFRESH(390)) @@ -48,7 +48,7 @@ DECLARE_GLOBAL_DATA_PTR; #define DDR_CAS_L_M 0x17 #define DDR_CAS_L_S 27 #define DDR_CAS_L(x) (((x) & DDR_CAS_L_M) << DDR_CAS_L_S) -#define DDR_OPEN (1 << 30) +#define DDR_OPEN BIT(30) #define DDR_CONF_REG_VAL (DDR_TRAS(16) | DDR_TRCD(6) | \ DDR_TRP(6) | DDR_TRRD(4) | \ DDR_TRFC(30) | DDR_TMRD(15) | \ @@ -57,10 +57,10 @@ DECLARE_GLOBAL_DATA_PTR; #define DDR_BURST_LEN_S 0 #define DDR_BURST_LEN_M 0xf #define DDR_BURST_LEN(x) ((x) << DDR_BURST_LEN_S) -#define DDR_BURST_TYPE (1 << 4) -#define DDR_CNTL_OE_EN (1 << 5) -#define DDR_PHASE_SEL (1 << 6) -#define DDR_CKE (1 << 7) +#define DDR_BURST_TYPE BIT(4) +#define DDR_CNTL_OE_EN BIT(5) +#define DDR_PHASE_SEL BIT(6) +#define DDR_CKE BIT(7) #define DDR_TWR_S 8 #define DDR_TWR_M 0xf #define DDR_TWR(x) ((x) << DDR_TWR_S) @@ -76,7 +76,7 @@ DECLARE_GLOBAL_DATA_PTR; #define DDR_G_OPEN_L_S 26 #define DDR_G_OPEN_L_M 0xf #define DDR_G_OPEN_L(x) ((x) << DDR_G_OPEN_L_S) -#define DDR_HALF_WIDTH_LOW (1 << 31) +#define DDR_HALF_WIDTH_LOW BIT(31) #define DDR_CONF2_REG_VAL (DDR_BURST_LEN(8) | DDR_CNTL_OE_EN | \ DDR_CKE | DDR_TWR(6) | DDR_TRTW(14) | \ DDR_TRTP(8) | DDR_TWTR(14) | \ -- 1.9.1

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[U-Boot] [PATCH] spl: mmc: raw: Try to load u-boot if Linux image is not found
by Lokesh Vutla 12 Apr '16

12 Apr '16

If CONFIG_SPL_OS_BOOT is enabled and Linux image is not flashed at RAW_MODE_KERNEL_SECTOR in MMC, spl still assumes that Linux is available and tries to boot it and hangs. In order to avoid this, adding a check to verify if parsed image header is of type IH_OS_LINUX. If it fails then fall back to load u-boot image. Signed-off-by: Lokesh Vutla <lokeshvutla(a)ti.com> --- common/spl/spl_mmc.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index 7d3bfc6..1a10c55 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -178,6 +178,7 @@ static int mmc_load_image_raw_partition(struct mmc *mmc, int partition) static int mmc_load_image_raw_os(struct mmc *mmc) { unsigned long count; + int ret; count = mmc->block_dev.block_read(&mmc->block_dev, CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR, @@ -190,8 +191,17 @@ static int mmc_load_image_raw_os(struct mmc *mmc) return -1; } - return mmc_load_image_raw_sector(mmc, + ret = mmc_load_image_raw_sector(mmc, CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR); + if (ret) + return ret; + + if (spl_image.os != IH_OS_LINUX) { + puts("Expected Linux image is not found. Trying to start U-boot\n"); + return -ENOENT; + } + + return 0; } #else int spl_start_uboot(void) -- 2.1.4

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[U-Boot] [PATCH v2 1/2] arm: Replace v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL) with asm code
by Hans de Goede 12 Apr '16

12 Apr '16

v7_maint_dcache_all() does not work reliable when build with gcc6, see: https://bugzilla.redhat.com/show_bug.cgi?id=1318788 While debugging this I learned that v7_maint_dcache_all() is unreliable when build with gcc5 too when it is marked as noinline. This commit fixes the reliability issues by replacing the C-code with the ready to use asm implementation from the kernel. Given that this code when written as C-code clearly is quite fragile (also see the existing comments about the C-code being the way it is to get optimal assembly) and that we have a proven asm alternative, I believe that this is the best solution. Note that we actually already had a copy of the kernel's v7_flush_dcache_all() before this commit in arch/arm/mach-uniphier/arm32/lowlevel_init.S. This commit moves that code arch/arm/cpu/armv7/cache_v7_asm.S, renames it to __v7_flush_dcache_all(), and adds a v7_flush_dcache_all() wrapper which saves / restores the clobbered registers for use from C-code. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- Changes in v2: -Remove "Copyright (C) 2012-2015 Masahiro Yamada" from the header -Move the v7_flush_dcache_all asm code from arch/arm/mach-uniphier/arm32/lowlevel_init.S to arch/arm/cpu/armv7/cache_v7_asm.S instead of adding a second copy --- arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/cache_v7.c | 41 ++------------ arch/arm/cpu/armv7/cache_v7_asm.S | 84 ++++++++++++++++++++++++++++ arch/arm/mach-uniphier/arm32/lowlevel_init.S | 67 +--------------------- 4 files changed, 92 insertions(+), 102 deletions(-) create mode 100644 arch/arm/cpu/armv7/cache_v7_asm.S diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 45f346c..328c4b1 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -7,7 +7,7 @@ extra-y := start.o -obj-y += cache_v7.o +obj-y += cache_v7.o cache_v7_asm.o obj-y += cpu.o cp15.o obj-y += syslib.o diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c index 94ff488..dd07ba1 100644 --- a/arch/arm/cpu/armv7/cache_v7.c +++ b/arch/arm/cpu/armv7/cache_v7.c @@ -16,6 +16,10 @@ #define ARMV7_DCACHE_CLEAN_INVAL_RANGE 4 #ifndef CONFIG_SYS_DCACHE_OFF + +/* Asm functions from cache_v7_asm.S */ +void v7_flush_dcache_all(void); + static int check_cache_range(unsigned long start, unsigned long stop) { int ok = 1; @@ -88,34 +92,6 @@ static void v7_inval_dcache_level_setway(u32 level, u32 num_sets, DSB; } -static void v7_clean_inval_dcache_level_setway(u32 level, u32 num_sets, - u32 num_ways, u32 way_shift, - u32 log2_line_len) -{ - int way, set; - u32 setway; - - /* - * For optimal assembly code: - * a. count down - * b. have bigger loop inside - */ - for (way = num_ways - 1; way >= 0 ; way--) { - for (set = num_sets - 1; set >= 0; set--) { - setway = (level << 1) | (set << log2_line_len) | - (way << way_shift); - /* - * Clean & Invalidate data/unified - * cache line by set/way - */ - asm volatile (" mcr p15, 0, %0, c7, c14, 2" - : : "r" (setway)); - } - } - /* DSB to make sure the operation is complete */ - DSB; -} - static void v7_maint_dcache_level_setway(u32 level, u32 operation) { u32 ccsidr; @@ -142,13 +118,8 @@ static void v7_maint_dcache_level_setway(u32 level, u32 operation) log2_num_ways = log_2_n_round_up(num_ways); way_shift = (32 - log2_num_ways); - if (operation == ARMV7_DCACHE_INVAL_ALL) { - v7_inval_dcache_level_setway(level, num_sets, num_ways, + v7_inval_dcache_level_setway(level, num_sets, num_ways, way_shift, log2_line_len); - } else if (operation == ARMV7_DCACHE_CLEAN_INVAL_ALL) { - v7_clean_inval_dcache_level_setway(level, num_sets, num_ways, - way_shift, log2_line_len); - } } static void v7_maint_dcache_all(u32 operation) @@ -263,7 +234,7 @@ void invalidate_dcache_all(void) */ void flush_dcache_all(void) { - v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL); + v7_flush_dcache_all(); v7_outer_cache_flush_all(); } diff --git a/arch/arm/cpu/armv7/cache_v7_asm.S b/arch/arm/cpu/armv7/cache_v7_asm.S new file mode 100644 index 0000000..2e4629f --- /dev/null +++ b/arch/arm/cpu/armv7/cache_v7_asm.S @@ -0,0 +1,84 @@ +/* + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/linkage.h> +#include <linux/sizes.h> +#include <asm/system.h> + +#ifdef CONFIG_SYS_THUMB_BUILD +#define ARM(x...) +#define THUMB(x...) x +#else +#define ARM(x...) x +#define THUMB(x...) +#endif + +/* + * v7_flush_dcache_all() + * + * Flush the whole D-cache. + * + * Corrupted registers: r0-r7, r9-r11 (r6 only in Thumb mode) + * + * Note: copied from arch/arm/mm/cache-v7.S of Linux 4.4 + */ +ENTRY(__v7_flush_dcache_all) + dmb @ ensure ordering with previous memory accesses + mrc p15, 1, r0, c0, c0, 1 @ read clidr + mov r3, r0, lsr #23 @ move LoC into position + ands r3, r3, #7 << 1 @ extract LoC*2 from clidr + beq finished @ if loc is 0, then no need to clean +start_flush_levels: + mov r10, #0 @ start clean at cache level 0 +flush_levels: + add r2, r10, r10, lsr #1 @ work out 3x current cache level + mov r1, r0, lsr r2 @ extract cache type bits from clidr + and r1, r1, #7 @ mask of the bits for current cache only + cmp r1, #2 @ see what cache we have at this level + blt skip @ skip if no cache, or just i-cache + mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr + isb @ isb to sych the new cssr&csidr + mrc p15, 1, r1, c0, c0, 0 @ read the new csidr + and r2, r1, #7 @ extract the length of the cache lines + add r2, r2, #4 @ add 4 (line length offset) + movw r4, #0x3ff + ands r4, r4, r1, lsr #3 @ find maximum number on the way size + clz r5, r4 @ find bit position of way size increment + movw r7, #0x7fff + ands r7, r7, r1, lsr #13 @ extract max number of the index size +loop1: + mov r9, r7 @ create working copy of max index +loop2: + ARM( orr r11, r10, r4, lsl r5 ) @ factor way and cache number into r11 + THUMB( lsl r6, r4, r5 ) + THUMB( orr r11, r10, r6 ) @ factor way and cache number into r11 + ARM( orr r11, r11, r9, lsl r2 ) @ factor index number into r11 + THUMB( lsl r6, r9, r2 ) + THUMB( orr r11, r11, r6 ) @ factor index number into r11 + mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way + subs r9, r9, #1 @ decrement the index + bge loop2 + subs r4, r4, #1 @ decrement the way + bge loop1 +skip: + add r10, r10, #2 @ increment cache number + cmp r3, r10 + bgt flush_levels +finished: + mov r10, #0 @ swith back to cache level 0 + mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr + dsb st + isb + bx lr +ENDPROC(__v7_flush_dcache_all) + +ENTRY(v7_flush_dcache_all) + ARM( stmfd sp!, {r4-r5, r7, r9-r11, lr} ) + THUMB( stmfd sp!, {r4-r7, r9-r11, lr} ) + bl __v7_flush_dcache_all + ARM( ldmfd sp!, {r4-r5, r7, r9-r11, lr} ) + THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} ) + bx lr +ENDPROC(v7_flush_dcache_all) diff --git a/arch/arm/mach-uniphier/arm32/lowlevel_init.S b/arch/arm/mach-uniphier/arm32/lowlevel_init.S index dd03ad8..e2bb1fc 100644 --- a/arch/arm/mach-uniphier/arm32/lowlevel_init.S +++ b/arch/arm/mach-uniphier/arm32/lowlevel_init.S @@ -38,7 +38,7 @@ ENTRY(lowlevel_init) * to do next is to create a page table and switch over to it. */ bl create_page_table - bl v7_flush_dcache_all + bl __v7_flush_dcache_all /* Disable MMU and Dcache before switching Page Table */ mrc p15, 0, r0, c1, c0, 0 @ SCTLR (System Control Register) @@ -140,68 +140,3 @@ ENTRY(create_page_table) str r0, [r12, #4] @ mark the second section as Normal mov pc, lr ENDPROC(create_page_table) - -/* We don't use Thumb instructions for now */ -#define ARM(x...) x -#define THUMB(x...) - -/* - * v7_flush_dcache_all() - * - * Flush the whole D-cache. - * - * Corrupted registers: r0-r7, r9-r11 (r6 only in Thumb mode) - * - * - mm - mm_struct describing address space - * - * Note: copied from arch/arm/mm/cache-v7.S of Linux 4.4 - */ -ENTRY(v7_flush_dcache_all) - dmb @ ensure ordering with previous memory accesses - mrc p15, 1, r0, c0, c0, 1 @ read clidr - mov r3, r0, lsr #23 @ move LoC into position - ands r3, r3, #7 << 1 @ extract LoC*2 from clidr - beq finished @ if loc is 0, then no need to clean -start_flush_levels: - mov r10, #0 @ start clean at cache level 0 -flush_levels: - add r2, r10, r10, lsr #1 @ work out 3x current cache level - mov r1, r0, lsr r2 @ extract cache type bits from clidr - and r1, r1, #7 @ mask of the bits for current cache only - cmp r1, #2 @ see what cache we have at this level - blt skip @ skip if no cache, or just i-cache - mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr - isb @ isb to sych the new cssr&csidr - mrc p15, 1, r1, c0, c0, 0 @ read the new csidr - and r2, r1, #7 @ extract the length of the cache lines - add r2, r2, #4 @ add 4 (line length offset) - movw r4, #0x3ff - ands r4, r4, r1, lsr #3 @ find maximum number on the way size - clz r5, r4 @ find bit position of way size increment - movw r7, #0x7fff - ands r7, r7, r1, lsr #13 @ extract max number of the index size -loop1: - mov r9, r7 @ create working copy of max index -loop2: - ARM( orr r11, r10, r4, lsl r5 ) @ factor way and cache number into r11 - THUMB( lsl r6, r4, r5 ) - THUMB( orr r11, r10, r6 ) @ factor way and cache number into r11 - ARM( orr r11, r11, r9, lsl r2 ) @ factor index number into r11 - THUMB( lsl r6, r9, r2 ) - THUMB( orr r11, r11, r6 ) @ factor index number into r11 - mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way - subs r9, r9, #1 @ decrement the index - bge loop2 - subs r4, r4, #1 @ decrement the way - bge loop1 -skip: - add r10, r10, #2 @ increment cache number - cmp r3, r10 - bgt flush_levels -finished: - mov r10, #0 @ swith back to cache level 0 - mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr - dsb st - isb - mov pc, lr -ENDPROC(v7_flush_dcache_all) -- 2.7.3

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[U-Boot] [PATCH] lib/crc8: Add crc start value
by Stefan Roese 12 Apr '16

12 Apr '16

To make the usage of this function more flexible, lets add the CRC start value as parameter to this function. This way it can be used by other functions requiring different start values than 0 as well. For non-zero CRC start values to work, I've reworked the function a bit. The new implementation is copied from the Linux version in drivers/i2c/i2c-core.c / i2c_smbus_pec(). Which supports non-zero CRC stating values. I've double-checked that the results for zero starting values are identical to the results from the original version of this function. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Simon Glass <sjg(a)chromium.org> --- drivers/tpm/tpm_tis_sandbox.c | 2 +- include/linux/crc8.h | 3 ++- lib/crc8.c | 33 ++++++++++++++++++++------------- 3 files changed, 23 insertions(+), 15 deletions(-) diff --git a/drivers/tpm/tpm_tis_sandbox.c b/drivers/tpm/tpm_tis_sandbox.c index 9ea9807..4aade56 100644 --- a/drivers/tpm/tpm_tis_sandbox.c +++ b/drivers/tpm/tpm_tis_sandbox.c @@ -217,7 +217,7 @@ static int sandbox_tpm_xfer(struct udevice *dev, const uint8_t *sendbuf, rsk.struct_version = 2; rsk.uid = ROLLBACK_SPACE_KERNEL_UID; rsk.kernel_versions = 0; - rsk.crc8 = crc8((unsigned char *)&rsk, + rsk.crc8 = crc8(0, (unsigned char *)&rsk, offsetof(struct rollback_space_kernel, crc8)); memcpy(data, &rsk, sizeof(rsk)); diff --git a/include/linux/crc8.h b/include/linux/crc8.h index b5fd2ac..f7c300a 100644 --- a/include/linux/crc8.h +++ b/include/linux/crc8.h @@ -14,10 +14,11 @@ * This uses an x^8 + x^2 + x + 1 polynomial. A table-based algorithm would * be faster, but for only a few bytes it isn't worth the code size * + * @crc_start: CRC8 start value * @vptr: Buffer to checksum * @len: Length of buffer in bytes * @return CRC8 checksum */ -unsigned int crc8(const unsigned char *vptr, int len); +unsigned int crc8(unsigned int crc_start, const unsigned char *vptr, int len); #endif diff --git a/lib/crc8.c b/lib/crc8.c index 8b68a29..51d540f 100644 --- a/lib/crc8.c +++ b/lib/crc8.c @@ -6,20 +6,27 @@ #include "linux/crc8.h" -unsigned int crc8(const unsigned char *vptr, int len) +#define POLY (0x1070U << 3) + +static unsigned char _crc8(unsigned short data) { - const unsigned char *data = vptr; - unsigned int crc = 0; - int i, j; - - for (j = len; j; j--, data++) { - crc ^= (*data << 8); - for (i = 8; i; i--) { - if (crc & 0x8000) - crc ^= (0x1070 << 3); - crc <<= 1; - } + int i; + + for (i = 0; i < 8; i++) { + if (data & 0x8000) + data = data ^ POLY; + data = data << 1; } - return (crc >> 8) & 0xff; + return (unsigned char)(data >> 8); +} + +unsigned int crc8(unsigned int crc, const unsigned char *vptr, int len) +{ + int i; + + for (i = 0; i < len; i++) + crc = _crc8((crc ^ vptr[i]) << 8); + + return crc; } -- 2.8.1

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[U-Boot] [PATCH] test/py: README: link to example hook scripts
by Stephen Warren 12 Apr '16

12 Apr '16

From: Stephen Warren <swarren(a)nvidia.com> When implementing test/py hook scripts, it's helpful to read some working examples. Provide a link to some. The link was mentioned in the commit message which first added test/py, but not in any documentation file. Suggested-by: Lukasz Majewski <l.majewski(a)samsung.com> Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- test/py/README.md | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/test/py/README.md b/test/py/README.md index ba1674cb1de6..829c7efbb2d7 100644 --- a/test/py/README.md +++ b/test/py/README.md @@ -246,6 +246,12 @@ to download the U-Boot binary directly into RAM and execute it. This would avoid the need for `u-boot-test-flash` to actually write U-Boot to flash, thus saving wear on the flash chip(s). +#### Examples + +https://github.com/swarren/uboot-test-hooks contains some working example hook +scripts, and may be useful as a reference when implementing hook scripts for +your platform. These scripts are not considered part of U-Boot itself. + ### Board-type-specific configuration Each board has a different configuration and behaviour. Many of these -- 2.8.1

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[U-Boot] [PATCH] bootcounter_ram: Flush dcache after data is written into SDRAM
by Stefan Roese 12 Apr '16

12 Apr '16

This patch adds a call to flush_dcache_range() to bootcount_store() to make sure, that the bootcounter data (including the patterns) is written to memory. Without this, platforms with dcache enabled may not have the bootcounter updated upon reset. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Valentin Longchamp <valentin.longchamp(a)keymile.com> --- drivers/bootcount/bootcount_ram.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/bootcount/bootcount_ram.c b/drivers/bootcount/bootcount_ram.c index 5bdabcd..e0d2669 100644 --- a/drivers/bootcount/bootcount_ram.c +++ b/drivers/bootcount/bootcount_ram.c @@ -35,6 +35,9 @@ void bootcount_store(ulong a) writel(patterns[i % NBR_OF_PATTERNS], &save_addr[i + OFFS_PATTERN]); + /* Make sure the data is written to RAM */ + flush_dcache_range((ulong)&save_addr[0], + (ulong)&save_addr[REPEAT_PATTERN + OFFS_PATTERN]); } ulong bootcount_load(void) -- 2.8.1

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[U-Boot] [PATCH] disk: part: Enable get_info pointer for CONFIG_SPL_FAT_SUPPORT
by Michal Simek 12 Apr '16

12 Apr '16

The patch "dm: part: Convert partition API use to linker lists" (sha1: 96e5b03c8ab749b6547f6a3ceb4d4b9f274211aa) is adding new dependency for enabling SPL_EXT_SUPPORT to be able to get information about DOS partition. get_info is also required for FAT support only which is used on Xilinx Zynq boards. Reported-by: Nathan Rossi <nathan(a)nathanrossi.com> Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- include/part.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/part.h b/include/part.h index dc8e72e08f6d..e3811c68de8a 100644 --- a/include/part.h +++ b/include/part.h @@ -207,7 +207,7 @@ static inline int blk_get_device_part_str(const char *ifname, */ #ifdef CONFIG_SPL_BUILD # define part_print_ptr(x) NULL -# if defined(CONFIG_SPL_EXT_SUPPORT) || \ +# if defined(CONFIG_SPL_EXT_SUPPORT) || defined(CONFIG_SPL_FAT_SUPPORT) || \ defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION) # define part_get_info_ptr(x) x # else -- 1.9.1

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[U-Boot] [PATCH] am33xx changed BOOT_DEVICE_SPI to correct value
by Vogt, Christof 12 Apr '16

12 Apr '16

Changed BOOT_DEVICE Code for SPI on AM33xx. According AM335x reference manual page 4960 (SPRUH73L-October 2011-Revised February 2015) --- arch/arm/include/asm/arch-am33xx/spl.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h index 4ed8597..43401d0 100644 --- a/arch/arm/include/asm/arch-am33xx/spl.h +++ b/arch/arm/include/asm/arch-am33xx/spl.h @@ -43,7 +43,7 @@ #define BOOT_DEVICE_NAND_I2C 0x06 #define BOOT_DEVICE_MMC1 0x08 #define BOOT_DEVICE_MMC2 0x09 -#define BOOT_DEVICE_SPI 0x15 +#define BOOT_DEVICE_SPI 0x0B #define BOOT_DEVICE_UART 0x41 #define BOOT_DEVICE_USBETH 0x44 #define BOOT_DEVICE_CPGMAC 0x46 -- 1.9.1

3 2

[U-Boot] [PATCH V2] rpi: remove redundant board files
by Stephen Warren 12 Apr '16

12 Apr '16

Now that rpi_*defconfig and Kconfig (rather than the config header file) provide the identity of the build, we don't need to separate config headers and board directories for each RPi variant. Set CONFIG_SYS_BOARD and CONFIG_SYS_CONFIG_NAME so that we can get rid of the duplication. This requires a tiny number of extra ifdefs in the config header. The only disadvantage of this approach is that the $board/$board_name environment variables aren't as descriptive as they used to be. This isn't really an issue because those only exist to allow scripts to create DTB filenames at runtime. However, the RPi board code already sets $fdtfile to something more accurate based on FW-reported board ID anyway. While at it, unify some Kconfig select options, and add a MAINTAINERS entry for bcm283x too. Partially-suggested-by: Tom Rini <trini(a)konsulko.com> Signed-off-by: Stephen Warren <swarren(a)wwwdotorg.org> Reviewed-by: Tom Rini <trini(a)konsulko.com> --- v2: Fix commit description. --- MAINTAINERS | 10 ++ arch/arm/mach-bcm283x/Kconfig | 36 +++--- arch/arm/mach-bcm283x/Makefile | 2 +- board/raspberrypi/rpi/MAINTAINERS | 2 +- board/raspberrypi/rpi_2/MAINTAINERS | 6 - board/raspberrypi/rpi_2/Makefile | 7 -- board/raspberrypi/rpi_3/MAINTAINERS | 6 - board/raspberrypi/rpi_3/Makefile | 7 -- board/raspberrypi/rpi_3_32b/MAINTAINERS | 6 - board/raspberrypi/rpi_3_32b/Makefile | 7 -- include/configs/rpi-common.h | 206 -------------------------------- include/configs/rpi.h | 206 +++++++++++++++++++++++++++++++- include/configs/rpi_2.h | 15 --- include/configs/rpi_3.h | 14 --- include/configs/rpi_3_32b.h | 15 --- 15 files changed, 236 insertions(+), 309 deletions(-) delete mode 100644 board/raspberrypi/rpi_2/MAINTAINERS delete mode 100644 board/raspberrypi/rpi_2/Makefile delete mode 100644 board/raspberrypi/rpi_3/MAINTAINERS delete mode 100644 board/raspberrypi/rpi_3/Makefile delete mode 100644 board/raspberrypi/rpi_3_32b/MAINTAINERS delete mode 100644 board/raspberrypi/rpi_3_32b/Makefile delete mode 100644 include/configs/rpi-common.h delete mode 100644 include/configs/rpi_2.h delete mode 100644 include/configs/rpi_3.h delete mode 100644 include/configs/rpi_3_32b.h diff --git a/MAINTAINERS b/MAINTAINERS index 87e0c2ed36d0..383a4ffc3aef 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -78,6 +78,16 @@ S: Maintained T: git git://git.denx.de/u-boot-atmel.git F: arch/arm/mach-at91/ +ARM BROADCOM BCM283X +M: Stephen Warren <swarren(a)wwwdotorg.org> +S: Maintained +F: arch/arm/mach-bcm283x/ +F: drivers/gpio/bcm2835_gpio.c +F: drivers/mmc/bcm2835_sdhci.c +F: drivers/serial/serial_bcm283x_mu.c +F: drivers/video/bcm2835.c +F: include/dm/platform_data/serial_bcm283x_mu.h + ARM FREESCALE IMX M: Stefano Babic <sbabic(a)denx.de> S: Maintained diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig index f4c9502b3f1f..69f7a4663cfd 100644 --- a/arch/arm/mach-bcm283x/Kconfig +++ b/arch/arm/mach-bcm283x/Kconfig @@ -1,15 +1,31 @@ config BCM2835 bool "Broadcom BCM2835 SoC support" depends on ARCH_BCM283X + select CPU_ARM1176 config BCM2836 bool "Broadcom BCM2836 SoC support" depends on ARCH_BCM283X + select ARMV7_LPAE + select CPU_V7 config BCM2837 bool "Broadcom BCM2837 SoC support" depends on ARCH_BCM283X +config BCM2837_32B + bool "Broadcom BCM2837 SoC 32-bit support" + depends on ARCH_BCM283X + select BCM2837 + select ARMV7_LPAE + select CPU_V7 + +config BCM2837_64B + bool "Broadcom BCM2837 SoC 64-bit support" + depends on ARCH_BCM283X + select BCM2837 + select ARM64 + menu "Broadcom BCM283X family" depends on ARCH_BCM283X @@ -27,7 +43,6 @@ config TARGET_RPI This option creates a build targetting the ARM1176 ISA. select BCM2835 - select CPU_ARM1176 config TARGET_RPI_2 bool "Raspberry Pi 2" @@ -50,9 +65,7 @@ config TARGET_RPI_2 https://github.com/raspberrypi/firmware/issues/572". This option creates a build targetting the ARMv7/AArch32 ISA. - select ARMV7_LPAE select BCM2836 - select CPU_V7 config TARGET_RPI_3_32B bool "Raspberry Pi 3 32-bit build" @@ -68,9 +81,7 @@ config TARGET_RPI_3_32B about the HDMI/usbkbd console. This option creates a build targetting the ARMv7/AArch32 ISA. - select ARMV7_LPAE - select BCM2837 - select CPU_V7 + select BCM2837_32B config TARGET_RPI_3 bool "Raspberry Pi 3 64-bit build" @@ -98,16 +109,12 @@ config TARGET_RPI_3 https://github.com/raspberrypi/firmware/issues/579. This option creates a build targetting the ARMv8/AArch64 ISA. - select ARM64 - select BCM2837 + select BCM2837_64B endchoice config SYS_BOARD - default "rpi" if TARGET_RPI - default "rpi_2" if TARGET_RPI_2 - default "rpi_3_32b" if TARGET_RPI_3_32B - default "rpi_3" if TARGET_RPI_3 + default "rpi" config SYS_VENDOR default "raspberrypi" @@ -116,9 +123,6 @@ config SYS_SOC default "bcm283x" config SYS_CONFIG_NAME - default "rpi" if TARGET_RPI - default "rpi_2" if TARGET_RPI_2 - default "rpi_3_32b" if TARGET_RPI_3_32B - default "rpi_3" if TARGET_RPI_3 + default "rpi" endmenu diff --git a/arch/arm/mach-bcm283x/Makefile b/arch/arm/mach-bcm283x/Makefile index f0dadd0dbde9..5cb1b2fe94b1 100644 --- a/arch/arm/mach-bcm283x/Makefile +++ b/arch/arm/mach-bcm283x/Makefile @@ -4,5 +4,5 @@ # SPDX-License-Identifier: GPL-2.0 # -obj-$(CONFIG_TARGET_RPI) += lowlevel_init.o +obj-$(CONFIG_BCM2835) += lowlevel_init.o obj-y += init.o reset.o mbox.o phys2bus.o diff --git a/board/raspberrypi/rpi/MAINTAINERS b/board/raspberrypi/rpi/MAINTAINERS index 6dcb7bd24ecd..98c3758a9480 100644 --- a/board/raspberrypi/rpi/MAINTAINERS +++ b/board/raspberrypi/rpi/MAINTAINERS @@ -3,4 +3,4 @@ M: Stephen Warren <swarren(a)wwwdotorg.org> S: Maintained F: board/raspberrypi/rpi/ F: include/configs/rpi.h -F: configs/rpi_defconfig +F: configs/rpi_*defconfig diff --git a/board/raspberrypi/rpi_2/MAINTAINERS b/board/raspberrypi/rpi_2/MAINTAINERS deleted file mode 100644 index 85a480c9d1b0..000000000000 --- a/board/raspberrypi/rpi_2/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -RPI_2 BOARD -M: Stephen Warren <swarren(a)wwwdotorg.org> -S: Maintained -F: board/raspberrypi/rpi_2/ -F: include/configs/rpi_2.h -F: configs/rpi_2_defconfig diff --git a/board/raspberrypi/rpi_2/Makefile b/board/raspberrypi/rpi_2/Makefile deleted file mode 100644 index d82cd21f4cf7..000000000000 --- a/board/raspberrypi/rpi_2/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# -# (C) Copyright 2012,2015 Stephen Warren -# -# SPDX-License-Identifier: GPL-2.0 -# - -obj-y := ../rpi/rpi.o diff --git a/board/raspberrypi/rpi_3/MAINTAINERS b/board/raspberrypi/rpi_3/MAINTAINERS deleted file mode 100644 index 26ecd99e16fa..000000000000 --- a/board/raspberrypi/rpi_3/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -RPI_3_BOARD -M: Stephen Warren <swarren(a)wwwdotorg.org> -S: Maintained -F: board/raspberrypi/rpi_3/ -F: include/configs/rpi_3.h -F: configs/rpi_3_defconfig diff --git a/board/raspberrypi/rpi_3/Makefile b/board/raspberrypi/rpi_3/Makefile deleted file mode 100644 index 78e287487cd4..000000000000 --- a/board/raspberrypi/rpi_3/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# -# (C) Copyright 2012-2016 Stephen Warren <swarren(a)wwwdotorg.org> -# -# SPDX-License-Identifier: GPL-2.0 -# - -obj-y := ../rpi/rpi.o diff --git a/board/raspberrypi/rpi_3_32b/MAINTAINERS b/board/raspberrypi/rpi_3_32b/MAINTAINERS deleted file mode 100644 index bc9df87f03d4..000000000000 --- a/board/raspberrypi/rpi_3_32b/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -RPI_3_32B BOARD -M: Stephen Warren <swarren(a)wwwdotorg.org> -S: Maintained -F: board/raspberrypi/rpi_3_32b/ -F: include/configs/rpi_3_32b.h -F: configs/rpi_3_32b_defconfig diff --git a/board/raspberrypi/rpi_3_32b/Makefile b/board/raspberrypi/rpi_3_32b/Makefile deleted file mode 100644 index 78e287487cd4..000000000000 --- a/board/raspberrypi/rpi_3_32b/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# -# (C) Copyright 2012-2016 Stephen Warren <swarren(a)wwwdotorg.org> -# -# SPDX-License-Identifier: GPL-2.0 -# - -obj-y := ../rpi/rpi.o diff --git a/include/configs/rpi-common.h b/include/configs/rpi-common.h deleted file mode 100644 index 9aca1ace2c0b..000000000000 --- a/include/configs/rpi-common.h +++ /dev/null @@ -1,206 +0,0 @@ -/* - * (C) Copyright 2012-2016 Stephen Warren - * - * SPDX-License-Identifier: GPL-2.0 - */ - -#ifndef _RPI_COMMON_H_ -#define _RPI_COMMON_H_ - -#include <linux/sizes.h> -#include <asm/arch/timer.h> - -/* Architecture, CPU, etc.*/ -#define CONFIG_ARCH_CPU_INIT - -/* Use SoC timer for AArch32, but architected timer for AArch64 */ -#ifndef CONFIG_ARM64 -#define CONFIG_SYS_TIMER_RATE 1000000 -#define CONFIG_SYS_TIMER_COUNTER \ - (&((struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR)->clo) -#endif - -/* - * 2835 is a SKU in a series for which the 2708 is the first or primary SoC, - * so 2708 has historically been used rather than a dedicated 2835 ID. - * - * We don't define a machine type for bcm2709/bcm2836 since the RPi Foundation - * chose to use someone else's previously registered machine ID (3139, MX51_GGC) - * rather than obtaining a valid ID:-/ - * - * For the bcm2837, hopefully a machine type is not needed, since everything - * is DT. - */ -#ifdef CONFIG_BCM2835 -#define CONFIG_MACH_TYPE MACH_TYPE_BCM2708 -#endif - -/* Memory layout */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_TEXT_BASE 0x00008000 -#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE -/* - * The board really has 256M. However, the VC (VideoCore co-processor) shares - * the RAM, and uses a configurable portion at the top. We tell U-Boot that a - * smaller amount of RAM is present in order to avoid stomping on the area - * the VC uses. - */ -#define CONFIG_SYS_SDRAM_SIZE SZ_128M -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ - CONFIG_SYS_SDRAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MALLOC_LEN SZ_4M -#define CONFIG_SYS_MEMTEST_START 0x00100000 -#define CONFIG_SYS_MEMTEST_END 0x00200000 -#define CONFIG_LOADADDR 0x00200000 - -/* Flash */ -#define CONFIG_SYS_NO_FLASH - -/* Devices */ -/* GPIO */ -#define CONFIG_BCM2835_GPIO -/* LCD */ -#define CONFIG_LCD -#define CONFIG_LCD_DT_SIMPLEFB -#define LCD_BPP LCD_COLOR16 -/* - * Prevent allocation of RAM for FB; the real FB address is queried - * dynamically from the VideoCore co-processor, and comes from RAM - * not owned by the ARM CPU. - */ -#define CONFIG_FB_ADDR 0 -#define CONFIG_VIDEO_BCM2835 -#define CONFIG_SYS_WHITE_ON_BLACK -#define CONFIG_CONSOLE_SCROLL_LINES 10 - -/* SD/MMC configuration */ -#define CONFIG_GENERIC_MMC -#define CONFIG_MMC -#define CONFIG_SDHCI -#define CONFIG_MMC_SDHCI_IO_ACCESSORS -#define CONFIG_BCM2835_SDHCI - -#define CONFIG_CMD_USB -#ifdef CONFIG_CMD_USB -#define CONFIG_USB_DWC2 -#ifndef CONFIG_BCM2835 -#define CONFIG_USB_DWC2_REG_ADDR 0x3f980000 -#else -#define CONFIG_USB_DWC2_REG_ADDR 0x20980000 -#endif -#define CONFIG_USB_STORAGE -#define CONFIG_USB_HOST_ETHER -#define CONFIG_USB_ETHER_SMSC95XX -#define CONFIG_MISC_INIT_R -#define CONFIG_USB_KEYBOARD -#define CONFIG_SYS_USB_EVENT_POLL -#define CONFIG_SYS_STDIO_DEREGISTER -#endif - -/* Console UART */ -#ifdef CONFIG_BCM2837 -#define CONFIG_BCM283X_MU_SERIAL -#else -#define CONFIG_PL01X_SERIAL -#endif -#define CONFIG_CONS_INDEX 0 -#define CONFIG_BAUDRATE 115200 - -/* Console configuration */ -#define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) - -/* Environment */ -#define CONFIG_ENV_SIZE SZ_16K -#define CONFIG_ENV_IS_IN_FAT -#define FAT_ENV_INTERFACE "mmc" -#define FAT_ENV_DEVICE_AND_PART "0:1" -#define FAT_ENV_FILE "uboot.env" -#define CONFIG_FAT_WRITE -#define CONFIG_ENV_VARS_UBOOT_CONFIG -#define CONFIG_SYS_LOAD_ADDR 0x1000000 -#define CONFIG_CONSOLE_MUX -#define CONFIG_SYS_CONSOLE_IS_IN_ENV -#define CONFIG_PREBOOT "usb start" - -/* Shell */ -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_COMMAND_HISTORY - -/* Commands */ -#define CONFIG_CMD_MMC -#define CONFIG_PARTITION_UUIDS -#define CONFIG_CMD_PART - -/* ATAGs support for bootm/bootz */ -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_CMDLINE_TAG -#define CONFIG_INITRD_TAG - -#include <config_distro_defaults.h> - -/* Environment */ -#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG -#define ENV_DEVICE_SETTINGS \ - "stdin=serial,usbkbd\0" \ - "stdout=serial,lcd\0" \ - "stderr=serial,lcd\0" - -/* - * Memory layout for where various images get loaded by boot scripts: - * - * I suspect address 0 is used as the SMP pen on the RPi2, so avoid this. - * - * fdt_addr_r simply shouldn't overlap anything else. However, the RPi's - * binary firmware loads a DT to address 0x100, so we choose this address to - * match it. This allows custom boot scripts to pass this DT on to Linux - * simply by not over-writing the data at this address. When using U-Boot, - * U-Boot (and scripts it executes) typicaly ignore the DT loaded by the FW - * and loads its own DT from disk (triggered by boot.scr or extlinux.conf). - * - * pxefile_addr_r can be pretty much anywhere that doesn't conflict with - * something else. Put it low in memory to avoid conflicts. - * - * kernel_addr_r must be within the first 128M of RAM in order for the - * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will - * decompress itself to 0x8000 after the start of RAM, kernel_addr_r - * should not overlap that area, or the kernel will have to copy itself - * somewhere else before decompression. Similarly, the address of any other - * data passed to the kernel shouldn't overlap the start of RAM. Pushing - * this up to 16M allows for a sizable kernel to be decompressed below the - * compressed load address. - * - * scriptaddr can be pretty much anywhere that doesn't conflict with something - * else. Choosing 32M allows for the compressed kernel to be up to 16M. - * - * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows - * for any boot script to be up to 1M, which is hopefully plenty. - */ -#define ENV_MEM_LAYOUT_SETTINGS \ - "fdt_high=ffffffff\0" \ - "initrd_high=ffffffff\0" \ - "fdt_addr_r=0x00000100\0" \ - "pxefile_addr_r=0x00100000\0" \ - "kernel_addr_r=0x01000000\0" \ - "scriptaddr=0x02000000\0" \ - "ramdisk_addr_r=0x02100000\0" \ - -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 0) \ - func(USB, usb, 0) \ - func(PXE, pxe, na) \ - func(DHCP, dhcp, na) -#include <config_distro_bootcmd.h> - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "dhcpuboot=usb start; dhcp u-boot.uimg; bootm\0" \ - ENV_DEVICE_SETTINGS \ - ENV_MEM_LAYOUT_SETTINGS \ - BOOTENV - -#define CONFIG_BOOTDELAY 2 - -#endif diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 86422e390da2..b83d622b9784 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2012,2015 Stephen Warren + * (C) Copyright 2012-2016 Stephen Warren * * SPDX-License-Identifier: GPL-2.0 */ @@ -7,8 +7,210 @@ #ifndef __CONFIG_H #define __CONFIG_H +#include <linux/sizes.h> +#include <asm/arch/timer.h> + +#if defined(CONFIG_TARGET_RPI_2) || defined(CONFIG_TARGET_RPI_3_32B) +#define CONFIG_SKIP_LOWLEVEL_INIT +#endif + +#ifdef CONFIG_BCM2835 #define CONFIG_SYS_CACHELINE_SIZE 32 +#else +#define CONFIG_SYS_CACHELINE_SIZE 64 +#endif + +/* Architecture, CPU, etc.*/ +#define CONFIG_ARCH_CPU_INIT + +/* Use SoC timer for AArch32, but architected timer for AArch64 */ +#ifndef CONFIG_ARM64 +#define CONFIG_SYS_TIMER_RATE 1000000 +#define CONFIG_SYS_TIMER_COUNTER \ + (&((struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR)->clo) +#endif + +/* + * 2835 is a SKU in a series for which the 2708 is the first or primary SoC, + * so 2708 has historically been used rather than a dedicated 2835 ID. + * + * We don't define a machine type for bcm2709/bcm2836 since the RPi Foundation + * chose to use someone else's previously registered machine ID (3139, MX51_GGC) + * rather than obtaining a valid ID:-/ + * + * For the bcm2837, hopefully a machine type is not needed, since everything + * is DT. + */ +#ifdef CONFIG_BCM2835 +#define CONFIG_MACH_TYPE MACH_TYPE_BCM2708 +#endif + +/* Memory layout */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_TEXT_BASE 0x00008000 +#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE +/* + * The board really has 256M. However, the VC (VideoCore co-processor) shares + * the RAM, and uses a configurable portion at the top. We tell U-Boot that a + * smaller amount of RAM is present in order to avoid stomping on the area + * the VC uses. + */ +#define CONFIG_SYS_SDRAM_SIZE SZ_128M +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_SDRAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_MALLOC_LEN SZ_4M +#define CONFIG_SYS_MEMTEST_START 0x00100000 +#define CONFIG_SYS_MEMTEST_END 0x00200000 +#define CONFIG_LOADADDR 0x00200000 + +/* Flash */ +#define CONFIG_SYS_NO_FLASH + +/* Devices */ +/* GPIO */ +#define CONFIG_BCM2835_GPIO +/* LCD */ +#define CONFIG_LCD +#define CONFIG_LCD_DT_SIMPLEFB +#define LCD_BPP LCD_COLOR16 +/* + * Prevent allocation of RAM for FB; the real FB address is queried + * dynamically from the VideoCore co-processor, and comes from RAM + * not owned by the ARM CPU. + */ +#define CONFIG_FB_ADDR 0 +#define CONFIG_VIDEO_BCM2835 +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 + +/* SD/MMC configuration */ +#define CONFIG_GENERIC_MMC +#define CONFIG_MMC +#define CONFIG_SDHCI +#define CONFIG_MMC_SDHCI_IO_ACCESSORS +#define CONFIG_BCM2835_SDHCI + +#define CONFIG_CMD_USB +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_DWC2 +#ifndef CONFIG_BCM2835 +#define CONFIG_USB_DWC2_REG_ADDR 0x3f980000 +#else +#define CONFIG_USB_DWC2_REG_ADDR 0x20980000 +#endif +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_MISC_INIT_R +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL +#define CONFIG_SYS_STDIO_DEREGISTER +#endif + +/* Console UART */ +#ifdef CONFIG_BCM2837 +#define CONFIG_BCM283X_MU_SERIAL +#else +#define CONFIG_PL01X_SERIAL +#endif +#define CONFIG_CONS_INDEX 0 +#define CONFIG_BAUDRATE 115200 + +/* Console configuration */ +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* Environment */ +#define CONFIG_ENV_SIZE SZ_16K +#define CONFIG_ENV_IS_IN_FAT +#define FAT_ENV_INTERFACE "mmc" +#define FAT_ENV_DEVICE_AND_PART "0:1" +#define FAT_ENV_FILE "uboot.env" +#define CONFIG_FAT_WRITE +#define CONFIG_ENV_VARS_UBOOT_CONFIG +#define CONFIG_SYS_LOAD_ADDR 0x1000000 +#define CONFIG_CONSOLE_MUX +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_PREBOOT "usb start" + +/* Shell */ +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_COMMAND_HISTORY + +/* Commands */ +#define CONFIG_CMD_MMC +#define CONFIG_PARTITION_UUIDS +#define CONFIG_CMD_PART + +/* ATAGs support for bootm/bootz */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_CMDLINE_TAG +#define CONFIG_INITRD_TAG + +#include <config_distro_defaults.h> + +/* Environment */ +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG +#define ENV_DEVICE_SETTINGS \ + "stdin=serial,usbkbd\0" \ + "stdout=serial,lcd\0" \ + "stderr=serial,lcd\0" + +/* + * Memory layout for where various images get loaded by boot scripts: + * + * I suspect address 0 is used as the SMP pen on the RPi2, so avoid this. + * + * fdt_addr_r simply shouldn't overlap anything else. However, the RPi's + * binary firmware loads a DT to address 0x100, so we choose this address to + * match it. This allows custom boot scripts to pass this DT on to Linux + * simply by not over-writing the data at this address. When using U-Boot, + * U-Boot (and scripts it executes) typicaly ignore the DT loaded by the FW + * and loads its own DT from disk (triggered by boot.scr or extlinux.conf). + * + * pxefile_addr_r can be pretty much anywhere that doesn't conflict with + * something else. Put it low in memory to avoid conflicts. + * + * kernel_addr_r must be within the first 128M of RAM in order for the + * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will + * decompress itself to 0x8000 after the start of RAM, kernel_addr_r + * should not overlap that area, or the kernel will have to copy itself + * somewhere else before decompression. Similarly, the address of any other + * data passed to the kernel shouldn't overlap the start of RAM. Pushing + * this up to 16M allows for a sizable kernel to be decompressed below the + * compressed load address. + * + * scriptaddr can be pretty much anywhere that doesn't conflict with something + * else. Choosing 32M allows for the compressed kernel to be up to 16M. + * + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * for any boot script to be up to 1M, which is hopefully plenty. + */ +#define ENV_MEM_LAYOUT_SETTINGS \ + "fdt_high=ffffffff\0" \ + "initrd_high=ffffffff\0" \ + "fdt_addr_r=0x00000100\0" \ + "pxefile_addr_r=0x00100000\0" \ + "kernel_addr_r=0x01000000\0" \ + "scriptaddr=0x02000000\0" \ + "ramdisk_addr_r=0x02100000\0" \ + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) +#include <config_distro_bootcmd.h> + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "dhcpuboot=usb start; dhcp u-boot.uimg; bootm\0" \ + ENV_DEVICE_SETTINGS \ + ENV_MEM_LAYOUT_SETTINGS \ + BOOTENV -#include "rpi-common.h" +#define CONFIG_BOOTDELAY 2 #endif diff --git a/include/configs/rpi_2.h b/include/configs/rpi_2.h deleted file mode 100644 index 0917e8650864..000000000000 --- a/include/configs/rpi_2.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * (C) Copyright 2012,2015 Stephen Warren - * - * SPDX-License-Identifier: GPL-2.0 - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_SYS_CACHELINE_SIZE 64 - -#include "rpi-common.h" - -#endif diff --git a/include/configs/rpi_3.h b/include/configs/rpi_3.h deleted file mode 100644 index 0dd9e7e40aa0..000000000000 --- a/include/configs/rpi_3.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * (C) Copyright 2012-2016 Stephen Warren <swarren(a)wwwdotorg.org> - * - * SPDX-License-Identifier: GPL-2.0 - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_SYS_CACHELINE_SIZE 64 - -#include "rpi-common.h" - -#endif diff --git a/include/configs/rpi_3_32b.h b/include/configs/rpi_3_32b.h deleted file mode 100644 index c00379b9aa4d..000000000000 --- a/include/configs/rpi_3_32b.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * (C) Copyright 2012-2016 Stephen Warren <swarren(a)wwwdotorg.org> - * - * SPDX-License-Identifier: GPL-2.0 - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_SYS_CACHELINE_SIZE 64 - -#include "rpi-common.h" - -#endif -- 2.7.4

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