March 2016 - U-Boot

[U-Boot] [PATCH] sunxi: Add defconfig for yones toptech bs1078-v2 tablet
by Peter Korsgaard 22 Mar '16

22 Mar '16

The yones toptech bs1078-v2 is a 10.1" tablet without any clear markings on the outside, but 'YONESTOPTECH-BS1078' written on the PCB silkscreen. It features a 16:9 1024:600 LCD, A31s SoC, 1GB RAM, 8G NAND, silead gsl3675 touchscreen and a RTL8723AS wifi chip: https://linux-sunxi.org/Yones_Toptech_BS1078_V2 Signed-off-by: Peter Korsgaard <peter(a)korsgaard.com> --- board/sunxi/MAINTAINERS | 5 +++++ configs/Yones_Toptech_BS1078_V2_defconfig | 24 ++++++++++++++++++++++++ 2 files changed, 29 insertions(+) create mode 100644 configs/Yones_Toptech_BS1078_V2_defconfig diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 5ae5ce6..4370303 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -211,3 +211,8 @@ YONES TOPTECH BD1078 BOARD M: Paul Kocialkowski <contact(a)paulk.fr> S: Maintained F: configs/Yones_Toptech_BD1078_defconfig + +YONES TOPTECH BS1078 V2 BOARD +M: Peter Korsgaard <peter(a)korsgaard.com> +S: Maintained +F: configs/Yones_Toptech_BS1078_V2_defconfig diff --git a/configs/Yones_Toptech_BS1078_V2_defconfig b/configs/Yones_Toptech_BS1078_V2_defconfig new file mode 100644 index 0000000..26f5923 --- /dev/null +++ b/configs/Yones_Toptech_BS1078_V2_defconfig @@ -0,0 +1,24 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN6I=y +CONFIG_DRAM_CLK=420 +CONFIG_DRAM_ZQ=251 +CONFIG_MMC0_CD_PIN="PA8" +CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" +CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" +CONFIG_USB0_ID_DET="PA15" +CONFIG_AXP_GPIO=y +CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:70000,le:120,ri:180,up:17,lo:15,hs:20,vs:3,sync:3,vmode:0" +CONFIG_VIDEO_LCD_DCLK_PHASE=0 +CONFIG_VIDEO_LCD_BL_EN="PA25" +CONFIG_VIDEO_LCD_BL_PWM="PH13" +CONFIG_VIDEO_LCD_PANEL_LVDS=y +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-yones-toptech-bs1078-v2" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_GPIO=y +CONFIG_AXP_DLDO1_VOLT=3300 +CONFIG_USB_MUSB_HOST=y -- 2.7.0

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[U-Boot] [PATCH 1/2] sunxi: Turn satapwr on from board_init
by Hans de Goede 22 Mar '16

22 Mar '16

There are 2 reasons for doing this: 1) The main reason for doing this is to move it outside of board/sunxi/ahci.c, so that it can be used on boards which use a usb<->sata chip too; 2) While doing this I realized that doing it from board_init also meant doing it much earlier. Some printf get_timer(0) calls show that the time between board_init() and scsi_init() is more then 600 ms, so we can drop the mdelay(500) While at it also drop the printf("SUNXI SCSI INIT\n") AHCI init is noisy enough by itself. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- board/sunxi/ahci.c | 8 -------- board/sunxi/board.c | 4 ++++ 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/board/sunxi/ahci.c b/board/sunxi/ahci.c index 6d51b9b..522e54a 100644 --- a/board/sunxi/ahci.c +++ b/board/sunxi/ahci.c @@ -72,14 +72,6 @@ static int sunxi_ahci_phy_init(u32 base) void scsi_init(void) { - printf("SUNXI SCSI INIT\n"); -#ifdef CONFIG_SATAPWR - gpio_request(CONFIG_SATAPWR, "satapwr"); - gpio_direction_output(CONFIG_SATAPWR, 1); - /* Give attached sata device time to power-up to avoid link timeouts */ - mdelay(500); -#endif - if (sunxi_ahci_phy_init(SUNXI_SATA_BASE) < 0) return; diff --git a/board/sunxi/board.c b/board/sunxi/board.c index e16718f..2e2a1f5 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -90,6 +90,10 @@ int board_init(void) if (ret) return ret; +#ifdef CONFIG_SATAPWR + gpio_request(CONFIG_SATAPWR, "satapwr"); + gpio_direction_output(CONFIG_SATAPWR, 1); +#endif #ifdef CONFIG_MACPWR gpio_request(CONFIG_MACPWR, "macpwr"); gpio_direction_output(CONFIG_MACPWR, 1); -- 2.7.3

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[U-Boot] [PATCH] sunxi: Enable support for the eMMC found on the orangepi plus
by Hans de Goede 22 Mar '16

22 Mar '16

This enables support for the eMMC found on the orangepi plus. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- configs/orangepi_plus_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig index c4885f4..770bd98 100644 --- a/configs/orangepi_plus_defconfig +++ b/configs/orangepi_plus_defconfig @@ -4,6 +4,8 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y +CONFIG_MMC0_CD_PIN="PF6" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 # CONFIG_VIDEO is not set CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -- 2.7.3

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[U-Boot] [PATCH] sunxi: Fix 2nd usb controller on sun4i/sun7i no longer working
by Hans de Goede 22 Mar '16

22 Mar '16

The 2nd usb controller on sun4i/sun7i has its base address 0x8000 bytes from the 1st one, rather then 0x1000. Also the ahb clk gates are interleaved with the ohci clk-gates introducing a hole between the clks for usb1 and usb2. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- drivers/usb/host/ehci-sunxi.c | 13 +++++++++++-- drivers/usb/host/ohci-sunxi.c | 15 ++++++++++++--- 2 files changed, 23 insertions(+), 5 deletions(-) diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c index cf3dcc4..677a5d3 100644 --- a/drivers/usb/host/ehci-sunxi.c +++ b/drivers/usb/host/ehci-sunxi.c @@ -17,6 +17,14 @@ #include <dm.h> #include "ehci.h" +#ifdef CONFIG_SUNXI_GEN_SUN4I +#define BASE_DIST 0x8000 +#define AHB_CLK_DIST 2 +#else +#define BASE_DIST 0x1000 +#define AHB_CLK_DIST 1 +#endif + struct ehci_sunxi_priv { struct ehci_ctrl ehci; int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */ @@ -39,8 +47,9 @@ static int ehci_usb_probe(struct udevice *dev) #ifdef CONFIG_MACH_SUN8I_H3 priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_OHCI0; #endif - priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / 0x1000 + 1; - priv->ahb_gate_mask <<= priv->phy_index - 1; + priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / BASE_DIST; + priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST; + priv->phy_index++; /* Non otg phys start at 1 */ setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask); #ifdef CONFIG_SUNXI_GEN_SUN6I diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c index 1b1f651..d4fb95a 100644 --- a/drivers/usb/host/ohci-sunxi.c +++ b/drivers/usb/host/ohci-sunxi.c @@ -17,6 +17,14 @@ #include <usb.h> #include "ohci.h" +#ifdef CONFIG_SUNXI_GEN_SUN4I +#define BASE_DIST 0x8000 +#define AHB_CLK_DIST 2 +#else +#define BASE_DIST 0x1000 +#define AHB_CLK_DIST 1 +#endif + struct ohci_sunxi_priv { ohci_t ohci; int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */ @@ -42,9 +50,10 @@ static int ohci_usb_probe(struct udevice *dev) priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_EHCI0; #endif priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK; - priv->phy_index = ((u32)regs - (SUNXI_USB1_BASE + 0x400)) / 0x1000 + 1; - priv->ahb_gate_mask <<= priv->phy_index - 1; - priv->usb_gate_mask <<= priv->phy_index - 1; + priv->phy_index = ((u32)regs - (SUNXI_USB1_BASE + 0x400)) / BASE_DIST; + priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST; + priv->usb_gate_mask <<= priv->phy_index; + priv->phy_index++; /* Non otg phys start at 1 */ setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask); setbits_le32(&ccm->usb_clk_cfg, priv->usb_gate_mask); -- 2.7.3

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[U-Boot] [PATCH] sunxi:Correct the LDO settings for sinovoip-bpi-m3 board
by Vishnu Patekar 22 Mar '16

22 Mar '16

Hello, I forgot to post this patch, Thanks to Kevin Chua Soon Jia <k526816(a)hotmail.com> who reported that latest mainline u-boot fail to boot and reminded me to post it. For Banana-pi m3, ALDO must not be set to zero, default settings are same as mentioned Sinovoip Bpi-m3 schematic. Vishnu Patekar (1): sunxi: sinovoip-bpi-m3: drop LDO settings from defconfig configs/Sinovoip_BPI_M3_defconfig | 3 --- 1 file changed, 3 deletions(-) -- 1.9.1

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[U-Boot] [PATCH 1/3] sunxi: Add support for USB vbus pin for USB3
by Hans de Goede 22 Mar '16

22 Mar '16

The H3 has USB0 - USB3, add support for having a USB vbus pin for USB3. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- arch/arm/cpu/armv7/sunxi/usb_phy.c | 1 + board/sunxi/Kconfig | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/arch/arm/cpu/armv7/sunxi/usb_phy.c b/arch/arm/cpu/armv7/sunxi/usb_phy.c index 6ac96cc..0749fbd 100644 --- a/arch/arm/cpu/armv7/sunxi/usb_phy.c +++ b/arch/arm/cpu/armv7/sunxi/usb_phy.c @@ -76,6 +76,7 @@ static int get_vbus_gpio(int index) case 0: return sunxi_name_to_gpio(CONFIG_USB0_VBUS_PIN); case 1: return sunxi_name_to_gpio(CONFIG_USB1_VBUS_PIN); case 2: return sunxi_name_to_gpio(CONFIG_USB2_VBUS_PIN); + case 3: return sunxi_name_to_gpio(CONFIG_USB3_VBUS_PIN); } return -EINVAL; } diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 5e9d3af..5e72fac 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -342,6 +342,12 @@ config USB2_VBUS_PIN ---help--- See USB1_VBUS_PIN help text. +config USB3_VBUS_PIN + string "Vbus enable pin for usb3 (ehci2)" + default "" + ---help--- + See USB1_VBUS_PIN help text. + config I2C0_ENABLE bool "Enable I2C/TWI controller 0" default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I -- 2.7.3

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[U-Boot] [PATCH] sunxi: Add defconfig for Sinlinx SinA31s
by Chen-Yu Tsai 22 Mar '16

22 Mar '16

The Sinlinx A31s SDK is a A31s based module/baseboard development kit. The core module has the SoC, PMIC, DRAM, eMMC and supporting components. There are also pads for UART0, JTAG and I2S. The baseboard has 100 Mbps Ethernet, 5x USB 2.0 host ports via a USB 2.0 hub chip, MMC, HDMI, SPDIF, CIR, audio jacks, 2 tablet-like volume buttons, RS232 style UART and USB OTG (though VBUS is not connected). Various headers are available for other addon modules, such as SDIO WiFi, LCD display, camera sensor, UARTs, I2C, SPI and GPIOs. Signed-off-by: Chen-Yu Tsai <wens(a)csie.org> --- board/sunxi/MAINTAINERS | 6 ++++++ configs/Sinlinx_SinA31s_defconfig | 21 +++++++++++++++++++++ 2 files changed, 27 insertions(+) create mode 100644 configs/Sinlinx_SinA31s_defconfig diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 5ae5ce6..8cb9051 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -191,6 +191,12 @@ M: Siarhei Siamashka <siarhei.siamashka(a)gmail.com> S: Maintained F: configs/MSI_Primo81_defconfig +SINLINX SINA31s BOARD +M: Chen-Yu Tsai <wens(a)csie.org> +S: Maintained +F: configs/Sinlinx_SinA31s_defconfig +W: http://linux-sunxi.org/Sinlinx_SinA31s + SINLINX SINA33 BOARD M: Chen-Yu Tsai <wens(a)csie.org> S: Maintained diff --git a/configs/Sinlinx_SinA31s_defconfig b/configs/Sinlinx_SinA31s_defconfig new file mode 100644 index 0000000..9254bb2 --- /dev/null +++ b/configs/Sinlinx_SinA31s_defconfig @@ -0,0 +1,21 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN6I=y +CONFIG_DRAM_CLK=432 +CONFIG_DRAM_ZQ=251 +CONFIG_MMC0_CD_PIN="PA4" +CONFIG_MMC3_PINS="PC" +CONFIG_MMC_SUNXI_SLOT_EXTRA=3 +CONFIG_USB1_VBUS_PIN="" +CONFIG_USB2_VBUS_PIN="" +CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sina31s" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_ETH_DESIGNWARE=y +CONFIG_AXP_DLDO1_VOLT=3300 +CONFIG_USB_EHCI_HCD=y -- 2.7.0

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[U-Boot] [PATCH] arm: sunxi: Add icnova-a20-swac defconfig
by Stefan Roese 22 Mar '16

22 Mar '16

The ICnova-A20-SWAC is a baseboard, equipped with the ICnova-A20 SoM from In-Circuit: http://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM http://linux-sunxi.org/In-Circuit_ICnova_A20 This patch adds support for this board, including ethernet, LCD and USB support. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Marcus Heuer <marcus.heuer(a)swac.de> Cc: Hans de Goede <hdegoede(a)redhat.com> Cc: Ian Campbell <ijc(a)hellion.org.uk> --- board/sunxi/MAINTAINERS | 5 +++++ configs/icnova-a20-swac_defconfig | 21 +++++++++++++++++++++ 2 files changed, 26 insertions(+) create mode 100644 configs/icnova-a20-swac_defconfig diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 5ae5ce6..c4fe11f 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -121,6 +121,11 @@ M: Chen-Yu Tsai <wens(a)csie.org> S: Maintained F: configs/Hummingbird_A31_defconfig +ICnova-A20-SWAC BOARD +M: Stefan Roese <sr(a)denx.de> +S: Maintained +F: configs/icnova-a20-swac_defconfig + ITEAD IBOX BOARD M: Marcus Cooper <codekipper(a)gmail.com> S: Maintained diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig new file mode 100644 index 0000000..548a07e --- /dev/null +++ b/configs/icnova-a20-swac_defconfig @@ -0,0 +1,21 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN7I=y +CONFIG_DRAM_CLK=384 +CONFIG_OLD_SUNXI_KERNEL_COMPAT=y +CONFIG_MMC0_CD_PIN="PI5" +CONFIG_USB0_VBUS_PIN="PG11" +CONFIG_USB0_VBUS_DET="PH7" +CONFIG_USB1_VBUS_PIN="PG10" +CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:3,vmode:0" +CONFIG_VIDEO_LCD_POWER="PH22" +CONFIG_VIDEO_LCD_PANEL_LVDS=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="AXP209_POWER,SUNXI_GMAC,CMD_BMP,CMD_UNZIP" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_ETH_DESIGNWARE=y +CONFIG_USB_EHCI_HCD=y -- 2.7.4

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[U-Boot] [PATCH] armv8/ls2080ardb: Update DDR timing to support more UDIMMs
by Shengzhou Liu 22 Mar '16

22 Mar '16

Optimize DDR timing for good margins to support new Transcend and Apacer DDR4 UDIMM besides current Micron UDIMM. Verified 1866MT/s and 2133MT/s with following UDIMM on LS2080ARDB. - Micron UDIMM: MTA18ASF1G72AZ-2G1A1Z - Apacer UDIMM: 78.C1GM4.AF10B - Transcend UDIMM: TS1GLH72V1H Signed-off-by: Shengzhou Liu <Shengzhou.Liu(a)nxp.com> --- board/freescale/ls2080ardb/ddr.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/freescale/ls2080ardb/ddr.h b/board/freescale/ls2080ardb/ddr.h index bda9d4a..7274778 100644 --- a/board/freescale/ls2080ardb/ddr.h +++ b/board/freescale/ls2080ardb/ddr.h @@ -30,8 +30,8 @@ static const struct board_specific_parameters udimm0[] = { */ {2, 1350, 0, 4, 6, 0x0708090B, 0x0C0D0E09,}, {2, 1666, 0, 4, 8, 0x08090B0D, 0x0E10100C,}, - {2, 1900, 0, 4, 8, 0x090A0C0E, 0x1012120D,}, - {2, 2300, 0, 4, 9, 0x0A0B0C10, 0x1114140E,}, + {2, 1900, 0, 6, 0xA, 0x0B0C0E11, 0x1214140F,}, + {2, 2300, 0, 6, 0xB, 0x0C0D0F12, 0x14161610,}, {} }; -- 2.1.0.27.g96db324

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[U-Boot] Latest U-boot branch not booting on Hummingbird A31
by wens Tsai 22 Mar '16

22 Mar '16

Hi Hans, I updated U-boot on my boards to your latest sunxi-wip branch: f965340 ("sunxi: Enable support for the eMMC found on the orangepi plus") My Hummingbird A31 fails to boot after this. See log: HELLO! BOOT0 is starting! boot0 version : 3.0.0 reg_addr 0x01f00100 =0x00000000 reg_addr 0x01f00104 =0x00000000 reg_addr 0x01f00108 =0x00000000 reg_addr 0x01f0010c =0x00000000 reg_addr 0x01f00110 =0x00000000 reg_addr 0x01f00114 =0x00000000 [DRAM]ver 1.03 clk = 312 cpu 0 pmu 0 dram size =1024 sum=0x31776fa8 src_sum=0x31776fa8 Ready to disable icache. Jump to secend Boot. [ 0.209] U-Boot 2011.09-rc1 (Jun 17 2014 - 17:30:56) Allwinner Technology [ 0.217]version: 1.1.0 [ 0.220]pmbus: ready [ 0.222]PMU: AXP221 [ 0.225]PMU: AXP22x found [ 0.227]PMU: bat ratio = 100 [ 0.231]PMU: dcdc3 1260 [ 0.233]PMU: pll1 1008 Mhz dcdc1_vol = 3000 dcdc2_vol = 1200 dcdc3_vol = 1260 dcdc4_vol = 1200 dcdc5_vol = 1500 aldo1_vol = 3000 aldo2_vol = 1800 aldo3_vol = 3000 eldo3_vol = 1800 find power_sply to end fel key old mode run key detect no key found no key input dram_para_set start dram_para_set end [ 0.277]DRAM: 1 GiB relocation Offset is: 15b25000 donn't initialize ther user_gpio (main_key:boot_init_gpio) deu_mode1 not exist. lcdgamma4iep for lcd1 not exist. DRV_DISP_Init: opened [ 0.542]fetch script data boot_disp.output_type fail [ 0.547]fetch script data boot_disp.output_mode fail [ 0.552]fetch script data boot_disp.auto_hpd fail [ 0.557]lcd0_para.lcd_used=1 workmode = 0 [ 0.603]NAND: NAND_UbootInit NB1 : enter NAND_LogicInit not burn nand partition table! NB1 : nftl num: 2 init nftl: 0 NB1 : NAND_LogicInit ok, result = 0x0 [ 1.268]sunxi flash init ok probe mmc0 if exist SUNXI SD/MMC: 0 Man 1d4144 Snr d3602657 SD 0.2 boot0 capacity: 0KB,boot1 capacity: 0KB boot0 magic = eGON.BT0蜡讕 set next system status DRV_DISP_Exit: closed sunxi_board_close_source NAND_UbootExit NB1 : NAND_LogicExit reset cpu HELLO! BOOT0 is starting! boot0 version : 3.0.0 reg_addr 0x01f00100 =0x00007347 reg_addr 0x01f00104 =0x0000703b reg_addr 0x01f00108 =0x5aa5a55a reg_addr 0x01f0010c =0x000000ff reg_addr 0x01f00110 =0x000000ff reg_addr 0x01f00114 =0x000000ff eraly jump fel U-Boot SPL 2016.03-00320-geeea041 (Mar 21 2016 - 15:16:34) DRAM: 1024 MiB Trying to boot from MMC1 and hangs... geeea041 is the SinA31s patch I have on top of your sunxi-wip branch. I bisected it down to 107fb76 ("sunxi: Fix gmac not working due to cpu_eth_init no longer being called"). Not sure why this commit fails though. Regards ChenYu

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