March 2016 - U-Boot

[U-Boot] [PATCH] arm: clang: Update support slightly
by Tom Rini 02 Apr '16

02 Apr '16

- Move most of the flags required into LLVM_RELFLAGS to test at build time instead of requiring them to be passed in. - Update doc/README.clang to reflect this - Switch to rpi_2 as the example as it's closer to working out of the box than rpi is. Cc: Jeroen Hofstee <jeroen(a)myspectrum.nl> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- arch/arm/Makefile | 3 ++- arch/arm/config.mk | 6 ++++++ doc/README.clang | 15 +++++++-------- 3 files changed, 15 insertions(+), 9 deletions(-) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 6defdfb..797f00c 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -16,7 +16,8 @@ arch-$(CONFIG_CPU_SA1100) =-march=armv4 arch-$(CONFIG_CPU_PXA) = arch-$(CONFIG_CPU_ARM1136) =-march=armv5 arch-$(CONFIG_CPU_ARM1176) =-march=armv5t -arch-$(CONFIG_CPU_V7) =$(call cc-option, -march=armv7-a, -march=armv5) +arch-$(CONFIG_CPU_V7) =$(call cc-option, -march=armv7-a, \ + $(call cc-option, -march=armv7, -march=armv5)) arch-$(CONFIG_ARM64) =-march=armv8-a # Evaluate arch cc-option calls now diff --git a/arch/arm/config.mk b/arch/arm/config.mk index 9af6c37..9a5a974 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -19,6 +19,12 @@ PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \ PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) \ $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) +# LLVM support +LLVMS_RELFLAGS := $(call cc-option,-mllvm,) \ + $(call cc-option,-target arm-none-eabi,) \ + $(call cc-option,-arm-use-movt=0,) +PLATFORM_RELFLAGS += $(LLVM_RELFLAGS) + PLATFORM_CPPFLAGS += -D__ARM__ # Choose between ARM/Thumb instruction sets diff --git a/doc/README.clang b/doc/README.clang index 7ce5ae4..b4ba653 100644 --- a/doc/README.clang +++ b/doc/README.clang @@ -26,10 +26,10 @@ Debian (based) Binary packages can be installed as usual, e.g.: sudo apt-get install clang -To compile U-Boot with clang on linux without IAS use e.g.: -export TRIPLET=arm-linux-gnueabi && export CROSS_COMPILE="$TRIPLET-" -make HOSTCC=clang CC="clang -target $TRIPLET -mllvm -arm-use-movt=0 -no-integrated-as" rpi_defconfig -make HOSTCC=clang CC="clang -target $TRIPLET -mllvm -arm-use-movt=0 -no-integrated-as" all V=1 -j8 +Note that we still use binutils for some tools so we must continue to set +CROSS_COMPILE. To compile U-Boot with clang on linux without IAS use e.g.: +make HOSTCC=clang rpi_2_defconfig +make HOSTCC=clang CROSS_COMPILE=arm-linux-gnueabi- CC=clang -j8 FreeBSD 11 (Current): -------------------- @@ -42,8 +42,8 @@ ln -s /usr/local/bin/arm-gnueabi-freebsd-as /usr/bin/arm-freebsd-eabi-as # The following commands compile U-Boot using the clang xdev toolchain. # NOTE: CROSS_COMPILE and target differ on purpose! export CROSS_COMPILE=arm-gnueabi-freebsd- -gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd -no-integrated-as -mllvm -arm-use-movt=0" rpi_defconfig -gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd -no-integrated-as -mllvm -arm-use-movt=0" -j8 +gmake rpi_2_defconfig +gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd" -j8 Given that U-Boot will default to gcc, above commands can be simplified with a simple wrapper script, listed below. @@ -52,5 +52,4 @@ simplified with a simple wrapper script, listed below. --- #!/bin/sh -exec clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd -no-integrated-as -mllvm -arm-use-movt=0 "$@" - +exec clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd "$@" -- 1.7.9.5

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[U-Boot] [PATCH] image-fit: Change FIT prefix for configurations
by Sáreník Ján 01 Apr '16

01 Apr '16

Instead of `bootm ${loadaddr}#conf@1` one uses `bootm ${loadaddr}_conf@1` This fixes the bug with using just `bootm #conf@2` without $loadaddr where text starting with # is interpreted as a comment. --- cmd/bootm.c | 2 +- common/image-fit.c | 2 +- doc/uImage.FIT/command_syntax_extensions.txt | 2 +- include/configs/baltos.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/cmd/bootm.c b/cmd/bootm.c index 555ccbc..23740c5 100644 --- a/cmd/bootm.c +++ b/cmd/bootm.c @@ -124,7 +124,7 @@ int do_bootm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) * * Right now we assume the first arg should never be '-' */ -if ((*endp != 0) && (*endp != ':') && (*endp != '#')) +if ((*endp != 0) && (*endp != ':') && (*endp != '_')) return do_bootm_subcommand(cmdtp, flag, argc, argv); } diff --git a/common/image-fit.c b/common/image-fit.c index 25f8a11..e23796f 100644 --- a/common/image-fit.c +++ b/common/image-fit.c @@ -75,7 +75,7 @@ static int fit_parse_spec(const char *spec, char sepc, ulong addr_curr, int fit_parse_conf(const char *spec, ulong addr_curr, ulong *addr, const char **conf_name) { -return fit_parse_spec(spec, '#', addr_curr, addr, conf_name); +return fit_parse_spec(spec, '_', addr_curr, addr, conf_name); } /** diff --git a/doc/uImage.FIT/command_syntax_extensions.txt b/doc/uImage.FIT/command_syntax_extensions.txt index 6c99b1c..ef4db80 100644 --- a/doc/uImage.FIT/command_syntax_extensions.txt +++ b/doc/uImage.FIT/command_syntax_extensions.txt @@ -36,7 +36,7 @@ Old uImage: New uImage: 8. bootm <addr1> 9. bootm [<addr1>]:<subimg1> -10. bootm [<addr1>]#<conf> +10. bootm [<addr1>]_<conf> 11. bootm [<addr1>]:<subimg1> [<addr2>]:<subimg2> 12. bootm [<addr1>]:<subimg1> [<addr2>]:<subimg2> [<addr3>]:<subimg3> 13. bootm [<addr1>]:<subimg1> [<addr2>]:<subimg2> <addr3> diff --git a/include/configs/baltos.h b/include/configs/baltos.h index b8c915c..8a01fe8 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -80,7 +80,7 @@ "ubifsmount ubi0:kernel; " \ "ubifsload $loadaddr kernel-fit.itb;" \ "ubifsumount; " \ -"bootm ${loadaddr}#conf${board_name}; " \ +"bootm ${loadaddr}_conf${board_name}; " \ "if test $? -ne 0; then echo Using default FIT config; " \ "bootm ${loadaddr}; fi;\0" #else -- 2.7.3 ________________________________ CONFIDENTIALITY NOTICE This message is for the named person's use only. It may contain confidential, proprietary or legally privileged information. If you receive this message in error, please immediately delete it and all copies of it from your system, destroy any hard copies of it and notify us by email to info(a)ysoft.com with a copy of this message. You must not, directly or indirectly, use, disclose, distribute, print or copy any part of this message if you are not the intended recipient. Y Soft and any of its subsidiaries each reserves the right to monitor all e-mail communications through its networks. Y Soft is neither liable for the proper, complete transmission of the information contained in this communication nor any delay in its receipt. This email was scanned for the presence of computer viruses. In the unfortunate event of infection Y Soft does not accept liability. Any views expressed in this message are those of the individual sender, except where the message states otherwise and the sender is authorised to state them.

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[U-Boot] [PATCH] block: Add support for Ceva sata
by Michal Simek 01 Apr '16

01 Apr '16

Initial Ceva Sata init code. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- board/xilinx/zynqmp/zynqmp.c | 4 ++ drivers/block/Makefile | 1 + drivers/block/sata_ceva.c | 113 ++++++++++++++++++++++++++++++++++++++++ include/configs/xilinx_zynqmp.h | 2 +- 4 files changed, 119 insertions(+), 1 deletion(-) create mode 100644 drivers/block/sata_ceva.c diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 0f44b04c1efa..087578cb6b9c 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -7,6 +7,7 @@ #include <common.h> #include <netdev.h> +#include <sata.h> #include <ahci.h> #include <scsi.h> #include <asm/arch/clk.h> @@ -185,6 +186,9 @@ void reset_cpu(ulong addr) #ifdef CONFIG_SCSI_AHCI_PLAT void scsi_init(void) { +#if defined(CONFIG_SATA_CEVA) + init_sata(0); +#endif ahci_init((void __iomem *)ZYNQMP_SATA_BASEADDR); scsi_scan(1); } diff --git a/drivers/block/Makefile b/drivers/block/Makefile index b5c7ae1124d1..57bff5f9de26 100644 --- a/drivers/block/Makefile +++ b/drivers/block/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_LIBATA) += libata.o obj-$(CONFIG_MVSATA_IDE) += mvsata_ide.o obj-$(CONFIG_MX51_PATA) += mxc_ata.o obj-$(CONFIG_PATA_BFIN) += pata_bfin.o +obj-$(CONFIG_SATA_CEVA) += sata_ceva.o obj-$(CONFIG_SATA_DWC) += sata_dwc.o obj-$(CONFIG_SATA_MV) += sata_mv.o obj-$(CONFIG_SATA_SIL3114) += sata_sil3114.o diff --git a/drivers/block/sata_ceva.c b/drivers/block/sata_ceva.c new file mode 100644 index 000000000000..dcc3b90b17f1 --- /dev/null +++ b/drivers/block/sata_ceva.c @@ -0,0 +1,113 @@ +/* + * (C) Copyright 2015 - 2016 Xilinx, Inc. + * Michal Simek <michal.simek(a)xilinx.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <netdev.h> +#include <ahci.h> +#include <scsi.h> +#include <asm/arch/hardware.h> + +#include <asm/io.h> + +/* Vendor Specific Register Offsets */ +#define AHCI_VEND_PCFG 0xA4 +#define AHCI_VEND_PPCFG 0xA8 +#define AHCI_VEND_PP2C 0xAC +#define AHCI_VEND_PP3C 0xB0 +#define AHCI_VEND_PP4C 0xB4 +#define AHCI_VEND_PP5C 0xB8 +#define AHCI_VEND_PAXIC 0xC0 +#define AHCI_VEND_PTC 0xC8 + +/* Vendor Specific Register bit definitions */ +#define PAXIC_ADBW_BW64 0x1 +#define PAXIC_MAWIDD (1 << 8) +#define PAXIC_MARIDD (1 << 16) +#define PAXIC_OTL (0x4 << 20) + +#define PCFG_TPSS_VAL (0x32 << 16) +#define PCFG_TPRS_VAL (0x2 << 12) +#define PCFG_PAD_VAL 0x2 + +#define PPCFG_TTA 0x1FFFE +#define PPCFG_PSSO_EN (1 << 28) +#define PPCFG_PSS_EN (1 << 29) +#define PPCFG_ESDF_EN (1 << 31) + +#define PP2C_CIBGMN 0x0F +#define PP2C_CIBGMX (0x25 << 8) +#define PP2C_CIBGN (0x18 << 16) +#define PP2C_CINMP (0x29 << 24) + +#define PP3C_CWBGMN 0x04 +#define PP3C_CWBGMX (0x0B << 8) +#define PP3C_CWBGN (0x08 << 16) +#define PP3C_CWNMP (0x0F << 24) + +#define PP4C_BMX 0x0a +#define PP4C_BNM (0x08 << 8) +#define PP4C_SFD (0x4a << 16) +#define PP4C_PTST (0x06 << 24) + +#define PP5C_RIT 0x60216 +#define PP5C_RCT (0x7f0 << 20) + +#define PTC_RX_WM_VAL 0x40 +#define PTC_RSVD (1 << 27) + +#define PORT0_BASE 0x100 +#define PORT1_BASE 0x180 + +/* Port Control Register Bit Definitions */ +#define PORT_SCTL_SPD_GEN3 (0x3 << 4) +#define PORT_SCTL_SPD_GEN2 (0x2 << 4) +#define PORT_SCTL_SPD_GEN1 (0x1 << 4) +#define PORT_SCTL_IPM (0x3 << 8) + +#define PORT_BASE 0x100 +#define PORT_OFFSET 0x80 +#define NR_PORTS 2 +#define DRV_NAME "ahci-ceva" +#define CEVA_FLAG_BROKEN_GEN2 1 + +int init_sata(int dev) +{ + ulong tmp; + ulong mmio = ZYNQMP_SATA_BASEADDR; + int i; + + /* + * AXI Data bus width to 64 + * Set Mem Addr Read, Write ID for data transfers + * Transfer limit to 72 DWord + */ + tmp = PAXIC_ADBW_BW64 | PAXIC_MAWIDD | PAXIC_MARIDD | PAXIC_OTL; + writel(tmp, mmio + AHCI_VEND_PAXIC); + + /* Set AHCI Enable */ + tmp = readl(mmio + HOST_CTL); + tmp |= HOST_AHCI_EN; + writel(tmp, mmio + HOST_CTL); + + for (i = 0; i < NR_PORTS; i++) { + /* TPSS TPRS scalars, CISE and Port Addr */ + tmp = PCFG_TPSS_VAL | PCFG_TPRS_VAL | (PCFG_PAD_VAL + i); + writel(tmp, mmio + AHCI_VEND_PCFG); + + /* Port Phy Cfg register enables */ + tmp = PPCFG_TTA | PPCFG_PSS_EN | PPCFG_ESDF_EN; + writel(tmp, mmio + AHCI_VEND_PPCFG); + + /* Rx Watermark setting */ + tmp = PTC_RX_WM_VAL | PTC_RSVD; + writel(tmp, mmio + AHCI_VEND_PTC); + + /* Default to Gen 2 Speed and Gen 1 if Gen2 is broken */ + tmp = PORT_SCTL_SPD_GEN3 | PORT_SCTL_IPM; + writel(tmp, mmio + PORT_SCR_CTL + PORT_BASE + PORT_OFFSET * i); + } + return 0; +} diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 4062e01824e3..8c760967f6d6 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -226,7 +226,7 @@ #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI #define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 #define CONFIG_SYS_SCSI_MAX_LUN 1 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) -- 1.9.1

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[U-Boot] pull request: u-boot-uniphier/master
by Masahiro Yamada 01 Apr '16

01 Apr '16

Hi Tom, Please pull u-boot-uniphier once again for u-boot-2016.05-rc1. Mostly driver updates for UniPhier ARMv8 SoC support, plus misc fixes. The following changes since commit 080c499df689e8c42df70de44502c0d71533dda8: Merge branch 'master' of git://git.denx.de/u-boot-tegra (2016-03-29 13:33:13 -0400) are available in the git repository at: git://git.denx.de/u-boot-uniphier.git master for you to fetch changes up to 7f5b1e9bd952ebdac917264f03522371a473b60c: ARM: uniphier: remove CONFIG_ARP_TIMEOUT define (2016-04-01 00:59:47 +0900) ---------------------------------------------------------------- Graham Moore (1): mtd: nand: denali: max_banks calculation changed in revision 5.1 Masahiro Yamada (21): ARM: uniphier: make u-boot-with-spl.bin really available ARM: uniphier: add sramupdate command serial: uniphier: use devm_get_addr() to get base address clk: uniphier: use devm_get_addr() to get base address i2c: uniphier: use devm_get_addr() to get base address gpio: uniphier: use devm_get_addr() to get base address mmc: uniphier: use devm_get_addr() to get base address pinctrl: uniphier: use devm_get_addr() to get base address pinctrl: uniphier: introduce capability flag pinctrl: uniphier: support per-pin input enable for new SoCs pinctrl: uniphier: support UniPhier PH1-LD20 pinctrl driver pinctrl: uniphier: support UniPhier PH1-LD11 pinctrl driver ARM: dts: uniphier: add clock-frequency to serial nodes of LD11/LD20 ARM: dts: uniphier: add NAND pinmux node ARM: uniphier: drop unneeded defines related to legacy serial driver ARM: uniphier: adjust dram_init() and dram_init_banksize() for ARM64 ARM: uniphier: enable eMMC on PH1-sLD3 reference board ARM: uniphier: add pin-mux settings for NAND, eMMC, SD of PH1-sLD3 ARM: uniphier: rename function names ph1_* to uniphier_* cosmetic: Fix typos "privide" ARM: uniphier: remove CONFIG_ARP_TIMEOUT define arch/arm/dts/uniphier-ph1-ld11.dtsi | 4 + arch/arm/dts/uniphier-ph1-ld20.dtsi | 4 + arch/arm/dts/uniphier-ph1-sld3-ref.dts | 4 + arch/arm/dts/uniphier-pinctrl.dtsi | 5 ++ arch/arm/mach-uniphier/arm32/debug_ll.S | 28 +++---- arch/arm/mach-uniphier/bcu/bcu-ld4.c | 2 +- arch/arm/mach-uniphier/bcu/bcu-sld3.c | 2 +- arch/arm/mach-uniphier/board_early_init_f.c | 28 +++---- arch/arm/mach-uniphier/boards.c | 34 ++++---- arch/arm/mach-uniphier/boot-mode/boot-device.h | 16 ++-- arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c | 4 +- arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c | 4 +- arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c | 4 +- arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c | 4 +- arch/arm/mach-uniphier/boot-mode/boot-mode.c | 8 +- arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c | 8 +- arch/arm/mach-uniphier/clk/clk-ld4.c | 4 +- arch/arm/mach-uniphier/clk/clk-pro4.c | 4 +- arch/arm/mach-uniphier/clk/clk-pro5.c | 4 +- arch/arm/mach-uniphier/clk/clk-pxs2.c | 4 +- arch/arm/mach-uniphier/dram/ddrphy-ld4.c | 3 +- arch/arm/mach-uniphier/dram/ddrphy-regs.h | 3 +- arch/arm/mach-uniphier/dram/umc-ld4.c | 4 +- arch/arm/mach-uniphier/dram/umc-pro4.c | 4 +- arch/arm/mach-uniphier/dram/umc-pxs2.c | 2 +- arch/arm/mach-uniphier/dram/umc-sld8.c | 4 +- arch/arm/mach-uniphier/dram_init.c | 45 ++++++++--- arch/arm/mach-uniphier/early-clk/early-clk-ld4.c | 4 +- arch/arm/mach-uniphier/early-clk/early-clk-pro5.c | 4 +- arch/arm/mach-uniphier/early-clk/early-clk-pxs2.c | 4 +- arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-sld3.c | 2 +- arch/arm/mach-uniphier/init.h | 94 +++++++++++----------- arch/arm/mach-uniphier/init/init-ld4.c | 14 ++-- arch/arm/mach-uniphier/init/init-pro4.c | 12 +-- arch/arm/mach-uniphier/init/init-pro5.c | 6 +- arch/arm/mach-uniphier/init/init-pxs2.c | 10 +-- arch/arm/mach-uniphier/init/init-sld3.c | 16 ++-- arch/arm/mach-uniphier/init/init-sld8.c | 14 ++-- arch/arm/mach-uniphier/init/init.c | 12 +-- arch/arm/mach-uniphier/memconf/memconf-pxs2.c | 2 +- arch/arm/mach-uniphier/memconf/memconf-sld3.c | 2 +- arch/arm/mach-uniphier/pinctrl/pinctrl-ld4.c | 2 +- arch/arm/mach-uniphier/pinctrl/pinctrl-ld6b.c | 2 +- arch/arm/mach-uniphier/pinctrl/pinctrl-pro4.c | 2 +- arch/arm/mach-uniphier/pinctrl/pinctrl-pro5.c | 2 +- arch/arm/mach-uniphier/pinctrl/pinctrl-pxs2.c | 2 +- arch/arm/mach-uniphier/pinctrl/pinctrl-sld3.c | 25 +++++- arch/arm/mach-uniphier/pinctrl/pinctrl-sld8.c | 2 +- arch/arm/mach-uniphier/pll/pll-init-ld4.c | 2 +- arch/arm/mach-uniphier/pll/pll-init-pro4.c | 2 +- arch/arm/mach-uniphier/pll/pll-init-sld3.c | 2 +- arch/arm/mach-uniphier/pll/pll-init-sld8.c | 2 +- arch/arm/mach-uniphier/pll/pll-spectrum-ld4.c | 2 +- arch/arm/mach-uniphier/pll/pll-spectrum-sld3.c | 2 +- arch/arm/mach-uniphier/sbc/sbc-admulti.c | 2 +- arch/arm/mach-uniphier/sbc/sbc-savepin.c | 2 +- drivers/clk/uniphier/clk-uniphier-core.c | 9 +-- drivers/gpio/gpio-uniphier.c | 8 +- drivers/i2c/i2c-uniphier-f.c | 12 ++- drivers/i2c/i2c-uniphier.c | 11 ++- drivers/mmc/uniphier-sd.c | 9 ++- drivers/mtd/nand/denali.c | 11 ++- drivers/mtd/nand/denali.h | 2 + drivers/pinctrl/uniphier/Kconfig | 6 ++ drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 64 ++++++++++++--- drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 114 +++++++++++++++++++++++++++ drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c | 3 - drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c | 3 - drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c | 4 +- drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | 4 +- drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c | 3 - drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c | 3 - drivers/pinctrl/uniphier/pinctrl-uniphier.h | 10 +-- drivers/serial/serial_uniphier.c | 8 +- include/configs/uniphier.h | 19 ++--- lib/Kconfig | 2 +- 77 files changed, 505 insertions(+), 290 deletions(-) create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c -- Best Regards Masahiro Yamada

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[U-Boot] [PATCH] arm: socfpga: Nuke useless include
by Marek Vasut 01 Apr '16

01 Apr '16

The dwmmc.h include was forgotten during the migration of dwmmc probing to DM. Since the shiny DM is in place now, remove this relic of the past. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> Cc: Chin Liang See <clsee(a)altera.com> --- arch/arm/mach-socfpga/misc.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index ce3ff0a..ebaa736 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -16,7 +16,6 @@ #include <asm/arch/reset_manager.h> #include <asm/arch/scan_manager.h> #include <asm/arch/system_manager.h> -#include <asm/arch/dwmmc.h> #include <asm/arch/nic301.h> #include <asm/arch/scu.h> #include <asm/pl310.h> -- 2.7.0

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[U-Boot] [PATCH V2] common: env: support sata device
by Peng Fan 01 Apr '16

01 Apr '16

Introduce env support for sata device. 1. Implement write_env/read_env/env_relocate_spec/saveenv/sata_get_env_dev 2. If want to enable this feature, define CONFIG_ENV_IS_IN_SATA, and define CONFIG_SYS_SATA_ENV_DEV or implement your own sata_get_ev_dev. Signed-off-by: Peng Fan <van.freenix(a)gmail.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Joe Hershberger <joe.hershberger(a)ni.com> Cc: Bin Meng <bmeng.cn(a)gmail.com> Cc: Stefan Roese <sr(a)denx.de> Cc: Heiko Schocher <hs(a)denx.de> Cc: Stuart Longland <stuartl(a)vrt.com.au> Cc: Maxime Ripard <maxime.ripard(a)free-electrons.com> Cc: Tom Rini <trini(a)konsulko.com> --- V2: Add error msg when ENV REDUND, since not supported now. Discard ent_ptr Use blk_dread/blk_dwrite cmd/nvedit.c | 3 +- common/Makefile | 1 + common/env_sata.c | 129 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 132 insertions(+), 1 deletion(-) create mode 100644 common/env_sata.c diff --git a/cmd/nvedit.c b/cmd/nvedit.c index 9cf884e..b67563b 100644 --- a/cmd/nvedit.c +++ b/cmd/nvedit.c @@ -49,12 +49,13 @@ DECLARE_GLOBAL_DATA_PTR; !defined(CONFIG_ENV_IS_IN_NAND) && \ !defined(CONFIG_ENV_IS_IN_NVRAM) && \ !defined(CONFIG_ENV_IS_IN_ONENAND) && \ + !defined(CONFIG_ENV_IS_IN_SATA) && \ !defined(CONFIG_ENV_IS_IN_SPI_FLASH) && \ !defined(CONFIG_ENV_IS_IN_REMOTE) && \ !defined(CONFIG_ENV_IS_IN_UBI) && \ !defined(CONFIG_ENV_IS_NOWHERE) # error Define one of CONFIG_ENV_IS_IN_{EEPROM|FLASH|DATAFLASH|ONENAND|\ -SPI_FLASH|NVRAM|MMC|FAT|EXT4|REMOTE|UBI} or CONFIG_ENV_IS_NOWHERE +SATA|SPI_FLASH|NVRAM|MMC|FAT|EXT4|REMOTE|UBI} or CONFIG_ENV_IS_NOWHERE #endif /* diff --git a/common/Makefile b/common/Makefile index 9a4b817..b23f312 100644 --- a/common/Makefile +++ b/common/Makefile @@ -50,6 +50,7 @@ obj-$(CONFIG_ENV_IS_IN_EXT4) += env_ext4.o obj-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o obj-$(CONFIG_ENV_IS_IN_NVRAM) += env_nvram.o obj-$(CONFIG_ENV_IS_IN_ONENAND) += env_onenand.o +obj-$(CONFIG_ENV_IS_IN_SATA) += env_sata.o obj-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o obj-$(CONFIG_ENV_IS_IN_REMOTE) += env_remote.o obj-$(CONFIG_ENV_IS_IN_UBI) += env_ubi.o diff --git a/common/env_sata.c b/common/env_sata.c new file mode 100644 index 0000000..16c7daa --- /dev/null +++ b/common/env_sata.c @@ -0,0 +1,129 @@ +/* + * (C) Copyright 2010-2016 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* #define DEBUG */ + +#include <common.h> + +#include <command.h> +#include <environment.h> +#include <linux/stddef.h> +#include <errno.h> +#include <memalign.h> +#include <sata.h> +#include <search.h> + +#if defined(CONFIG_ENV_SIZE_REDUND) || defined(CONFIG_ENV_OFFSET_REDUND) +#error ENV REDUND not supported +#endif + +#if !defined(CONFIG_ENV_OFFSET) || !defined(CONFIG_ENV_SIZE) +#error CONFIG_ENV_OFFSET or CONFIG_ENV_SIZE not defined +#endif + +char *env_name_spec = "SATA"; + +DECLARE_GLOBAL_DATA_PTR; + +__weak int sata_get_env_dev(void) +{ + return CONFIG_SYS_SATA_ENV_DEV; +} + +int env_init(void) +{ + /* use default */ + gd->env_addr = (ulong)&default_environment[0]; + gd->env_valid = 1; + + return 0; +} + +#ifdef CONFIG_CMD_SAVEENV +static inline int write_env(struct blk_desc *sata, unsigned long size, + unsigned long offset, void *buffer) +{ + uint blk_start, blk_cnt, n; + + blk_start = ALIGN(offset, sata->blksz) / sata->blksz; + blk_cnt = ALIGN(size, sata->blksz) / sata->blksz; + + n = blk_dwrite(sata, blk_start, blk_cnt, buffer); + + return (n == blk_cnt) ? 0 : -1; +} + +int saveenv(void) +{ + ALLOC_CACHE_ALIGN_BUFFER(env_t, env_new, 1); + struct blk_desc *sata = NULL; + int env_sata, ret; + + if (sata_initialize()) + return 1; + + env_sata = sata_get_env_dev(); + + sata = sata_get_dev(env_sata); + if (sata == NULL) { + printf("Unknown SATA(%d) device for environment!\n", + env_sata); + return 1; + } + + ret = env_export(env_new); + if (ret) + return 1; + + printf("Writing to SATA(%d)...", env_sata); + if (write_env(sata, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, &env_new)) { + puts("failed\n"); + return 1; + } + + puts("done\n"); + return 0; +} +#endif /* CONFIG_CMD_SAVEENV */ + +static inline int read_env(struct blk_desc *sata, unsigned long size, + unsigned long offset, void *buffer) +{ + uint blk_start, blk_cnt, n; + + blk_start = ALIGN(offset, sata->blksz) / sata->blksz; + blk_cnt = ALIGN(size, sata->blksz) / sata->blksz; + + n = blk_dread(sata, blk_start, blk_cnt, buffer); + + return (n == blk_cnt) ? 0 : -1; +} + +void env_relocate_spec(void) +{ +#if !defined(ENV_IS_EMBEDDED) + ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE); + struct blk_desc *sata = NULL; + int env_sata; + + if (sata_initialize()) + return; + + env_sata = sata_get_env_dev(); + + sata = sata_get_dev(env_sata); + if (sata == NULL) { + printf("Unknown SATA(%d) device for environment!\n", + env_sata); + return; + } + + if (read_env(sata, CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET, buf)) + return set_default_env(NULL); + + env_import(buf, 1); +#endif +} -- 2.6.2

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[U-Boot] [PATCH 1/7] serial: sh: Add support R8A7795
by Nobuhiro Iwamatsu 31 Mar '16

31 Mar '16

From: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx(a)renesas.com> This can be used in the same way as other R-CAR serial setting. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx(a)renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu(a)nigauri.org> --- drivers/serial/serial_sh.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index cbc2929..a95684b 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -225,7 +225,8 @@ struct uart_port { # define SCIF_ORER 0x0001 /* Overrun error bit */ # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \ - defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) + defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) || \ + defined(CONFIG_R8A7795) # if defined(CONFIG_SCIF_A) # define SCIF_ORER 0x0200 # else -- 2.8.0.rc3

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[U-Boot] [RFC PATCH 1/2] net: phy: ti: Allow the driver to be more configurable
by Dan Murphy 31 Mar '16

31 Mar '16

Not all devices use the same internal delay or fifo depth. Add the ability to set the internal delay for rx or tx and the fifo depth via the config file. If the value is not set in the config file then set the delay to the default. Signed-off-by: Dan Murphy <dmurphy(a)ti.com> --- drivers/net/phy/ti.c | 71 ++++++++++++++++++++++++++++++++---- include/dt-bindings/net/ti-dp83867.h | 35 ++++++++++++++++++ 2 files changed, 98 insertions(+), 8 deletions(-) create mode 100644 include/dt-bindings/net/ti-dp83867.h diff --git a/drivers/net/phy/ti.c b/drivers/net/phy/ti.c index c3912d5..6da0523 100644 --- a/drivers/net/phy/ti.c +++ b/drivers/net/phy/ti.c @@ -6,6 +6,9 @@ */ #include <common.h> #include <phy.h> +#include <linux/compat.h> + +#include <dt-bindings/net/ti-dp83867.h> /* TI DP83867 */ #define DP83867_DEVADDR 0x1f @@ -57,6 +60,17 @@ #define MII_MMD_CTRL_INCR_RDWT 0x8000 /* post increment on reads & writes */ #define MII_MMD_CTRL_INCR_ON_WT 0xC000 /* post increment on writes only */ +/* User setting - can be taken from DTS */ +#define DEFAULT_RX_ID_DELAY 8 +#define DEFAULT_TX_ID_DELAY 0xa +#define DEFAULT_FIFO_DEPTH 1 + +struct dp83867_private { + int rx_id_delay; + int tx_id_delay; + int fifo_depth; +}; + /** * phy_read_mmd_indirect - reads data from the MMD registers * @phydev: The PHY device bus @@ -134,16 +148,53 @@ static inline bool phy_interface_is_rgmii(struct phy_device *phydev) phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID; } -/* User setting - can be taken from DTS */ -#define RX_ID_DELAY 8 -#define TX_ID_DELAY 0xa -#define FIFO_DEPTH 1 +/** + * dp83867_data_init - Convenience function for setting PHY specific data + * @phydev: the phy_device struct + */ +static int dp83867_data_init(struct phy_device *phydev) +{ + struct dp83867_private *dp83867 = phydev->priv; + +#ifdef CONFIG_RGMII_RX_ID + dp83867->rx_id_delay = CONFIG_RGMII_RX_ID; +#else + dp83867->rx_id_delay = DEFAULT_RX_ID_DELAY; +#endif + +#ifdef CONFIG_RGMII_TX_ID + dp83867->tx_id_delay = CONFIG_RGMII_TX_ID; +#else + dp83867->tx_id_delay = DEFAULT_TX_ID_DELAY; +#endif + +#ifdef CONFIG_FIFO_DEPTH + dp83867->fifo_depth = CONFIG_FIFO_DEPTH; +#else + dp83867->fifo_depth = DEFAULT_FIFO_DEPTH; +#endif + return 0; +} static int dp83867_config(struct phy_device *phydev) { + struct dp83867_private *dp83867; unsigned int val, delay; int ret; + if (!phydev->priv) { + dp83867 = kzalloc(sizeof(*dp83867), GFP_KERNEL); + if (!dp83867) + return -ENOMEM; + + phydev->priv = dp83867; + ret = dp83867_data_init(phydev); + if (ret) + goto dp83867_write_error; + } else { + dp83867 = (struct dp83867_private *)phydev->priv; + } + /* Restart the PHY. */ val = phy_read(phydev, MDIO_DEVAD_NONE, DP83867_CTRL); phy_write(phydev, MDIO_DEVAD_NONE, DP83867_CTRL, @@ -152,9 +203,9 @@ static int dp83867_config(struct phy_device *phydev) if (phy_interface_is_rgmii(phydev)) { ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL, (DP83867_MDI_CROSSOVER_AUTO << DP83867_MDI_CROSSOVER) | - (FIFO_DEPTH << DP83867_PHYCR_FIFO_DEPTH_SHIFT)); + (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT)); if (ret) - return ret; + goto dp83867_write_error; } if ((phydev->interface >= PHY_INTERFACE_MODE_RGMII_ID) && @@ -175,8 +226,8 @@ static int dp83867_config(struct phy_device *phydev) phy_write_mmd_indirect(phydev, DP83867_RGMIICTL, DP83867_DEVADDR, phydev->addr, val); - delay = (RX_ID_DELAY | - (TX_ID_DELAY << DP83867_RGMII_TX_CLK_DELAY_SHIFT)); + delay = (dp83867->rx_id_delay | + (dp83867->tx_id_delay << DP83867_RGMII_TX_CLK_DELAY_SHIFT)); phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL, DP83867_DEVADDR, phydev->addr, delay); @@ -184,6 +235,10 @@ static int dp83867_config(struct phy_device *phydev) genphy_config_aneg(phydev); return 0; + +dp83867_write_error: + free(dp83867); + return ret; } static struct phy_driver DP83867_driver = { diff --git a/include/dt-bindings/net/ti-dp83867.h b/include/dt-bindings/net/ti-dp83867.h new file mode 100644 index 0000000..5c592fb --- /dev/null +++ b/include/dt-bindings/net/ti-dp83867.h @@ -0,0 +1,35 @@ +/* + * TI DP83867 PHY drivers + * + * SPDX-License-Identifier: GPL-2.0 + * + */ + +#ifndef _DT_BINDINGS_TI_DP83867_H +#define _DT_BINDINGS_TI_DP83867_H + +/* PHY CTRL bits */ +#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB 0x00 +#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB 0x01 +#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB 0x02 +#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB 0x03 + +/* RGMIIDCTL internal delay for rx and tx */ +#define DP83867_RGMIIDCTL_250_PS 0x0 +#define DP83867_RGMIIDCTL_500_PS 0x1 +#define DP83867_RGMIIDCTL_750_PS 0x2 +#define DP83867_RGMIIDCTL_1_NS 0x3 +#define DP83867_RGMIIDCTL_1_25_NS 0x4 +#define DP83867_RGMIIDCTL_1_50_NS 0x5 +#define DP83867_RGMIIDCTL_1_75_NS 0x6 +#define DP83867_RGMIIDCTL_2_00_NS 0x7 +#define DP83867_RGMIIDCTL_2_25_NS 0x8 +#define DP83867_RGMIIDCTL_2_50_NS 0x9 +#define DP83867_RGMIIDCTL_2_75_NS 0xa +#define DP83867_RGMIIDCTL_3_00_NS 0xb +#define DP83867_RGMIIDCTL_3_25_NS 0xc +#define DP83867_RGMIIDCTL_3_50_NS 0xd +#define DP83867_RGMIIDCTL_3_75_NS 0xe +#define DP83867_RGMIIDCTL_4_00_NS 0xf + +#endif -- 2.8.0.rc3

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[U-Boot] [PATCH] ARM: uniphier: remove CONFIG_ARP_TIMEOUT define
by Masahiro Yamada 31 Mar '16

31 Mar '16

I no longer see the problem claimed in the comment block. Rather, the 0.5 msec timeout seems too short for some TFTP servers. Drop the CONFIG_ARM_TIMEOUT to fall back to the 5 sec timeout. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- include/configs/uniphier.h | 8 -------- 1 file changed, 8 deletions(-) diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 963f55b..c6fc90f 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -102,14 +102,6 @@ /* Time clock 1MHz */ #define CONFIG_SYS_TIMER_RATE 1000000 -/* - * By default, ARP timeout is 5 sec. - * The first ARP request does not seem to work. - * So we need to retry ARP request anyway. - * We want to shrink the interval until the second ARP request. - */ -#define CONFIG_ARP_TIMEOUT 500UL /* 0.5 msec */ - #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_MAX_CHIPS 2 #define CONFIG_SYS_NAND_ONFI_DETECTION -- 1.9.1

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[U-Boot] [PATCH] cosmetic: Fix typos "privide"
by Masahiro Yamada 31 Mar '16

31 Mar '16

Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- arch/arm/mach-uniphier/clk/clk-ld4.c | 2 +- arch/arm/mach-uniphier/clk/clk-pro4.c | 2 +- arch/arm/mach-uniphier/clk/clk-pro5.c | 2 +- arch/arm/mach-uniphier/clk/clk-pxs2.c | 2 +- arch/arm/mach-uniphier/early-clk/early-clk-ld4.c | 2 +- arch/arm/mach-uniphier/early-clk/early-clk-pro5.c | 2 +- arch/arm/mach-uniphier/early-clk/early-clk-pxs2.c | 2 +- lib/Kconfig | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-uniphier/clk/clk-ld4.c b/arch/arm/mach-uniphier/clk/clk-ld4.c index f11fb53..8744d26 100644 --- a/arch/arm/mach-uniphier/clk/clk-ld4.c +++ b/arch/arm/mach-uniphier/clk/clk-ld4.c @@ -27,7 +27,7 @@ void uniphier_ld4_clk_init(void) writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ - /* privide clocks */ + /* provide clocks */ tmp = readl(SC_CLKCTRL); #ifdef CONFIG_UNIPHIER_ETH tmp |= SC_CLKCTRL_CEN_ETHER; diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c index b163e3c..8746d7d 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro4.c +++ b/arch/arm/mach-uniphier/clk/clk-pro4.c @@ -38,7 +38,7 @@ void uniphier_pro4_clk_init(void) readl(SC_RSTCTRL2); /* dummy read */ #endif - /* privide clocks */ + /* provide clocks */ tmp = readl(SC_CLKCTRL); #ifdef CONFIG_USB_XHCI_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | diff --git a/arch/arm/mach-uniphier/clk/clk-pro5.c b/arch/arm/mach-uniphier/clk/clk-pro5.c index 628f5c8..823bb06 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro5.c +++ b/arch/arm/mach-uniphier/clk/clk-pro5.c @@ -31,7 +31,7 @@ void uniphier_pro5_clk_init(void) readl(SC_RSTCTRL2); /* dummy read */ #endif - /* privide clocks */ + /* provide clocks */ tmp = readl(SC_CLKCTRL); #ifdef CONFIG_USB_XHCI_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | diff --git a/arch/arm/mach-uniphier/clk/clk-pxs2.c b/arch/arm/mach-uniphier/clk/clk-pxs2.c index 8548353..76bf856 100644 --- a/arch/arm/mach-uniphier/clk/clk-pxs2.c +++ b/arch/arm/mach-uniphier/clk/clk-pxs2.c @@ -34,7 +34,7 @@ void uniphier_pxs2_clk_init(void) readl(SC_RSTCTRL2); /* dummy read */ #endif - /* privide clocks */ + /* provide clocks */ tmp = readl(SC_CLKCTRL); #ifdef CONFIG_USB_XHCI_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-ld4.c b/arch/arm/mach-uniphier/early-clk/early-clk-ld4.c index c98081f..b6e8b64 100644 --- a/arch/arm/mach-uniphier/early-clk/early-clk-ld4.c +++ b/arch/arm/mach-uniphier/early-clk/early-clk-ld4.c @@ -24,7 +24,7 @@ int uniphier_ld4_early_clk_init(const struct uniphier_board_data *bd) writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ - /* privide clocks */ + /* provide clocks */ tmp = readl(SC_CLKCTRL); tmp |= SC_CLKCTRL_CEN_UMC | SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; writel(tmp, SC_CLKCTRL); diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-pro5.c b/arch/arm/mach-uniphier/early-clk/early-clk-pro5.c index 5fc8cd0..c41a8ea 100644 --- a/arch/arm/mach-uniphier/early-clk/early-clk-pro5.c +++ b/arch/arm/mach-uniphier/early-clk/early-clk-pro5.c @@ -26,7 +26,7 @@ int uniphier_pro5_early_clk_init(const struct uniphier_board_data *bd) writel(tmp, SC_RSTCTRL4); readl(SC_RSTCTRL); /* dummy read */ - /* privide clocks */ + /* provide clocks */ tmp = readl(SC_CLKCTRL); tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; writel(tmp, SC_CLKCTRL); diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-pxs2.c b/arch/arm/mach-uniphier/early-clk/early-clk-pxs2.c index 92b2dcb..665ecd5 100644 --- a/arch/arm/mach-uniphier/early-clk/early-clk-pxs2.c +++ b/arch/arm/mach-uniphier/early-clk/early-clk-pxs2.c @@ -30,7 +30,7 @@ int uniphier_pxs2_early_clk_init(const struct uniphier_board_data *bd) writel(tmp, SC_RSTCTRL4); readl(SC_RSTCTRL4); /* dummy read */ - /* privide clocks */ + /* provide clocks */ tmp = readl(SC_CLKCTRL); tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; writel(tmp, SC_CLKCTRL); diff --git a/lib/Kconfig b/lib/Kconfig index 7a45336..2b97c2b 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -16,7 +16,7 @@ config USE_PRIVATE_LIBGCC depends on HAVE_PRIVATE_LIBGCC help This option allows you to use the built-in libgcc implementation - of U-Boot instead of the one privided by the compiler. + of U-Boot instead of the one provided by the compiler. If unsure, say N. config SYS_HZ -- 1.9.1

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