November 2016 - U-Boot

[U-Boot] MMC write failed - Can't read partition table
by DaveKucharczyk 08 Nov '16

08 Nov '16

Hi, we've been using a new SD card for 6+ months without issues, but recently noticed issues with newer releases. I'm not sure if it's the SD cards, our burner stations or our build process. Were using U-Boot 2014.07 The problem is that we can't read/write to the SD card during boot. This happens intermittently on freshly burned cards. 75% of the time it works. Our bootcmd starts with ext2load mmc ... but obviously it fails due to "can't read partition table". Manually debugging in U-Boot if I run mmc rescan then it can read the partition table, but if I reboot the system then the issue comes back upon next power-up. If I run rescan AND then saveenv then everything works after that. My questions are: 1. Is it good practice to run mmc rescan as one of the first things in bootcmd? 2. I'm a little confised as to why saveenv would cause the SD card to work again *persistently*. 3. Any recommendations on getting root cause as to what it could be (SD card, our burner stations or our build process)? Troubleshooting steps below... MX51 U-Boot > mmc info Device: FSL_SDHC Manufacturer ID: 87 OEM: 494f Name: 004GB Tran Speed: 50000000 Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 3.8 GiB Bus Width: 1-bit MX51 U-Boot > mmc part Partition Map for MMC device 0 -- Partition Type: DOS Part Start Sector Num Sectors UUID Type ** Can't read partition table on 0:0 ** MX51 U-Boot > mmc rescan MX51 U-Boot > mmc part Partition Map for MMC device 0 -- Partition Type: DOS Part Start Sector Num Sectors UUID Type 1 31000 3844000 00000000-01 83 2 3882750 4037750 00000000-02 83 MX51 U-Boot > saveenv Saving Environment to MMC... reboot and everything works. -- View this message in context: http://u-boot.10912.n7.nabble.com/MMC-write-failed-Can-t-read-partition-tab… Sent from the U-Boot mailing list archive at Nabble.com.

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Re: [U-Boot] [PATCH 1/3] fsl/ddr: Revise erratum a009942 and clean related erratum
by york sun 08 Nov '16

08 Nov '16

On 11/08/2016 09:03 AM, york.sun(a)nxp.com wrote: > On 11/08/2016 02:39 AM, Shengzhou Liu wrote: >> >>> -----Original Message----- >>> From: york sun >>> Sent: Tuesday, November 08, 2016 1:04 AM >>> To: Shengzhou Liu <shengzhou.liu(a)nxp.com>; u-boot(a)lists.denx.de >>> Subject: Re: [PATCH 1/3] fsl/ddr: Revise erratum a009942 and clean >>> related >>> erratum >>>> >>>> York, >>>> >>>> This change(moving to ctrl_regs.c) has the same effect as read-modify- >>>> write(done in fsl_ddr_gen4.c) before MEM_EN is enabled for DDRC. >>>> As I commented in code with "the POR value of debug_29 register is >>>> zero" for A009942 workaround when moving it to ctrl_regs.c, Actually >>>> only A008378 changes debug_29[8:11] bits to 9 from original POR value 0 >>>> before the implementing of A009942, and A009942 overrides >>>> debug_29[8:11] set by A008378. >>>> So we can set debug_29 in ctrl_regs.c, it doesn't break anything. >>> >>> Shengzhou, >>> >>> The presumption of POR value is not safe. It is safe for this case >>> for now. >>> You may have other erratum workaround popping up later using the same >>> register, or other registers. PBI can also change registers. This >>> sets an >>> example to preset those registers out the scope of hardware interaction, >>> regardless which controller is in use, or its state. >>> >> >> York >> This change(move to common ctrl_regs.c for reuse on DDR4/DDR3) is only >> for A009942, >> For other erratum workaround popping up later using the same register, >> or other registers, >> we still can implement them in fsl_ddr_gen4.c or in other according to >> actual specific sequence requirement. >> I will add reading value of debug_29 register for A009942 in >> ctrl_regs.c in next version, which will be safe regardless how POR >> changes. > > You added A009942 and A008378. I don't think this is the right way. You > break the isolation between calculating the register values and hardware > interface. If you follow this path, you will add more and more hardware > interaction into ctrl_regs.c file. Until your change you don't have to > worry about any hardware condition in this file. > Another thought, if you are concerned about reusing the code for workaround, how about you put the common code into util.c, or even add an errata.c file? York

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[U-Boot] [PATCH v3 1/1] ARM: ts4600: add basic board support
by Sebastien Bourdelin 08 Nov '16

08 Nov '16

This commit adds basic support including: MMC, Serial console Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin(a)savoirfairelinux.com> --- arch/arm/Kconfig | 6 ++ board/technologic/ts4600/Kconfig | 15 ++++ board/technologic/ts4600/MAINTAINERS | 6 ++ board/technologic/ts4600/Makefile | 11 +++ board/technologic/ts4600/iomux.c | 149 +++++++++++++++++++++++++++++++++++ board/technologic/ts4600/ts4600.c | 89 +++++++++++++++++++++ configs/ts4600_defconfig | 18 +++++ include/configs/ts4600.h | 70 ++++++++++++++++ 8 files changed, 364 insertions(+) create mode 100644 board/technologic/ts4600/Kconfig create mode 100644 board/technologic/ts4600/MAINTAINERS create mode 100644 board/technologic/ts4600/Makefile create mode 100644 board/technologic/ts4600/iomux.c create mode 100644 board/technologic/ts4600/ts4600.c create mode 100644 configs/ts4600_defconfig create mode 100644 include/configs/ts4600.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d7a9b11..142c445 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -579,6 +579,11 @@ config ARCH_SUNXI select USB_KEYBOARD select USE_TINY_PRINTF +config TARGET_TS4600 + bool "Support TS4600" + select CPU_ARM926EJS + select SUPPORT_SPL + config TARGET_TS4800 bool "Support TS4800" select CPU_V7 @@ -1015,6 +1020,7 @@ source "board/ti/ti816x/Kconfig" source "board/timll/devkit3250/Kconfig" source "board/toradex/colibri_pxa270/Kconfig" source "board/toradex/colibri_vf/Kconfig" +source "board/technologic/ts4600/Kconfig" source "board/technologic/ts4800/Kconfig" source "board/vscom/baltos/Kconfig" source "board/woodburn/Kconfig" diff --git a/board/technologic/ts4600/Kconfig b/board/technologic/ts4600/Kconfig new file mode 100644 index 0000000..d0dc2e1 --- /dev/null +++ b/board/technologic/ts4600/Kconfig @@ -0,0 +1,15 @@ +if TARGET_TS4600 + +config SYS_BOARD + default "ts4600" + +config SYS_VENDOR + default "technologic" + +config SYS_SOC + default "mxs" + +config SYS_CONFIG_NAME + default "ts4600" + +endif diff --git a/board/technologic/ts4600/MAINTAINERS b/board/technologic/ts4600/MAINTAINERS new file mode 100644 index 0000000..6f683b5 --- /dev/null +++ b/board/technologic/ts4600/MAINTAINERS @@ -0,0 +1,6 @@ +TS4600 BOARD +M: Sebastien Bourdelin <sebastien.bourdelin(a)savoirfairelinux.com> +S: Maintained +F: board/technologic/ts4600/ +F: include/configs/ts4600.h +F: configs/ts4600_defconfig diff --git a/board/technologic/ts4600/Makefile b/board/technologic/ts4600/Makefile new file mode 100644 index 0000000..faa2970 --- /dev/null +++ b/board/technologic/ts4600/Makefile @@ -0,0 +1,11 @@ +# +# (C) Copyright 2016 Savoir-faire Linux +# +# SPDX-License-Identifier: GPL-2.0+ +# + +ifndef CONFIG_SPL_BUILD +obj-y := ts4600.o +else +obj-y := iomux.o +endif diff --git a/board/technologic/ts4600/iomux.c b/board/technologic/ts4600/iomux.c new file mode 100644 index 0000000..1398bbe --- /dev/null +++ b/board/technologic/ts4600/iomux.c @@ -0,0 +1,149 @@ +/* + * (C) Copyright 2016 Savoir-faire Linux Inc. + * + * Author: Sebastien Bourdelin <sebastien.bourdelin(a)savoirfairelinux.com> + * + * Based on work from TS7680 code by: + * Kris Bahnsen <kris(a)embeddedarm.com> + * Mark Featherston <mark(a)embeddedarm.com> + * https://github.com/embeddedarm/u-boot/tree/master/board/technologic/ts7680 + * + * Derived from MX28EVK code by + * Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <config.h> +#include <asm/io.h> +#include <asm/arch/iomux-mx28.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/sys_proto.h> + +#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) +#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL) + +const iomux_cfg_t iomux_setup[] = { + /* DUART */ + MX28_PAD_PWM0__DUART_RX, + MX28_PAD_PWM1__DUART_TX, + + /* MMC0 */ + MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0, + MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0, + MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0, + MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0, + MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0, + MX28_PAD_SSP0_SCK__SSP0_SCK | + (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), + + /* MMC0 slot power enable */ + MX28_PAD_PWM3__GPIO_3_28 | + (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), + + /* EMI */ + MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI, + MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI, + MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI, + MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI, + MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI, + MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI, + MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI, + MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI, + MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI, + MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI, + MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI, + MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI, + + /* I2C */ + MX28_PAD_I2C0_SCL__I2C0_SCL, + MX28_PAD_I2C0_SDA__I2C0_SDA, + +}; + +#define HW_DRAM_CTL29 (0x74 >> 2) +#define CS_MAP 0xf +#define COLUMN_SIZE 0x2 +#define ADDR_PINS 0x1 +#define APREBIT 0xa + +#define HW_DRAM_CTL29_CONFIG (CS_MAP << 24 | COLUMN_SIZE << 16 | \ + ADDR_PINS << 8 | APREBIT) + +#define HW_DRAM_CTL39 (0x9c >> 2) +#define TFAW 0xb +#define TDLL 0xc8 + +#define HW_DRAM_CTL39_CONFIG (TFAW << 24 | TDLL) + +#define HW_DRAM_CTL41 (0xa4 >> 2) +#define TPDEX 0x2 +#define TRCD_INT 0x4 +#define TRC 0xd + +#define HW_DRAM_CTL41_CONFIG (TPDEX << 24 | TRCD_INT << 8 | TRC) + +#define HW_DRAM_CTL42 (0xa8 >> 2) +#define TRAS_MAX 0x36a6 +#define TRAS_MIN 0xa + +#define HW_DRAM_CTL42_CONFIG (TRAS_MAX << 8 | TRAS_MIN) + +#define HW_DRAM_CTL43 (0xac >> 2) +#define TRP 0x4 +#define TRFC 0x27 +#define TREF 0x2a0 + +#define HW_DRAM_CTL43_CONFIG (TRP << 24 | TRFC << 16 | TREF) + +void mxs_adjust_memory_params(uint32_t *dram_vals) +{ + dram_vals[HW_DRAM_CTL29] = HW_DRAM_CTL29_CONFIG; + dram_vals[HW_DRAM_CTL39] = HW_DRAM_CTL39_CONFIG; + dram_vals[HW_DRAM_CTL41] = HW_DRAM_CTL41_CONFIG; + dram_vals[HW_DRAM_CTL42] = HW_DRAM_CTL42_CONFIG; + dram_vals[HW_DRAM_CTL43] = HW_DRAM_CTL43_CONFIG; +} + +void board_init_ll(const uint32_t arg, const uint32_t *resptr) +{ + mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup)); +} diff --git a/board/technologic/ts4600/ts4600.c b/board/technologic/ts4600/ts4600.c new file mode 100644 index 0000000..70dfead --- /dev/null +++ b/board/technologic/ts4600/ts4600.c @@ -0,0 +1,89 @@ +/* + * (C) Copyright 2016 Savoir-faire Linux Inc. + * + * Author: Sebastien Bourdelin <sebastien.bourdelin(a)savoirfairelinux.com> + * + * Based on work from TS7680 code by: + * Kris Bahnsen <kris(a)embeddedarm.com> + * Mark Featherston <mark(a)embeddedarm.com> + * https://github.com/embeddedarm/u-boot/tree/master/board/technologic/ts7680 + * + * Derived from MX28EVK code by + * Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/iomux-mx28.h> +#include <asm/arch/clock.h> +#include <asm/arch/sys_proto.h> +#include <linux/mii.h> +#include <miiphy.h> +#include <netdev.h> +#include <errno.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + /* IO0 clock at 480MHz */ + mxs_set_ioclk(MXC_IOCLK0, 480000); + /* IO1 clock at 480MHz */ + mxs_set_ioclk(MXC_IOCLK1, 480000); + + /* SSP0 clocks at 96MHz */ + mxs_set_sspclk(MXC_SSPCLK0, 96000, 0); + + return 0; +} + +int dram_init(void) +{ + return mxs_dram_init(); +} + +int board_init(void) +{ + /* Adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + + return 0; +} + +#ifdef CONFIG_CMD_MMC +static int ts4600_mmc_cd(int id) +{ + return 1; +} + +int board_mmc_init(bd_t *bis) +{ + int ret; + + mxs_iomux_setup_pad(MX28_PAD_PWM3__GPIO_3_28); + + /* Power-on SD */ + gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 1); + udelay(1000); + gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0); + + /* SD card */ + ret = mxsmmc_initialize(bis, 0, NULL, ts4600_mmc_cd); + if(ret != 0) { + printf("SD controller initialized with %d\n", ret); + } + + return ret; +} +#endif + +int checkboard(void) +{ + puts("Board: TS4600\n"); + + return 0; +} diff --git a/configs/ts4600_defconfig b/configs/ts4600_defconfig new file mode 100644 index 0000000..c052ded --- /dev/null +++ b/configs/ts4600_defconfig @@ -0,0 +1,18 @@ +CONFIG_ARM=y +CONFIG_TARGET_TS4600=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_FIT=y +CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_MMC" +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SPL=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_LIBFDT=y diff --git a/include/configs/ts4600.h b/include/configs/ts4600.h new file mode 100644 index 0000000..9b7bd1b --- /dev/null +++ b/include/configs/ts4600.h @@ -0,0 +1,70 @@ +/* + * (C) Copyright 2016 Savoir-faire Linux Inc. + * + * Author: Sebastien Bourdelin <sebastien.bourdelin(a)savoirfairelinux.com> + * + * Derived from MX28EVK code by + * Fabio Estevam <fabio.estevam(a)freescale.com> + * Freescale Semiconductor, Inc. + * + * Configuration settings for the TS4600 Board + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __CONFIGS_TS4600_H__ +#define __CONFIGS_TS4600_H__ + +/* System configurations */ +#define CONFIG_MX28 /* i.MX28 SoC */ + +/* U-Boot Commands */ +#define CONFIG_SYS_NO_FLASH /* No NOR Flash */ +#define CONFIG_DOS_PARTITION + +/* Memory configuration */ +#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ +#define PHYS_SDRAM_1 0x40000000 /* Base address */ +#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +/* Environment */ +#define CONFIG_ENV_SIZE (8 * 1024) + +/* Environment is in MMC */ +#if defined(CONFIG_CMD_MMC) && defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (256 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#endif + +/* Boot Linux */ +#define CONFIG_LOADADDR 0x42000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* Extra Environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_addr=0x41000000\0" \ + "loadkernel=load mmc ${mmcdev}:${mmcpart} ${loadaddr} zImage\0" \ + "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} imx28-ts4600.dtb\0" \ + "loadbootscript=load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot.ub\0" \ + "bootscript=echo Running bootscript from mmc...; " \ + "setenv mmcdev 0; " \ + "setenv mmcpart 2; " \ + "run loadbootscript && source ${loadaddr}; \0" \ + "sdboot=echo Booting from SD card ...; " \ + "setenv mmcdev 0; " \ + "setenv mmcpart 2; " \ + "setenv root /dev/mmcblk0p3; " \ + "run loadkernel && run loadfdt; \0" \ + "startbootsequence=run bootscript || run sdboot \0" \ + +#define CONFIG_BOOTCOMMAND \ + "mmc rescan; " \ + "run startbootsequence; " \ + "setenv cmdline_append console=ttyAMA0,115200; " \ + "setenv bootargs root=${root} rootwait rw ${cmdline_append}; " \ + "bootz ${loadaddr} - ${fdt_addr}; " + +/* The rest of the configuration is shared */ +#include <configs/mxs.h> + +#endif /* __CONFIGS_TS4600_H__ */ -- 2.10.0

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[U-Boot] [PATCH v2] rpi: passthrough of the firmware provided FDT blob
by Cédric Schieli 08 Nov '16

08 Nov '16

Raspberry firmware used to pass a FDT blob at a fixed address (0x100), but this is not true anymore. The address now depends on both the memory size and the blob size [1]. If one wants to passthrough this FDT blob to the kernel, the most reliable way is to save its address from the r2/x0 register in the U-Boot entry point and expose it in a environment variable for further processing. This patch just does this: - save the provided address in the global variable fw_dtb_pointer - expose it in ${fdt_addr} if it points to a a valid FDT blob There are many different ways to use it. One can, for example, use the following script which will extract from the tree the command line built by the firmware, then hand over the blob to a previously loaded kernel: if fdt addr ${fdt_addr} then fdt get value bootargs /chosen bootargs bootz ${kernel_addr_r} - ${fdt_addr} fi Alternatively, users relying on sysboot/pxe can simply omit any FDT statement in their extlinux.conf file, U-Boot will automagically pick ${fdt_addr} and pass it to the kernel. Please note that for this to work the U-Boot binary must be tagged with a recent version of the mkknlimg script found in the Rasperry Fundation's kernel tree: <kernel>/scripts/mkknlimg --dtok <uboot>/u-boot.bin /boot/u-boot.bin [1] https://www.raspberrypi.org/forums//viewtopic.php?f=107&t=134018 Signed-off-by: Cédric Schieli <cschieli(a)gmail.com> --- Changes in v2: - merge the series in a single patch - convert the save_boot_params() function to C code - add a board_get_usable_ram_top() function to protect the blob during relocation - remove the (obsolete) extern declaration from include/configs/rpi.h - rename the global variable to fw_dtb_pointer - rename the environment variable to ${fdt_addr} - fix 64-bits compatibility issues - document possible uses of ${fdt_addr} board/raspberrypi/rpi/rpi.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index 6245b36..b1614b9 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -25,6 +25,21 @@ DECLARE_GLOBAL_DATA_PTR; +/* From init.S */ +extern void save_boot_params_ret(void); + +static unsigned long fw_dtb_pointer __attribute__ ((section(".data"))); + +#ifdef CONFIG_ARM64 +void save_boot_params(unsigned long dtb) +#else +void save_boot_params(unsigned long r0, unsigned long r1, unsigned long dtb) +#endif +{ + fw_dtb_pointer = dtb; + save_boot_params_ret(); +} + static const struct bcm2835_gpio_platdata gpio_platdata = { .base = BCM2835_GPIO_BASE, }; @@ -285,6 +300,31 @@ static void set_fdtfile(void) setenv("fdtfile", fdtfile); } +/* + * If the firmware provided a valid FDT at boot time, let's expose it in + * ${fdt_addr} so it may be passed unmodified to the kernel. + */ +static void set_fdt_addr(void) +{ + if (getenv("fdt_addr")) + return; + + if (fdt_magic(fw_dtb_pointer) != FDT_MAGIC) + return; + + setenv_hex("fdt_addr", fw_dtb_pointer); +} + +/* + * Prevent relocation from stomping on a firmware provided FDT blob. + */ +unsigned long board_get_usable_ram_top(unsigned long total_size) +{ + if ((gd->ram_top - fw_dtb_pointer) > SZ_64M) + return gd->ram_top; + return fw_dtb_pointer &~0xffff; +} + static void set_usbethaddr(void) { ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_mac_address, msg, 1); @@ -356,6 +396,7 @@ static void set_serial_number(void) int misc_init_r(void) { + set_fdt_addr(); set_fdtfile(); set_usbethaddr(); #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG -- 2.7.3

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[U-Boot] [PATCH] arm: ls1021a: improve the core frequency to 1.2GHZ
by Yuan Yao 08 Nov '16

08 Nov '16

From: Yuan Yao <yao.yuan(a)nxp.com> LS1021A is working stability with 1.2GHZ, so as a performance requirements we can improve the core frequency to 1.2GHZ for SD boot and NAND boot. Signed-off-by: Yuan Yao <yao.yuan(a)nxp.com> --- board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg | 2 +- board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg | 4 ++-- board/freescale/ls1021aqds/ls102xa_rcw_sd_qspi.cfg | 4 ++-- board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg | 2 +- board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg | 2 +- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg b/board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg index 222c71d..d76e913 100644 --- a/board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg +++ b/board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg @@ -1,7 +1,7 @@ #PBL preamble and RCW header aa55aa55 01ee0100 # serdes protocol -0608000a 00000000 00000000 00000000 +0608000c 00000000 00000000 00000000 60000000 00407900 e0106a00 21046000 00000000 00000000 00000000 00038000 00000000 001b7200 00000000 00000000 diff --git a/board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg b/board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg index 9d99bd8..f0cf9c2 100644 --- a/board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg +++ b/board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg @@ -2,13 +2,13 @@ aa55aa55 01ee0100 #enable IFC, disable QSPI and DSPI -0608000a 00000000 00000000 00000000 +0608000c 00000000 00000000 00000000 60000000 00407900 60040a00 21046000 00000000 00000000 00000000 00038000 00000000 001b7200 00000000 00000000 #disable IFC, enable QSPI and DSPI -#0608000a 00000000 00000000 00000000 +#0608000c 00000000 00000000 00000000 #60000000 00407900 60040a00 21046000 #00000000 00000000 00000000 00038000 #20024800 001b7200 00000000 00000000 diff --git a/board/freescale/ls1021aqds/ls102xa_rcw_sd_qspi.cfg b/board/freescale/ls1021aqds/ls102xa_rcw_sd_qspi.cfg index 2bd398c..10cc4a9 100644 --- a/board/freescale/ls1021aqds/ls102xa_rcw_sd_qspi.cfg +++ b/board/freescale/ls1021aqds/ls102xa_rcw_sd_qspi.cfg @@ -2,13 +2,13 @@ aa55aa55 01ee0100 #enable IFC, disable QSPI and DSPI -#0608000a 00000000 00000000 00000000 +#0608000c 00000000 00000000 00000000 #60000000 00407900 60040a00 21046000 #00000000 00000000 00000000 00038000 #00000000 001b7200 00000000 00000000 #disable IFC, enable QSPI and DSPI -0608000a 00000000 00000000 00000000 +0608000c 00000000 00000000 00000000 60000000 00407900 60040a00 21046000 00000000 00000000 00000000 00038000 20024800 001b7200 00000000 00000000 diff --git a/board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg b/board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg index 205606f..f94997d 100644 --- a/board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg +++ b/board/freescale/ls1021atwr/ls102xa_rcw_sd_ifc.cfg @@ -2,7 +2,7 @@ aa55aa55 01ee0100 #enable IFC, disable QSPI and DSPI -0608000a 00000000 00000000 00000000 +0608000c 00000000 00000000 00000000 30000000 00007900 60040a00 21046000 00000000 00000000 00000000 20000000 00080000 881b7340 00000000 00000000 diff --git a/board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg b/board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg index 6767e09..541b604 100644 --- a/board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg +++ b/board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg @@ -2,7 +2,7 @@ aa55aa55 01ee0100 #disable IFC, enable QSPI and DSPI -0608000a 00000000 00000000 00000000 +0608000c 00000000 00000000 00000000 30000000 00007900 60040a00 21046000 00000000 00000000 00000000 20000000 20024800 881b7340 00000000 00000000 -- 2.1.0.27.g96db324

1 0

[U-Boot] [PATCH] ls1021a: QSPI: update the node for QSPI support
by Yuan Yao 08 Nov '16

08 Nov '16

From: Yuan Yao <yao.yuan(a)nxp.com> Add the address value and size value name for QSPI dts node. Signed-off-by: Yuan Yao <yao.yuan(a)nxp.com> --- arch/arm/dts/ls1021a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi index 119b1af..37be169 100644 --- a/arch/arm/dts/ls1021a.dtsi +++ b/arch/arm/dts/ls1021a.dtsi @@ -176,6 +176,7 @@ #size-cells = <0>; reg = <0x1550000 0x10000>, <0x40000000 0x4000000>; + reg-names = "QuadSPI", "QuadSPI-memory"; num-cs = <2>; big-endian; status = "disabled"; -- 2.1.0.27.g96db324

3 4

[U-Boot] 2016.09: FIT Image
by Vered Zvi 08 Nov '16

08 Nov '16

Hello, I carefully read the files in doc\uImage.FIT It seems that the boot file (kernel, complete rootfs) can be signed for secure boot, but not encrypted. Am I right ? If not, can you please instruct me how to encrypt the boot file ? Thank you, Z.V The information contained in this communication is proprietary to Israel Aerospace Industries Ltd. and/or third parties, may contain confidential or privileged information, and is intended only for the use of the intended addressee thereof. If you are not the intended addressee, please be aware that any use, disclosure, distribution and/or copying of this communication is strictly prohibited. If you receive this communication in error, please notify the sender immediately and delete it from your computer.

1 0

[U-Boot] [PATCH v5] efi_loader: console: Correctly report modes
by Emmanuel Vadot 08 Nov '16

08 Nov '16

Add support for EFI console modes. Mode 0 is always 80x25 and present by EFI specification. Mode 1 is always 80x50 and not mandatory. Mode 2 and above is freely usable. If the terminal can handle mode 1, we mark it as supported. If the terminal size is greater than mode 0 and different than mode 1, we install it as mode 2. Modes can be switch with cout_set_mode. Changes in V5: Correctly detect mode before enabling mode 2. Changes in V4: Reset cursor positon on mode switch Use local variables in console query code Changes in V3: Valid mode are 0 to EFIMode-1 Fix style Changes in V2: Add mode switch Report only the modes that we support Signed-off-by: Emmanuel Vadot <manu(a)bidouilliste.com> --- lib/efi_loader/efi_console.c | 100 ++++++++++++++++++++++++++++++++++++------- 1 file changed, 84 insertions(+), 16 deletions(-) diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c index 2e0228c..8ef7326 100644 --- a/lib/efi_loader/efi_console.c +++ b/lib/efi_loader/efi_console.c @@ -9,11 +9,38 @@ #include <common.h> #include <efi_loader.h> -/* If we can't determine the console size, default to 80x24 */ -static int console_columns = 80; -static int console_rows = 24; static bool console_size_queried; +#define EFI_COUT_MODE_2 2 +#define EFI_MAX_COUT_MODE 3 + +struct cout_mode { + unsigned long columns; + unsigned long rows; + int present; +}; + +static struct cout_mode efi_cout_modes[] = { + /* EFI Mode 0 is 80x25 and always present */ + { + .columns = 80, + .rows = 25, + .present = 1, + }, + /* EFI Mode 1 is always 80x50 */ + { + .columns = 80, + .rows = 50, + .present = 0, + }, + /* Value are unknown until we query the console */ + { + .columns = 0, + .rows = 0, + .present = 0, + }, +}; + const efi_guid_t efi_guid_console_control = CONSOLE_CONTROL_GUID; #define cESC '\x1b' @@ -56,8 +83,9 @@ const struct efi_console_control_protocol efi_console_control = { .lock_std_in = efi_cin_lock_std_in, }; +/* Default to mode 0 */ static struct simple_text_output_mode efi_con_mode = { - .max_mode = 0, + .max_mode = 1, .mode = 0, .attribute = 0, .cursor_column = 0, @@ -131,8 +159,10 @@ static efi_status_t EFIAPI efi_cout_output_string( struct efi_simple_text_output_protocol *this, const unsigned short *string) { + struct cout_mode *mode; u16 ch; + mode = &efi_cout_modes[efi_con_mode.mode]; EFI_ENTRY("%p, %p", this, string); for (;(ch = *string); string++) { print_unicode_in_utf8(ch); @@ -140,13 +170,12 @@ static efi_status_t EFIAPI efi_cout_output_string( if (ch == '\n') { efi_con_mode.cursor_column = 1; efi_con_mode.cursor_row++; - } else if (efi_con_mode.cursor_column > console_columns) { + } else if (efi_con_mode.cursor_column > mode->columns) { efi_con_mode.cursor_column = 1; efi_con_mode.cursor_row++; } - if (efi_con_mode.cursor_row > console_rows) { - efi_con_mode.cursor_row = console_rows; - } + if (efi_con_mode.cursor_row > mode->rows) + efi_con_mode.cursor_row = mode->rows; } return EFI_EXIT(EFI_SUCCESS); @@ -160,6 +189,14 @@ static efi_status_t EFIAPI efi_cout_test_string( return EFI_EXIT(EFI_SUCCESS); } +static bool cout_mode_matches(struct cout_mode *mode, int rows, int cols) +{ + if (!mode->present) + return false; + + return (mode->rows == rows) && (mode->columns == cols); +} + static efi_status_t EFIAPI efi_cout_query_mode( struct efi_simple_text_output_protocol *this, unsigned long mode_number, unsigned long *columns, @@ -170,6 +207,8 @@ static efi_status_t EFIAPI efi_cout_query_mode( if (!console_size_queried) { /* Ask the terminal about its size */ int n[3]; + int cols; + int rows; u64 timeout; console_size_queried = true; @@ -191,15 +230,40 @@ static efi_status_t EFIAPI efi_cout_query_mode( goto out; } - console_columns = n[2]; - console_rows = n[1]; + cols = n[2]; + rows = n[1]; + + /* Test if we can have Mode 1 */ + if (cols >= 80 && rows >= 50) { + efi_cout_modes[1].present = 1; + efi_con_mode.max_mode = 2; + } + + /* + * Install our mode as mode 2 if it is different + * than mode 0 or 1 and set it as the currently selected mode + */ + if (!cout_mode_matches(&efi_cout_modes[0], rows, cols) && + !cout_mode_matches(&efi_cout_modes[1], rows, cols)) { + efi_cout_modes[EFI_COUT_MODE_2].columns = cols; + efi_cout_modes[EFI_COUT_MODE_2].rows = rows; + efi_cout_modes[EFI_COUT_MODE_2].present = 1; + efi_con_mode.max_mode = EFI_MAX_COUT_MODE; + efi_con_mode.mode = EFI_COUT_MODE_2; + } } + if (mode_number >= efi_con_mode.max_mode) + return EFI_EXIT(EFI_UNSUPPORTED); + + if (efi_cout_modes[mode_number].present != 1) + return EFI_EXIT(EFI_UNSUPPORTED); + out: if (columns) - *columns = console_columns; + *columns = efi_cout_modes[mode_number].columns; if (rows) - *rows = console_rows; + *rows = efi_cout_modes[mode_number].rows; return EFI_EXIT(EFI_SUCCESS); } @@ -210,11 +274,15 @@ static efi_status_t EFIAPI efi_cout_set_mode( { EFI_ENTRY("%p, %ld", this, mode_number); - /* We only support text output for now */ - if (mode_number == EFI_CONSOLE_MODE_TEXT) - return EFI_EXIT(EFI_SUCCESS); - return EFI_EXIT(EFI_UNSUPPORTED); + if (mode_number > efi_con_mode.max_mode) + return EFI_EXIT(EFI_UNSUPPORTED); + + efi_con_mode.mode = mode_number; + efi_con_mode.cursor_column = 0; + efi_con_mode.cursor_row = 0; + + return EFI_EXIT(EFI_SUCCESS); } static efi_status_t EFIAPI efi_cout_set_attribute( -- 2.9.2

1 0

[U-Boot] [PATCH] board/ls2080qds: add the procedure to deply QSPI image.
by Yuan Yao 08 Nov '16

08 Nov '16

From: Yuan Yao <yao.yuan(a)nxp.com> Signed-off-by: Yuan Yao <yao.yuan(a)nxp.com> --- board/freescale/ls2080aqds/README | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/board/freescale/ls2080aqds/README b/board/freescale/ls2080aqds/README index f288750..0f7446a 100644 --- a/board/freescale/ls2080aqds/README +++ b/board/freescale/ls2080aqds/README @@ -188,3 +188,38 @@ DPMAC14 -> PHY4-P1 DPMAC15 -> PHY4-P2 DPMAC16 -> PHY4-P3 + +Booting from QSPI +------------------- +Booting from QSPI requires two images, RCW and u-boot-dtb.bin. +The difference between QSPI boot RCW image and NOR boot image is the PBI +command sequence. Below is the setting for PBI commands for QDS which boot +on QSPI flash device. + +1) CCSR 4-byte write to 0x00e00404, data=0x00000000 +2) CCSR 4-byte write to 0x00e00400, data=0x20010000 +The above two commands set bootloc register to 0x00000000_20010000 where +the u-boot code will be running in QSPI flash. + +RCW image should be written to the beginning of QSPI flash device. +Example of using u-boot command + +=> sf probe 0:0 +SF: Detected S25FL256S_64K with page size 256 Bytes, erase size 64 KiB, total 32 MiB +=> sf erase 0 +<size of rcw image> +SF: 65536 bytes @ 0x0 Erased: OK +=> sf write <rcw image in memory> 0 <size of rcw image> +SF: 164 bytes @ 0x0 Written: OK + +To get the QSPI image, build u-boot with QSPI config, for example, +ls2080aqds_qspi_defconfig. The image needed is u-boot-dtb.bin. +The u-boot image should be written to 0x10000. + +=> sf probe 0:0 +SF: Detected S25FL256S_64K with page size 256 Bytes, erase size 64 KiB, total 32 MiB +=> sf erase 10000 +<size of u-boot image> +SF: 589824 bytes @ 0x10000 Erased: OK +=> sf write <u-boot image in memory> 10000 <size of u-boot image> +SF: 580966 bytes @ 0x10000 Written: OK + +With these two images in QSPI flash device, the board can boot from QSPI. -- 2.1.0.27.g96db324

3 8

[U-Boot] [PATCH 1/1] ARM: ts4600: add basic board support
by Sebastien Bourdelin 07 Nov '16

07 Nov '16

This commit adds basic support including: MMC, Serial console Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin(a)savoirfairelinux.com> --- arch/arm/Kconfig | 6 ++ board/technologic/ts4600/Kconfig | 15 ++++ board/technologic/ts4600/MAINTAINERS | 6 ++ board/technologic/ts4600/Makefile | 11 +++ board/technologic/ts4600/iomux.c | 131 +++++++++++++++++++++++++++++++++++ board/technologic/ts4600/ts4600.c | 99 ++++++++++++++++++++++++++ configs/ts4600_defconfig | 18 +++++ include/configs/ts4600.h | 70 +++++++++++++++++++ 8 files changed, 356 insertions(+) create mode 100644 board/technologic/ts4600/Kconfig create mode 100644 board/technologic/ts4600/MAINTAINERS create mode 100644 board/technologic/ts4600/Makefile create mode 100644 board/technologic/ts4600/iomux.c create mode 100644 board/technologic/ts4600/ts4600.c create mode 100644 configs/ts4600_defconfig create mode 100644 include/configs/ts4600.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d7a9b11..142c445 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -579,6 +579,11 @@ config ARCH_SUNXI select USB_KEYBOARD select USE_TINY_PRINTF +config TARGET_TS4600 + bool "Support TS4600" + select CPU_ARM926EJS + select SUPPORT_SPL + config TARGET_TS4800 bool "Support TS4800" select CPU_V7 @@ -1015,6 +1020,7 @@ source "board/ti/ti816x/Kconfig" source "board/timll/devkit3250/Kconfig" source "board/toradex/colibri_pxa270/Kconfig" source "board/toradex/colibri_vf/Kconfig" +source "board/technologic/ts4600/Kconfig" source "board/technologic/ts4800/Kconfig" source "board/vscom/baltos/Kconfig" source "board/woodburn/Kconfig" diff --git a/board/technologic/ts4600/Kconfig b/board/technologic/ts4600/Kconfig new file mode 100644 index 0000000..d0dc2e1 --- /dev/null +++ b/board/technologic/ts4600/Kconfig @@ -0,0 +1,15 @@ +if TARGET_TS4600 + +config SYS_BOARD + default "ts4600" + +config SYS_VENDOR + default "technologic" + +config SYS_SOC + default "mxs" + +config SYS_CONFIG_NAME + default "ts4600" + +endif diff --git a/board/technologic/ts4600/MAINTAINERS b/board/technologic/ts4600/MAINTAINERS new file mode 100644 index 0000000..6f683b5 --- /dev/null +++ b/board/technologic/ts4600/MAINTAINERS @@ -0,0 +1,6 @@ +TS4600 BOARD +M: Sebastien Bourdelin <sebastien.bourdelin(a)savoirfairelinux.com> +S: Maintained +F: board/technologic/ts4600/ +F: include/configs/ts4600.h +F: configs/ts4600_defconfig diff --git a/board/technologic/ts4600/Makefile b/board/technologic/ts4600/Makefile new file mode 100644 index 0000000..faa2970 --- /dev/null +++ b/board/technologic/ts4600/Makefile @@ -0,0 +1,11 @@ +# +# (C) Copyright 2016 Savoir-faire Linux +# +# SPDX-License-Identifier: GPL-2.0+ +# + +ifndef CONFIG_SPL_BUILD +obj-y := ts4600.o +else +obj-y := iomux.o +endif diff --git a/board/technologic/ts4600/iomux.c b/board/technologic/ts4600/iomux.c new file mode 100644 index 0000000..de49fc2 --- /dev/null +++ b/board/technologic/ts4600/iomux.c @@ -0,0 +1,131 @@ +/* + * (C) Copyright 2016 Savoir-faire Linux Inc. + * + * Author: Sebastien Bourdelin <sebastien.bourdelin(a)savoirfairelinux.com> + * + * Based on work from TS7680 code by: + * Kris Bahnsen <kris(a)embeddedarm.com> + * Mark Featherston <mark(a)embeddedarm.com> + * https://github.com/embeddedarm/u-boot/tree/master/board/technologic/ts7680 + * + * Derived from MX28EVK code by + * Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <config.h> +#include <asm/io.h> +#include <asm/arch/iomux-mx28.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/sys_proto.h> + +#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) +#define MUX_CONFIG_GPMI (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL) +#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) +#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL) +#define MUX_CONFIG_LCD (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL) + +const iomux_cfg_t iomux_setup[] = { + /* DUART */ + MX28_PAD_PWM0__DUART_RX, + MX28_PAD_PWM1__DUART_TX, + + /* MMC0 */ + MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0, + MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0, + MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0, + MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0, + MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0, + MX28_PAD_SSP0_SCK__SSP0_SCK | + (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), + + /* MMC0 slot power enable */ + MX28_PAD_PWM3__GPIO_3_28 | + (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), + + /* MMC1 eMMC */ + MX28_PAD_GPMI_WRN__SSP1_SCK | + (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), + MX28_PAD_GPMI_RDY1__SSP1_CMD | MUX_CONFIG_SSP0, + MX28_PAD_GPMI_D00__SSP1_D0 | MUX_CONFIG_SSP0, + MX28_PAD_GPMI_D01__SSP1_D1 | MUX_CONFIG_SSP0, + MX28_PAD_GPMI_D02__SSP1_D2 | MUX_CONFIG_SSP0, + MX28_PAD_GPMI_D03__SSP1_D3 | MUX_CONFIG_SSP0, + + /* EMI */ + MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI, + MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI, + MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI, + MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI, + MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI, + MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI, + MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI, + MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI, + MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI, + MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI, + MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI, + MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI, + MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI, + MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI, + + /* I2C */ + MX28_PAD_I2C0_SCL__I2C0_SCL, + MX28_PAD_I2C0_SDA__I2C0_SDA, + +}; + +#define HW_DRAM_CTL29 (0x74 >> 2) +#define CS_MAP 0xf +#define COLUMN_SIZE 0x2 +#define ADDR_PINS 0x1 +#define APREBIT 0xa + +#define HW_DRAM_CTL29_CONFIG (CS_MAP << 24 | COLUMN_SIZE << 16 | \ + ADDR_PINS << 8 | APREBIT) + +void mxs_adjust_memory_params(uint32_t *dram_vals) +{ + dram_vals[HW_DRAM_CTL29] = HW_DRAM_CTL29_CONFIG; +} + +void board_init_ll(const uint32_t arg, const uint32_t *resptr) +{ + mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup)); +} diff --git a/board/technologic/ts4600/ts4600.c b/board/technologic/ts4600/ts4600.c new file mode 100644 index 0000000..a992946 --- /dev/null +++ b/board/technologic/ts4600/ts4600.c @@ -0,0 +1,99 @@ +/* + * (C) Copyright 2016 Savoir-faire Linux Inc. + * + * Author: Sebastien Bourdelin <sebastien.bourdelin(a)savoirfairelinux.com> + * + * Based on work from TS7680 code by: + * Kris Bahnsen <kris(a)embeddedarm.com> + * Mark Featherston <mark(a)embeddedarm.com> + * https://github.com/embeddedarm/u-boot/tree/master/board/technologic/ts7680 + * + * Derived from MX28EVK code by + * Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/iomux-mx28.h> +#include <asm/arch/clock.h> +#include <asm/arch/sys_proto.h> +#include <linux/mii.h> +#include <miiphy.h> +#include <netdev.h> +#include <errno.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + /* IO0 clock at 480MHz */ + mxs_set_ioclk(MXC_IOCLK0, 480000); + /* IO1 clock at 480MHz */ + mxs_set_ioclk(MXC_IOCLK1, 480000); + + /* SSP0 clocks at 96MHz */ + mxs_set_sspclk(MXC_SSPCLK0, 96000, 0); + /* SSP1 clocks at 96MHz */ + mxs_set_sspclk(MXC_SSPCLK1, 96000, 0); + /* SSP2 clock at 160MHz */ + mxs_set_sspclk(MXC_SSPCLK2, 160000, 0); + + return 0; +} + +int dram_init(void) +{ + return mxs_dram_init(); +} + +int board_init(void) +{ + /* Adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + + return 0; +} + +#ifdef CONFIG_CMD_MMC +static int ts4600_mmc_cd(int id) +{ + return 1; +} + +int board_mmc_init(bd_t *bis) +{ + int ret; + + mxs_iomux_setup_pad(MX28_PAD_PWM3__GPIO_3_28); + + /* Power-on SD */ + gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 1); + udelay(1000); + gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0); + + /* SD card */ + ret = mxsmmc_initialize(bis, 0, NULL, ts4600_mmc_cd); + if(ret != 0) { + printf("SD controller initialized with %d\n", ret); + } + + /* eMMC */ + ret = mxsmmc_initialize(bis, 1, NULL, ts4600_mmc_cd); + if(ret != 0) { + printf("eMMC controller initialized with %d\n", ret); + } + + return ret; +} +#endif + +int checkboard(void) +{ + puts("Board: TS4600\n"); + + return 0; +} diff --git a/configs/ts4600_defconfig b/configs/ts4600_defconfig new file mode 100644 index 0000000..c052ded --- /dev/null +++ b/configs/ts4600_defconfig @@ -0,0 +1,18 @@ +CONFIG_ARM=y +CONFIG_TARGET_TS4600=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_FIT=y +CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_MMC" +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SPL=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_LIBFDT=y diff --git a/include/configs/ts4600.h b/include/configs/ts4600.h new file mode 100644 index 0000000..9c8d29d --- /dev/null +++ b/include/configs/ts4600.h @@ -0,0 +1,70 @@ +/* + * (C) Copyright 2016 Savoir-faire Linux Inc. + * + * Author: Sebastien Bourdelin <sebastien.bourdelin(a)savoirfairelinux.com> + * + * Derived from MX28EVK code by + * Fabio Estevam <fabio.estevam(a)freescale.com> + * Freescale Semiconductor, Inc. + * + * Configuration settings for the TS4600 Board + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __CONFIGS_TS4600_H__ +#define __CONFIGS_TS4600_H__ + +/* System configurations */ +#define CONFIG_MX28 /* i.MX28 SoC */ + +/* U-Boot Commands */ +#define CONFIG_SYS_NO_FLASH /* No NOR Flash */ +#define CONFIG_DOS_PARTITION + +/* Memory configuration */ +#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ +#define PHYS_SDRAM_1 0x40000000 /* Base address */ +#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +/* Environment */ +#define CONFIG_ENV_SIZE (8 * 1024) + +/* Environment is in MMC */ +#if defined(CONFIG_CMD_MMC) && defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (256 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#endif + +/* Boot Linux */ +#define CONFIG_LOADADDR 0x42000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* Extra Environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_addr=0x41000000\0" \ + "loadkernel=load mmc ${mmcdev}:${mmcpart} ${loadaddr} zImage\0" \ + "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ts4600.dtb\0" \ + "loadbootscript=load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot.ub\0" \ + "bootscript=echo Running bootscript from mmc...; " \ + "setenv mmcdev 0; " \ + "setenv mmcpart 2; " \ + "run loadbootscript && source ${loadaddr}; \0" \ + "sdboot=echo Booting from SD card ...; " \ + "setenv mmcdev 0; " \ + "setenv mmcpart 2; " \ + "setenv root /dev/mmcblk0p3; " \ + "run loadkernel && run loadfdt; \0" \ + "startbootsequence=run bootscript || run sdboot \0" \ + +#define CONFIG_BOOTCOMMAND \ + "mmc rescan; " \ + "run startbootsequence; " \ + "setenv cmdline_append console=ttyAMA0,115200; " \ + "setenv bootargs root=${root} rootwait rw ${cmdline_append}; " \ + "bootz ${loadaddr} - ${fdt_addr}; " + +/* The rest of the configuration is shared */ +#include <configs/mxs.h> + +#endif /* __CONFIGS_TS4600_H__ */ -- 2.10.0

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