November 2016 - U-Boot

[U-Boot] [PATCH v7 04/21] sf: Cleanup spi_flash_info{}
by Jagan Teki 18 Nov '16

18 Nov '16

- Proper tabs spaces - Removed unnecessary - Add comments in spi_flash_info members - Add comments for spi_flash_info.flags Cc: Simon Glass <sjg(a)chromium.org> Cc: Bin Meng <bmeng.cn(a)gmail.com> Cc: York Sun <york.sun(a)nxp.com> Cc: Vignesh R <vigneshr(a)ti.com> Cc: Mugunthan V N <mugunthanvnm(a)ti.com> Cc: Michal Simek <michal.simek(a)xilinx.com> Signed-off-by: Jagan Teki <jagan(a)openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> Reviewed-by: Jagan Teki <jagan(a)openedev.com> --- Changes for v7: - Add comments for spi_flash_info.flags drivers/mtd/spi/sf_internal.h | 44 ++++++++++++++++++++----------------------- 1 file changed, 20 insertions(+), 24 deletions(-) diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index a9455ac..bbc08f6 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -108,17 +108,9 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) #define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4])) -/** - * struct spi_flash_info - SPI/QSPI flash device params structure - * - * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) - * @sector_size: Isn't necessarily a sector size from vendor, - * the size listed here is what works with CMD_ERASE_64K - * @nr_sectors: No.of sectors on this device - * @flags: Important param, for flash specific behaviour - */ struct spi_flash_info { - const char *name; + /* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */ + const char *name; /* * This array stores the ID bytes. @@ -128,20 +120,24 @@ struct spi_flash_info { u8 id[5]; u8 id_len; - u32 sector_size; - u32 nr_sectors; - - u16 page_size; - - u16 flags; -#define SECT_4K BIT(0) -#define E_FSR BIT(1) -#define SST_WR BIT(2) -#define WR_QPP BIT(3) -#define RD_QUAD BIT(4) -#define RD_DUAL BIT(5) -#define RD_QUADIO BIT(6) -#define RD_DUALIO BIT(7) + /* + * The size listed here is what works with SPINOR_OP_SE, which isn't + * necessarily called a "sector" by the vendor. + */ + u32 sector_size; + u32 nr_sectors; + + u16 page_size; + + u16 flags; +#define SECT_4K BIT(0) /* CMD_ERASE_4K works uniformly */ +#define E_FSR BIT(1) /* use flag status register for */ +#define SST_WR BIT(2) /* use SST byte/word programming */ +#define WR_QPP BIT(3) /* use Quad Page Program */ +#define RD_QUAD BIT(4) /* use Quad Read */ +#define RD_DUAL BIT(5) /* use Dual Read */ +#define RD_QUADIO BIT(6) /* use Quad IO Read */ +#define RD_DUALIO BIT(7) /* use Dual IO Read */ #define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO) }; -- 1.9.1

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[U-Boot] [PATCH v7 21/21] sf: Fix s25fs512s id table
by Jagan Teki 18 Nov '16

18 Nov '16

s25fs512s and s25fl512s_256k have common id information till 5 bytes and 6th byte have different family id like FS and FL-S as 0x81 and 0x80. Reported-by: Vignesh R <vigneshr(a)ti.com> Signed-off-by: Jagan Teki <jagan(a)openedev.com> --- Changes for v7: - Update SECT_4K s25fs512s drivers/mtd/spi/spi_flash_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index d5cacba..a72072e 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -99,7 +99,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, {"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, - {"s25fs512s", INFO(0x010220, 0x4d00, 128 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"s25fs512s", INFO6(0x010220, 0x4d0081, 128 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, {"s25fl512s_256k", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) }, {"s25fl512s_64k", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) }, {"s25fl512s_512k", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) }, -- 1.9.1

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[U-Boot] [PATCH v7 13/21] sf: ids: Use small letter's with flash name
by Jagan Teki 18 Nov '16

18 Nov '16

From: Jagan Teki <jagan(a)amarulasolutions.com> For readability use small letter's with flash name. Cc: Bin Meng <bmeng.cn(a)gmail.com> Cc: York Sun <york.sun(a)nxp.com> Cc: Vignesh R <vigneshr(a)ti.com> Cc: Mugunthan V N <mugunthanvnm(a)ti.com> Cc: Michal Simek <michal.simek(a)xilinx.com> Signed-off-by: Jagan Teki <jagan(a)openedev.com> Reviewed-by: Simon Glass <sjg(a)chromium.org> Reviewed-by: Jagan Teki <jagan(a)openedev.com> Tested-by: Jagan Teki <jagan(a)openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> --- Changes for v7: - Update SECT_4K S25FS512S drivers/mtd/spi/spi_flash_ids.c | 220 ++++++++++++++++++++-------------------- 1 file changed, 110 insertions(+), 110 deletions(-) diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index 8c92525..cb7031e 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -45,136 +45,136 @@ const struct spi_flash_info spi_flash_ids[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */ - {"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) }, - {"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8, SECT_4K) }, - {"AT45DB041D", INFO(0x1f2400, 0x0, 64 * 1024, 8, SECT_4K) }, - {"AT45DB081D", INFO(0x1f2500, 0x0, 64 * 1024, 16, SECT_4K) }, - {"AT45DB161D", INFO(0x1f2600, 0x0, 64 * 1024, 32, SECT_4K) }, - {"AT45DB321D", INFO(0x1f2700, 0x0, 64 * 1024, 64, SECT_4K) }, - {"AT45DB641D", INFO(0x1f2800, 0x0, 64 * 1024, 128, SECT_4K) }, - {"AT25DF321A", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) }, - {"AT25DF321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) }, - {"AT26DF081A", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) }, + {"at45db011d", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) }, + {"at45db021d", INFO(0x1f2300, 0x0, 64 * 1024, 8, SECT_4K) }, + {"at45db041d", INFO(0x1f2400, 0x0, 64 * 1024, 8, SECT_4K) }, + {"at45db081d", INFO(0x1f2500, 0x0, 64 * 1024, 16, SECT_4K) }, + {"at45db161d", INFO(0x1f2600, 0x0, 64 * 1024, 32, SECT_4K) }, + {"at45db321d", INFO(0x1f2700, 0x0, 64 * 1024, 64, SECT_4K) }, + {"at45db641d", INFO(0x1f2800, 0x0, 64 * 1024, 128, SECT_4K) }, + {"at25df321a", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) }, + {"at25df321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) }, + {"at26df081a", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_EON /* EON */ - {"EN25Q32B", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) }, - {"EN25Q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) }, - {"EN25Q128B", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) }, - {"EN25S64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) }, + {"en25q32b", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) }, + {"en25q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) }, + {"en25q128b", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) }, + {"en25s64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) }, #endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ - {"GD25Q64B", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) }, - {"GD25LQ32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) }, + {"gd25q64b", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) }, + {"gd25lq32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ - {"IS25LP032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) }, - {"IS25LP064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) }, - {"IS25LP128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) }, + {"is25lp032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) }, + {"is25lp064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) }, + {"is25lp128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) }, #endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ - {"MX25L2006E", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) }, - {"MX25L4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) }, - {"MX25L8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) }, - {"MX25L1605D", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) }, - {"MX25L3205D", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) }, - {"MX25L6405D", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) }, - {"MX25L12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, - {"MX25L25635F", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) }, - {"MX25L51235F", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) }, - {"MX25L12855E", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"mx25l2006e", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) }, + {"mx25l4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) }, + {"mx25l8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) }, + {"mx25l1605d", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) }, + {"mx25l3205d", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) }, + {"mx25l6405d", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) }, + {"mx25l12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"mx25l25635f", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) }, + {"mx25l51235f", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) }, + {"mx25l12855e", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ - {"S25FL008A", INFO(0x010213, 0x0, 64 * 1024, 16, 0) }, - {"S25FL016A", INFO(0x010214, 0x0, 64 * 1024, 32, 0) }, - {"S25FL032A", INFO(0x010215, 0x0, 64 * 1024, 64, 0) }, - {"S25FL064A", INFO(0x010216, 0x0, 64 * 1024, 128, 0) }, - {"S25FL116K", INFO(0x014015, 0x0, 64 * 1024, 128, 0) }, - {"S25FL164K", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) }, - {"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP) }, - {"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP) }, - {"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP) }, - {"S25FL064P", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP) }, - {"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP) }, - {"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP) }, - {"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, - {"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, - {"S25FS256S_64K", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, - {"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, - {"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) }, - {"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) }, - {"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) }, + {"s25fl008a", INFO(0x010213, 0x0, 64 * 1024, 16, 0) }, + {"s25fl016a", INFO(0x010214, 0x0, 64 * 1024, 32, 0) }, + {"s25fl032a", INFO(0x010215, 0x0, 64 * 1024, 64, 0) }, + {"s25fl064a", INFO(0x010216, 0x0, 64 * 1024, 128, 0) }, + {"s25fl116k", INFO(0x014015, 0x0, 64 * 1024, 128, 0) }, + {"s25fl164k", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) }, + {"s25fl128p_256k", INFO(0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP) }, + {"s25fl128p_64k", INFO(0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"s25fl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP) }, + {"s25fl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP) }, + {"s25fl128s_256k", INFO(0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP) }, + {"s25fl128s_64k", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, + {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, + {"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"s25fs512s", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"s25fl512s_256k", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) }, + {"s25fl512s_64k", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) }, + {"s25fl512s_512k", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ - {"M25P10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) }, - {"M25P20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) }, - {"M25P40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) }, - {"M25P80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) }, - {"M25P16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) }, - {"M25PE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) }, - {"M25PX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL) }, - {"M25P32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) }, - {"M25P64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) }, - {"M25P128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) }, - {"M25PX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) }, - {"N25Q016A", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) }, - {"N25Q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, - {"N25Q32A", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, - {"N25Q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, - {"N25Q64A", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, - {"N25Q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, - {"N25Q128A", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, - {"N25Q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, - {"N25Q256A", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, - {"N25Q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, - {"N25Q512A", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, - {"N25Q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, - {"N25Q1024A", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"m25p10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) }, + {"m25p20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) }, + {"m25p40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) }, + {"m25p80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) }, + {"m25p16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) }, + {"m25pE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) }, + {"m25pX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL) }, + {"m25p32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) }, + {"m25p64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) }, + {"m25p128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) }, + {"m25pX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) }, + {"n25q016a", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) }, + {"n25q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"n25q32a", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"n25q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"n25q64a", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"n25q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"n25q128a", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"n25q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"n25q256a", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"n25q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"n25q512a", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"n25q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"n25q1024a", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_SST /* SST */ - {"SST25VF040B", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) }, - {"SST25VF080B", INFO(0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) }, - {"SST25VF016B", INFO(0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR) }, - {"SST25VF032B", INFO(0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR) }, - {"SST25VF064C", INFO(0xbf254b, 0x0, 64 * 1024, 128, SECT_4K) }, - {"SST25WF512", INFO(0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR) }, - {"SST25WF010", INFO(0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR) }, - {"SST25WF020", INFO(0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR) }, - {"SST25WF040", INFO(0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) }, - {"SST25WF040B", INFO(0x621613, 0x0, 64 * 1024, 8, SECT_4K) }, - {"SST25WF080", INFO(0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) }, + {"sst25vf040b", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) }, + {"sst25vf080b", INFO(0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) }, + {"sst25vf016b", INFO(0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR) }, + {"sst25vf032b", INFO(0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR) }, + {"sst25vf064c", INFO(0xbf254b, 0x0, 64 * 1024, 128, SECT_4K) }, + {"sst25wf512", INFO(0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR) }, + {"sst25wf010", INFO(0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR) }, + {"sst25wf020", INFO(0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR) }, + {"sst25wf040", INFO(0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) }, + {"sst25wf040b", INFO(0x621613, 0x0, 64 * 1024, 8, SECT_4K) }, + {"sst25wf080", INFO(0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) }, #endif #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */ - {"W25P80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) }, - {"W25P16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) }, - {"W25P32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) }, - {"W25X40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) }, - {"W25X16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) }, - {"W25X32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) }, - {"W25X64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) }, - {"W25Q80BL", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q16CL", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q32BV", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q64CV", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q128BV", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q80BW", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q16DW", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q32DW", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q64DW", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q128FW", INFO(0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) }, + {"w25p80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) }, + {"w25p16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) }, + {"w25p32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) }, + {"w25x40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) }, + {"w25x16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) }, + {"w25x32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) }, + {"w25x64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) }, + {"w25q80bl", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q16cl", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q32bv", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q64cv", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q128bv", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q80bw", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q16dw", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q32dw", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q64dw", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q128fw", INFO(0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) }, #endif {}, /* Empty entry to terminate the list */ /* * Note: * Below paired flash devices has similar spi_flash params. - * (S25FL129P_64K, S25FL128S_64K) - * (W25Q80BL, W25Q80BV) - * (W25Q16CL, W25Q16DV) - * (W25Q32BV, W25Q32FV_SPI) - * (W25Q64CV, W25Q64FV_SPI) - * (W25Q128BV, W25Q128FV_SPI) - * (W25Q32DW, W25Q32FV_QPI) - * (W25Q64DW, W25Q64FV_QPI) - * (W25Q128FW, W25Q128FV_QPI) + * (s25fl129p_64k, s25fl128s_64k) + * (w25q80bl, w25q80bv) + * (w25q16cl, w25q16dv) + * (w25q32bv, w25q32fv_spi) + * (w25q64cv, w25q64fv_spi) + * (w25q128bv, w25q128fv_spi) + * (w25q32dw, w25q32fv_qpi) + * (w25q64dw, w25q64fv_qpi) + * (w25q128fw, w25q128fv_qpi) */ }; -- 1.9.1

1 3

[U-Boot] [PATCH v7 10/21] sf: Remove spansion_s25fss_disable_4KB_erase
by Jagan Teki 18 Nov '16

18 Nov '16

From: Jagan Teki <jagan(a)amarulasolutions.com> In spansion S25FS-S family the physical sectors are grouped as normal and parameter sectors. Parameter sectors are 4kB in size with 8 set located at the bottom or top address of a device. Normal sectors are similar to other flash family with sizes of 64kB or 32 kB. To erase whole flash using sector erase(D8h or DCh) won't effect the parameter sectors, so in order to erase these we must use 4K sector erase commands (20h or 21h) separately. So better to erase the whole flash using 4K sector erase instead of detecting these family parts again and do two different erase operations. For this: - Removed spansion_s25fss_disable_4KB_erase code - Add SECT_4K for S25FS512S chip Cc: Yunhui Cui <yunhui.cui(a)nxp.com> Cc: Bin Meng <bmeng.cn(a)gmail.com> Cc: York Sun <york.sun(a)nxp.com> Cc: Vignesh R <vigneshr(a)ti.com> Cc: Mugunthan V N <mugunthanvnm(a)ti.com> Cc: Michal Simek <michal.simek(a)xilinx.com> Cc: Michael Trimarchi <michael(a)amarulasolutions.com> Cc: Siva Durga Prasad Paladugu <sivadur(a)xilinx.com> Signed-off-by: Jagan Teki <jagan(a)openedev.com> Reviewed-by: Simon Glass <sjg(a)chromium.org> Reviewed-by: Jagan Teki <jagan(a)openedev.com> --- Changes for v7: - Add SECT_4K S25FS512S drivers/mtd/spi/sf_internal.h | 6 ---- drivers/mtd/spi/sf_params.c | 2 +- drivers/mtd/spi/spi_flash.c | 79 ------------------------------------------- 3 files changed, 1 insertion(+), 86 deletions(-) diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index cbed6e8..6a39cdd 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -98,12 +98,6 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, const void *buf); #endif -#ifdef CONFIG_SPI_FLASH_SPANSION -/* Used for Spansion S25FS-S family flash only. */ -#define CMD_SPANSION_RDAR 0x65 /* Read any device register */ -#define CMD_SPANSION_WRAR 0x71 /* Write any device register */ -#endif - #define JEDEC_MFR(info) ((info)->id[0]) #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) #define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4])) diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index 6157e29..7b9e5ef 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -99,7 +99,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, {"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, {"S25FS256S_64K", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, - {"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP) }, + {"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, {"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) }, {"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) }, {"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) }, diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 9430424..b126a21 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -999,43 +999,6 @@ int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) } #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */ -#ifdef CONFIG_SPI_FLASH_SPANSION -static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi) -{ - u8 cmd[4]; - u32 offset = 0x800004; /* CR3V register offset */ - u8 cr3v; - int ret; - - cmd[0] = CMD_SPANSION_RDAR; - cmd[1] = offset >> 16; - cmd[2] = offset >> 8; - cmd[3] = offset >> 0; - - ret = spi_flash_cmd_read(spi, cmd, 4, &cr3v, 1); - if (ret) - return -EIO; - /* CR3V bit3: 4-KB Erase */ - if (cr3v & 0x8) - return 0; - - cmd[0] = CMD_SPANSION_WRAR; - cr3v |= 0x8; - ret = spi_flash_cmd_write(spi, cmd, 4, &cr3v, 1); - if (ret) - return -EIO; - - cmd[0] = CMD_SPANSION_RDAR; - ret = spi_flash_cmd_read(spi, cmd, 4, &cr3v, 1); - if (ret) - return -EIO; - if (!(cr3v & 0x8)) - return -EFAULT; - - return 0; -} -#endif - int spi_flash_scan(struct spi_flash *flash) { struct spi_slave *spi = flash->spi; @@ -1046,48 +1009,6 @@ int spi_flash_scan(struct spi_flash *flash) if (IS_ERR_OR_NULL(info)) return -ENOENT; -#ifdef CONFIG_SPI_FLASH_SPANSION - /* - * The S25FS-S family physical sectors may be configured as a - * hybrid combination of eight 4-kB parameter sectors - * at the top or bottom of the address space with all - * but one of the remaining sectors being uniform size. - * The Parameter Sector Erase commands (20h or 21h) must - * be used to erase the 4-kB parameter sectors individually. - * The Sector (uniform sector) Erase commands (D8h or DCh) - * must be used to erase any of the remaining - * sectors, including the portion of highest or lowest address - * sector that is not overlaid by the parameter sectors. - * The uniform sector erase command has no effect on parameter sectors. - */ - if ((JEDEC_ID(info) == 0x0219 || (JEDEC_ID(info) == 0x0220)) && - (JEDEC_EXT(info) & 0xff00) == 0x4d00) { - int ret; - u8 idcode[5]; - u8 id[6]; - - /* Read the ID codes again, 5 bytes */ - ret = spi_flash_cmd(flash->spi, CMD_READ_ID, idcode, sizeof(idcode)); - if (ret) - return -EIO; - - /* Read the ID codes again, 6 bytes */ - ret = spi_flash_cmd(flash->spi, CMD_READ_ID, id, sizeof(id)); - if (ret) - return -EIO; - - ret = memcmp(id, idcode, 5); - if (ret) - return -EIO; - - /* 0x81: S25FS-S family 0x80: S25FL-S family */ - if (id[5] == 0x81) { - ret = spansion_s25fss_disable_4KB_erase(spi); - if (ret) - return ret; - } - } -#endif /* Flash powers up read-only, so clear BP# bits */ if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL || JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX || -- 1.9.1

1 1

[U-Boot] [PATCH v6 00/21] sf: Updates on flash detection
by Jagan Teki 18 Nov '16

18 Nov '16

From: Jagan Teki <jagan(a)amarulasolutions.com> Updated spi_flash_info table in sync with Linux, and removed legacy and unsupported code. Changes for v6: - Fix few comments from Simon - Rebase to master Changes for v5: - Add dataflash fixes in this series - Rebase to master Changes for v4: - Rebase to master Changes for v3: - New patches - Fix checkpatch.pl - Fix BIT positions in spi.h - Fix ti_qspi.c mode - Fix commit Nit: s/becuase/because Changes for v2: - New patches. Testing: $ git clone git://git.denx.de/u-boot-spi.git $ cd u-boot-spi $ git checkout -b next origin/next buildman: -------- $ ./tools/buildman/buildman -b next -c 21 -se boards.cfg is up to date. Nothing to do. Summary of 21 commits for 1219 boards (12 threads, 1 job per thread) 01: sf: Adopt flash table INFO macro from Linux blackfin: + cm-bf561 blackstamp bf527-ezkit-v2 cm-bf527 bf506f-ezkit ip04 bf527-sdp bf527-ad7160-eval bf609-ezkit tcm-bf518 bf527-ezkit bf533-ezkit ibf-dsp561 bf537-minotaur bf537-pnav bf537-srv1 cm-bf548 bf548-ezkit bf525-ucr2 blackvme pr1 bf518f-ezbrd bf526-ezbrd br4 x86: + galileo conga-qeval20-qa3-e3845-internal-uart coreboot-x86 qemu-x86_efi_payload32 conga-qeval20-qa3-e3845 bayleybay theadorable-x86-dfi-bt700 qemu-x86_efi_payload64 minnowmax dfi-bt700-q7x-151 efi-x86 som-db5800-som-6867 +/bin/sh: 1: bfin-uclinux-ldr: not found +make[1]: *** [u-boot.ldr] Error 127 +make: *** [sub-make] Error 2 +make[1]: bfin-uclinux-ldr: Command not found +/bin/sh: 1: iasl: not found +mv: cannot stat '../board/intel/galileo/dsdt.hex': No such file or directory +make[2]: *** [board/intel/galileo/dsdt.c] Error 1 +make[1]: *** [board/intel/galileo] Error 2 +cc1: error: -mcpu=bf506-0.0 is not valid +cc1: error: unrecognized command line option '-mcpu=bf506-0.0' +make[2]: *** [u-boot.cfg] Error 1 +make[1]: *** No rule to make target `include/config/auto.conf', needed by `include/config/uboot.release'. Stop. +cc1: error: -mcpu=bf609-0.0 is not valid +cc1: error: unrecognized command line option '-mcpu=bf609-0.0' +mv: cannot stat '../board/congatec/conga-qeval20-qa3-e3845/dsdt.hex': No such file or directory +make[2]: *** [board/congatec/conga-qeval20-qa3-e3845/dsdt.c] Error 1 +make[1]: *** [board/congatec/conga-qeval20-qa3-e3845] Error 2 + static u32 write_smbios_table_wrapper(u32 addr) + ^ +mv: cannot stat '../board/dfi/dfi-bt700/dsdt.hex': No such file or directory +make[2]: *** [board/dfi/dfi-bt700/dsdt.c] Error 1 +make[1]: *** [board/dfi/dfi-bt700] Error 2 +mv: cannot stat '../board/intel/bayleybay/dsdt.hex': No such file or directory +make[2]: *** [board/intel/bayleybay/dsdt.c] Error 1 +make[1]: *** [board/intel/bayleybay] Error 2 +../arch/x86/lib/efi/crt0-efi-x86_64.S: Assembler messages: +../arch/x86/lib/efi/crt0-efi-x86_64.S:16: Error: bad register name `%rsp' +../arch/x86/lib/efi/crt0-efi-x86_64.S:17: Error: bad register name `%rcx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:18: Error: bad register name `%rdx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:21: Error: bad register name `%rip)' +../arch/x86/lib/efi/crt0-efi-x86_64.S:22: Error: bad register name `%rip)' +../arch/x86/lib/efi/crt0-efi-x86_64.S:24: Error: bad register name `%rcx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:25: Error: bad register name `%rdx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:26: Error: bad register name `%rcx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:27: Error: bad register name `%rdx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:30: Error: bad register name `%rdi' +../arch/x86/lib/efi/crt0-efi-x86_64.S:31: Error: bad register name `%rsi' +../arch/x86/lib/efi/crt0-efi-x86_64.S:34: Error: bad register name `%rsp' +../arch/x86/lib/efi/crt0-efi-x86_64.S:47: Warning: setting incorrect section attributes for .reloc +make[3]: *** [arch/x86/lib/efi/crt0-efi-x86_64.o] Error 1 +make[2]: *** [arch/x86/lib/efi] Error 2 +make[1]: *** [arch/x86/lib] Error 2 +mv: cannot stat '../board/intel/minnowmax/dsdt.hex': No such file or directory +make[2]: *** [board/intel/minnowmax/dsdt.c] Error 1 +make[1]: *** [board/intel/minnowmax] Error 2 +mv: cannot stat '../board/advantech/som-db5800-som-6867/dsdt.hex': No such file or directory +make[2]: *** [board/advantech/som-db5800-som-6867/dsdt.c] Error 1 +make[1]: *** [board/advantech/som-db5800-som-6867] Error 2 w+../drivers/usb/musb/musb_hcd.c: In function 'config_hub_port': w+../drivers/usb/musb/musb_hcd.c:405:5: warning: variable 'hub' set but not used [-Wunused-but-set-variable] w+../drivers/usb/musb/musb_core.c: In function 'musb_configure_ep': w+../drivers/usb/musb/musb_core.c:71:6: warning: variable 'idx' set but not used [-Wunused-but-set-variable] w+../arch/x86/lib/tables.c:15:12: warning: 'write_smbios_table_wrapper' defined but not used [-Wunused-function] w+../board/bf533-ezkit/flash.c: In function 'read_data': w+../board/bf533-ezkit/flash.c:241:6: warning: variable 'iShift' set but not used [-Wunused-but-set-variable] w+../drivers/net/ax88180.c: In function 'ax88180_mac_reset': w+../drivers/net/ax88180.c:132:16: warning: variable 'tmpval' set but not used [-Wunused-but-set-variable] w+../drivers/net/ax88180.c: In function 'ax88180_recv': w+../drivers/net/ax88180.c:577:17: warning: variable 'tmp_regval' set but not used [-Wunused-but-set-variable] 02: sf: Simplify lock ops detection code 03: sf: sandbox: Use JEDEC_MFR|ID in id exctract 04: sf: Cleanup spi_flash_info{} 05: sf: nr_sectors -> n_sectors 06: sf: Add SPI_FLASH_MAX_ID_LEN 07: sf: Increase max id length by 1 byte 08: sf: Add INFO6 flash_info macro 09: sf: params: Add S25FS256S_64K spi flash support 10: sf: Remove legacy idcode detection code 11: sf: Remove non-meaningful comments 12: sf: Rename sf_params.c to spi_flash_ids.c 13: sf: ids: Use small letter's with flash name 14: sf: ids: Use small letter in ext_jedec 15: sf: Rename few local functions 16: spi: Remove dual flash options/flags 17: sf: dataflash: Remove unneeded spi data 18: sf: dataflash: Move flash id detection into jedec_probe 19: sf: dataflash: Fix add_dataflash return logic 20: sf: dataflash: Minor cleanups 21: sf: Fix s25fs512s id param table $ ./tools/buildman/buildman -b next -c 21 -sS boards.cfg is up to date. Nothing to do. Summary of 21 commits for 1219 boards (12 threads, 1 job per thread) 01: sf: Adopt flash table INFO macro from Linux blackfin: + cm-bf561 blackstamp bf527-ezkit-v2 cm-bf527 bf506f-ezkit ip04 bf527-sdp bf527-ad7160-eval bf609-ezkit tcm-bf518 bf527-ezkit bf533-ezkit ibf-dsp561 bf537-minotaur bf537-pnav bf537-srv1 cm-bf548 bf548-ezkit bf525-ucr2 blackvme pr1 bf518f-ezbrd bf526-ezbrd br4 x86: + galileo conga-qeval20-qa3-e3845-internal-uart coreboot-x86 qemu-x86_efi_payload32 conga-qeval20-qa3-e3845 bayleybay theadorable-x86-dfi-bt700 qemu-x86_efi_payload64 minnowmax dfi-bt700-q7x-151 efi-x86 som-db5800-som-6867 02: sf: Simplify lock ops detection code avr32: (for 4/4 boards) all -2.0 text -2.0 powerpc: (for 415/415 boards) all +0.0 rodata +0.0 arm: (for 560/560 boards) all -1.6 bss -0.6 spl/u-boot-spl:all -0.2 spl/u-boot-spl:text -0.2 text -1.1 03: sf: sandbox: Use JEDEC_MFR|ID in id exctract 04: sf: Cleanup spi_flash_info{} powerpc: (for 415/415 boards) all -0.0 rodata -0.0 05: sf: nr_sectors -> n_sectors powerpc: (for 415/415 boards) all +0.0 rodata +0.0 06: sf: Add SPI_FLASH_MAX_ID_LEN 07: sf: Increase max id length by 1 byte m68k: (for 48/48 boards) all +12.1 data +12.1 powerpc: (for 415/415 boards) all -0.0 rodata -0.0 08: sf: Add INFO6 flash_info macro powerpc: (for 415/415 boards) all +0.0 rodata +0.0 09: sf: params: Add S25FS256S_64K spi flash support blackfin: (for 33/35 boards) all +2.4 rodata +2.4 aarch64: (for 61/61 boards) all +16.1 rodata +10.6 text +5.5 powerpc: (for 415/415 boards) all +14.3 data +8.2 rodata +4.8 spl/u-boot-spl:all +1.6 spl/u-boot-spl:data +1.4 spl/u-boot-spl:text +0.2 text +1.4 sandbox: (for 3/3 boards) all +48.0 rodata +48.0 mips: (for 35/35 boards) all +4.6 bss +0.5 data +2.1 rodata +1.4 text +0.7 arm: (for 560/560 boards) all +2.2 bss -0.2 rodata +2.0 spl/u-boot-spl:all +1.4 spl/u-boot-spl:rodata +1.4 text +0.4 10: sf: Remove legacy idcode detection code blackfin: (for 33/35 boards) all -16.2 text -16.2 aarch64: (for 61/61 boards) all -66.5 text -66.5 powerpc: (for 415/415 boards) all -115.6 spl/u-boot-spl:all -13.1 spl/u-boot-spl:text -13.1 text -115.6 sandbox: (for 3/3 boards) all -304.0 text -304.0 mips: (for 35/35 boards) all -34.4 bss -0.5 text -33.9 arm: (for 560/560 boards) all -12.7 bss +0.1 spl/u-boot-spl:all -8.9 spl/u-boot-spl:text -8.9 text -12.7 11: sf: Remove non-meaningful comments 12: sf: Rename sf_params.c to spi_flash_ids.c 13: sf: ids: Use small letter's with flash name blackfin: (for 33/35 boards) all +0.1 rodata +0.1 aarch64: (for 61/61 boards) all +0.1 rodata +0.1 powerpc: (for 415/415 boards) all -0.1 rodata -0.1 mips: (for 35/35 boards) all -5.7 bss +0.5 rodata -6.2 arm: (for 560/560 boards) bss -0.0 rodata +0.0 14: sf: ids: Use small letter in ext_jedec 15: sf: Rename few local functions 16: spi: Remove dual flash options/flags blackfin: (for 33/35 boards) all -0.6 text -0.6 x86: (for 9/18 boards) all -2.2 bss +1.3 text -3.6 aarch64: (for 61/61 boards) all -2.4 text -2.4 avr32: (for 4/4 boards) all -4.0 text -4.0 m68k: (for 48/48 boards) all -3.2 text -3.2 powerpc: (for 415/415 boards) all -2.3 spl/u-boot-spl:all -0.2 spl/u-boot-spl:text -0.2 text -2.3 mips: (for 35/35 boards) all -0.3 text -0.3 arm: (for 560/560 boards) all -0.8 bss +0.4 rodata -0.0 spl/u-boot-spl:all -0.3 spl/u-boot-spl:text -0.3 text -1.2 17: sf: dataflash: Remove unneeded spi data mips: (for 35/35 boards) all -2.4 text -2.4 arm: (for 560/560 boards) all -0.4 bss -0.4 rodata +0.0 text -0.1 18: sf: dataflash: Move flash id detection into jedec_probe mips: (for 35/35 boards) all -1.8 bss -0.5 text -1.4 arm: (for 560/560 boards) bss +0.1 text -0.1 19: sf: dataflash: Fix add_dataflash return logic mips: (for 35/35 boards) all +12.8 bss +0.3 data +0.3 text +12.1 arm: (for 560/560 boards) bss -0.1 text +0.1 20: sf: dataflash: Minor cleanups mips: (for 35/35 boards) all -6.6 bss -0.5 rodata -3.1 text -3.1 arm: (for 560/560 boards) all -0.0 bss +0.2 rodata -0.1 text -0.1 21: sf: Fix s25fs512s id param table Jagan Teki (21): sf: Adopt flash table INFO macro from Linux sf: Simplify lock ops detection code sf: sandbox: Use JEDEC_MFR|ID in id exctract sf: Cleanup spi_flash_info{} sf: nr_sectors -> n_sectors sf: Add SPI_FLASH_MAX_ID_LEN sf: Increase max id length by 1 byte sf: Add INFO6 flash_info macro sf: params: Add S25FS256S_64K spi flash support sf: Remove legacy idcode detection code sf: Remove non-meaningful comments sf: Rename sf_params.c to spi_flash_ids.c sf: ids: Use small letter's with flash name sf: ids: Use small letter in ext_jedec sf: Rename few local functions spi: Remove dual flash options/flags sf: dataflash: Remove unneeded spi data sf: dataflash: Move flash id detection into jedec_probe sf: dataflash: Fix add_dataflash return logic sf: dataflash: Minor cleanups sf: Fix s25fs512s id param table doc/device-tree-bindings/mtd/spi/spi-flash.txt | 2 +- drivers/mtd/spi/Makefile | 2 +- drivers/mtd/spi/sandbox.c | 11 +- drivers/mtd/spi/sf.c | 4 - drivers/mtd/spi/sf_dataflash.c | 178 +++++++++---------- drivers/mtd/spi/sf_internal.h | 55 +++--- drivers/mtd/spi/sf_params.c | 149 ---------------- drivers/mtd/spi/spi_flash.c | 228 ++++++++----------------- drivers/mtd/spi/spi_flash_ids.c | 180 +++++++++++++++++++ include/linux/err.h | 5 + include/spi.h | 6 - 11 files changed, 373 insertions(+), 447 deletions(-) delete mode 100644 drivers/mtd/spi/sf_params.c create mode 100644 drivers/mtd/spi/spi_flash_ids.c -- 1.9.1

4 54

[U-Boot] [PATCH] imx: iomux-v3: provide MX7D_PAD_ENET1_RX_CLK__ENET1_RGMII_RXC
by Sebastian Andrzej Siewior 18 Nov '16

18 Nov '16

MX7D_PAD_ENET1_RX_CLK__ENET1_RX_CLK is in its currently RGMII_RXC. Fix this by providing RX_CLK with properly setting the DAISY value and MX7D_PAD_ENET1_RX_CLK__ENET1_RGMII_RXC which did the "previous" setting. There should be no fallout because there no in tree users of MX7D_PAD_ENET1_RX_CLK__ENET1_RX_CLK. Signed-off-by: Sebastian Andrzej Siewior <bigeasy(a)linutronix.de> --- arch/arm/dts/imx7d-pinfunc.h | 3 ++- arch/arm/include/asm/arch-mx7/mx7d_pins.h | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/imx7d-pinfunc.h b/arch/arm/dts/imx7d-pinfunc.h index 32d2464b417d..7bc1dee0f7ff 100644 --- a/arch/arm/dts/imx7d-pinfunc.h +++ b/arch/arm/dts/imx7d-pinfunc.h @@ -1123,7 +1123,8 @@ #define MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 0x025C 0x04CC 0x0000 0x5 0x0 #define MX7D_PAD_ENET1_TX_CLK__CCM_EXT_CLK1 0x025C 0x04CC 0x04E4 0x6 0x2 #define MX7D_PAD_ENET1_TX_CLK__CSU_ALARM_AUT0 0x025C 0x04CC 0x0000 0x7 0x0 -#define MX7D_PAD_ENET1_RX_CLK__ENET1_RX_CLK 0x0260 0x04D0 0x056C 0x0 0x0 +#define MX7D_PAD_ENET1_RX_CLK__ENET1_RGMII_RXC 0x0260 0x04D0 0x056C 0x0 0x0 +#define MX7D_PAD_ENET1_RX_CLK__ENET1_RX_CLK 0x0260 0x04D0 0x056C 0x0 0x1 #define MX7D_PAD_ENET1_RX_CLK__WDOG2_WDOG_B 0x0260 0x04D0 0x0000 0x1 0x0 #define MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x0260 0x04D0 0x06A8 0x2 0x1 #define MX7D_PAD_ENET1_RX_CLK__GPT2_CLK 0x0260 0x04D0 0x0000 0x3 0x0 diff --git a/arch/arm/include/asm/arch-mx7/mx7d_pins.h b/arch/arm/include/asm/arch-mx7/mx7d_pins.h index 0ab1246de852..55375f5aa0dc 100644 --- a/arch/arm/include/asm/arch-mx7/mx7d_pins.h +++ b/arch/arm/include/asm/arch-mx7/mx7d_pins.h @@ -1278,7 +1278,8 @@ enum { MX7D_PAD_ENET1_TX_CLK__CCM_EXT_CLK1 = IOMUX_PAD(0x04CC, 0x025C, 6, 0x04E4, 2, 0), MX7D_PAD_ENET1_TX_CLK__CSU_ALARM_AUT0 = IOMUX_PAD(0x04CC, 0x025C, 7, 0x0000, 0, 0), - MX7D_PAD_ENET1_RX_CLK__ENET1_RX_CLK = IOMUX_PAD(0x04D0, 0x0260, 0, 0x056C, 0, 0), + MX7D_PAD_ENET1_RX_CLK__ENET1_RGMII_RXC = IOMUX_PAD(0x04D0, 0x0260, 0, 0x056C, 0, 0), + MX7D_PAD_ENET1_RX_CLK__ENET1_RX_CLK = IOMUX_PAD(0x04D0, 0x0260, 0, 0x056C, 1, 0), MX7D_PAD_ENET1_RX_CLK__WDOG2_WDOG_B = IOMUX_PAD(0x04D0, 0x0260, 1, 0x0000, 0, 0), MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK = IOMUX_PAD(0x04D0, 0x0260, 2, 0x06A8, 1, 0), MX7D_PAD_ENET1_RX_CLK__GPT2_CLK = IOMUX_PAD(0x04D0, 0x0260, 3, 0x0000, 0, 0), -- 2.10.2

3 3

[U-Boot] [PATCH] travis: Add efi_loader grub2 test
by Alexander Graf 18 Nov '16

18 Nov '16

We have all the building blocks now to run arbitrary efi applications in travis. The most important one out there is grub2, so let's add a simple test to verify that grub2 still comes up. Signed-off-by: Alexander Graf <agraf(a)suse.de> --- This patch depends on the previous travis efi_loader enablement --- .travis.yml | 8 ++++++ test/py/tests/test_efi_loader.py | 55 ++++++++++++++++++++++++++++++++-------- 2 files changed, 53 insertions(+), 10 deletions(-) diff --git a/.travis.yml b/.travis.yml index 1957734..8d8a754 100644 --- a/.travis.yml +++ b/.travis.yml @@ -29,6 +29,9 @@ addons: - gcc-arm-linux-gnueabihf - gcc-aarch64-linux-gnu - iasl + - grub-efi-ia32-bin + - rpm2cpio + - wget install: # install latest device tree compiler @@ -45,6 +48,9 @@ install: - virtualenv /tmp/venv - . /tmp/venv/bin/activate - pip install pytest + - grub-mkimage -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd + - mkdir ~/grub2-arm + - cd ~/grub2-arm; wget -O - http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/… | rpm2cpio | cpio -di env: global: @@ -88,6 +94,8 @@ script: # "-k something" even when $TEST_PY_TEST_SPEC doesnt need a custom # value. - export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/${TEST_PY_BD}; + cp ~/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/ + cp ~/grub2-arm/usr/lib/grub2/arm-efi/grub.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm.efi if [[ "${TEST_PY_BD}" != "" ]]; then ./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID} -k "${TEST_PY_TEST_SPEC:-not a_test_which_does_not_exist}" diff --git a/test/py/tests/test_efi_loader.py b/test/py/tests/test_efi_loader.py index 7bf0170..43c0b9d 100644 --- a/test/py/tests/test_efi_loader.py +++ b/test/py/tests/test_efi_loader.py @@ -104,20 +104,18 @@ def test_efi_setup_static(u_boot_console): global net_set_up net_set_up = True -(a)pytest.mark.buildconfigspec('cmd_bootefi_hello_compile') -def test_efi_helloworld_net(u_boot_console): - """Run the helloworld.efi binary via TFTP. +def fetch_tftp_file(u_boot_console, env_conf): + """Grab an env described file via TFTP and return its address - The helloworld.efi file is downloaded from the TFTP server and gets - executed. + A file as described by an env config <env_conf> is downloaded from the TFTP + server. The address to that file is returned. """ - if not net_set_up: pytest.skip('Network not initialized') - f = u_boot_console.config.env.get('env__efi_loader_helloworld_file', None) + f = u_boot_console.config.env.get(env_conf, None) if not f: - pytest.skip('No hello world binary specified in environment') + pytest.skip('No %s binary specified in environment' % env_conf) addr = f.get('addr', None) if not addr: @@ -133,14 +131,26 @@ def test_efi_helloworld_net(u_boot_console): expected_crc = f.get('crc32', None) if not expected_crc: - return + return addr if u_boot_console.config.buildconfig.get('config_cmd_crc32', 'n') != 'y': - return + return addr output = u_boot_console.run_command('crc32 %x $filesize' % addr) assert expected_crc in output + return addr + +(a)pytest.mark.buildconfigspec('cmd_bootefi_hello_compile') +def test_efi_helloworld_net(u_boot_console): + """Run the helloworld.efi binary via TFTP. + + The helloworld.efi file is downloaded from the TFTP server and gets + executed. + """ + + addr = fetch_tftp_file(u_boot_console, 'env__efi_loader_helloworld_file') + output = u_boot_console.run_command('bootefi %x' % addr) expected_text = 'Hello, world' assert expected_text in output @@ -156,3 +166,28 @@ def test_efi_helloworld_builtin(u_boot_console): output = u_boot_console.run_command('bootefi hello') expected_text = 'Hello, world' assert expected_text in output + +(a)pytest.mark.buildconfigspec('cmd_bootefi') +def test_efi_grub_net(u_boot_console): + """Run the grub.efi binary via TFTP. + + The grub.efi file is downloaded from the TFTP server and gets + executed. + """ + + addr = fetch_tftp_file(u_boot_console, 'env__efi_loader_grub_file') + + u_boot_console.run_command('bootefi %x' % addr, wait_for_prompt=False) + + # Verify that we have an SMBIOS table + u_boot_console.wait_for('grub>') + output = u_boot_console.run_command('lsefisystab', wait_for_prompt=False, wait_for_echo=False) + u_boot_console.wait_for('SMBIOS') + + # Then exit cleanly + u_boot_console.wait_for('grub>') + output = u_boot_console.run_command('exit', wait_for_prompt=False, wait_for_echo=False) + u_boot_console.wait_for('r = 0') + + # And give us our U-Boot prompt back + u_boot_console.run_command('') -- 1.8.5.6

1 0

[U-Boot] [PATCH v2 1/2] rockchip: configs: correct env offset when enable CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
by Jacob Chen 18 Nov '16

18 Nov '16

With CONFIG_ROCKCHIP_SPL_BACK_TO_BROM enabled, the environment is inside u-boot. So solve it by moving environment after u-boot. Signed-off-by: Jacob Chen <jacob2.chen(a)rock-chips.com> --- Changes in v2: - add a commit message include/configs/evb_rk3288.h | 9 +++++++++ include/configs/fennec_rk3288.h | 9 +++++++++ include/configs/miniarm_rk3288.h | 9 +++++++++ include/configs/popmetal_rk3288.h | 9 +++++++++ 4 files changed, 36 insertions(+) diff --git a/include/configs/evb_rk3288.h b/include/configs/evb_rk3288.h index 390c243..90b810a 100644 --- a/include/configs/evb_rk3288.h +++ b/include/configs/evb_rk3288.h @@ -12,11 +12,20 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 1 + +#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM +/* SPL @ 32k for 34k + * u-boot directly after @ 68k for 400k or so + * ENV @ 992k + */ +#define CONFIG_ENV_OFFSET ((1024-32) * 1024) +#else /* SPL @ 32k for ~36k * ENV @ 96k * u-boot @ 128K */ #define CONFIG_ENV_OFFSET (96 * 1024) +#endif #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/fennec_rk3288.h b/include/configs/fennec_rk3288.h index 390c243..90b810a 100644 --- a/include/configs/fennec_rk3288.h +++ b/include/configs/fennec_rk3288.h @@ -12,11 +12,20 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 1 + +#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM +/* SPL @ 32k for 34k + * u-boot directly after @ 68k for 400k or so + * ENV @ 992k + */ +#define CONFIG_ENV_OFFSET ((1024-32) * 1024) +#else /* SPL @ 32k for ~36k * ENV @ 96k * u-boot @ 128K */ #define CONFIG_ENV_OFFSET (96 * 1024) +#endif #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/miniarm_rk3288.h b/include/configs/miniarm_rk3288.h index aa259db..645d023 100644 --- a/include/configs/miniarm_rk3288.h +++ b/include/configs/miniarm_rk3288.h @@ -17,11 +17,20 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 + +#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM +/* SPL @ 32k for 34k + * u-boot directly after @ 68k for 400k or so + * ENV @ 992k + */ +#define CONFIG_ENV_OFFSET ((1024-32) * 1024) +#else /* SPL @ 32k for ~36k * ENV @ 96k * u-boot @ 128K */ #define CONFIG_ENV_OFFSET (96 * 1024) +#endif #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/popmetal_rk3288.h b/include/configs/popmetal_rk3288.h index 390c243..90b810a 100644 --- a/include/configs/popmetal_rk3288.h +++ b/include/configs/popmetal_rk3288.h @@ -12,11 +12,20 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 1 + +#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM +/* SPL @ 32k for 34k + * u-boot directly after @ 68k for 400k or so + * ENV @ 992k + */ +#define CONFIG_ENV_OFFSET ((1024-32) * 1024) +#else /* SPL @ 32k for ~36k * ENV @ 96k * u-boot @ 128K */ #define CONFIG_ENV_OFFSET (96 * 1024) +#endif #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 -- 1.9.1

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[U-Boot] [PATCH] rockchip: configs: correct partitions 'boot' size
by Jacob Chen 18 Nov '16

18 Nov '16

It should be 112M, to make rootfs start at 0x40000 Signed-off-by: Jacob Chen <jacob2.chen(a)rock-chips.com> --- include/configs/rockchip-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index 86c81b0..d077824 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -28,7 +28,7 @@ "name=reserved2,size=4M,uuid=${uuid_gpt_reserved2};" \ "name=loader2,size=4MB,uuid=${uuid_gpt_loader2};" \ "name=atf,size=4M,uuid=${uuid_gpt_atf};" \ - "name=boot,size=128M,bootable,uuid=${uuid_gpt_boot};" \ + "name=boot,size=112M,bootable,uuid=${uuid_gpt_boot};" \ "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \ #endif -- 1.9.1

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[U-Boot] [PATCH 0/3] Enable the host controller and hub on PopMetal board
by Kever Yang 18 Nov '16

18 Nov '16

The PopMetal board based on rk3288 SoC have 3 USB 2.0 host ports from a usb 2.0 hub which connect to the rk3288 usb host1. This patch set enable those ports by enable the rk3288 usb host controller driver and usb host function like storage and ether, enable the port power and de-assert the hub reset signal. Test with U-disk on Popmetal board. => usb start starting USB... USB0: Core Release: 3.10a scanning bus 0 for devices... ** First descriptor is NOT a primary desc on 0:1 ** 3 USB Device(s) found scanning usb for ethernet devices... 0 Ethernet Device(s) found => usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) | U-Boot Root Hub | +-2 Hub (480 Mb/s, 100mA) | USB 2.0 Hub | +-3 Mass Storage (480 Mb/s, 300mA) Kingston DataTraveler G2 001D92AD7612B91113680066 Kever Yang (3): dts: popmetal: add usb host power supply node config: popmetal: enable the USB host controller and function board: popmetal: enable the usb host port power in board init arch/arm/dts/rk3288-popmetal.dtsi | 22 ++++++++++++++++ board/chipspark/popmetal_rk3288/popmetal-rk3288.c | 31 +++++++++++++++++++++++ configs/popmetal-rk3288_defconfig | 3 +++ include/configs/rk3288_common.h | 7 +++++ 4 files changed, 63 insertions(+) -- 1.9.1

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