October 2016 - U-Boot

[U-Boot] [PATCH] net, cmd: fix misaligned cache operation warning
by Heiko Schocher 06 Oct '16

06 Oct '16

when using tftp on the smartweb board, it prints, when using the tftp command: Using ethernet@fffc4000 device TFTP from server 192.168.1.1; our IP address is 192.168.20.80 Filename '/tftpboot/smartweb_hw/tbot/u-boot.bin'. Load address: 0x21000000 Loading: ########################### 73.2 KiB/s done Bytes transferred = 391560 (5f988 hex) CACHE: Misaligned operation at range [21000000, 2105f988] U-Boot# Fixing this. Signed-off-by: Heiko Schocher <hs(a)denx.de> --- cmd/net.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmd/net.c b/cmd/net.c index b2f3c7b..540daeb 100644 --- a/cmd/net.c +++ b/cmd/net.c @@ -244,7 +244,7 @@ static int netboot_common(enum proto_t proto, cmd_tbl_t *cmdtp, int argc, } /* flush cache */ - flush_cache(load_addr, size); + flush_cache(load_addr, ALIGN(size, CONFIG_SYS_CACHELINE_SIZE)); bootstage_mark(BOOTSTAGE_ID_NET_LOADED); -- 2.5.5

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[U-Boot] [PATCH v6 0/2] armv8: Support loading 32-bit OS in AArch32 execution state
by Alison Wang 05 Oct '16

05 Oct '16

This series is to support loading a 32-bit OS, the execution state will change from AArch64 to AArch32 when jumping to kernel. The architecture information will be got through checking FIT image, then U-Boot will load 32-bit OS or 64-bit OS automatically. Spin-table method is used for secondary cores to load 32-bit OS. The architecture information will be got through checking FIT image and saved in the os_arch element of spin-table, then the secondary cores will check os_arch and jump to 32-bit OS or 64-bit OS automatically. --------------------------------------- Changes in v6: - Modified armv8_switch_to_el1(). It will always jump to ep when switching to AArch64 or AArch32 modes. - Make other platforms compatible with the new armv8_switch_to_el2() and armv8_switch_to_el1(). Changes in v5: - Modified armv8_switch_to_el2(). It will always jump to ep when switching to AArch64 or AArch32 modes. - Make secondary_switch_to_el2() always jump to ep when switching to AArch64 or AArch32 modes. Changes in v4: - Correct config ARM64_SUPPORT_AARCH32. - Omit arch and ftaddr arguments. - Rename "xreg5" to "tmp". - Use xxx_RES1 to combine all RES1 fields in xxx register. - Use an immediate cmp directly. - Use #ifdef for CONFIG_ARM64_SUPPORT_AARCH32. Changes in v3: - Comments the functions and the arguments. - Rename the real parameters. - Use the macros instead of the magic values. - Remove the redundant codes. - Clean up all of the mess in boot_jump_linux(). - Add CONFIG_ARM64_SUPPORT_AARCH32 to detect for some ARM64 system doesn't support AArch32 state. - Adjust the arguments for armv8_switch_to_el2_m and armv8_switch_to_el1_m. Changes in v2: - armv8_switch_to_el2_aarch32() is removed. armv8_switch_to_el2_m is used to switch to AArch64 EL2 or AArch32 Hyp. - armv8_switch_to_el1_aarch32() is removed. armv8_switch_to_el1_m is used to switch to AArch64 EL1 or AArch32 SVC. - Support to call armv8_switch_to_el2_m and armv8_switch_to_el1_m. ---------------------------------------------------------------- Alison Wang (2): armv8: Support loading 32-bit OS in AArch32 execution state armv8: fsl-layerscape: SMP support for loading 32-bit OS arch/arm/Kconfig | 6 ++ arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 61 ++++++++++++--- arch/arm/cpu/armv8/fsl-layerscape/mp.c | 10 +++ arch/arm/cpu/armv8/start.S | 8 ++ arch/arm/cpu/armv8/transition.S | 8 +- arch/arm/include/asm/arch-fsl-layerscape/mp.h | 6 ++ arch/arm/include/asm/macro.h | 176 +++++++++++++++++++++++++++++++++----------- arch/arm/include/asm/system.h | 119 +++++++++++++++++++++++++++++- arch/arm/lib/bootm.c | 45 +++++++++-- arch/arm/mach-rmobile/lowlevel_init_gen3.S | 9 ++- common/image-fit.c | 19 ++++- 11 files changed, 401 insertions(+), 66 deletions(-)

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[U-Boot] [PATCH RFC v8 00/16] SPI-NOR/MTD addition
by Jagan Teki 05 Oct '16

05 Oct '16

On-top-of u-boot-spi/next, The previous series [1] [2] are added SPI-NOR on top of mtd/spi where it bypassing DM_SPI_FLASH and use the existing mtd core (which is non-dm), I feel this is moving in a reverse direction where adding new feature with the help of non-dm mtd core support and also few of the spi drivers are not fully dm-driven. So this new design will keep the mtd/spi as it is and start adding spi-nor features separately. The idea here is to add the dm features to MTD first and then add UCLASS_MTD spi-nor drivers so-that the commands are interfacing to spi-nor through dm-driven MTD core to spi-nor. And this could also be a generic solutions for all MTD flash's like NAND, NOR and etc. About this series: ------------------------------ cmd_sf.c ------------------------------ mtd-uclass ------------------------------- SPI-NOR Core ------------------------------- m25p80.c zynq_qspi ------------------------------- spi-uclass SPI NOR chip ------------------------------- spi drivers ------------------------------- SPI NOR chip ------------------------------- drivers/mtd/spi-nor/ - Add dm mtd operations - spi-nor.c: Add basic SPI-NOR core like erase/read/write ops and lock's will add later - m25p80.c: spi-nor to spi divers interface layer drivers/spi-nor - zynq_qspi.c: zynq qspi spi-nor controller driver. CONFIG_SPI_FLASH_BAR and DUAL_FLASH code shouldn't be part of spi-nor core as these are strictly controller features. and 4-byte address width in spi-nor will handle > 16MiB flash devices. What need to be add: 1) 'sf probe' interface: Need to probe the chips in two directions A) one is for direct spi-nor driver (zynq_qspi here) and other B) one is for interface driver(m25p80.c). the later is bit tricky as it will also probe the UCLASS_SPI. A) qspi1: spi@e000d000 { compatible = "xlnx,zynq-qspi-1.0"; status = "disabled"; }; B) spi0: spi@e0006000 { compatible = "xlnx,zynq-spi-r1p6"; status = "disabled"; }; alias { mtd0 = &qspi1; spi1 = &spi0; }; 2) sf env: same as 1) Any ideas about this probe interface are 'Welcome' [1] http://lists.denx.de/pipermail/u-boot/2016-March/249286.html [2] http://lists.denx.de/pipermail/u-boot/2016-February/245418.html Jagan Teki (16): dm: mtd: Add dm mtd core ops mtd: Add SPI-NOR core support mtd: spi-nor: Kconfig: Add MTD_SPI_NOR entry mtd: spi-nor: Kconfig: Add MTD_SPI_NOR_USE_4K_SECTORS mtd: spi-nor: Kconfig: Add SPI_NOR_MISC entry mtd: spi-nor: Kconfig: Add SPI_NOR_MACRONIX entry mtd: spi-nor: Kconfig: Add SPI_NOR_SPANSION entry mtd: spi-nor: Kconfig: Add SPI_NOR_STMICRO entry mtd: spi-nor: Kconfig: Add SPI_NOR_SST entry mtd: spi-nor: Kconfig: Add SPI_NOR_WINBOND entry spi: Add spi_write_then_read mtd: spi-nor: Add m25p80 driver mtd: spi-nor: Kconfig: Add MTD_M25P80 entry mtd: spi-nor: Add zynq qspi driver mtd: spi-nor: zynq_qspi: Kconfig: Add MTD_ZYNQ mtd: spi-nor: Add 4-byte address width support Makefile | 1 + drivers/mtd/Kconfig | 2 + drivers/mtd/mtd-uclass.c | 72 ++++ drivers/mtd/spi-nor/Kconfig | 89 +++++ drivers/mtd/spi-nor/Makefile | 15 + drivers/mtd/spi-nor/m25p80.c | 218 ++++++++++++ drivers/mtd/spi-nor/spi-nor-ids.c | 176 ++++++++++ drivers/mtd/spi-nor/spi-nor.c | 685 ++++++++++++++++++++++++++++++++++++++ drivers/mtd/spi-nor/zynq_qspi.c | 638 +++++++++++++++++++++++++++++++++++ drivers/spi/spi-uclass.c | 24 ++ include/linux/err.h | 5 + include/linux/mtd/mtd.h | 58 ++++ include/linux/mtd/spi-nor.h | 211 ++++++++++++ include/spi.h | 20 ++ 14 files changed, 2214 insertions(+) create mode 100644 drivers/mtd/spi-nor/Kconfig create mode 100644 drivers/mtd/spi-nor/Makefile create mode 100644 drivers/mtd/spi-nor/m25p80.c create mode 100644 drivers/mtd/spi-nor/spi-nor-ids.c create mode 100644 drivers/mtd/spi-nor/spi-nor.c create mode 100644 drivers/mtd/spi-nor/zynq_qspi.c create mode 100644 include/linux/mtd/spi-nor.h -- 2.7.4

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[U-Boot] [PATCH v4 00/17] sf:Updates on flash detection
by Jagan Teki 05 Oct '16

05 Oct '16

From: Jagan Teki <jagan(a)amarulasolutions.com> Updated spi_flash_info table in sync with Linux, and removed legacy and unsupported code. Changes for v4: - Rebase to master Changes for v3: - New patches - Fix checkpatch.pl - Fix BIT positions in spi.h - Fix ti_qspi.c mode - Fix commit Nit: s/becuase/because Changes for v2: - New patches. Testing: $ git clone git://git.denx.de/u-boot-spi.git $ cd u-boot-spi $ git checkout -b next origin/next Jagan Teki (17): sf: Adopt flash table INFO macro from Linux sf: Simplify lock ops detection code sf: sandbox: Use JEDEC_MFR|ID in id exctract sf: Cleanup spi_flash_info{} sf: Cleanup sf_params sf: nr_sectors -> n_sectors sf: Add SPI_FLASH_MAX_ID_LEN sf: Increase max id length by 1 byte sf: Add INFO6 flash_info macro sf: params: Add S25FS256S_64K spi flash support sf: Remove legacy idcode detection code sf: Remove non-meaningful comments sf: Rename sf_params.c to spi_flash_ids sf: ids: Use small letter's with flash name sf: ids: Use small letter in ext_jedec sf: Rename few local functions spi: Remove dual flash code drivers/mtd/spi/Makefile | 2 +- drivers/mtd/spi/sandbox.c | 11 +- drivers/mtd/spi/sf.c | 4 - drivers/mtd/spi/sf_internal.h | 58 +++++----- drivers/mtd/spi/sf_params.c | 238 ++++++++++++++++++++++------------------ drivers/mtd/spi/spi_flash.c | 226 ++++++++++++-------------------------- drivers/mtd/spi/spi_flash_ids.c | 176 +++++++++++++++++++++++++++++ include/linux/err.h | 5 + include/spi.h | 6 - 9 files changed, 419 insertions(+), 307 deletions(-) create mode 100644 drivers/mtd/spi/spi_flash_ids.c -- 2.7.4

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[U-Boot] [PATCH v2 8/8] armv7: ls1021a: Move DDR config options to Kconfig
by York Sun 05 Oct '16

05 Oct '16

Move DDR3, DDR4 and related config options to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun(a)nxp.com> --- Changes in v2: No patch arch/arm/cpu/armv7/ls102xa/Kconfig | 47 ++++++++++++++++++++++++++++ arch/arm/include/asm/arch-ls102xa/config.h | 10 ------ configs/ls1021aqds_ddr4_nor_defconfig | 2 +- configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 3 +- configs/ls1021aqds_nand_defconfig | 1 + configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021aqds_nor_defconfig | 1 + configs/ls1021aqds_nor_lpuart_defconfig | 1 + configs/ls1021aqds_qspi_defconfig | 1 + configs/ls1021aqds_sdcard_ifc_defconfig | 1 + configs/ls1021aqds_sdcard_qspi_defconfig | 1 + include/configs/ls1021aqds.h | 1 - 12 files changed, 57 insertions(+), 13 deletions(-) diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 17f1975..28bf778 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -3,6 +3,8 @@ config ARCH_LS1021A select SYS_FSL_ERRATUM_A010315 select SYS_FSL_SRDS_1 select SYS_HAS_SERDES + select SYS_FSL_DDR_BE + select SYS_FSL_DDR_VER_50 menu "LS102xA architecture" depends on ARCH_LS1021A @@ -22,6 +24,10 @@ config MAX_CPUS cores, count the reserved ports. This will allocate enough memory in spin table to properly handle all cores. +config NUM_DDR_CONTROLLERS + int "Maximum DDR controllers" + default 1 + config SYS_FSL_ERRATUM_A010315 bool "Workaround for PCIe erratum A010315" @@ -34,6 +40,47 @@ config SYS_FSL_SRDS_2 config SYS_HAS_SERDES bool +config SYS_FSL_DDR + bool "Freescale DDR driver" + help + Select Freescale General DDR driver, shared between most Freescale + PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM- + based Layerscape SoCs (such as ls2080a). + +config SYS_FSL_DDR_BE + bool + default y + help + Access DDR registers in big-endian. + +config SYS_FSL_DDR_VER + int + default 50 if SYS_FSL_DDR_VER_50 + +config SYS_FSL_DDR_VER_50 + bool + +config SYS_FSL_DDRC_ARM_GEN3 + bool + +config SYS_FSL_DDRC_GEN4 + bool + +config SYS_FSL_DDR3 + bool "Freescale DDR3 controller" + depends on !SYS_FSL_DDR4 + select SYS_FSL_DDR + select SYS_FSL_DDRC_ARM_GEN3 + help + Enable Freescale DDR3 controller on ARM-based SoCs. + +config SYS_FSL_DDR4 + bool "Freescale DDR4 controller" + select SYS_FSL_DDR + select SYS_FSL_DDRC_GEN4 + help + Enable Freescale DDR4 controller. + config SYS_FSL_IFC_BANK_COUNT int "Maximum banks of Integrated flash controller" depends on ARCH_LS1021A diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index dfcb546..ec65cc0 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -94,14 +94,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A008407 #ifdef CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR_BE #define CONFIG_VERY_BIG_RAM -#ifdef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDRC_GEN4 -#else -#define CONFIG_SYS_FSL_DDRC_ARM_GEN3 -#endif -#define CONFIG_SYS_FSL_DDR #define CONFIG_SYS_LS1_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS1_DDR_BLOCK1_SIZE #endif @@ -121,9 +114,6 @@ #define DCU_LAYER_MAX_NUM 16 #ifdef CONFIG_LS102XA -#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 -#define CONFIG_NUM_DDR_CONTROLLERS 1 -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 #define CONFIG_SYS_FSL_SEC_COMPAT 5 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_SYS_FSL_ERRATUM_A008378 diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 8761b60..b746ad7 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -5,7 +5,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" +CONFIG_SYS_FSL_DDR4=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index 5bb475e..b6df305 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -5,7 +5,8 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART" +CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_SYS_FSL_DDR4=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 628f2d5..3beda1e 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" +CONFIG_SYS_FSL_DDR3=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_SPL=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index b511eb0..03e7bb2 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" +CONFIG_SYS_FSL_DDR3=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index a59d339..66fdc5b 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -25,6 +25,7 @@ CONFIG_DM=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_DM_SERIAL=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index c7db8b7..6db90ff 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_SYS_FSL_DDR3=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index 49c88a6..be2c05e 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" +CONFIG_SYS_FSL_DDR3=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index f856ad7..d76606f 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" +CONFIG_SYS_FSL_DDR3=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_SPL=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 09df451..4fcc92c 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" +CONFIG_SYS_FSL_DDR3=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_SPL=y diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 5ff3db6..407bea9 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -128,7 +128,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ #ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDR3 /* Use DDR3 memory */ #define CONFIG_SYS_DDR_RAW_TIMING #endif #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -- 2.7.4

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[U-Boot] [PATCH v3 0/3] net: fec_mxc: Convert to DM
by Jagan Teki 05 Oct '16

05 Oct '16

From: Jagan Teki <jagan(a)amarulasolutions.com> This series convert fec_mxc to DM and tested both dm and non-dm code. This is on top of engicam qdl[1] Changes for v3: - Add ARM: dts: imx6qdl-icore: Add FEC support - icorem6: Use CONFIG_DM_ETH support Changes for v2: - Add TODO for implementing the enet reset code [1] https://www.mail-archive.com/u-boot@lists.denx.de/msg226671.html Jagan Teki (3): net: fec_mxc: Convert into driver model ARM: dts: imx6qdl-icore: Add FEC support icorem6: Use CONFIG_DM_ETH support arch/arm/cpu/armv7/mx6/Kconfig | 1 + arch/arm/dts/imx6qdl-icore.dtsi | 24 +++ board/engicam/icorem6/icorem6.c | 71 --------- configs/imx6qdl_icore_mmc_defconfig | 1 - configs/imx6qdl_icore_nand_defconfig | 1 - drivers/net/fec_mxc.c | 273 +++++++++++++++++++++++++++++++---- drivers/net/fec_mxc.h | 11 ++ 7 files changed, 283 insertions(+), 99 deletions(-) -- 2.7.4

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[U-Boot] [PATCH v2 00/12] binman: A tool for creating firmware images
by Simon Glass 05 Oct '16

05 Oct '16

This series introduces binman, a tool designed to create firmware images. It provides a way to bring together various binaries and place them in an image, at particular positions and with configurable alignment. Packaging of firmware is quite a different task from building the various parts. In many cases the various binaries which go into the image come from separate build systems. For example, ARM Trusted Firmware is used on ARMv8 devices but is not built in the U-Boot tree. If a Linux kernel is included in the firmware image, it is built elsewhere. It is of course possible to add more and more build rules to the U-Boot build system to cover these cases. It can shell out to other Makefiles and build scripts. But it seems better to create a clear divide between building software and packaging it. U-Boot supports a very large number of boards. Many of these have their own specific rules for how an image should be put together so that it boots correctly. At present these rules are described by manual instructions, different for each board. By turning these instructions into a standard format, we can support making valid images for any board without manual effort, lots of READMEs, etc. Images consist of a number of entries which are combined to make up the final image. The image is described in the device tree for the board, meaning that it can be accessed at run-time if desired. Binman is an extensible tool. A set of standard entries is provides, but new entries can be created fairly easily. Entries can be as simple as providing the name of a file to include. They can also handle more complex requirements, such as adjusting the input file or reading header information from one entry to control the position of another. U-Boot's mkimage builds FIT images and various other binaries. Binman augments this by allowing these binaries to be packed together. While FIT should be used where possible, it cannot be used everywhere. For example, many devices require executable code at a particular offset in the image. X86 machines require lots of binary blobs at particular places, and a microcode collection easily accessible at boot. So far binman has enough functionality to be useful, but apart from a few RFC patches, no attempt is made to switch boards over to use it. There should be enough material to permit review and comments. The series is available at u-boot-dm/binman-working Future work and missing features are documented in the README. Changes in v2: - Add a new patch to fix a bug in GetProp() - Add new patch to adjust GetProps() in fdt_normal to use the node path - Add a new patch to allow testing of the fallback Fdt library - Add test for code coverage - drop the unused __len__() method - Fix the -b option - Add automated test coverage - Various changes and improvements based on using this tool for a while - Put the binman definition in a common file for x86 Simon Glass (12): dtoc: Fix bug in GetProp() dtoc: Adjust GetProps() in fdt_normal to use the node path dtoc: Add a way for tests to request the fallback library binman: Introduce binman, a tool for building binary images binman: Add basic entry types for U-Boot binman: Add support for building x86 ROMs binman: Add support for u-boot.img as an input binary binman: Add support for building x86 ROMs with SPL binman: Add a build rule for binman binman: Allow configuration options to be used in .dts files RFC: Use binman for a sunxi board RFC: Use binman for an x86 board Makefile | 55 +- arch/arm/dts/sun7i-a20-pcduino3.dts | 12 + arch/x86/dts/binman.dtsi | 62 ++ arch/x86/dts/chromebook_link.dts | 1 + scripts/Makefile.lib | 5 + tools/binman/.gitignore | 1 + tools/binman/README | 491 +++++++++++++ tools/binman/binman | 1 + tools/binman/binman.py | 116 ++++ tools/binman/cmdline.py | 53 ++ tools/binman/control.py | 118 ++++ tools/binman/entry_test.py | 27 + tools/binman/etype/_testing.py | 26 + tools/binman/etype/blob.py | 37 + tools/binman/etype/entry.py | 190 +++++ tools/binman/etype/intel_descriptor.py | 55 ++ tools/binman/etype/intel_me.py | 17 + tools/binman/etype/intel_mrc.py | 17 + tools/binman/etype/intel_vga.py | 17 + tools/binman/etype/u_boot.py | 17 + tools/binman/etype/u_boot_dtb.py | 17 + tools/binman/etype/u_boot_dtb_with_ucode.py | 72 ++ tools/binman/etype/u_boot_img.py | 17 + tools/binman/etype/u_boot_nodtb.py | 17 + tools/binman/etype/u_boot_spl.py | 17 + tools/binman/etype/u_boot_spl_bss_pad.py | 26 + tools/binman/etype/u_boot_spl_with_ucode_ptr.py | 28 + tools/binman/etype/u_boot_ucode.py | 77 +++ tools/binman/etype/u_boot_with_ucode_ptr.py | 73 ++ tools/binman/etype/x86_start16.py | 17 + tools/binman/etype/x86_start16_spl.py | 17 + tools/binman/fdt_test.py | 48 ++ tools/binman/func_test.py | 763 +++++++++++++++++++++ tools/binman/image.py | 229 +++++++ tools/binman/test/01_invalid.dts | 5 + tools/binman/test/02_missing_node.dts | 6 + tools/binman/test/03_empty.dts | 9 + tools/binman/test/04_invalid_entry.dts | 11 + tools/binman/test/05_simple.dts | 11 + tools/binman/test/06_dual_image.dts | 22 + tools/binman/test/07_bad_align.dts | 12 + tools/binman/test/08_pack.dts | 30 + tools/binman/test/09_pack_extra.dts | 35 + tools/binman/test/10_pack_align_power2.dts | 12 + tools/binman/test/11_pack_align_size_power2.dts | 12 + tools/binman/test/12_pack_inv_align.dts | 13 + tools/binman/test/13_pack_inv_size_align.dts | 13 + tools/binman/test/14_pack_overlap.dts | 16 + tools/binman/test/15_pack_overflow.dts | 12 + tools/binman/test/16_pack_image_overflow.dts | 13 + tools/binman/test/17_pack_image_size.dts | 13 + tools/binman/test/18_pack_image_align.dts | 13 + tools/binman/test/19_pack_inv_image_align.dts | 14 + .../binman/test/20_pack_inv_image_align_power2.dts | 13 + tools/binman/test/21_image_pad.dts | 16 + tools/binman/test/22_image_name.dts | 21 + tools/binman/test/23_blob.dts | 12 + tools/binman/test/24_sorted.dts | 17 + tools/binman/test/25_pack_zero_size.dts | 15 + tools/binman/test/26_pack_u_boot_dtb.dts | 14 + tools/binman/test/27_pack_4gb_no_size.dts | 18 + tools/binman/test/28_pack_4gb_outside.dts | 19 + tools/binman/test/29_x86-rom.dts | 19 + tools/binman/test/30_x86-rom-me-no-desc.dts | 15 + tools/binman/test/31_x86-rom-me.dts | 18 + tools/binman/test/32_intel-vga.dts | 13 + tools/binman/test/33_x86-start16.dts | 13 + tools/binman/test/34_x86_ucode.dts | 29 + tools/binman/test/35_x86_single_ucode.dts | 26 + tools/binman/test/36_u_boot_img.dts | 11 + tools/binman/test/37_x86_no_ucode.dts | 20 + tools/binman/test/38_x86_ucode_missing_node.dts | 26 + tools/binman/test/39_x86_ucode_missing_node2.dts | 23 + tools/binman/test/40_x86_ucode_not_in_image.dts | 28 + tools/binman/test/41_unknown_pos_size.dts | 11 + tools/binman/test/u_boot_no_ucode_ptr | Bin 0 -> 4182 bytes tools/binman/test/u_boot_no_ucode_ptr.c | 15 + tools/binman/test/u_boot_ucode_ptr | Bin 0 -> 4175 bytes tools/binman/test/u_boot_ucode_ptr.c | 15 + tools/binman/test/u_boot_ucode_ptr.lds | 18 + tools/dtoc/fdt_fallback.py | 2 +- tools/dtoc/fdt_normal.py | 9 +- tools/dtoc/fdt_select.py | 16 +- 83 files changed, 3425 insertions(+), 55 deletions(-) create mode 100644 arch/x86/dts/binman.dtsi create mode 100644 tools/binman/.gitignore create mode 100644 tools/binman/README create mode 120000 tools/binman/binman create mode 100755 tools/binman/binman.py create mode 100644 tools/binman/cmdline.py create mode 100644 tools/binman/control.py create mode 100644 tools/binman/entry_test.py create mode 100644 tools/binman/etype/_testing.py create mode 100644 tools/binman/etype/blob.py create mode 100644 tools/binman/etype/entry.py create mode 100644 tools/binman/etype/intel_descriptor.py create mode 100644 tools/binman/etype/intel_me.py create mode 100644 tools/binman/etype/intel_mrc.py create mode 100644 tools/binman/etype/intel_vga.py create mode 100644 tools/binman/etype/u_boot.py create mode 100644 tools/binman/etype/u_boot_dtb.py create mode 100644 tools/binman/etype/u_boot_dtb_with_ucode.py create mode 100644 tools/binman/etype/u_boot_img.py create mode 100644 tools/binman/etype/u_boot_nodtb.py create mode 100644 tools/binman/etype/u_boot_spl.py create mode 100644 tools/binman/etype/u_boot_spl_bss_pad.py create mode 100644 tools/binman/etype/u_boot_spl_with_ucode_ptr.py create mode 100644 tools/binman/etype/u_boot_ucode.py create mode 100644 tools/binman/etype/u_boot_with_ucode_ptr.py create mode 100644 tools/binman/etype/x86_start16.py create mode 100644 tools/binman/etype/x86_start16_spl.py create mode 100644 tools/binman/fdt_test.py create mode 100644 tools/binman/func_test.py create mode 100644 tools/binman/image.py create mode 100644 tools/binman/test/01_invalid.dts create mode 100644 tools/binman/test/02_missing_node.dts create mode 100644 tools/binman/test/03_empty.dts create mode 100644 tools/binman/test/04_invalid_entry.dts create mode 100644 tools/binman/test/05_simple.dts create mode 100644 tools/binman/test/06_dual_image.dts create mode 100644 tools/binman/test/07_bad_align.dts create mode 100644 tools/binman/test/08_pack.dts create mode 100644 tools/binman/test/09_pack_extra.dts create mode 100644 tools/binman/test/10_pack_align_power2.dts create mode 100644 tools/binman/test/11_pack_align_size_power2.dts create mode 100644 tools/binman/test/12_pack_inv_align.dts create mode 100644 tools/binman/test/13_pack_inv_size_align.dts create mode 100644 tools/binman/test/14_pack_overlap.dts create mode 100644 tools/binman/test/15_pack_overflow.dts create mode 100644 tools/binman/test/16_pack_image_overflow.dts create mode 100644 tools/binman/test/17_pack_image_size.dts create mode 100644 tools/binman/test/18_pack_image_align.dts create mode 100644 tools/binman/test/19_pack_inv_image_align.dts create mode 100644 tools/binman/test/20_pack_inv_image_align_power2.dts create mode 100644 tools/binman/test/21_image_pad.dts create mode 100644 tools/binman/test/22_image_name.dts create mode 100644 tools/binman/test/23_blob.dts create mode 100644 tools/binman/test/24_sorted.dts create mode 100644 tools/binman/test/25_pack_zero_size.dts create mode 100644 tools/binman/test/26_pack_u_boot_dtb.dts create mode 100644 tools/binman/test/27_pack_4gb_no_size.dts create mode 100644 tools/binman/test/28_pack_4gb_outside.dts create mode 100644 tools/binman/test/29_x86-rom.dts create mode 100644 tools/binman/test/30_x86-rom-me-no-desc.dts create mode 100644 tools/binman/test/31_x86-rom-me.dts create mode 100644 tools/binman/test/32_intel-vga.dts create mode 100644 tools/binman/test/33_x86-start16.dts create mode 100644 tools/binman/test/34_x86_ucode.dts create mode 100644 tools/binman/test/35_x86_single_ucode.dts create mode 100644 tools/binman/test/36_u_boot_img.dts create mode 100644 tools/binman/test/37_x86_no_ucode.dts create mode 100644 tools/binman/test/38_x86_ucode_missing_node.dts create mode 100644 tools/binman/test/39_x86_ucode_missing_node2.dts create mode 100644 tools/binman/test/40_x86_ucode_not_in_image.dts create mode 100644 tools/binman/test/41_unknown_pos_size.dts create mode 100755 tools/binman/test/u_boot_no_ucode_ptr create mode 100644 tools/binman/test/u_boot_no_ucode_ptr.c create mode 100755 tools/binman/test/u_boot_ucode_ptr create mode 100644 tools/binman/test/u_boot_ucode_ptr.c create mode 100644 tools/binman/test/u_boot_ucode_ptr.lds -- 2.8.0.rc3.226.g39d4020

2 22

[U-Boot] [PATCH v2 7/8] armv8: fsl-layerscape: Move DDR config options to Kconfig
by York Sun 05 Oct '16

05 Oct '16

Move DDR3, DDR4 and realted options to Kconfig and clean up existing uses. Signed-off-by: York Sun <york.sun(a)nxp.com> --- Changes in v2: No patch arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 54 +++++++++++++++++++++++ arch/arm/include/asm/arch-fsl-layerscape/config.h | 14 ------ configs/ls1043aqds_defconfig | 2 +- configs/ls1043aqds_lpuart_defconfig | 3 +- configs/ls1043aqds_nand_defconfig | 3 +- configs/ls1043aqds_nor_ddr3_defconfig | 1 + configs/ls1043aqds_qspi_defconfig | 3 +- configs/ls1043aqds_sdcard_ifc_defconfig | 3 +- configs/ls1043aqds_sdcard_qspi_defconfig | 3 +- configs/ls1043ardb_SECURE_BOOT_defconfig | 3 +- configs/ls1043ardb_defconfig | 2 +- configs/ls1043ardb_nand_defconfig | 3 +- configs/ls1043ardb_sdcard_defconfig | 3 +- include/configs/ls1043a_common.h | 4 -- include/configs/ls1043aqds.h | 3 -- include/configs/ls2080a_common.h | 1 - 16 files changed, 73 insertions(+), 32 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 66e509e..52a3535 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -1,22 +1,31 @@ config ARCH_LS1012A bool select FSL_LSCH2 + select SYS_FSL_DDR_BE select SYS_FSL_MMDC select SYS_FSL_ERRATUM_A010315 config ARCH_LS1043A bool select FSL_LSCH2 + select SYS_FSL_DDR_BE + select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A010315 config ARCH_LS1046A bool select FSL_LSCH2 + select SYS_FSL_DDR_BE + select SYS_FSL_DDR4 + select SYS_FSL_DDR_VER_50 select SYS_FSL_SRDS_2 config ARCH_LS2080A bool select FSL_LSCH3 + select SYS_FSL_DDR4 + select SYS_FSL_DDR_LE + select SYS_FSL_DDR_VER_50 select SYS_FSL_HAS_DP_DDR select SYS_FSL_SRDS_2 @@ -76,4 +85,49 @@ config SYS_FSL_SRDS_2 config SYS_HAS_SERDES bool +config SYS_FSL_DDR + bool "Freescale DDR driver" + help + Select Freescale General DDR driver, shared between most Freescale + PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM- + based Layerscape SoCs (such as ls2080a). + +config SYS_FSL_DDR_BE + bool + help + Access DDR registers in big-endian. + +config SYS_FSL_DDR_LE + bool + help + Access DDR registers in little-endian. + +config SYS_FSL_DDR_VER + int + default 50 if SYS_FSL_DDR_VER_50 + +config SYS_FSL_DDR_VER_50 + bool + +config SYS_FSL_DDRC_ARM_GEN3 + bool + +config SYS_FSL_DDRC_GEN4 + bool + +config SYS_FSL_DDR3 + bool "Freescale DDR3 controller" + depends on !SYS_FSL_DDR4 + select SYS_FSL_DDR + select SYS_FSL_DDRC_ARM_GEN3 + help + Enable Freescale DDR3 controller on ARM-based SoCs. + +config SYS_FSL_DDR4 + bool "Freescale DDR4 controller" + select SYS_FSL_DDR + select SYS_FSL_DDRC_GEN4 + help + Enable Freescale DDR4 controller. + endmenu diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 3039e72..4201e0f 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -12,17 +12,6 @@ #define CONFIG_STANDALONE_LOAD_ADDR 0x80300000 -#ifdef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDRC_GEN4 -#else -#define CONFIG_SYS_FSL_DDRC_ARM_GEN3 /* Enable Freescale ARM DDR3 driver */ -#endif - -#ifndef CONFIG_ARCH_LS1012A -#define CONFIG_SYS_FSL_DDR /* Freescale DDR driver */ -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 -#endif - /* * Reserve secure memory * To be aligned with MMU block size @@ -42,7 +31,6 @@ #define CONFIG_SYS_FSL_OCRAM_SIZE 0x00200000 /* 2M */ /* DDR */ -#define CONFIG_SYS_FSL_DDR_LE #define CONFIG_SYS_LS2_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS2_DDR_BLOCK1_SIZE @@ -166,7 +154,6 @@ #define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_NUM_FM1_DTSEC 7 #define CONFIG_SYS_NUM_FM1_10GEC 1 -#define CONFIG_SYS_FSL_DDR_BE #define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE @@ -204,7 +191,6 @@ #define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_NUM_FM1_DTSEC 8 #define CONFIG_SYS_NUM_FM1_10GEC 2 -#define CONFIG_SYS_FSL_DDR_BE #define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index b209486..91382ff 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" +CONFIG_SYS_FSL_DDR4=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index a60ea68..0508885 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -4,7 +4,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART" +CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_SYS_FSL_DDR4=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 593f244..0e2df72 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -12,7 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" +CONFIG_SYS_FSL_DDR4=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index a844d9d..7c051ab 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_SPI_FLASH=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_NS16550=y CONFIG_DM_SPI=y CONFIG_USB=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index 92e5e80..bde0350 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -4,7 +4,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,QSPI_BOOT" +CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" +CONFIG_SYS_FSL_DDR4=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index e360906..4354db9 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -12,7 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" +CONFIG_SYS_FSL_DDR4=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index b6ece37..b4e0624 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -12,7 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" +CONFIG_SYS_FSL_DDR4=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index f51e020..d45a464 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -4,7 +4,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, SECURE_BOOT" +CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" +CONFIG_SYS_FSL_DDR4=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_MMC=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 5c20e44..528c845 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" +CONFIG_SYS_FSL_DDR4=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_MMC=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index a203030..6149f7f 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -12,7 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT,SYS_FSL_DDR4" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" +CONFIG_SYS_FSL_DDR4=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 323bb77..7dc6064 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -12,7 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SYS_FSL_DDR4" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" +CONFIG_SYS_FSL_DDR4=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 3a85b6a..0fd69bf 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -24,10 +24,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_BOARD_EARLY_INIT_F 1 -#ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDR3 /* Use DDR3 memory */ -#endif - #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index b18fcc0..b80e316 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -42,9 +42,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDR3 /* Use DDR3 memory */ -#endif #define CONFIG_DDR_ECC #ifdef CONFIG_DDR_ECC diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 187aee1..3dd4da8 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -46,7 +46,6 @@ #define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ #endif #ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDR3 /* Use DDR3 memory */ #define CONFIG_SYS_DDR_RAW_TIMING #endif -- 2.7.4

2 1

[U-Boot] [PATCH] arm: ls102xa: Remove reduplicate definition for Generic Timer frequency
by Alison Wang 05 Oct '16

05 Oct '16

GENERIC_TIMER_CLK and CONFIG_TIMER_CLK_FREQ are both used to define Generic Timer frequency. It is reduplicate. This patch will remove GENERIC_TIMER_CLK macro. Signed-off-by: Alison Wang <alison.wang(a)nxp.com> --- arch/arm/cpu/armv7/ls102xa/psci.S | 2 +- arch/arm/cpu/armv7/ls102xa/timer.c | 2 +- include/configs/ls1021aqds.h | 5 ----- include/configs/ls1021atwr.h | 5 ----- 4 files changed, 2 insertions(+), 12 deletions(-) diff --git a/arch/arm/cpu/armv7/ls102xa/psci.S b/arch/arm/cpu/armv7/ls102xa/psci.S index 8f38680..9efb6d8 100644 --- a/arch/arm/cpu/armv7/ls102xa/psci.S +++ b/arch/arm/cpu/armv7/ls102xa/psci.S @@ -36,7 +36,7 @@ .align 5 -#define ONE_MS (GENERIC_TIMER_CLK / 1000) +#define ONE_MS (CONFIG_TIMER_CLK_FREQ / 1000) #define RESET_WAIT (30 * ONE_MS) .globl psci_version diff --git a/arch/arm/cpu/armv7/ls102xa/timer.c b/arch/arm/cpu/armv7/ls102xa/timer.c index e6a32ca..c926877 100644 --- a/arch/arm/cpu/armv7/ls102xa/timer.c +++ b/arch/arm/cpu/armv7/ls102xa/timer.c @@ -62,7 +62,7 @@ int timer_init(void) /* Enable System Counter */ writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr); - freq = GENERIC_TIMER_CLK; + freq = CONFIG_TIMER_CLK_FREQ; asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); /* Set PL1 Physical Timer Ctrl */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 554c13c..374c705 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -34,11 +34,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE -/* - * Generic Timer Definitions - */ -#define GENERIC_TIMER_CLK 12500000 - #ifndef __ASSEMBLY__ unsigned long get_board_sys_clk(void); unsigned long get_board_ddr_clk(void); diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index e5ac50e..af9d08b 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -63,11 +63,6 @@ #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 #endif -/* - * Generic Timer Definitions - */ -#define GENERIC_TIMER_CLK 12500000 - #define CONFIG_SYS_CLK_FREQ 100000000 #define CONFIG_DDR_CLK_FREQ 100000000 -- 2.1.0.27.g96db324

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[U-Boot] rk3288 u-boot
by Andrea Di Chiara 05 Oct '16

05 Oct '16

Hi, I'd like to update provided u-boot image on a rk3288 FireFly board with a standard version. There is any u-boot mainline branch that has network support for rk3288 (gmac). Could someone suggest me which u-boot should I use? thank you for the attention, regards Andrea Software Department software(a)teseo.com ------------------------------------------------------------------------------------------------------------- TESEO spa via Agnelli, 49 63023 FERMO (FM) ITALY Tel. +39 0734 628818 -- Fax. +39 0734 628816 Disclaimer: This electronic mail transmission may contain legally privileged and/or confidential information. Do not read this if you are not the person(s) named. Any use, distribution, copying or disclosure by any other person is strictly prohibited. If you receive this transmission by mistake destroy the original transmission and its attachments without reading or saving in any manner.

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