August 2015 - U-Boot

[U-Boot] [PATCH V2 0/6] power: pfuze100: support driver model and regulator
by Peng Fan 06 Aug '15

06 Aug '15

This patch set is to support driver model for pfuze100 and implement regulator driver for pfuze100. Patches has been tested on i.MX7D validation board. Here registeres for standby mode are not touched, all operation read/write register are for NORMAL state. For example, to pfuze100, sw1volt is for controlling voltage for normal state, sw1stdby is for controlling voltage for standby state. The driver only read/write sw1volt, but not touch sw1stdby. This will be done later, since I do not come up with a good idea to operate sw1stdby. This pfuze driver model part and regulator driver use max77686 driver as a reference. Changes v2: Addressed comments from Simon and Przemyslaw. Detailed changelog see each patch. Peng Fan (6): power: pfuze100 correct SWBST macro definition power: regulator use node name when no regulator-name power: regulator: update comments for regulator-name power: pmic: pfuze100 support driver model power: regulator: add pfuze100 support fsl: common: pfuze: no use original pfuze code if DM_PMIC board/freescale/common/pfuze.c | 2 + doc/device-tree-bindings/regulator/regulator.txt | 19 +- drivers/power/pmic/Kconfig | 7 + drivers/power/pmic/Makefile | 2 +- drivers/power/pmic/pfuze100.c | 121 +++++ drivers/power/pmic/pmic_pfuze100.c | 32 -- drivers/power/regulator/Kconfig | 8 + drivers/power/regulator/Makefile | 1 + drivers/power/regulator/pfuze100.c | 554 +++++++++++++++++++++++ drivers/power/regulator/regulator-uclass.c | 4 +- include/power/pfuze100_pmic.h | 33 +- include/power/regulator.h | 8 +- 12 files changed, 737 insertions(+), 54 deletions(-) create mode 100644 drivers/power/pmic/pfuze100.c delete mode 100644 drivers/power/pmic/pmic_pfuze100.c create mode 100644 drivers/power/regulator/pfuze100.c -- 1.8.4

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[U-Boot] [PATCH v2 1/3] x86: Convert minnowmax to use CONFIG_DM_NET
by Simon Glass 06 Aug '15

06 Aug '15

Move to driver model for networking on minnowmax. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v2: None board/intel/minnowmax/minnowmax.c | 6 ------ configs/minnowmax_defconfig | 1 + 2 files changed, 1 insertion(+), 6 deletions(-) diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c index c4f2c33..44e5bf4 100644 --- a/board/intel/minnowmax/minnowmax.c +++ b/board/intel/minnowmax/minnowmax.c @@ -6,7 +6,6 @@ #include <common.h> #include <asm/gpio.h> -#include <netdev.h> int arch_early_init_r(void) { @@ -20,8 +19,3 @@ void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio) { return; } - -int board_eth_init(bd_t *bis) -{ - return pci_eth_init(bis); -} diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index e98f5eb..6ba22d6 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -24,3 +24,4 @@ CONFIG_FRAMEBUFFER_VESA_MODE_11A=y CONFIG_DM_RTC=y CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_SYS_VSNPRINTF=y +CONFIG_DM_ETH=y -- 2.5.0.rc2.392.g76e840b

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[U-Boot] board_pci_pre_scan() and board_pci_post_scan()
by Bin Meng 06 Aug '15

06 Aug '15

Hi Simon, With driver model pci conversion on x86 boards, we now missed the call to board_pci_pre_scan() and board_pci_post_scan() which are called in the non-dm path. For example, board_pci_post_scan() in arch/x86/lib/fsp/fsp_common.c is not called to do any work as requested by FSP after pci enumeration. I am not sure where we could insert these call back in the dm. Do you have any possible solution on this? Regards, Bin

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[U-Boot] [PATCH v3 00/16] assortment of tegra fixes/enhancements
by Marcel Ziswiler 06 Aug '15

06 Aug '15

From: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> This patch set is an assortment of tegra fixes/enhancements distilled straight from our downstream integration work. Changes in v3: - dropped apalis/colibri_t20/t30 specific raw initrd support enablement (formerly 12) - drop unrelated subpage writes disabling in (8) to be done as part of a separate patch (16) Changes in v2: - dropped Colibri T20 specific ONFI detection enablement patch (formerly 9) as I noticed this already being done globally as part of tegra20-common.h - enable UBI/UBIFS support (11) - limit TFTP block size (13) on Colibri T20 to 1536 due to issues observed otherwise - drop unrelated clean-up in (3) to be done as part of a separate patch (14) - new patch (15) fixing nRESET_OUT - new patch (16) fixing USB DM regression on Apalis/Colibri T30 Marcel Ziswiler (15): ARM: tegra: allow custom usb manufacturer/product/vendor ids/strings ARM: tegra: allow reading recovery mode boot type apalis/colibri_t20/t30: integrate recovery mode detection colibri_t20: fix device-tree compatible node colibri_t20: add lcd display support colibri_t20: add i2c support colibri_t20: disable PMIC sleep mode on low supply voltage tegra: nand: fix read_byte required for proper onfi detection mtd/nand/tegra: alignment workaround colibri_t20: enable mtdparts support colibri_t20: enable ubi/ubifs support apalis/colibri_t20/30: clean-up colibri_t20: fix reset out pin apalis/colibri_t30: fix usb dm regression tegra: nand: disable subpage writes Max Krummenacher (1): apalis/colibri_t20/t30: increase tftp blocksize arch/arm/dts/tegra20-colibri.dts | 63 ++++++++++++++- arch/arm/dts/tegra30-apalis.dts | 2 +- arch/arm/dts/tegra30-colibri.dts | 4 +- arch/arm/include/asm/arch-tegra/tegra.h | 2 + board/toradex/apalis_t30/apalis_t30.c | 15 +++- board/toradex/colibri_t20/colibri_t20.c | 68 ++++++++++++++++ board/toradex/colibri_t30/colibri_t30.c | 18 ++++- drivers/mtd/nand/tegra_nand.c | 128 +++++++++++------------------- include/configs/apalis_t30.h | 13 ++- include/configs/colibri_t20.h | 53 +++++++++++-- include/configs/colibri_t30.h | 13 ++- include/configs/tegra-common-usb-gadget.h | 6 ++ 12 files changed, 283 insertions(+), 102 deletions(-) -- 2.4.3

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[U-Boot] [PATCH v2 00/16] assortment of tegra fixes/enhancements
by Marcel Ziswiler 06 Aug '15

06 Aug '15

From: Marcel Ziswiler <marcel.ziswiler(a)toradex.com> This patch set is an assortment of tegra fixes/enhancements distilled straight from our downstream integration work. Changes in v2: - dropped Colibri T20 specific ONFI detection enablement patch (formerly 9) as I noticed this already being done globally as part of tegra20-common.h - enable UBI/UBIFS support (11) - limit TFTP block size (13) on Colibri T20 to 1536 due to issues observed otherwise - drop unrelated clean-up in (3) to be done as part of a separate patch (14) - new patch (15) fixing nRESET_OUT - new patch (16) fixing USB DM regression on Apalis/Colibri T30 Marcel Ziswiler (15): ARM: tegra: allow custom usb manufacturer/product/vendor ids/strings ARM: tegra: allow reading recovery mode boot type apalis/colibri_t20/t30: integrate recovery mode detection colibri_t20: fix device-tree compatible node colibri_t20: add lcd display support colibri_t20: add i2c support colibri_t20: disable PMIC sleep mode on low supply voltage tegra: nand: fix read_byte required for proper onfi detection mtd/nand/tegra: alignment workaround colibri_t20: enable mtdparts support colibri_t20: enable ubi/ubifs support apalis/colibri_t20/t30: enable raw initrd support apalis/colibri_t20/30: clean-up colibri_t20: fix reset out pin apalis/colibri_t30: fix usb dm regression Max Krummenacher (1): apalis/colibri_t20/t30: increase tftp blocksize arch/arm/dts/tegra20-colibri.dts | 63 ++++++++++++++- arch/arm/dts/tegra30-apalis.dts | 2 +- arch/arm/dts/tegra30-colibri.dts | 4 +- arch/arm/include/asm/arch-tegra/tegra.h | 2 + board/toradex/apalis_t30/apalis_t30.c | 15 +++- board/toradex/colibri_t20/colibri_t20.c | 68 +++++++++++++++++ board/toradex/colibri_t30/colibri_t30.c | 18 ++++- drivers/mtd/nand/tegra_nand.c | 122 ++++++++++-------------------- include/configs/apalis_t30.h | 16 +++- include/configs/colibri_t20.h | 56 ++++++++++++-- include/configs/colibri_t30.h | 16 +++- include/configs/tegra-common-usb-gadget.h | 6 ++ 12 files changed, 287 insertions(+), 101 deletions(-) -- 2.4.3

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[U-Boot] [PATCH v5 2/5] nand: lpc32xx: add hardware ECC support
by slemieux.tyco＠gmail.com 05 Aug '15

05 Aug '15

From: Sylvain Lemieux <slemieux(a)tycoint.com> Incorporate NAND SLC hardware ECC support from legacy LPCLinux NXP BSP. The code taken from the legacy patch is: - lpc32xx SLC NAND driver (hardware ECC support) - lpc3250 header file missing SLC NAND registers definition The legacy driver code was updated to integrate with the existing NAND SLC driver. Signed-off-by: Sylvain Lemieux <slemieux(a)tycoint.com> --- Changes from v4 to v5: * Addressed Marek's comments on LPC32xx DMA driver: - Move macro use by the DMA client to write the next DMA linked list item address to NAND SLC driver. * Updated multiline comments style. * Use "uxx" instead of "uintxx_t" (new code), note: keep uintxx_t for API; to match initial patch. Changes from v3 to v4: * No changes. Changes from v2 to v3: * As per feedback on mailing list from Vladimir, - add warning when DMA and SPL build option are selected. - add another DMA specific read and write buffer functions. * Addressed Marek's comments on LPC32xx NAND driver removed typecast and update variable type, when possible. * As per discussion on mailing list with Vladimir & Marek, updated conditional compile option (DMA only) to build the original NAND SLC code using software ECC. * Re-organized the conditional compile code inside "board_nand_init()" - DMA vs. non-DMA initialization. * Added original source code credit (copyright & author). Changes from v1 to v2: * Moved the NAND SLC patch as the second patch of the series. * As per discussion on mailing list with Vladimir, incorporate NAND SLC hardware ECC support into the following NAND SLC patch: https://patchwork.ozlabs.org/patch/497308/ * As per discussion on mailing list with Vladimir & Albert, add conditional compile option to build the original NAND SLC code using software ECC for SPL build. * Removed ECC layout for small page NAND from this patch. Update to the legacy code to integrate with the NAND SLC patch: 1) Fixed checkpatch script output in legacy code. 2) Use u-boot API for register access to remove the volatile in register definition taken from "lpc3250.h" header file. 3) Use register definition from the NAND SLC patch. The legacy BSP patch (u-boot-2009.03_lpc32x0-v1.07.patch.tar.bz2) was downloaded from the LPCLinux Web site. drivers/mtd/nand/lpc32xx_nand_slc.c | 369 +++++++++++++++++++++++++++++++++++- 1 file changed, 364 insertions(+), 5 deletions(-) diff --git a/drivers/mtd/nand/lpc32xx_nand_slc.c b/drivers/mtd/nand/lpc32xx_nand_slc.c index 719a74d..715152d 100644 --- a/drivers/mtd/nand/lpc32xx_nand_slc.c +++ b/drivers/mtd/nand/lpc32xx_nand_slc.c @@ -3,15 +3,38 @@ * * (C) Copyright 2015 Vladimir Zapolskiy <vz(a)mleia.com> * + * Hardware ECC support original source code + * Copyright (C) 2008 by NXP Semiconductors + * Author: Kevin Wells + * * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> #include <nand.h> +#include <linux/mtd/nand_ecc.h> #include <asm/errno.h> #include <asm/io.h> #include <asm/arch/clk.h> #include <asm/arch/sys_proto.h> +#include <asm/arch/dma.h> +#include <asm/arch/cpu.h> + +#if defined(CONFIG_DMA_LPC32XX) && defined(CONFIG_SPL_BUILD) +#warning "DMA support in SPL image is not tested" +#endif + +/* Provide default for ECC size / bytes / OOB size for large page) + * if target did not. */ +#if !defined(CONFIG_SYS_NAND_ECCSIZE) +#define CONFIG_SYS_NAND_ECCSIZE 2048 +#endif +#if !defined(CONFIG_SYS_NAND_ECCBYTES) +#define CONFIG_SYS_NAND_ECCBYTES 24 +#endif +#if !defined(CONFIG_SYS_NAND_OOBSIZE) +#define CONFIG_SYS_NAND_OOBSIZE 64 +#endif struct lpc32xx_nand_slc_regs { u32 data; @@ -33,11 +56,18 @@ struct lpc32xx_nand_slc_regs { /* CFG register */ #define CFG_CE_LOW (1 << 5) +#define SLCCFG_DMA_ECC (1 << 4) /* Enable DMA ECC bit */ +#define SLCCFG_ECC_EN (1 << 3) /* ECC enable bit */ +#define SLCCFG_DMA_BURST (1 << 2) /* DMA burst bit */ +#define SLCCFG_DMA_DIR (1 << 1) /* DMA write(0)/read(1) bit */ /* CTRL register */ #define CTRL_SW_RESET (1 << 2) +#define SLCCTRL_ECC_CLEAR (1 << 1) /* Reset ECC bit */ +#define SLCCTRL_DMA_START (1 << 0) /* Start DMA channel bit */ /* STAT register */ +#define SLCSTAT_DMA_FIFO (1 << 2) /* DMA FIFO has data bit */ #define STAT_NAND_READY (1 << 0) /* INT_STAT register */ @@ -54,6 +84,59 @@ struct lpc32xx_nand_slc_regs { #define TAC_R_HOLD(n) (max_t(uint32_t, (n), 0xF) << 4) #define TAC_R_SETUP(n) (max_t(uint32_t, (n), 0xF) << 0) +/* control register definitions */ +#define DMAC_CHAN_INT_TC_EN (1 << 31) /* channel terminal count interrupt */ +#define DMAC_CHAN_DEST_AUTOINC (1 << 27) /* automatic destination increment */ +#define DMAC_CHAN_SRC_AUTOINC (1 << 26) /* automatic source increment */ +#define DMAC_CHAN_DEST_AHB1 (1 << 25) /* AHB1 master for dest. transfer */ +#define DMAC_CHAN_DEST_WIDTH_32 (1 << 22) /* Destination data width selection */ +#define DMAC_CHAN_SRC_WIDTH_32 (1 << 19) /* Source data width selection */ +#define DMAC_CHAN_DEST_BURST_1 0 +#define DMAC_CHAN_DEST_BURST_4 (1 << 15) /* Destination data burst size */ +#define DMAC_CHAN_SRC_BURST_1 0 +#define DMAC_CHAN_SRC_BURST_4 (1 << 12) /* Source data burst size */ + +/* + * config_ch register definitions + * DMAC_CHAN_FLOW_D_xxx: flow control with DMA as the controller + * DMAC_DEST_PERIP: Macro for loading destination peripheral + * DMAC_SRC_PERIP: Macro for loading source peripheral + */ +#define DMAC_CHAN_FLOW_D_M2P (0x1 << 11) +#define DMAC_CHAN_FLOW_D_P2M (0x2 << 11) +#define DMAC_DEST_PERIP(n) (((n) & 0x1F) << 6) +#define DMAC_SRC_PERIP(n) (((n) & 0x1F) << 1) + +/* + * config_ch register definitions + * (source and destination peripheral ID numbers). + * These can be used with the DMAC_DEST_PERIP and DMAC_SRC_PERIP macros. + */ +#define DMA_PERID_NAND1 1 + +/* Channel enable bit */ +#define DMAC_CHAN_ENABLE (1 << 0) + +#define NAND_LARGE_BLOCK_PAGE_SIZE 2048 +#define NAND_SMALL_BLOCK_PAGE_SIZE 512 + +#if defined(CONFIG_DMA_LPC32XX) +/* + * DMA Descriptors + * For Large Block: 17 descriptors = ((16 Data and ECC Read) + 1 Spare Area) + * For Small Block: 5 descriptors = ((4 Data and ECC Read) + 1 Spare Area) + */ +static struct lpc32xx_dmac_ll dmalist[(CONFIG_SYS_NAND_ECCSIZE/256) * 2 + 1]; +static u32 ecc_buffer[8]; /* MAX ECC size */ +static int dmachan = -1; + +/* + * Helper macro for the DMA client (i.e. NAND SLC) to write the next + * DMA linked list item address (see arch/include/asm/arch-lpc32xx/dma.h). + */ +#define lpc32xx_dmac_next_lli(x) ((u32)x) +#endif + static struct lpc32xx_nand_slc_regs __iomem *lpc32xx_nand_slc_regs = (struct lpc32xx_nand_slc_regs __iomem *)SLC_NAND_BASE; @@ -108,15 +191,266 @@ static int lpc32xx_nand_dev_ready(struct mtd_info *mtd) return readl(&lpc32xx_nand_slc_regs->stat) & STAT_NAND_READY; } -static void lpc32xx_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) +#if defined(CONFIG_DMA_LPC32XX) +/* + * Prepares DMA descriptors for NAND RD/WR operations + * If the size is < 256 Bytes then it is assumed to be + * an OOB transfer + */ +static void lpc32xx_nand_dma_configure(struct nand_chip *chip, + const u8 *buffer, int size, + int read) { - while (len-- > 0) - *buf++ = readl(&lpc32xx_nand_slc_regs->data); + u32 i, dmasrc, ctrl, ecc_ctrl, oob_ctrl, dmadst; + u32 base = (u32)chip->IO_ADDR_R; + struct lpc32xx_dmac_ll *dmalist_cur; + struct lpc32xx_dmac_ll *dmalist_cur_ecc; + + /* + * CTRL descriptor entry for reading ECC + * Copy Multiple times to sync DMA with Flash Controller + */ + ecc_ctrl = 0x5 | + DMAC_CHAN_SRC_BURST_1 | + DMAC_CHAN_DEST_BURST_1 | + DMAC_CHAN_SRC_WIDTH_32 | + DMAC_CHAN_DEST_WIDTH_32 | + DMAC_CHAN_DEST_AHB1; + + /* CTRL descriptor entry for reading/writing Data */ + ctrl = 64 | /* 256/4 */ + DMAC_CHAN_SRC_BURST_4 | + DMAC_CHAN_DEST_BURST_4 | + DMAC_CHAN_SRC_WIDTH_32 | + DMAC_CHAN_DEST_WIDTH_32 | + DMAC_CHAN_DEST_AHB1; + + /* CTRL descriptor entry for reading/writing Spare Area */ + oob_ctrl = (CONFIG_SYS_NAND_OOBSIZE / 4) | + DMAC_CHAN_SRC_BURST_4 | + DMAC_CHAN_DEST_BURST_4 | + DMAC_CHAN_SRC_WIDTH_32 | + DMAC_CHAN_DEST_WIDTH_32 | + DMAC_CHAN_DEST_AHB1; + + if (read) { + dmasrc = base + offsetof(struct lpc32xx_nand_slc_regs, + dma_data); + dmadst = (u32)buffer; + ctrl |= DMAC_CHAN_DEST_AUTOINC; + } else { + dmadst = base + offsetof(struct lpc32xx_nand_slc_regs, + dma_data); + dmasrc = (u32)buffer; + ctrl |= DMAC_CHAN_SRC_AUTOINC; + } + + /* + * Write Operation Sequence for Small Block NAND + * ---------------------------------------------------------- + * 1. X'fer 256 bytes of data from Memory to Flash. + * 2. Copy generated ECC data from Register to Spare Area + * 3. X'fer next 256 bytes of data from Memory to Flash. + * 4. Copy generated ECC data from Register to Spare Area. + * 5. X'fer 16 byets of Spare area from Memory to Flash. + * Read Operation Sequence for Small Block NAND + * ---------------------------------------------------------- + * 1. X'fer 256 bytes of data from Flash to Memory. + * 2. Copy generated ECC data from Register to ECC calc Buffer. + * 3. X'fer next 256 bytes of data from Flash to Memory. + * 4. Copy generated ECC data from Register to ECC calc Buffer. + * 5. X'fer 16 bytes of Spare area from Flash to Memory. + * Write Operation Sequence for Large Block NAND + * ---------------------------------------------------------- + * 1. Steps(1-4) of Write Operations repeate for four times + * which generates 16 DMA descriptors to X'fer 2048 bytes of + * data & 32 bytes of ECC data. + * 2. X'fer 64 bytes of Spare area from Memory to Flash. + * Read Operation Sequence for Large Block NAND + * ---------------------------------------------------------- + * 1. Steps(1-4) of Read Operations repeate for four times + * which generates 16 DMA descriptors to X'fer 2048 bytes of + * data & 32 bytes of ECC data. + * 2. X'fer 64 bytes of Spare area from Flash to Memory. + */ + + for (i = 0; i < size/256; i++) { + dmalist_cur = &dmalist[i * 2]; + dmalist_cur_ecc = &dmalist[(i * 2) + 1]; + + dmalist_cur->dma_src = (read ? (dmasrc) : (dmasrc + (i*256))); + dmalist_cur->dma_dest = (read ? (dmadst + (i*256)) : dmadst); + dmalist_cur->next_lli = lpc32xx_dmac_next_lli(dmalist_cur_ecc); + dmalist_cur->next_ctrl = ctrl; + + dmalist_cur_ecc->dma_src = + base + offsetof(struct lpc32xx_nand_slc_regs, ecc); + dmalist_cur_ecc->dma_dest = (u32)&ecc_buffer[i]; + dmalist_cur_ecc->next_lli = + lpc32xx_dmac_next_lli(&dmalist[(i * 2) + 2]); + dmalist_cur_ecc->next_ctrl = ecc_ctrl; + } + + if (i) { /* Data only transfer */ + dmalist_cur_ecc = &dmalist[(i * 2) - 1]; + dmalist_cur_ecc->next_lli = 0; + dmalist_cur_ecc->next_ctrl |= DMAC_CHAN_INT_TC_EN; + return; + } + + /* OOB only transfer */ + if (read) { + dmasrc = base + offsetof(struct lpc32xx_nand_slc_regs, + dma_data); + dmadst = (u32)buffer; + oob_ctrl |= DMAC_CHAN_DEST_AUTOINC; + } else { + dmadst = base + offsetof(struct lpc32xx_nand_slc_regs, + dma_data); + dmasrc = (u32)buffer; + oob_ctrl |= DMAC_CHAN_SRC_AUTOINC; + } + + /* Read/ Write Spare Area Data To/From Flash */ + dmalist_cur = &dmalist[i * 2]; + dmalist_cur->dma_src = dmasrc; + dmalist_cur->dma_dest = dmadst; + dmalist_cur->next_lli = 0; + dmalist_cur->next_ctrl = (oob_ctrl | DMAC_CHAN_INT_TC_EN); } -static uint8_t lpc32xx_read_byte(struct mtd_info *mtd) +static void lpc32xx_nand_xfer(struct mtd_info *mtd, const u8 *buf, + int len, int read) { - return readl(&lpc32xx_nand_slc_regs->data); + struct nand_chip *chip = mtd->priv; + u32 config; + + /* DMA Channel Configuration */ + config = (read ? DMAC_CHAN_FLOW_D_P2M : DMAC_CHAN_FLOW_D_M2P) | + (read ? DMAC_DEST_PERIP(0) : DMAC_DEST_PERIP(DMA_PERID_NAND1)) | + (read ? DMAC_SRC_PERIP(DMA_PERID_NAND1) : DMAC_SRC_PERIP(0)) | + DMAC_CHAN_ENABLE; + + /* Prepare DMA descriptors */ + lpc32xx_nand_dma_configure(chip, buf, len, read); + + /* Setup SLC controller and start transfer */ + if (read) + setbits_le32(&lpc32xx_nand_slc_regs->cfg, SLCCFG_DMA_DIR); + else /* NAND_ECC_WRITE */ + clrbits_le32(&lpc32xx_nand_slc_regs->cfg, SLCCFG_DMA_DIR); + setbits_le32(&lpc32xx_nand_slc_regs->cfg, SLCCFG_DMA_BURST); + + /* Write length for new transfers */ + if (!((readl(&lpc32xx_nand_slc_regs->stat) & SLCSTAT_DMA_FIFO) | + readl(&lpc32xx_nand_slc_regs->tc))) { + int tmp = (len != mtd->oobsize) ? mtd->oobsize : 0; + writel(len + tmp, &lpc32xx_nand_slc_regs->tc); + } + + setbits_le32(&lpc32xx_nand_slc_regs->ctrl, SLCCTRL_DMA_START); + + /* Start DMA transfers */ + lpc32xx_dma_start_xfer(dmachan, dmalist, config); + + /* Wait for NAND to be ready */ + while (!lpc32xx_nand_dev_ready(mtd)) + ; + + /* Wait till DMA transfer is DONE */ + if (lpc32xx_dma_wait_status(dmachan)) + pr_err("NAND DMA transfer error!\r\n"); + + /* Stop DMA & HW ECC */ + clrbits_le32(&lpc32xx_nand_slc_regs->ctrl, SLCCTRL_DMA_START); + clrbits_le32(&lpc32xx_nand_slc_regs->cfg, + SLCCFG_DMA_DIR | SLCCFG_DMA_BURST | + SLCCFG_ECC_EN | SLCCFG_DMA_ECC); +} + +static u32 slc_ecc_copy_to_buffer(u8 *spare, const u32 *ecc, int count) +{ + int i; + for (i = 0; i < (count * 3); i += 3) { + u32 ce = ecc[i/3]; + ce = ~(ce << 2) & 0xFFFFFF; + spare[i+2] = (u8)(ce & 0xFF); ce >>= 8; + spare[i+1] = (u8)(ce & 0xFF); ce >>= 8; + spare[i] = (u8)(ce & 0xFF); + } + return 0; +} + +static int lpc32xx_ecc_calculate(struct mtd_info *mtd, const uint8_t *dat, + uint8_t *ecc_code) +{ + return slc_ecc_copy_to_buffer(ecc_code, ecc_buffer, + CONFIG_SYS_NAND_ECCSIZE + == NAND_LARGE_BLOCK_PAGE_SIZE ? 8 : 2); +} + +/* + * Enables and prepares SLC NAND controller + * for doing data transfers with H/W ECC enabled. + */ +static void lpc32xx_hwecc_enable(struct mtd_info *mtd, int mode) +{ + /* Clear ECC */ + writel(SLCCTRL_ECC_CLEAR, &lpc32xx_nand_slc_regs->ctrl); + + /* Setup SLC controller for H/W ECC operations */ + setbits_le32(&lpc32xx_nand_slc_regs->cfg, + SLCCFG_ECC_EN | SLCCFG_DMA_ECC); +} + +/* + * lpc32xx_correct_data - [NAND Interface] Detect and correct bit error(s) + * mtd: MTD block structure + * dat: raw data read from the chip + * read_ecc: ECC from the chip + * calc_ecc: the ECC calculated from raw data + * + * Detect and correct a 1 bit error for 256 byte block + */ +int lpc32xx_correct_data(struct mtd_info *mtd, u_char *dat, + u_char *read_ecc, u_char *calc_ecc) +{ + u8 i, nb_ecc256; + int ret1, ret2 = 0; + u_char *r = read_ecc; + u_char *c = calc_ecc; + u16 data_offset = 0; + + nb_ecc256 = (CONFIG_SYS_NAND_ECCSIZE == NAND_LARGE_BLOCK_PAGE_SIZE + ? 8 : 2); + + for (i = 0 ; i < nb_ecc256 ; i++ , r += 3, c += 3, data_offset += 256) { + ret1 = nand_correct_data(mtd, dat + data_offset, r, c); + + if (ret1 < 0) + return -EBADMSG; + else + ret2 += ret1; + } + + return ret2; +} + +static void lpc32xx_dma_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) +{ + lpc32xx_nand_xfer(mtd, buf, len, 1); +} + +static void lpc32xx_dma_write_buf(struct mtd_info *mtd, const uint8_t *buf, + int len) +{ + lpc32xx_nand_xfer(mtd, buf, len, 0); +} +#else +static void lpc32xx_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) +{ + while (len-- > 0) + *buf++ = readl(&lpc32xx_nand_slc_regs->data); } static void lpc32xx_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) @@ -124,6 +458,12 @@ static void lpc32xx_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) while (len-- > 0) writel(*buf++, &lpc32xx_nand_slc_regs->data); } +#endif + +static uint8_t lpc32xx_read_byte(struct mtd_info *mtd) +{ + return readl(&lpc32xx_nand_slc_regs->data); +} static void lpc32xx_write_byte(struct mtd_info *mtd, uint8_t byte) { @@ -137,9 +477,45 @@ static void lpc32xx_write_byte(struct mtd_info *mtd, uint8_t byte) */ int board_nand_init(struct nand_chip *lpc32xx_chip) { +#if defined(CONFIG_DMA_LPC32XX) + /* Acquire a channel for our use */ + dmachan = lpc32xx_dma_get_channel(); + if (unlikely(dmachan < 0)) { + pr_info("Unable to get free DMA channel for NAND transfers\n"); + return -1; + } +#endif + lpc32xx_chip->cmd_ctrl = lpc32xx_nand_cmd_ctrl; lpc32xx_chip->dev_ready = lpc32xx_nand_dev_ready; +#if defined(CONFIG_DMA_LPC32XX) + /* + * Hardware ECC calculation is supported when + * DMA driver is selected. + */ + lpc32xx_chip->ecc.mode = NAND_ECC_HW; + + /* + * The implementation of these functions is quite common, but + * they MUST be defined, because access to data register + * is strictly 32-bit aligned. + */ + lpc32xx_chip->read_byte = lpc32xx_read_byte; + lpc32xx_chip->write_byte = lpc32xx_write_byte; + + lpc32xx_chip->read_buf = lpc32xx_dma_read_buf; + lpc32xx_chip->write_buf = lpc32xx_dma_write_buf; + + lpc32xx_chip->ecc.calculate = lpc32xx_ecc_calculate; + lpc32xx_chip->ecc.correct = lpc32xx_correct_data; + lpc32xx_chip->ecc.hwctl = lpc32xx_hwecc_enable; + lpc32xx_chip->chip_delay = 2000; + + lpc32xx_chip->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES; + lpc32xx_chip->ecc.size = CONFIG_SYS_NAND_ECCSIZE; + lpc32xx_chip->ecc.strength = 1; +#else /* * Hardware ECC calculation is not supported by the driver, * because it requires DMA support, see LPC32x0 User Manual, @@ -164,6 +540,7 @@ int board_nand_init(struct nand_chip *lpc32xx_chip) lpc32xx_chip->ecc.size = 256; lpc32xx_chip->ecc.bytes = 3; lpc32xx_chip->ecc.strength = 1; +#endif #if defined(CONFIG_SYS_NAND_USE_FLASH_BBT) lpc32xx_chip->bbt_options |= NAND_BBT_USE_FLASH; -- 1.8.3.1

2 1

[U-Boot] [PATCH 1/3][v2] imx: usb: ehci-mx6: reg accessor cleanups
by Adrian Alonso 05 Aug '15

05 Aug '15

Cleanup read/write register access, use clr/set bits_le32 Signed-off-by: Adrian Alonso <aalonso(a)freescale.com> --- Changes for V2: Split from patch imx: usb: ehci-mx6: add usb support for imx7d soc drivers/usb/host/ehci-mx6.c | 51 ++++++++++++++++----------------------------- 1 file changed, 18 insertions(+), 33 deletions(-) diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 951dd3b..0f94c8b 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -67,7 +67,7 @@ static void usb_internal_phy_clock_gate(int index, int on) phy_reg = (void __iomem *)phy_bases[index]; phy_reg += on ? USBPHY_CTRL_CLR : USBPHY_CTRL_SET; - __raw_writel(USBPHY_CTRL_CLKGATE, phy_reg); + writel(USBPHY_CTRL_CLKGATE, phy_reg); } static void usb_power_config(int index) @@ -100,14 +100,14 @@ static void usb_power_config(int index) * is totally controlled by IC, so the Software only needs * to enable them at initializtion. */ - __raw_writel(ANADIG_USB2_CHRG_DETECT_EN_B | + writel(ANADIG_USB2_CHRG_DETECT_EN_B | ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B, chrg_detect); - __raw_writel(ANADIG_USB2_PLL_480_CTRL_BYPASS, + writel(ANADIG_USB2_PLL_480_CTRL_BYPASS, pll_480_ctrl_clr); - __raw_writel(ANADIG_USB2_PLL_480_CTRL_ENABLE | + writel(ANADIG_USB2_PLL_480_CTRL_ENABLE | ANADIG_USB2_PLL_480_CTRL_POWER | ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS, pll_480_ctrl_set); @@ -119,7 +119,6 @@ static int usb_phy_enable(int index, struct usb_ehci *ehci) void __iomem *phy_reg; void __iomem *phy_ctrl; void __iomem *usb_cmd; - u32 val; if (index >= ARRAY_SIZE(phy_bases)) return 0; @@ -129,36 +128,27 @@ static int usb_phy_enable(int index, struct usb_ehci *ehci) usb_cmd = (void __iomem *)&ehci->usbcmd; /* Stop then Reset */ - val = __raw_readl(usb_cmd); - val &= ~UCMD_RUN_STOP; - __raw_writel(val, usb_cmd); - while (__raw_readl(usb_cmd) & UCMD_RUN_STOP) + clrbits_le32(usb_cmd, UCMD_RUN_STOP); + while (readl(usb_cmd) & UCMD_RUN_STOP) ; - val = __raw_readl(usb_cmd); - val |= UCMD_RESET; - __raw_writel(val, usb_cmd); - while (__raw_readl(usb_cmd) & UCMD_RESET) + setbits_le32(usb_cmd, UCMD_RESET); + while (readl(usb_cmd) & UCMD_RESET) ; /* Reset USBPHY module */ - val = __raw_readl(phy_ctrl); - val |= USBPHY_CTRL_SFTRST; - __raw_writel(val, phy_ctrl); + setbits_le32(phy_ctrl, USBPHY_CTRL_SFTRST); udelay(10); /* Remove CLKGATE and SFTRST */ - val = __raw_readl(phy_ctrl); - val &= ~(USBPHY_CTRL_CLKGATE | USBPHY_CTRL_SFTRST); - __raw_writel(val, phy_ctrl); + clrbits_le32(phy_ctrl, USBPHY_CTRL_CLKGATE | USBPHY_CTRL_SFTRST); udelay(10); /* Power up the PHY */ - __raw_writel(0, phy_reg + USBPHY_PWD); + writel(0, phy_reg + USBPHY_PWD); /* enable FS/LS device */ - val = __raw_readl(phy_ctrl); - val |= (USBPHY_CTRL_ENUTMILEVEL2 | USBPHY_CTRL_ENUTMILEVEL3); - __raw_writel(val, phy_ctrl); + setbits_le32(phy_ctrl, USBPHY_CTRL_ENUTMILEVEL2 | + USBPHY_CTRL_ENUTMILEVEL3); return 0; } @@ -177,20 +167,15 @@ static void usb_oc_config(int index) struct usbnc_regs *usbnc = (struct usbnc_regs *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET); void __iomem *ctrl = (void __iomem *)(&usbnc->ctrl[index]); - u32 val; - val = __raw_readl(ctrl); #if CONFIG_MACH_TYPE == MACH_TYPE_MX6Q_ARM2 /* mx6qarm2 seems to required a different setting*/ - val &= ~UCTRL_OVER_CUR_POL; + clrbits_le32(ctrl, UCTRL_OVER_CUR_POL); #else - val |= UCTRL_OVER_CUR_POL; + setbits_le32(ctrl, UCTRL_OVER_CUR_POL); #endif - __raw_writel(val, ctrl); - val = __raw_readl(ctrl); - val |= UCTRL_OVER_CUR_DIS; - __raw_writel(val, ctrl); + setbits_le32(ctrl, UCTRL_OVER_CUR_DIS); } int usb_phy_mode(int port) @@ -202,7 +187,7 @@ int usb_phy_mode(int port) phy_reg = (void __iomem *)phy_bases[port]; phy_ctrl = (void __iomem *)(phy_reg + USBPHY_CTRL); - val = __raw_readl(phy_ctrl); + val = readl(phy_ctrl); if (val & USBPHY_CTRL_OTG_ID) return USB_INIT_DEVICE; @@ -257,7 +242,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, if (type == USB_INIT_DEVICE) return 0; setbits_le32(&ehci->usbmode, CM_HOST); - __raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); + writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); setbits_le32(&ehci->portsc, USB_EN); mdelay(10); -- 2.1.4

2 5

[U-Boot] [PATCH] configs: Remove CONFIG_SERIAL_MULTI
by Stephen Warren 05 Aug '15

05 Aug '15

From: Stephen Warren <swarren(a)nvidia.com> This config option isn't used anywhere at all. Remove all places that define/enable the option. Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- include/configs/B4860QDS.h | 1 - include/configs/BSC9132QDS.h | 1 - include/configs/C29XPCIE.h | 1 - include/configs/T1040QDS.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/apalis_t30.h | 1 - include/configs/beaver.h | 1 - include/configs/cardhu.h | 1 - include/configs/colibri_t20.h | 1 - include/configs/colibri_t30.h | 1 - include/configs/dalmore.h | 1 - include/configs/jetson-tk1.h | 1 - include/configs/nyan-big.h | 1 - include/configs/siemens-am33x-common.h | 1 - include/configs/tec-ng.h | 1 - include/configs/venice2.h | 1 - 16 files changed, 16 deletions(-) diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index b396764ffaa4..2bac68d74476 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -496,7 +496,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) -#define CONFIG_SERIAL_MULTI /* Enable both serial ports */ #ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */ #endif diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index e5cd26797ccc..d2225144a2bb 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -418,7 +418,6 @@ combinations. this should be removed later #define CONFIG_NS16550_MIN_FUNCTIONS #endif -#define CONFIG_SERIAL_MULTI 1 /* Enable both serial ports */ #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */ #define CONFIG_SYS_BAUDRATE_TABLE \ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 235780973fca..bbdcc4cdc98e 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -388,7 +388,6 @@ #define CONFIG_NS16550_MIN_FUNCTIONS #endif -#define CONFIG_SERIAL_MULTI /* Enable both serial ports */ #define CONFIG_SYS_CONSOLE_IS_IN_ENV #define CONFIG_SYS_BAUDRATE_TABLE \ diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 0206e540632d..af7d9f805d5f 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -411,7 +411,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) -#define CONFIG_SERIAL_MULTI /* Enable both serial ports */ #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */ /* Use the HUSH parser */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 16d2e0e1c7d6..ab35ba21d7c7 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -438,7 +438,6 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) -#define CONFIG_SERIAL_MULTI /* Enable both serial ports */ #ifndef CONFIG_SPL_BUILD #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */ #endif diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index aba9ba621cc0..620ca02d7c2b 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -16,7 +16,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Toradex Apalis T30" /* Board-specific serial config */ -#define CONFIG_SERIAL_MULTI #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/beaver.h b/include/configs/beaver.h index c403729a8ea9..adc578a56df0 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -29,7 +29,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Beaver" /* Board-specific serial config */ -#define CONFIG_SERIAL_MULTI #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 96dfe07c0a0f..93c5f482720c 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -33,7 +33,6 @@ "fdtfile=tegra30-cardhu-a04.dtb\0" /* Board-specific serial config */ -#define CONFIG_SERIAL_MULTI #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 8228e4208b48..6d73f9d3f21a 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -14,7 +14,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Toradex Colibri T20" /* Board-specific serial config */ -#define CONFIG_SERIAL_MULTI #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_TEGRA_UARTA_SDIO1 #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index 46556680821a..1e94c34b030c 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -16,7 +16,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Toradex Colibri T30" /* Board-specific serial config */ -#define CONFIG_SERIAL_MULTI #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index 32fe9e854ad5..30aecca220cf 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -26,7 +26,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Dalmore" /* Board-specific serial config */ -#define CONFIG_SERIAL_MULTI #define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 59995043f6fb..55ef5f8cc6ca 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -20,7 +20,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1" /* Board-specific serial config */ -#define CONFIG_SERIAL_MULTI #define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index 4858dea2399f..eac24d39ea8d 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -17,7 +17,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Google/NVIDIA Nyan-big" /* Board-specific serial config */ -#define CONFIG_SERIAL_MULTI #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index f7bef706eb6d..dc9920b5b433 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -117,7 +117,6 @@ /* NS16550 Configuration */ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SERIAL_MULTI #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK (48000000) #define CONFIG_SYS_NS16550_COM1 0x44e09000 diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index fa651c1c98ec..08345cc1e091 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -15,7 +15,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten™ NG Evaluation Carrier" /* Board-specific serial config */ -#define CONFIG_SERIAL_MULTI #define CONFIG_TEGRA_ENABLE_UARTD #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/venice2.h b/include/configs/venice2.h index 0535a6b9072d..2c43f3ebede5 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -17,7 +17,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Venice2" /* Board-specific serial config */ -#define CONFIG_SERIAL_MULTI #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -- 1.9.1

2 1

[U-Boot] Please pull u-boot-x86
by Simon Glass 05 Aug '15

05 Aug '15

Hi Tom, This includes the EFI support, updates for baytrail and minnowmax, plus multi-cpu support for qemu-x86. There are a few small fixes also. The following changes since commit e22b1a54942d9003b10564325a34e3cf767556ce: Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq (2015-08-04 12:21:45 -0400) are available in the git repository at: git://git.denx.de/u-boot-x86.git for you to fetch changes up to 12c7510f17ff29190e52336910e43a50c0d620a6: x86: Document how to write PIRQ information in the device tree (2015-08-05 10:49:32 -0600) ---------------------------------------------------------------- Ben Stoltz (6): efi: Avoid using non-existent text base efi: Drop CONFIG_SYS_TEXT_BASE for EFI x86: Set up toolchain flags for running as EFI application x86: Add support for U-Boot as an EFI application x86: Add EFI board code x86: Add definitions for the x86-efi board and plumb it in Bin Meng (13): dm: pci: Allow scan bridge child devices before relocation doc: dm: Update pci-info.txt for pci support x86: qemu: Add MP initialization x86: Sanity test on vesa parameters before setting up kernel screen_info x86: minnowmax: Remove smsc47x superio codes x86: baytrail: Update UPD setting for FSP Gold4 release x86: Add microcode for BayTrail-I B0 stepping x86: Add Intel Bayley Bay board support x86: bayleybay: Configure PCI IRQ gitignore: Add defconfig and fdtgrep common: Print nothing in the __weak checkboard() pci: Remove DEBUG from pci_compat.c x86: Document how to write PIRQ information in the device tree Masahiro Yamada (1): lib: fdt: fix indent of #ifdef..#endif conditional Miao Yan (1): x86: Add a 'pause' instruction in __udelay() for QEMU target Peng Fan (1): common: command add '\n' for debug msg Simon Glass (50): Support removing default assembler flags dm: core: Check for empty list in uclass_find_device() dm: serial: Correct logic in serial_find_console_or_panic() elf: Add a few definitions for 64-bit relocation Allow objcopy to work without filling gaps with 0xff Bring in __aligned_u64 and friends to linux/types.h x86: Add various minor tidy-ups to the 32-bit startup code x86: Use CR0 constants in CPU init Reserve the top 16 flag bits for architecture-specific use x86: Tidy up global_data flags x86: Drop unused copy_fdt_to_ram() x86: Tidy up the 64-bit calling code x86: Add some missing global_data declarations in files that use gd x86: Tidy up a few minor issues with interrupts pci: Use debug() instead of DEBUGF() in pci_auto.c pci: Fix up code for CONFIG_PCI_ENUM_ONLY x86: Allow use of global_data with EFI efi: Add start-up library code efi: Display the correct initcall pre-relocation values pci: Add a constant for an invalid interrupt pci: Indicate prefetchable memory allocate when debugging dm: Add a return value comment to device_get_child() x86: Move Chrome OS options to defconfig x86: Move CONFIG_X86_SERIAL to Kconfig x86: Drop CONFIG_DCACHE_RAM_MRC_VAR_SIZE from header file x86: dts: Fix typo in intel,irq-router.txt x86: minnowmax: Drop the old PCI settings x86: Update README to explain booting Ubuntu on Minnowmax Add a way to skip relocation efi: Add a serial driver efi: Support building a u-boot-app.efi executable x86: Support skipping relocation for EFI x86: Add asm/elf.h for x86-specific ELF definitions x86: dts: Add a device tree file for EFI x86: Allow relocation code to build without text base x86: Add relocation and link script for a 64-bit EFI application efi: Add support for loading U-Boot through an EFI stub x86: Support building the EFI stub x86: Add an enum for some commonly-used GDT bits x86: Add a way to call 32-bit code from 64-bit mode efi: Add 64-bit payload support x86: Add support for passing tables into U-Boot efi: Add functions for decoding the EFI tables efi: Add a command to display the memory map x86: Handle running as EFI payload x86: Add helper code for running from EFI x86: baytrail: Support operation as an EFI payload x86: qemu: Support operation as an EFI payload x86: Gracefully disable the vesa driver when running from EFI efi: Add a README to explain how things work .gitignore | 1 + Kconfig | 1 + Makefile | 37 +- arch/x86/Kconfig | 10 + arch/x86/Makefile | 2 + arch/x86/config.mk | 47 +- arch/x86/cpu/Makefile | 7 + arch/x86/cpu/baytrail/Kconfig | 2 +- arch/x86/cpu/baytrail/cpu.c | 2 + arch/x86/cpu/baytrail/valleyview.c | 10 + arch/x86/cpu/call32.S | 64 ++ arch/x86/cpu/call64.S | 4 +- arch/x86/cpu/cpu.c | 23 +- arch/x86/cpu/efi/Makefile | 8 + arch/x86/cpu/efi/efi.c | 42 + arch/x86/cpu/efi/elf_ia32_efi.lds | 94 ++ arch/x86/cpu/efi/elf_x86_64_efi.lds | 83 ++ arch/x86/cpu/efi/sdram.c | 29 + arch/x86/cpu/interrupts.c | 25 +- arch/x86/cpu/mp_init.c | 2 + arch/x86/cpu/qemu/Makefile | 5 +- arch/x86/cpu/qemu/qemu.c | 2 + arch/x86/cpu/start.S | 73 +- arch/x86/dts/Makefile | 4 +- arch/x86/dts/bayleybay.dts | 197 ++++ arch/x86/dts/efi.dts | 22 + arch/x86/dts/microcode/m0230671117.dtsi | 4244 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/x86/dts/qemu-x86_i440fx.dts | 7 + arch/x86/dts/qemu-x86_q35.dts | 7 + arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h | 3 +- arch/x86/include/asm/arch-efi/gpio.h | 10 + arch/x86/include/asm/cpu.h | 27 + arch/x86/include/asm/elf.h | 46 + arch/x86/include/asm/fsp/fsp_hob.h | 59 +- arch/x86/include/asm/global_data.h | 16 +- arch/x86/include/asm/relocate.h | 1 - arch/x86/include/asm/types.h | 5 +- arch/x86/lib/Makefile | 3 +- arch/x86/lib/asm-offsets.c | 1 + arch/x86/lib/bootm.c | 7 + arch/x86/lib/efi/Kconfig | 11 + arch/x86/lib/efi/Makefile | 27 + arch/x86/lib/efi/car.S | 10 + arch/x86/lib/efi/crt0-efi-ia32.S | 52 + arch/x86/lib/efi/crt0-efi-x86_64.S | 51 + arch/x86/lib/efi/efi.c | 151 +++ arch/x86/lib/efi/reloc_ia32.c | 72 ++ arch/x86/lib/efi/reloc_x86_64.c | 66 ++ arch/x86/lib/fsp/fsp_common.c | 2 + arch/x86/lib/lpc-uclass.c | 2 + arch/x86/lib/pch-uclass.c | 2 + arch/x86/lib/relocate.c | 41 +- arch/x86/lib/tsc_timer.c | 8 + board/efi/Kconfig | 19 + board/efi/efi-x86/Kconfig | 15 + board/efi/efi-x86/MAINTAINERS | 6 + board/efi/efi-x86/Makefile | 7 + board/efi/efi-x86/efi.c | 18 + board/emulation/qemu-x86/Kconfig | 5 +- board/intel/Kconfig | 9 + board/intel/bayleybay/Kconfig | 27 + board/intel/bayleybay/MAINTAINERS | 6 + board/intel/bayleybay/Makefile | 7 + board/intel/bayleybay/bayleybay.c | 19 + board/intel/bayleybay/start.S | 9 + board/intel/minnowmax/Kconfig | 5 +- board/intel/minnowmax/minnowmax.c | 12 - common/Makefile | 1 + common/board_f.c | 16 +- common/board_info.c | 1 - common/cmd_efi.c | 257 +++++ common/command.c | 2 +- config.mk | 2 - configs/bayleybay_defconfig | 27 + configs/chromebook_link_defconfig | 3 + configs/chromebox_panther_defconfig | 3 + configs/efi-x86_defconfig | 16 + configs/qemu-x86_defconfig | 2 + doc/README.efi | 237 +++++ doc/README.x86 | 324 ++++++ doc/device-tree-bindings/misc/intel,irq-router.txt | 4 +- doc/driver-model/pci-info.txt | 6 +- drivers/core/uclass.c | 2 + drivers/gpio/intel_ich6_gpio.c | 2 + drivers/pci/pci-uclass.c | 4 - drivers/pci/pci.c | 3 +- drivers/pci/pci_auto.c | 53 +- drivers/pci/pci_compat.c | 1 - drivers/pci/pci_rom.c | 4 + drivers/serial/Kconfig | 19 + drivers/serial/Makefile | 1 + drivers/serial/serial-uclass.c | 2 +- drivers/serial/serial_efi.c | 157 +++ drivers/video/vesa_fb.c | 8 + include/asm-generic/global_data.h | 3 +- include/common.h | 7 + include/configs/bayleybay.h | 44 + include/configs/crownbay.h | 1 - include/configs/efi-x86.h | 34 + include/configs/galileo.h | 2 - include/configs/minnowmax.h | 14 - include/configs/qemu-x86.h | 2 - include/configs/x86-chromebook.h | 6 - include/dm/device.h | 4 +- include/efi.h | 367 +++++++ include/efi_api.h | 244 +++++ include/elf.h | 26 + include/linux/types.h | 6 +- include/part_efi.h | 9 +- include/pci.h | 2 + lib/Kconfig | 2 + lib/Makefile | 1 + lib/efi/Kconfig | 54 + lib/efi/Makefile | 17 + lib/efi/efi.c | 101 ++ lib/efi/efi_app.c | 139 +++ lib/efi/efi_info.c | 47 + lib/efi/efi_stub.c | 370 +++++++ lib/fdtdec.c | 2 +- lib/initcall.c | 4 + scripts/Makefile.lib | 3 +- tools/.gitignore | 1 + 122 files changed, 8325 insertions(+), 235 deletions(-) create mode 100644 arch/x86/cpu/call32.S create mode 100644 arch/x86/cpu/efi/Makefile create mode 100644 arch/x86/cpu/efi/efi.c create mode 100644 arch/x86/cpu/efi/elf_ia32_efi.lds create mode 100644 arch/x86/cpu/efi/elf_x86_64_efi.lds create mode 100644 arch/x86/cpu/efi/sdram.c create mode 100644 arch/x86/dts/bayleybay.dts create mode 100644 arch/x86/dts/efi.dts create mode 100644 arch/x86/dts/microcode/m0230671117.dtsi create mode 100644 arch/x86/include/asm/arch-efi/gpio.h create mode 100644 arch/x86/include/asm/elf.h create mode 100644 arch/x86/lib/efi/Kconfig create mode 100644 arch/x86/lib/efi/Makefile create mode 100644 arch/x86/lib/efi/car.S create mode 100644 arch/x86/lib/efi/crt0-efi-ia32.S create mode 100644 arch/x86/lib/efi/crt0-efi-x86_64.S create mode 100644 arch/x86/lib/efi/efi.c create mode 100644 arch/x86/lib/efi/reloc_ia32.c create mode 100644 arch/x86/lib/efi/reloc_x86_64.c create mode 100644 board/efi/Kconfig create mode 100644 board/efi/efi-x86/Kconfig create mode 100644 board/efi/efi-x86/MAINTAINERS create mode 100644 board/efi/efi-x86/Makefile create mode 100644 board/efi/efi-x86/efi.c create mode 100644 board/intel/bayleybay/Kconfig create mode 100644 board/intel/bayleybay/MAINTAINERS create mode 100644 board/intel/bayleybay/Makefile create mode 100644 board/intel/bayleybay/bayleybay.c create mode 100644 board/intel/bayleybay/start.S create mode 100644 common/cmd_efi.c create mode 100644 configs/bayleybay_defconfig create mode 100644 configs/efi-x86_defconfig create mode 100644 doc/README.efi create mode 100644 drivers/serial/serial_efi.c create mode 100644 include/configs/bayleybay.h create mode 100644 include/configs/efi-x86.h create mode 100644 include/efi.h create mode 100644 include/efi_api.h create mode 100644 lib/efi/Kconfig create mode 100644 lib/efi/Makefile create mode 100644 lib/efi/efi.c create mode 100644 lib/efi/efi_app.c create mode 100644 lib/efi/efi_info.c create mode 100644 lib/efi/efi_stub.c Regards, Simon

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[U-Boot] [PULL] u-boot-usb/master
by Marek Vasut 05 Aug '15

05 Aug '15

The following changes since commit e22b1a54942d9003b10564325a34e3cf767556ce: Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq (2015-08-04 12:21:45 -0400) are available in the git repository at: git://git.denx.de/u-boot-usb.git HEAD for you to fetch changes up to dcc7dbc73169bb4e39f27c1d95bbf031ccfc1744: usb: Fix device detection code (2015-08-05 17:22:43 +0200) ---------------------------------------------------------------- Hans de Goede (1): sunxi: Drop our own copy of the USB_KEYBOARD options Marcel Ziswiler (1): net: asix: fix operation without eeprom Marek Vasut (1): usb: Fix device detection code Maxime Ripard (1): musb: sunxi: Force EP0 on re-enable Paul Kocialkowski (8): usb: USB_ARCH_HAS_HCD Kconfig option removal usb: Generic USB Kconfig option, that fits both host and gadget and comments usb: musb-new: CONFIG_MUSB prefix replacement with CONFIG_USB_MUSB usb: musb-new: Kconfig support for USB_MUSB_HOST and USB_MUSB_GADGET sunxi: usb: USB_MUSB_SUNXI move to musb-new Kconfig sunxi: config update to stick with Kconfig changes sunxi: MUSB gadget config provisions, with fastboot and USB mass storage support usb: USB storage-specific part ifdef in uclass Peter Griffin (1): usb: dwc2: Call board_usb_init() from usb_lowlevel_init() arch/arm/Kconfig | 1 + arch/arm/cpu/armv7/am33xx/board.c | 2 +- arch/arm/include/asm/arch-sunxi/usb_phy.h | 2 +- board/birdland/bav335x/board.c | 2 +- board/compulab/cm_t3517/cm_t3517.c | 6 +++--- board/logicpd/am3517evm/am3517evm.c | 8 ++++---- board/phytec/pcm051/board.c | 2 +- board/siemens/draco/board.c | 2 +- board/siemens/pxm2/board.c | 2 +- board/siemens/rut/board.c | 2 +- board/sunxi/Kconfig | 16 ---------------- board/ti/am335x/board.c | 2 +- board/ti/beagle/beagle.c | 8 ++++---- board/vscom/baltos/board.c | 2 +- common/usb_hub.c | 10 +++++++--- configs/Ainol_AW1_defconfig | 2 +- configs/Ampe_A76_defconfig | 2 +- configs/CSQ_CS908_defconfig | 2 +- configs/Chuwi_V7_CW0825_defconfig | 2 +- configs/Et_q8_v1_6_defconfig | 2 +- configs/Hyundai_A7HD_defconfig | 2 +- configs/Ippo_q8h_v1_2_a33_1024x600_defconfig | 2 +- configs/Ippo_q8h_v1_2_defconfig | 2 +- configs/Ippo_q8h_v5_defconfig | 2 +- configs/MSI_Primo81_defconfig | 2 +- configs/Mele_A1000G_quad_defconfig | 2 +- configs/Mini-X_defconfig | 2 +- configs/TZX-Q8-713B7_defconfig | 2 +- configs/UTOO_P66_defconfig | 2 +- configs/Yones_Toptech_BD1078_defconfig | 2 +- configs/ba10_tv_box_defconfig | 2 +- configs/forfun_q88db_defconfig | 2 +- configs/ga10h_v1_1_defconfig | 2 +- configs/iNet_3F_defconfig | 2 +- configs/iNet_3W_defconfig | 2 +- configs/iNet_86VS_defconfig | 2 +- drivers/usb/Kconfig | 20 ++++++++++---------- drivers/usb/eth/asix.c | 40 ++++++++++++++++++++++++++++++++++------ drivers/usb/gadget/gadget_chips.h | 2 +- drivers/usb/host/dwc2.c | 4 ++++ drivers/usb/host/usb-uclass.c | 2 ++ drivers/usb/musb-new/Kconfig | 28 ++++++++++++++++++++++++++++ drivers/usb/musb-new/Makefile | 6 +++--- drivers/usb/musb-new/musb_core.c | 12 ++++++------ drivers/usb/musb-new/musb_core.h | 4 ++-- drivers/usb/musb-new/musb_dma.h | 2 +- drivers/usb/musb-new/musb_gadget.c | 4 ++-- drivers/usb/musb-new/musb_uboot.c | 12 ++++++------ drivers/usb/musb-new/sunxi.c | 9 ++++++--- drivers/usb/musb/Makefile | 4 ++-- drivers/usb/musb/musb_core.c | 8 ++++---- drivers/usb/musb/musb_hcd.c | 6 +++--- drivers/usb/musb/musb_hcd.h | 4 ++-- include/configs/am335x_evm.h | 16 ++++++++-------- include/configs/am3517_crane.h | 14 +++++++------- include/configs/am3517_evm.h | 16 ++++++++-------- include/configs/baltos.h | 16 ++++++++-------- include/configs/bav335x.h | 16 ++++++++-------- include/configs/bf526-ezbrd.h | 4 ++-- include/configs/bf527-ezkit.h | 4 ++-- include/configs/bf548-ezkit.h | 4 ++-- include/configs/cam_enc_4xx.h | 2 +- include/configs/cm_t35.h | 2 +- include/configs/cm_t3517.h | 4 ++-- include/configs/da830evm.h | 10 +++++----- include/configs/davinci_dm355evm.h | 4 ++-- include/configs/davinci_dm365evm.h | 10 +++++----- include/configs/davinci_dvevm.h | 4 ++-- include/configs/kwb.h | 10 +++++----- include/configs/nokia_rx51.h | 4 ++-- include/configs/omap3_beagle.h | 4 ++-- include/configs/omap3_evm.h | 8 ++++---- include/configs/omap3_evm_common.h | 8 ++++---- include/configs/omap3_igep00x0.h | 2 +- include/configs/omap3_mvblx.h | 2 +- include/configs/omap3_zoom1.h | 2 +- include/configs/pcm051.h | 12 ++++++------ include/configs/pengwyn.h | 12 ++++++------ include/configs/siemens-am33x-common.h | 14 +++++++------- include/configs/sunxi-common.h | 37 +++++++++++++++++++++++++++++++++---- include/configs/ti_omap4_common.h | 2 +- include/configs/tseries.h | 10 +++++----- include/usb.h | 4 ++-- 83 files changed, 308 insertions(+), 225 deletions(-) create mode 100644 drivers/usb/musb-new/Kconfig

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