August 2015 - U-Boot

[U-Boot] [PATCH 0/5] arm: tegra: apalis/colibri_t30: video: add display driver
by Marcel Ziswiler 23 Aug '15

23 Aug '15

On popular request this series integrates the display driver from T20 to work on T30 as well and enables it for our Apalis/Colibri T30 computer/system on modules. Enjoy. Marcel Ziswiler (5): arm: tegra20: video: rename display header ifdef gating arm: tegra20: video: ifdef gate hard-coded ugly Tegra20 pin muxing arm: tegra30: video: integrate display driver for t30 colibri_t30: enable display driver apalis_t30: enable display driver arch/arm/dts/tegra30-apalis.dts | 29 ++ arch/arm/dts/tegra30-colibri.dts | 29 ++ arch/arm/dts/tegra30.dtsi | 104 ++++++ arch/arm/include/asm/arch-tegra20/display.h | 6 +- arch/arm/include/asm/arch-tegra30/display.h | 13 + arch/arm/include/asm/arch-tegra30/pwm.h | 14 + arch/arm/mach-tegra/tegra30/Makefile | 6 +- arch/arm/mach-tegra/tegra30/display.c | 394 +++++++++++++++++++++ .../toradex/apalis_t30/pinmux-config-apalis_t30.h | 9 +- .../colibri_t30/pinmux-config-colibri_t30.h | 8 +- drivers/video/tegra.c | 2 + include/configs/apalis_t30.h | 10 + include/configs/colibri_t30.h | 10 + include/configs/tegra30-common.h | 3 + 14 files changed, 625 insertions(+), 12 deletions(-) create mode 100644 arch/arm/include/asm/arch-tegra30/display.h create mode 100644 arch/arm/include/asm/arch-tegra30/pwm.h create mode 100644 arch/arm/mach-tegra/tegra30/display.c -- 2.4.3

3 10

[U-Boot] [PATCH v2 1/7] x86: superio: Add keyboard controller support to smsc_lpc47m driver
by Bin Meng 23 Aug '15

23 Aug '15

Add an api to enable and configure the integrated keyboard controller on SMSC LPC47m superio chipset. It also adds several macros to help future extension. Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- Changes in v2: - Change parameter type to uint arch/x86/include/asm/ibmpc.h | 3 +++ drivers/misc/smsc_lpc47m.c | 13 ++++++++++++- include/smsc_lpc47m.h | 29 +++++++++++++++++++++++++---- 3 files changed, 40 insertions(+), 5 deletions(-) diff --git a/arch/x86/include/asm/ibmpc.h b/arch/x86/include/asm/ibmpc.h index 678cde4..1e9058c 100644 --- a/arch/x86/include/asm/ibmpc.h +++ b/arch/x86/include/asm/ibmpc.h @@ -24,4 +24,7 @@ #define UART0_IRQ 4 #define UART1_IRQ 3 +#define KBD_IRQ 1 +#define MSE_IRQ 12 + #endif diff --git a/drivers/misc/smsc_lpc47m.c b/drivers/misc/smsc_lpc47m.c index 1e50d5b..fcce3a4 100644 --- a/drivers/misc/smsc_lpc47m.c +++ b/drivers/misc/smsc_lpc47m.c @@ -22,7 +22,7 @@ static void pnp_exit_conf_state(u16 dev) outb(0xaa, port); } -void lpc47m_enable_serial(u16 dev, u16 iobase, u8 irq) +void lpc47m_enable_serial(uint dev, uint iobase, uint irq) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); @@ -32,3 +32,14 @@ void lpc47m_enable_serial(u16 dev, u16 iobase, u8 irq) pnp_set_enable(dev, 1); pnp_exit_conf_state(dev); } + +void lpc47m_enable_kbc(uint dev, uint irq0, uint irq1) +{ + pnp_enter_conf_state(dev); + pnp_set_logical_device(dev); + pnp_set_enable(dev, 0); + pnp_set_irq(dev, PNP_IDX_IRQ0, irq0); + pnp_set_irq(dev, PNP_IDX_IRQ1, irq1); + pnp_set_enable(dev, 1); + pnp_exit_conf_state(dev); +} diff --git a/include/smsc_lpc47m.h b/include/smsc_lpc47m.h index 32b069d..419643f 100644 --- a/include/smsc_lpc47m.h +++ b/include/smsc_lpc47m.h @@ -7,14 +7,35 @@ #ifndef _SMSC_LPC47M_H_ #define _SMSC_LPC47M_H_ +/* I/O address of LPC47M */ +#define LPC47M_IO_PORT 0x2e + +/* Logical device number */ +#define LPC47M_FDC 0 /* Floppy */ +#define LPC47M_SP2 2 /* Serial Port 2 */ +#define LPC47M_PP 3 /* Parallel Port */ +#define LPC47M_SP1 4 /* Serial Port 1 */ +#define LPC47M_KBC 7 /* Keyboard & Mouse */ +#define LPC47M_PME 10 /* Power Control */ + /** * Configure the base I/O port of the specified serial device and enable the * serial device. * - * @dev: High 8 bits = Super I/O port, low 8 bits = logical device number. - * @iobase: Processor I/O port address to assign to this serial device. - * @irq: Processor IRQ number to assign to this serial device. + * @dev: high 8 bits = super I/O port, low 8 bits = logical device number + * @iobase: processor I/O port address to assign to this serial device + * @irq: processor IRQ number to assign to this serial device + */ +void lpc47m_enable_serial(uint dev, uint iobase, uint irq); + +/** + * Configure the specified keyboard controller device and enable the keyboard + * controller device. + * + * @dev: high 8 bits = Super I/O port, low 8 bits = logical device number + * @irq0: processor IRQ number to assign to keyboard + * @irq1: processor IRQ number to assign to mouse */ -void lpc47m_enable_serial(u16 dev, u16 iobase, u8 irq); +void lpc47m_enable_kbc(uint dev, uint irq0, uint irq1); #endif /* _SMSC_LPC47M_H_ */ -- 1.8.2.1

2 14

[U-Boot] [PATCH v2 00/12] x86: dm: pci: Support pci uart devices with driver model
by Bin Meng 23 Aug '15

23 Aug '15

This is the 2nd attempt to support pci uart devices with driver model. The v1 patch series is at [1]. Instead of creating a pci-specific device driver for ns16550 in v1, this v2 patch supports binding pci devices using device tree. As previously mentioned in the ML, we should call fsp_notify() immediately after pci bus enumeration. Unfortunately with driver model, we have to put this call inside the pci_uclass_post_probe(). With this series, pci uart now works on Intel Crown Bay with driver model. [1]: http://lists.denx.de/pipermail/u-boot/2015-August/223876.html Changes in v2: - Drop the following v1 patches: - dm: pci: Only allow serial device to be bound before relocation - drivers: serial: Add ns16550 compatible pci uart driver - drivers: serial: Remove special handling for pci uart in the ns16550 driver - x86: crownbay: Support Topcliff integrated pci uart devices - x86: queensbay: Call fsp_init_phase_pci() again - Add some comments in x86_fsp_init() for malloc() adjustment Bin Meng (12): dm: pci: Support selected device/driver binding before relocation x86: fsp: Delay x86_fsp_init() call a little bit x86: fsp: Enlarge the size of malloc() pool before relocation x86: fsp: Add comments about U-Boot entering start.S twice x86: queensbay: Move unprotect_spi_flash() to arch_misc_init() x86: baytrail: Remove the fsp_init_phase_pci() call x86: fsp: Call fsp_init_phase_pci() in pci_uclass_post_probe() dm: pci: Remove the unnecessary pci_bus_find_devfn() in pci_bind_bus_devices() fdtdec: Fix possible infinite loop in fdtdec_get_pci_vendev() dm: pci: Save devfn without bus number in pci_uclass_child_post_bind() dm: pci: Really support binding pci device in the device tree dm: pci: Document binding of pci device drivers arch/x86/Kconfig | 9 +- arch/x86/cpu/baytrail/valleyview.c | 8 +- arch/x86/cpu/queensbay/tnc.c | 4 +- arch/x86/cpu/start.S | 14 ++- arch/x86/lib/fsp/fsp_car.S | 2 +- arch/x86/lib/fsp/fsp_common.c | 16 ++- common/board_f.c | 6 +- doc/driver-model/pci-info.txt | 25 ++++- drivers/pci/pci-uclass.c | 204 ++++++++++++++++++++++++++++++------- include/pci.h | 11 ++ lib/fdtdec.c | 3 +- 11 files changed, 246 insertions(+), 56 deletions(-) -- 1.8.2.1

2 30

[U-Boot] [UBOOT PATCH v6 0/3] Add ACPI table support
by Saket Sinha 23 Aug '15

23 Aug '15

ACPI(Advanced Configuration and Power Interface), is a Power Management and configuration standard allowing the operating system to control the amount of power each device is given (allowing it to put certain devices on standby or power-off for example). It is also used to control and/or check thermal zones (temperature sensors, fan speeds, etc), battery levels, PCI IRQ routing, CPUs, NUMA domains and many other things. This series adds ACPI support to QEMU targets. Currently, the Linux kernel graphics console does not work with this series. Changes in v6: - Incoporated Bin's review comments. Saket Sinha (3): x86: Generate a valid ACPI table x86: Add ACPI table support to QEMU x86: Add DSDT table for supporting ACPI on QEMU arch/x86/Kconfig | 9 + arch/x86/cpu/qemu/Makefile | 1 + arch/x86/cpu/qemu/acpi.c | 179 ++++++++++++++ arch/x86/cpu/qemu/acpi/cpu-hotplug.asl | 80 ++++++ arch/x86/cpu/qemu/acpi/dbug.asl | 25 ++ arch/x86/cpu/qemu/acpi/hpet.asl | 31 +++ arch/x86/cpu/qemu/acpi/isa.asl | 102 ++++++++ arch/x86/cpu/qemu/acpi/pci-crs.asl | 61 +++++ arch/x86/cpu/qemu/dsdt.asl | 412 +++++++++++++++++++++++++++++++ arch/x86/include/asm/acpi_table.h | 390 +++++++++++++++++++++++++++++ arch/x86/lib/Makefile | 1 + arch/x86/lib/acpi_table.c | 436 +++++++++++++++++++++++++++++++++ arch/x86/lib/tables.c | 5 + scripts/Makefile.lib | 11 + 14 files changed, 1743 insertions(+) create mode 100644 arch/x86/cpu/qemu/acpi.c create mode 100644 arch/x86/cpu/qemu/acpi/cpu-hotplug.asl create mode 100644 arch/x86/cpu/qemu/acpi/dbug.asl create mode 100644 arch/x86/cpu/qemu/acpi/hpet.asl create mode 100644 arch/x86/cpu/qemu/acpi/isa.asl create mode 100644 arch/x86/cpu/qemu/acpi/pci-crs.asl create mode 100644 arch/x86/cpu/qemu/dsdt.asl create mode 100644 arch/x86/include/asm/acpi_table.h create mode 100644 arch/x86/lib/acpi_table.c -- 2.1.4

3 12

[U-Boot] [PATCH] arm: mxs: fix mac address of second interface
by Michael Heimpold 23 Aug '15

23 Aug '15

In the rare case that an overflow occurs, propagate it. Signed-off-by: Michael Heimpold <mhei(a)heimpold.de> Cc: Stefano Babic <sbabic(a)denx.de> Cc: Marek Vasut <marex(a)denx.de> CC: Fabio Estevam <fabio.estevam(a)freescale.com> --- arch/arm/cpu/arm926ejs/mxs/mxs.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c index b1d8721..42057ad 100644 --- a/arch/arm/cpu/arm926ejs/mxs/mxs.c +++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c @@ -238,11 +238,19 @@ int cpu_eth_init(bd_t *bis) __weak void mx28_adjust_mac(int dev_id, unsigned char *mac) { + uint32_t data; + mac[0] = 0x00; mac[1] = 0x04; /* Use FSL vendor MAC address by default */ - if (dev_id == 1) /* Let MAC1 be MAC0 + 1 by default */ - mac[5] += 1; + if (dev_id == 1) { /* Let MAC1 be MAC0 + 1 by default */ + data = (mac[3] << 16) | (mac[4] << 8) | mac[5]; + data++; + + mac[3] = (data >> 16) & 0xff; + mac[4] = (data >> 8) & 0xff; + mac[5] = data & 0xff; + } } #ifdef CONFIG_MX28_FEC_MAC_IN_OCOTP -- 1.7.10.4

3 5

[U-Boot] [PATCH V2 1/5] imx: add cpu type for i.MX2 and i.MX3
by Peng Fan 23 Aug '15

23 Aug '15

Add cpu types for i.MX2/3. Signed-off-by: Peng Fan <Peng.Fan(a)freescale.com> Cc: Stefano Babic <sbabic(a)denx.de> Reviewed-by: Stefano Babic <sbabic(a)denx.de> --- Changes v2: Add mx27 cpu type. arch/arm/include/asm/arch-imx/cpu.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index c7f9fff..be13b96 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -4,6 +4,12 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#define MXC_CPU_MX23 0x23 +#define MXC_CPU_MX25 0x25 +#define MXC_CPU_MX27 0x27 +#define MXC_CPU_MX28 0x28 +#define MXC_CPU_MX31 0x31 +#define MXC_CPU_MX35 0x35 #define MXC_CPU_MX51 0x51 #define MXC_CPU_MX53 0x53 #define MXC_CPU_MX6SL 0x60 -- 1.8.4

2 9

[U-Boot] [PATCH v3 0/9] dfu: tftp: update: Support for DFU upgrades via ETH (TFTP)
by Lukasz Majewski 22 Aug '15

22 Aug '15

This commit series enables DFU subsystem to use ETH and TFTP protocol as a medium for downloading data, which should bring substantial speedup for writing large files (like rootfs). Please read provided ./doc/README.dfutftp documentation entry for more information. Those patches should be applied on the u-boot/master branch: SHA1: 0741701acf00749672f75f4c196dabd8b235f741 Lukasz Majewski (9): doc: dfu: tftp: README entry for TFTP extension of DFU net: tftp: Move tftp.h file from ./net to ./include/net tftp: update: Allow some parts of the code to be reused when CONFIG_SYS_NO_FLASH is set dfu: tftp: update: Provide tftp support for the DFU subsystem dfu: tftp: update: Add dfu_write_from_mem_addr() function update: tftp: dfu: Extend update_tftp() function to support DFU dfu: command: Extend "dfu" command to handle receiving data via TFTP dfu: tftp: Kconfig: Add Kconfig entry for dfu tftp feature dfu: tftp: Kconfig: Enable DFU_TFTP support on the am335x_boneblack_defconfig common/Makefile | 1 + common/cmd_dfu.c | 20 +++++++ common/cmd_fitupd.c | 2 +- common/main.c | 2 +- common/update.c | 51 +++++++++++------ configs/am335x_boneblack_defconfig | 1 + doc/README.dfutftp | 113 +++++++++++++++++++++++++++++++++++++ doc/README.update | 7 +++ drivers/dfu/Kconfig | 10 ++++ drivers/dfu/Makefile | 1 + drivers/dfu/dfu.c | 37 ++++++++++++ drivers/dfu/dfu_tftp.c | 65 +++++++++++++++++++++ include/dfu.h | 28 +++++++++ include/net.h | 14 ++++- {net => include/net}/tftp.h | 0 net/bootp.c | 2 +- net/net.c | 2 +- net/rarp.c | 2 +- net/tftp.c | 2 +- 19 files changed, 336 insertions(+), 24 deletions(-) create mode 100644 doc/README.dfutftp create mode 100644 drivers/dfu/dfu_tftp.c rename {net => include/net}/tftp.h (100%) -- 2.1.4

2 21

[U-Boot] [PATCH 1/3] sysboot: Add support for ubifs to the sysboot command
by Hans de Goede 22 Aug '15

22 Aug '15

ubifs does not go though the generic block layer because mtd devices are special, so the "any" filesystem option to sysboot does not work, this adds support for a "ubifs" filesystem to the sysboot command which makes it possible to boot from ubifs using an extlinux.conf file. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- common/cmd_pxe.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c index 080b376..b4f2e3e 100644 --- a/common/cmd_pxe.c +++ b/common/cmd_pxe.c @@ -16,6 +16,10 @@ #include <fs.h> #include <asm/io.h> +#ifdef CONFIG_CMD_UBIFS +#include "../fs/ubifs/ubifs.h" +#endif + #include "menu.h" #include "cli.h" @@ -156,6 +160,17 @@ static int do_get_ext2(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr) return -ENOENT; } +static int do_get_ubifs(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr) +{ +#ifdef CONFIG_CMD_UBIFS + u32 addr = simple_strtoul(file_addr, NULL, 16); + + if (!ubifs_load((char *)file_path, addr, 0)) + return 1; +#endif + return -ENOENT; +} + static int do_get_fat(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr) { #ifdef CONFIG_CMD_FAT @@ -1680,6 +1695,8 @@ static int do_sysboot(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) do_getfile = do_get_ext2; else if (strstr(argv[3], "fat")) do_getfile = do_get_fat; + else if (strstr(argv[3], "ubifs")) + do_getfile = do_get_ubifs; else if (strstr(argv[3], "any")) do_getfile = do_get_any; else { -- 2.4.3

2 6

[U-Boot] [PATCH] patman: use -D option for git format-patch
by Masahiro Yamada 22 Aug '15

22 Aug '15

This allows Patman to generate smaller patches for file removal. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- tools/patman/gitutil.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py index 9e739d8..67b086b 100644 --- a/tools/patman/gitutil.py +++ b/tools/patman/gitutil.py @@ -264,7 +264,7 @@ def CreatePatches(start, count, series): """ if series.get('version'): version = '%s ' % series['version'] - cmd = ['git', 'format-patch', '-M', '--signoff'] + cmd = ['git', 'format-patch', '-D', '-M', '--signoff'] if series.get('cover'): cmd.append('--cover-letter') prefix = series.GetPatchPrefix() -- 1.9.1

3 3

[U-Boot] [PATCH v2 0/7] x86: Support multiple microcode blobs for FSP
by Simon Glass 22 Aug '15

22 Aug '15

The Intel Firmware Support Package (FSP) requires that microcode be provided very early before the device tree can be scanned. We already support adding a pointer to the microcode data in a place where early init code can access. However this just points into the device tree and can only point to a single lot of microcode. For boards which may have different CPU types we must support multiple microcodes and pass all of them to the FSP in one place. This series implements this by enhancing ifdtool to remove the microcode from the device tree and place it in a single block that the FSP can use. It works without making changes to the existing microcode tool or device tree format. Collating the microcode is selected automatically when there is more than one microcode blob in the device tree. This should make it compatible with existing boards. Future boards (that don't use FSP) may want to change this but this can be dealt with at the time. This series include two of Bin's microcode patches, adjusted to fit this scheme. Changes in v2: - Regenerate with microcode tool - Adjust to use separate nodes for each microcode block - Enhance ifdtool rather that changing the microcode format Bin Meng (2): x86: baytrail: Add microcode for BayTrail-I D0 stepping x86: baytrail: Support multiple microcode copies Simon Glass (5): x86: Correct microcode documentation x86: ifdtool: Check that U-Boot does not overlap other regions x86: ifdtool: Split microcode linking into its own function x86: ifdtool: Support collating microcode into one place x86: ifdtool: Drop microcode from the device tree when collating Makefile | 1 + arch/x86/dts/bayleybay.dts | 6 + arch/x86/dts/microcode/m0130679901.dtsi | 3284 +++++++++++++++++++++++++++++++ arch/x86/dts/minnowmax.dts | 3 + doc/README.x86 | 4 +- tools/ifdtool.c | 238 ++- 6 files changed, 3494 insertions(+), 42 deletions(-) create mode 100644 arch/x86/dts/microcode/m0130679901.dtsi -- 2.5.0.276.gf5e568e

2 18