July 2015 - U-Boot

[U-Boot] [PATCH v2] ahci: Fix compiling warnings under 64bit platforms
by Yuantian.Tang＠freescale.com 09 Jul '15

09 Jul '15

From: Tang Yuantian <Yuantian.Tang(a)freescale.com> When compling under 64bit platforms, there are lots of warnings, like: drivers/block/ahci.c:114:18: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] u8 *port_mmio = (u8 *)probe_ent->port[port].port_mmio; ^ drivers/block/ahci.c: In function ?.hci_host_init?. drivers/block/ahci.c:218:49: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] probe_ent->port[i].port_mmio = ahci_port_base((u32) mmio, i); ...... Signed-off-by: Shaohui Xie <Shaohui.Xie(a)freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang(a)freescale.com> --- v2: - refined some type casts drivers/block/ahci.c | 57 +++++++++++++++++++++++++++------------------------- include/ahci.h | 8 ++++---- 2 files changed, 34 insertions(+), 31 deletions(-) diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c index 4fb846a..2f76af5 100644 --- a/drivers/block/ahci.c +++ b/drivers/block/ahci.c @@ -43,13 +43,13 @@ u16 *ataid[AHCI_MAX_PORTS]; #define WAIT_MS_FLUSH 5000 #define WAIT_MS_LINKUP 200 -static inline u32 ahci_port_base(u32 base, u32 port) +static inline void __iomem *ahci_port_base(void __iomem *base, u32 port) { return base + 0x100 + (port * 0x80); } -static void ahci_setup_port(struct ahci_ioports *port, unsigned long base, +static void ahci_setup_port(struct ahci_ioports *port, void __iomem *base, unsigned int port_idx) { base = ahci_port_base(base, port_idx); @@ -61,7 +61,7 @@ static void ahci_setup_port(struct ahci_ioports *port, unsigned long base, #define msleep(a) udelay(a * 1000) -static void ahci_dcache_flush_range(unsigned begin, unsigned len) +static void ahci_dcache_flush_range(unsigned long begin, unsigned long len) { const unsigned long start = begin; const unsigned long end = start + len; @@ -75,7 +75,7 @@ static void ahci_dcache_flush_range(unsigned begin, unsigned len) * controller is invalidated from dcache; next access comes from * physical RAM. */ -static void ahci_dcache_invalidate_range(unsigned begin, unsigned len) +static void ahci_dcache_invalidate_range(unsigned long begin, unsigned long len) { const unsigned long start = begin; const unsigned long end = start + len; @@ -94,7 +94,7 @@ static void ahci_dcache_flush_sata_cmd(struct ahci_ioports *pp) AHCI_PORT_PRIV_DMA_SZ); } -static int waiting_for_cmd_completed(volatile u8 *offset, +static int waiting_for_cmd_completed(void __iomem *offset, int timeout_msec, u32 sign) { @@ -111,7 +111,7 @@ int __weak ahci_link_up(struct ahci_probe_ent *probe_ent, u8 port) { u32 tmp; int j = 0; - u8 *port_mmio = (u8 *)probe_ent->port[port].port_mmio; + void __iomem *port_mmio = probe_ent->port[port].port_mmio; /* * Bring up SATA link. @@ -131,7 +131,7 @@ int __weak ahci_link_up(struct ahci_probe_ent *probe_ent, u8 port) #ifdef CONFIG_SUNXI_AHCI /* The sunxi AHCI controller requires this undocumented setup */ -static void sunxi_dma_init(volatile u8 *port_mmio) +static void sunxi_dma_init(void __iomem *port_mmio) { clrsetbits_le32(port_mmio + PORT_P0DMACR, 0x0000ff00, 0x00004400); } @@ -171,10 +171,10 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent) u16 tmp16; unsigned short vendor; #endif - volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base; + void __iomem *mmio = probe_ent->mmio_base; u32 tmp, cap_save, cmd; int i, j, ret; - volatile u8 *port_mmio; + void __iomem *port_mmio; u32 port_map; debug("ahci_host_init: start\n"); @@ -215,9 +215,9 @@ static int ahci_host_init(struct ahci_probe_ent *probe_ent) for (i = 0; i < probe_ent->n_ports; i++) { if (!(port_map & (1 << i))) continue; - probe_ent->port[i].port_mmio = ahci_port_base((u32) mmio, i); + probe_ent->port[i].port_mmio = ahci_port_base(mmio, i); port_mmio = (u8 *) probe_ent->port[i].port_mmio; - ahci_setup_port(&probe_ent->port[i], (unsigned long)mmio, i); + ahci_setup_port(&probe_ent->port[i], mmio, i); /* make sure port is not active */ tmp = readl(port_mmio + PORT_CMD); @@ -329,7 +329,7 @@ static void ahci_print_info(struct ahci_probe_ent *probe_ent) pci_dev_t pdev = probe_ent->dev; u16 cc; #endif - volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base; + void __iomem *mmio = probe_ent->mmio_base; u32 vers, cap, cap2, impl, speed; const char *speed_s; const char *scc_s; @@ -462,7 +462,7 @@ static int ahci_fill_sg(u8 port, unsigned char *buf, int buf_len) for (i = 0; i < sg_count; i++) { ahci_sg->addr = - cpu_to_le32((u32) buf + i * MAX_DATA_BYTE_COUNT); + cpu_to_le32((unsigned long) buf + i * MAX_DATA_BYTE_COUNT); ahci_sg->addr_hi = 0; ahci_sg->flags_size = cpu_to_le32(0x3fffff & (buf_len < MAX_DATA_BYTE_COUNT @@ -489,7 +489,7 @@ static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 opts) static void ahci_set_feature(u8 port) { struct ahci_ioports *pp = &(probe_ent->port[port]); - volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio; + void __iomem *port_mmio = pp->port_mmio; u32 cmd_fis_len = 5; /* five dwords */ u8 fis[20]; @@ -514,7 +514,7 @@ static void ahci_set_feature(u8 port) } #endif -static int wait_spinup(volatile u8 *port_mmio) +static int wait_spinup(void __iomem *port_mmio) { ulong start; u32 tf_data; @@ -532,9 +532,9 @@ static int wait_spinup(volatile u8 *port_mmio) static int ahci_port_start(u8 port) { struct ahci_ioports *pp = &(probe_ent->port[port]); - volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio; + void __iomem *port_mmio = pp->port_mmio; u32 port_status; - u32 mem; + void __iomem *mem; debug("Enter start port: %d\n", port); port_status = readl(port_mmio + PORT_SCR_STAT); @@ -544,15 +544,16 @@ static int ahci_port_start(u8 port) return -1; } - mem = (u32) malloc(AHCI_PORT_PRIV_DMA_SZ + 2048); + mem = malloc(AHCI_PORT_PRIV_DMA_SZ + 2048); if (!mem) { free(pp); printf("%s: No mem for table!\n", __func__); return -ENOMEM; } - mem = (mem + 0x800) & (~0x7ff); /* Aligned to 2048-bytes */ - memset((u8 *) mem, 0, AHCI_PORT_PRIV_DMA_SZ); + /* Aligned to 2048-bytes */ + mem = memalign(2048, AHCI_PORT_PRIV_DMA_SZ); + memset(mem, 0, AHCI_PORT_PRIV_DMA_SZ); /* * First item in chunk of DMA memory: 32-slot command table, @@ -560,7 +561,7 @@ static int ahci_port_start(u8 port) */ pp->cmd_slot = (struct ahci_cmd_hdr *)(uintptr_t)virt_to_phys((void *)mem); - debug("cmd_slot = 0x%x\n", (unsigned)pp->cmd_slot); + debug("cmd_slot = %p\n", pp->cmd_slot); mem += (AHCI_CMD_SLOT_SZ + 224); /* @@ -574,13 +575,14 @@ static int ahci_port_start(u8 port) * and its scatter-gather table */ pp->cmd_tbl = virt_to_phys((void *)mem); - debug("cmd_tbl_dma = 0x%x\n", pp->cmd_tbl); + debug("cmd_tbl_dma = %lx\n", pp->cmd_tbl); mem += AHCI_CMD_TBL_HDR; pp->cmd_tbl_sg = (struct ahci_sg *)(uintptr_t)virt_to_phys((void *)mem); - writel_with_flush((u32) pp->cmd_slot, port_mmio + PORT_LST_ADDR); + writel_with_flush((unsigned long)pp->cmd_slot, + port_mmio + PORT_LST_ADDR); writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR); @@ -607,7 +609,7 @@ static int ahci_device_data_io(u8 port, u8 *fis, int fis_len, u8 *buf, { struct ahci_ioports *pp = &(probe_ent->port[port]); - volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio; + void __iomem *port_mmio = pp->port_mmio; u32 opts; u32 port_status; int sg_count; @@ -632,7 +634,7 @@ static int ahci_device_data_io(u8 port, u8 *fis, int fis_len, u8 *buf, ahci_fill_cmd_slot(pp, opts); ahci_dcache_flush_sata_cmd(pp); - ahci_dcache_flush_range((unsigned)buf, (unsigned)buf_len); + ahci_dcache_flush_range((unsigned long)buf, (unsigned long)buf_len); writel_with_flush(1, port_mmio + PORT_CMD_ISSUE); @@ -642,7 +644,8 @@ static int ahci_device_data_io(u8 port, u8 *fis, int fis_len, u8 *buf, return -1; } - ahci_dcache_invalidate_range((unsigned)buf, (unsigned)buf_len); + ahci_dcache_invalidate_range((unsigned long)buf, + (unsigned long)buf_len); debug("%s: %d byte transferred.\n", __func__, pp->cmd_slot->status); return 0; @@ -1026,7 +1029,7 @@ static int ata_io_flush(u8 port) { u8 fis[20]; struct ahci_ioports *pp = &(probe_ent->port[port]); - volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio; + void __iomem *port_mmio = pp->port_mmio; u32 cmd_fis_len = 5; /* five dwords */ /* Preset the FIS */ diff --git a/include/ahci.h b/include/ahci.h index 6d91712..0bdedac 100644 --- a/include/ahci.h +++ b/include/ahci.h @@ -135,12 +135,12 @@ struct ahci_sg { }; struct ahci_ioports { - u32 cmd_addr; - u32 scr_addr; - u32 port_mmio; + void __iomem *cmd_addr; + void __iomem *scr_addr; + void __iomem *port_mmio; struct ahci_cmd_hdr *cmd_slot; struct ahci_sg *cmd_tbl_sg; - u32 cmd_tbl; + ulong cmd_tbl; u32 rx_fis; }; -- 2.1.0.27.g96db324

4 4

[U-Boot] [PATCH] x86: Eliminate make defconfig warning for Crown Bay and Minnowmax
by Bin Meng 09 Jul '15

09 Jul '15

Remove duplicated entry of OF_CONTROL in crownbay_defconfig and minnowmax_defconfig which causes a warning when making defconfig. The updated defconfig files are generated by 'make savedefconfig'. Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- configs/crownbay_defconfig | 14 ++++++-------- configs/minnowmax_defconfig | 6 ++---- 2 files changed, 8 insertions(+), 12 deletions(-) diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index c906883..17e6a72 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -4,7 +4,10 @@ CONFIG_DEFAULT_DEVICE_TREE="crownbay" CONFIG_TARGET_CROWNBAY=y CONFIG_SMP=y CONFIG_MAX_CPUS=2 +CONFIG_HAVE_VGA_BIOS=y CONFIG_GENERATE_PIRQ_TABLE=y +CONFIG_GENERATE_MP_TABLE=y +CONFIG_CMD_CPU=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set @@ -13,15 +16,10 @@ CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y -CONFIG_SPI_FLASH=y -CONFIG_USE_PRIVATE_LIBGCC=y -CONFIG_SYS_VSNPRINTF=y -CONFIG_HAVE_VGA_BIOS=y -CONFIG_GENERATE_MP_TABLE=y -CONFIG_CMD_CPU=y -CONFIG_CMD_NET=y -CONFIG_OF_CONTROL=y CONFIG_CPU=y +CONFIG_SPI_FLASH=y CONFIG_VIDEO_VESA=y CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_DM_RTC=y +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_SYS_VSNPRINTF=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index 582d6cc..29dd44b 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -3,8 +3,8 @@ CONFIG_VENDOR_INTEL=y CONFIG_DEFAULT_DEVICE_TREE="minnowmax" CONFIG_TARGET_MINNOWMAX=y CONFIG_HAVE_INTEL_ME=y -CONFIG_HAVE_VGA_BIOS=y CONFIG_SMP=y +CONFIG_HAVE_VGA_BIOS=y CONFIG_GENERATE_SFI_TABLE=y CONFIG_CMD_CPU=y # CONFIG_CMD_IMLS is not set @@ -16,12 +16,10 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y CONFIG_CPU=y +CONFIG_DM_PCI=y CONFIG_SPI_FLASH=y CONFIG_VIDEO_VESA=y CONFIG_FRAMEBUFFER_SET_VESA_MODE=y CONFIG_FRAMEBUFFER_VESA_MODE_11A=y CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_SYS_VSNPRINTF=y -CONFIG_CMD_NET=y -CONFIG_OF_CONTROL=y -CONFIG_DM_PCI=y -- 1.8.2.1

2 3

[U-Boot] [PATCH] sunxi: usb-phy: Never power off the usb ports
by Hans de Goede 08 Jul '15

08 Jul '15

USB devices are not really designed to get the power bounced off and on at them. Esp. USB powered harddisks do not like this. Currently we power off the USB ports both on a "usb reset" and when booting the kernel, causing the usb-power to bounce off and then back on again. This patch removes the powering off calls, fixing the undesirable power bouncing. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- arch/arm/cpu/armv7/sunxi/usb_phy.c | 17 ----------------- arch/arm/include/asm/arch-sunxi/usb_phy.h | 1 - drivers/usb/host/ehci-sunxi.c | 1 - drivers/usb/host/ohci-sunxi.c | 1 - drivers/usb/musb-new/sunxi.c | 3 --- 5 files changed, 23 deletions(-) diff --git a/arch/arm/cpu/armv7/sunxi/usb_phy.c b/arch/arm/cpu/armv7/sunxi/usb_phy.c index 4d63a74..74d251d 100644 --- a/arch/arm/cpu/armv7/sunxi/usb_phy.c +++ b/arch/arm/cpu/armv7/sunxi/usb_phy.c @@ -47,7 +47,6 @@ static struct sunxi_usb_phy { int gpio_id_det; int id; int init_count; - int power_on_count; } sunxi_usb_phy[] = { { .usb_rst_mask = CCM_USB_CTRL_PHY0_RST | CCM_USB_CTRL_PHY0_CLK, @@ -212,26 +211,10 @@ void sunxi_usb_phy_power_on(int index) { struct sunxi_usb_phy *phy = &sunxi_usb_phy[index]; - phy->power_on_count++; - if (phy->power_on_count != 1) - return; - if (phy->gpio_vbus >= 0) gpio_set_value(phy->gpio_vbus, 1); } -void sunxi_usb_phy_power_off(int index) -{ - struct sunxi_usb_phy *phy = &sunxi_usb_phy[index]; - - phy->power_on_count--; - if (phy->power_on_count != 0) - return; - - if (phy->gpio_vbus >= 0) - gpio_set_value(phy->gpio_vbus, 0); -} - int sunxi_usb_phy_vbus_detect(int index) { struct sunxi_usb_phy *phy = &sunxi_usb_phy[index]; diff --git a/arch/arm/include/asm/arch-sunxi/usb_phy.h b/arch/arm/include/asm/arch-sunxi/usb_phy.h index 17d31b8..89a287c 100644 --- a/arch/arm/include/asm/arch-sunxi/usb_phy.h +++ b/arch/arm/include/asm/arch-sunxi/usb_phy.h @@ -15,7 +15,6 @@ int sunxi_usb_phy_remove(void); void sunxi_usb_phy_init(int index); void sunxi_usb_phy_exit(int index); void sunxi_usb_phy_power_on(int index); -void sunxi_usb_phy_power_off(int index); int sunxi_usb_phy_vbus_detect(int index); int sunxi_usb_phy_id_detect(int index); void sunxi_usb_phy_enable_squelch_detect(int index, int enable); diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c index 34130f8..38d5f92 100644 --- a/drivers/usb/host/ehci-sunxi.c +++ b/drivers/usb/host/ehci-sunxi.c @@ -67,7 +67,6 @@ static int ehci_usb_remove(struct udevice *dev) if (ret) return ret; - sunxi_usb_phy_power_off(priv->phy_index); sunxi_usb_phy_exit(priv->phy_index); #ifdef CONFIG_SUNXI_GEN_SUN6I diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c index e33a8f7..6079272 100644 --- a/drivers/usb/host/ohci-sunxi.c +++ b/drivers/usb/host/ohci-sunxi.c @@ -69,7 +69,6 @@ static int ohci_usb_remove(struct udevice *dev) if (ret) return ret; - sunxi_usb_phy_power_off(priv->phy_index); sunxi_usb_phy_exit(priv->phy_index); #ifdef CONFIG_SUNXI_GEN_SUN6I diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index 3a29b18..702c592 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -233,9 +233,6 @@ static void sunxi_musb_disable(struct musb *musb) if (!enabled) return; - if (is_host_enabled(musb)) - sunxi_usb_phy_power_off(0); /* port power off */ - USBC_ForceVbusValidToLow(musb->mregs); mdelay(200); /* Wait for the current session to timeout */ -- 2.4.3

3 4

[U-Boot] [PATCH] keystone2: use appropriate HD field for destination port
by Vitaly Andrianov 08 Jul '15

08 Jul '15

K2L and L2E have different from K2HK EthSS version, which uses tag_info field for destination slave port. This commit adds the dest_port_info field to the struct pktdma_cfg, to configure which HD filed tag_info or pkt_info shall be used to configure descriptor. Before that commit the swinfo[2] was used for that purpose. Even if that worked on K2HK devices, the correct field for K2HK is the pkt_info. The netcp_send() configure appropriate HD info field depending on the direct_info of the currently using netcp. Signed-off-by: Vitaly Andrianov <vitalya(a)ti.com> Acked-by: Murali Karicheri <m-karicheri2(a)ti.com> --- arch/arm/include/asm/ti-common/keystone_nav.h | 9 ++++++++- drivers/dma/keystone_nav.c | 12 ++++++++++-- drivers/net/keystone_net.c | 3 +-- 3 files changed, 19 insertions(+), 5 deletions(-) diff --git a/arch/arm/include/asm/ti-common/keystone_nav.h b/arch/arm/include/asm/ti-common/keystone_nav.h index 696d8c6..5a0e391 100644 --- a/arch/arm/include/asm/ti-common/keystone_nav.h +++ b/arch/arm/include/asm/ti-common/keystone_nav.h @@ -152,6 +152,11 @@ struct rx_flow_regs { u32 thresh[3]; }; +enum dest_port_info { + PKT_INFO, + TAG_INFO +}; + struct pktdma_cfg { struct global_ctl_regs *global; struct tx_chan_regs *tx_ch; @@ -167,6 +172,7 @@ struct pktdma_cfg { u32 tx_snd_q; u32 rx_flow; /* flow that is used for RX */ + enum dest_port_info dest_port_info;/* HD fiels for dest port bits */ }; extern struct pktdma_cfg netcp_pktdma; @@ -184,7 +190,8 @@ struct rx_buff_desc { int ksnav_close(struct pktdma_cfg *pktdma); int ksnav_init(struct pktdma_cfg *pktdma, struct rx_buff_desc *rx_buffers); -int ksnav_send(struct pktdma_cfg *pktdma, u32 *pkt, int num_bytes, u32 swinfo2); +int ksnav_send(struct pktdma_cfg *pktdma, u32 *pkt, int num_bytes, + u32 dest_port); void *ksnav_recv(struct pktdma_cfg *pktdma, u32 **pkt, int *num_bytes); void ksnav_release_rxhd(struct pktdma_cfg *pktdma, void *hd); diff --git a/drivers/dma/keystone_nav.c b/drivers/dma/keystone_nav.c index dfca75a..64b1cee 100644 --- a/drivers/dma/keystone_nav.c +++ b/drivers/dma/keystone_nav.c @@ -278,7 +278,8 @@ int ksnav_close(struct pktdma_cfg *pktdma) return QM_OK; } -int ksnav_send(struct pktdma_cfg *pktdma, u32 *pkt, int num_bytes, u32 swinfo2) +int ksnav_send(struct pktdma_cfg *pktdma, u32 *pkt, int num_bytes, + u32 dest_port) { struct qm_host_desc *hd; @@ -286,8 +287,15 @@ int ksnav_send(struct pktdma_cfg *pktdma, u32 *pkt, int num_bytes, u32 swinfo2) if (hd == NULL) return QM_ERR; + dest_port &= 0xf; hd->desc_info = num_bytes; - hd->swinfo[2] = swinfo2; + if (pktdma->dest_port_info == PKT_INFO) { + hd->packet_info = qm_cfg->qpool_num | (dest_port << 16); + } else { + hd->packet_info = qm_cfg->qpool_num; + hd->tag_info = dest_port; + } + hd->packet_info = qm_cfg->qpool_num; qm_buff_push(hd, pktdma->tx_snd_q, pkt, num_bytes); diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c index 0c5fdee..e2adb67 100644 --- a/drivers/net/keystone_net.c +++ b/drivers/net/keystone_net.c @@ -381,8 +381,7 @@ int32_t cpmac_drv_send(u32 *buffer, int num_bytes, int slave_port_num) if (num_bytes < EMAC_MIN_ETHERNET_PKT_SIZE) num_bytes = EMAC_MIN_ETHERNET_PKT_SIZE; - return ksnav_send(&netcp_pktdma, buffer, - num_bytes, (slave_port_num) << 16); + return ksnav_send(&netcp_pktdma, buffer, num_bytes, slave_port_num); } /* Eth device open */ -- 1.9.1

3 9

[U-Boot] [PATCH 0/3] sunxi: Update selects in arch/arm/Kconfig for DM
by Hans de Goede 08 Jul '15

08 Jul '15

Hi All, Here is a patch-set to cleanup the CONFIG_foo=y options which are present in practically all sunxi defconfigs since Joe's latest patches. Simon, the first patch in this patchset is necessary to be able to use DM_SERIAL=y on all sunxi boards, without this things do not work as some sunxi tablet motherboards do not have an uart (not even through test pads), as all uart pins are used for other functions. Without this these board will fail to boot due to a panic called from the dm serial code. Can you please add this to u-boot-dm/next ? I'm assuming that you prefer taking this upstream this way rather then through the sunxi tree. The second patch is a slightly modified version of Tom's patch to cleanup the sunxi defconfigs, and the 3th one is a patch I already had queued up rebased on top of this, and with its commit message altered to reflect the current state of things. Regards, Hans

3 12

[U-Boot] [PATCH] net: designware: Program MAC address to hardware after soft reset
by Bin Meng 08 Jul '15

08 Jul '15

commit f566c99 "net: Update hardware MAC address if it changes in env" removes writing MAC address to designware controller after soft reset. This makes designware ethernet port fail to work. Actually the MAC address should always be programmed after soft reset. Signed-off-by: Bin Meng <bmeng.cn(a)gmail.com> --- drivers/net/designware.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/net/designware.c b/drivers/net/designware.c index ae51cf3..645ca64 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -243,6 +243,12 @@ static int _dw_eth_init(struct dw_eth_dev *priv, u8 *enetaddr) mdelay(100); }; + /* + * Soft reset above clears HW address registers. + * So we have to set it here once again. + */ + _dw_write_hwaddr(priv, enetaddr); + rx_descs_init(priv); tx_descs_init(priv); -- 1.8.2.1

3 3

[U-Boot] Please pull u-boot-sunxi master (bugfix for v2015.07)
by Hans de Goede 08 Jul '15

08 Jul '15

Hi Tom, One of the sunxi dts files for a new board got merged into the upstream kernel under a different name than that it was originally submitted with. This pull-req contains a single patch adjusting the name in u-boot, so that we do not end up shipping a u-boot which looks for a differently named .dtb file then the kernel ships with. The following changes since commit 0a888f584c48984cb9657a5d42dc994b33c264a7: ARM: DRA72x: fix io delay calibration for ethernet (2015-07-07 20:15:52 -0400) are available in the git repository at: http://git.denx.de/u-boot-sunxi.git master for you to fetch changes up to 8fa2e20913183133998cbbb78a5184bd20ccfcbe: sunxi: Adjust Ippo_q8h_v1_2_a33_1024x600 dts filename to match the upstream kernel (2015-07-08 16:21:27 +0200) ---------------------------------------------------------------- Hans de Goede (1): sunxi: Adjust Ippo_q8h_v1_2_a33_1024x600 dts filename to match the upstream kernel arch/arm/dts/Makefile | 2 +- ...8i-a33-ippo-q8h-v1.2-lcd1024x600.dts => sun8i-a33-ippo-q8h-v1.2.dts} | 0 configs/Ippo_q8h_v1_2_a33_1024x600_defconfig | 2 +- 3 files changed, 2 insertions(+), 2 deletions(-) rename arch/arm/dts/{sun8i-a33-ippo-q8h-v1.2-lcd1024x600.dts => sun8i-a33-ippo-q8h-v1.2.dts} (100%) Regards, Hans

2 1

[U-Boot] [PATCH v2 0/4] This series implements fastboot on the "bcm28155_ap" boards.
by Steve Rae 08 Jul '15

08 Jul '15

The OTG hardware is a DWC2 controller and this series uses the existing gadget driver ("s3c_udc_otg.c"). Changes in v2: - rebased against u-boot-dfu JD (Jiandong) Zheng and Steve Rae (2): usb: gadget: bcm_udc_otg files implement Fastboot via USB OTG on bcm28155_ap boards Steve Rae (2): g_dnl: add missing declaration usb: s3c-otg: support 8-bit interface arch/arm/include/asm/arch-bcm281xx/sysmap.h | 7 ++++ board/broadcom/bcm28155_ap/bcm28155_ap.c | 40 +++++++++++++++++++++++ drivers/usb/gadget/Makefile | 1 + drivers/usb/gadget/bcm_udc_otg.h | 17 ++++++++++ drivers/usb/gadget/bcm_udc_otg_phy.c | 50 +++++++++++++++++++++++++++++ drivers/usb/gadget/s3c_udc_otg.c | 4 +++ include/configs/bcm28155_ap.h | 21 ++++++++++++ include/g_dnl.h | 1 + 8 files changed, 141 insertions(+) create mode 100644 drivers/usb/gadget/bcm_udc_otg.h create mode 100644 drivers/usb/gadget/bcm_udc_otg_phy.c -- 1.8.5

3 13

[U-Boot] [PATCH] imx: imximage: add new CHECK/CLR BIT command
by Peng Fan 08 Jul '15

08 Jul '15

Since rom code supports the following commands, add new commands support in imximage. 1. CHECK_BITS_SET 4 [address] [mask bit] means: while ((*address & mask) != mask); 2. CHECK_BITS_CLR 4 [address] [mask bit] means: while ((*address & ~mask) != 0); 2. CLR_BIT 4 [address] [mask bit] means: *address = *address & ~mask; dcd_v2_t is redefined, because there may not be only one write data command, there may be many different commands like CHECK_BITS_SET, CHECK_BITS_CLR and CLR_BIT. dcd_len is still leaved there, since changing it needs changes for dcd v1. For v2, we check whether dcd size is larger than MAX_DCD_SIZE_V2, but not dcd_len. Signed-off-by: Peng Fan <Peng.Fan(a)freescale.com> --- tools/imximage.c | 129 ++++++++++++++++++++++++++++++++++++++++++------------- tools/imximage.h | 24 +++++++++-- 2 files changed, 119 insertions(+), 34 deletions(-) diff --git a/tools/imximage.c b/tools/imximage.c index 6f469ae..1c0225d 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -22,6 +22,9 @@ static table_entry_t imximage_cmds[] = { {CMD_BOOT_FROM, "BOOT_FROM", "boot command", }, {CMD_BOOT_OFFSET, "BOOT_OFFSET", "Boot offset", }, {CMD_DATA, "DATA", "Reg Write Data", }, + {CMD_CLR_BIT, "CLR_BIT", "Reg clear bit", }, + {CMD_CHECK_BITS_SET, "CHECK_BITS_SET", "Reg Check bits set", }, + {CMD_CHECK_BITS_CLR, "CHECK_BITS_CLR", "Reg Check bits clr", }, {CMD_CSF, "CSF", "Command Sequence File", }, {CMD_IMAGE_VERSION, "IMAGE_VERSION", "image version", }, {-1, "", "", }, @@ -84,6 +87,7 @@ static set_imx_hdr_t set_imx_hdr; static uint32_t max_dcd_entries; static uint32_t *header_size_ptr; static uint32_t *csf_ptr; +static uint32_t dataindex; static uint32_t get_cfg_value(char *token, char *name, int linenr) { @@ -129,7 +133,7 @@ static void err_imximage_version(int version) } static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, - int fld, uint32_t value, uint32_t off) + int fld, int cmd, uint32_t value, uint32_t off) { dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table; @@ -157,16 +161,47 @@ static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno, } static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno, - int fld, uint32_t value, uint32_t off) + int fld, int cmd, uint32_t value, uint32_t off) { dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table; + dcd_command_t *dcd_command_block = (dcd_command_t *)& + dcd_v2->dcd_data[dataindex]; switch (fld) { + case CFG_COMMAND: + /* update header */ + if (cmd == CMD_DATA) { + dcd_command_block->tag = DCD_WRITE_DATA_COMMAND_TAG; + dcd_command_block->length = cpu_to_be16(off * + sizeof(dcd_addr_data_t) + 4); + dcd_command_block->param = DCD_WRITE_DATA_PARAM; + } else if (cmd == CMD_CLR_BIT) { + dcd_command_block->tag = DCD_WRITE_DATA_COMMAND_TAG; + dcd_command_block->length = cpu_to_be16(off * + sizeof(dcd_addr_data_t) + 4); + dcd_command_block->param = DCD_CLR_BIT_PARAM; + } else if (cmd == CMD_CHECK_BITS_SET) { + dcd_command_block->tag = DCD_CHECK_DATA_COMMAND_TAG; + /* + * check data command only supports one entry, + * so use 0xC = size(address + value + command). + */ + dcd_command_block->length = cpu_to_be16(0xC); + dcd_command_block->param = DCD_CHECK_BITS_SET_PARAM; + } else if (cmd == CMD_CHECK_BITS_CLR) { + dcd_command_block->tag = DCD_CHECK_DATA_COMMAND_TAG; + /* + * check data command only supports one entry, + * so use 0xC = size(address + value + command). + */ + dcd_command_block->length = cpu_to_be16(0xC); + dcd_command_block->param = DCD_CHECK_BITS_CLR_PARAM; + } case CFG_REG_ADDRESS: - dcd_v2->addr_data[off].addr = cpu_to_be32(value); + dcd_command_block->addr_data[off].addr = cpu_to_be32(value); break; case CFG_REG_VALUE: - dcd_v2->addr_data[off].value = cpu_to_be32(value); + dcd_command_block->addr_data[off].value = cpu_to_be32(value); break; default: break; @@ -197,13 +232,14 @@ static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len, dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.dcd_table; dcd_v2->header.tag = DCD_HEADER_TAG; + /* + * dataindex does not contain the last dcd block, + * see how dataindex is updated. + */ dcd_v2->header.length = cpu_to_be16( - dcd_len * sizeof(dcd_addr_data_t) + 8); + (dataindex + 1) * 4 + dcd_len * + sizeof(dcd_addr_data_t) + 4); dcd_v2->header.version = DCD_VERSION; - dcd_v2->write_dcd_command.tag = DCD_COMMAND_TAG; - dcd_v2->write_dcd_command.length = cpu_to_be16( - dcd_len * sizeof(dcd_addr_data_t) + 4); - dcd_v2->write_dcd_command.param = DCD_COMMAND_PARAM; } static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len, @@ -317,12 +353,11 @@ static void print_hdr_v2(struct imx_header *imx_hdr) dcd_v2_t *dcd_v2 = &hdr_v2->dcd_table; uint32_t size, version; - size = be16_to_cpu(dcd_v2->header.length) - 8; - if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) { + size = be16_to_cpu(dcd_v2->header.length); + if (size > MAX_DCD_SIZE_V2) { fprintf(stderr, "Error: Image corrupt DCD size %d exceed maximum %d\n", - (uint32_t)(size / sizeof(dcd_addr_data_t)), - MAX_HW_CFG_SIZE_V2); + size, MAX_DCD_SIZE_V2); exit(EXIT_FAILURE); } @@ -398,7 +433,7 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, break; case CMD_DATA: value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len); + (*set_dcd_val)(imxhdr, name, lineno, fld, cmd, value, dcd_len); if (unlikely(cmd_ver_first != 1)) cmd_ver_first = 0; break; @@ -417,7 +452,8 @@ static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token, } static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, - char *token, char *name, int lineno, int fld, int *dcd_len) + int32_t *precmd, char *token, char *name, + int lineno, int fld, int *dcd_len) { int value; @@ -430,26 +466,56 @@ static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd, "(%s)\n", name, lineno, token); exit(EXIT_FAILURE); } + + if ((*precmd == CMD_DATA) || (*precmd == CMD_CLR_BIT) || + (*precmd == CMD_CHECK_BITS_SET) || + (*precmd == CMD_CHECK_BITS_CLR)) { + if (*cmd != *precmd) { + dataindex += ((*dcd_len) * + sizeof(dcd_addr_data_t) + 4) >> 2; + *dcd_len = 0; + } + } + + if ((*cmd == CMD_DATA) || (*cmd == CMD_CLR_BIT) || + (*cmd == CMD_CHECK_BITS_SET) || + (*cmd == CMD_CHECK_BITS_CLR)) { + /* + * Reserve the first entry for command header, + * So use *dcd_len + 1 as the off. + */ + (*set_dcd_val)(imxhdr, name, lineno, fld, + *cmd, 0, *dcd_len + 1); + } + + *precmd = *cmd; + break; case CFG_REG_SIZE: parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len); break; case CFG_REG_ADDRESS: case CFG_REG_VALUE: - if (*cmd != CMD_DATA) - return; - - value = get_cfg_value(token, name, lineno); - (*set_dcd_val)(imxhdr, name, lineno, fld, value, *dcd_len); - - if (fld == CFG_REG_VALUE) { - (*dcd_len)++; - if (*dcd_len > max_dcd_entries) { - fprintf(stderr, "Error: %s[%d] -" - "DCD table exceeds maximum size(%d)\n", - name, lineno, max_dcd_entries); - exit(EXIT_FAILURE); + switch (*cmd) { + case CMD_CHECK_BITS_SET: + case CMD_CHECK_BITS_CLR: + case CMD_DATA: + case CMD_CLR_BIT: + value = get_cfg_value(token, name, lineno); + (*set_dcd_val)(imxhdr, name, lineno, fld, *cmd, value, + *dcd_len); + + if (fld == CFG_REG_VALUE) { + (*dcd_len)++; + if (*dcd_len > max_dcd_entries) { + fprintf(stderr, "Error: %s[%d] - DCD table exceeds maximum size(%d)\n", + name, lineno, max_dcd_entries); + exit(EXIT_FAILURE); + } } + break; + default: + return; } break; default: @@ -465,7 +531,7 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) int fld; size_t len; int dcd_len = 0; - int32_t cmd; + int32_t cmd, precmd = CMD_INVALID; fd = fopen(name, "r"); if (fd == 0) { @@ -473,6 +539,7 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) exit(EXIT_FAILURE); } + dataindex = 0; /* * Very simple parsing, line starting with # are comments * and are dropped @@ -495,8 +562,8 @@ static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name) if (token[0] == '#') break; - parse_cfg_fld(imxhdr, &cmd, token, name, - lineno, fld, &dcd_len); + parse_cfg_fld(imxhdr, &cmd, &precmd, token, name, + lineno, fld, &dcd_len); } } diff --git a/tools/imximage.h b/tools/imximage.h index 36fe095..2ac5bbd 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -8,6 +8,8 @@ #ifndef _IMXIMAGE_H_ #define _IMXIMAGE_H_ +#include <linux/sizes.h> +#define MAX_DCD_SIZE_V2 1768 /* The DCD size limited to 1768 bytes for v2 */ #define MAX_HW_CFG_SIZE_V2 220 /* Max number of registers imx can set for v2 */ #define MAX_HW_CFG_SIZE_V1 60 /* Max number of registers imx can set for v1 */ #define APP_CODE_BARKER 0xB1 @@ -49,12 +51,22 @@ #define DCD_VERSION 0x40 #define DCD_COMMAND_PARAM 0x4 +#define DCD_WRITE_DATA_COMMAND_TAG 0xCC +#define DCD_WRITE_DATA_PARAM 0x4 +#define DCD_CLR_BIT_PARAM 0xC +#define DCD_CHECK_DATA_COMMAND_TAG 0xCF +#define DCD_CHECK_BITS_SET_PARAM 0x14 +#define DCD_CHECK_BITS_CLR_PARAM 0x04 + enum imximage_cmd { CMD_INVALID, CMD_IMAGE_VERSION, CMD_BOOT_FROM, CMD_BOOT_OFFSET, CMD_DATA, + CMD_CLR_BIT, + CMD_CHECK_BITS_SET, + CMD_CHECK_BITS_CLR, CMD_CSF, }; @@ -126,9 +138,15 @@ typedef struct { } __attribute__((packed)) write_dcd_command_t; typedef struct { + uint8_t tag; + uint16_t length; + uint8_t param; + dcd_addr_data_t addr_data[0]; +} __attribute__((packed)) dcd_command_t; + +typedef struct { ivt_header_t header; - write_dcd_command_t write_dcd_command; - dcd_addr_data_t addr_data[MAX_HW_CFG_SIZE_V2]; + uint8_t dcd_data[MAX_DCD_SIZE_V2 - sizeof(ivt_header_t)]; } dcd_v2_t; typedef struct { @@ -164,7 +182,7 @@ struct imx_header { typedef void (*set_dcd_val_t)(struct imx_header *imxhdr, char *name, int lineno, - int fld, uint32_t value, + int fld, int cmd, uint32_t value, uint32_t off); typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr, -- 1.8.4

7 12

[U-Boot] warning: override: reassigning to symbol OF_CONTROL
by Bin Meng 08 Jul '15

08 Jul '15

Hi Simon, I've rebased my git repo on u-boot-x86/master branch and found one warning popped up: $ make crownbay_defconfig HOSTCC scripts/basic/fixdep HOSTCC scripts/kconfig/conf.o SHIPPED scripts/kconfig/zconf.tab.c SHIPPED scripts/kconfig/zconf.lex.c SHIPPED scripts/kconfig/zconf.hash.c HOSTCC scripts/kconfig/zconf.tab.o HOSTLD scripts/kconfig/conf arch/../configs/crownbay_defconfig:23:warning: override: reassigning to symbol OF_CONTROL Do you know where is this coming from? Regards, Bin

1 1