April 2015 - U-Boot

[U-Boot] x86: ACPI support suggestion
by Gabriel Huau 26 Jun '15

26 Jun '15

Hi All, I'm currently thinking on how to integrate the ACPI support in u-boot x86. I've investigated the coreboot implementation. My first thought was to port all the source code over but looking at the source code in more details it doesn't look like an easy option. For example, it involves reading a lot of values over PCI to dynamically fill the tables, and integration a lot of SoC specific headers (IRQ definition, GPIO, ...). Therefore, as a first implementation I was thinking about the following: - booting a board with the Intel UEFI + Linux - extracting all the ACPI tables (/sys/firmware/acpi/ or acpixtract) - disassembling the binaries tables via iasl to allow people to modify them - integrating these files into u-boot in board specific folder (for example: board/intel/minnowmax/acpi/*) - generating one blob per table using iasl during build time which requires iasl tool to be installed if we have the CONFIG_ACPI - writing at the RSDP location all the ACPI tables previously exported With this flow, the integration would be quite simple. Also this allows the tables to be modified easily when there is a new release or to add some new devices to the DSDT. What are your thoughts about that? Feel free to provide some feedback on this implementation. Thanks, Regards, Gabriel

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[U-Boot] [PATCH v6 0/4] spi, sf: add mtdparts feature to spi and sf commands
by Heiko Schocher 22 Jun '15

22 Jun '15

This patchserie add the popssibility to define mtd partitions on spi nor flash, and use this settings with the sf commands. steps: - add MTD layer driver for spi, original patch from: http://git.denx.de/?p=u-boot/u-boot-mips.git;a=commitdiff;h=bb246819cdc9049… and addapted it to current mainline. - move common functions to get offset and size from cmdline nand command to extract offset and size from a mtd partition to common place "drivers/mtd/mtd_uboot.c" maybe another place is better? - add to the sf command the possibility to use offset and size from the settings in mtdparts With this patchset, the sf command looks now: => sf sf - SPI flash sub-system Usage: sf probe [[bus:]cs] [hz] [mode] - init flash device on given SPI bus and chip select sf read addr offset|partition len - read `len' bytes starting at `offset' to memory at `addr' sf write addr offset|partition len - write `len' bytes from memory at `addr' to flash at `offset' sf erase offset|partition [+]len - erase `len' bytes from `offset' `+len' round up `len' to block size sf update addr offset|partition len - erase and write `len' bytes from memory at `addr' to flash at `offset' => for example "env" is defined in mtdparts: => sf read 13000000 env device 0 offset 0xd0000, size 0x10000 SF: 65536 bytes @ 0xd0000 Read: OK => There are the followings checkpatch warnings: CHECK: Alignment should match open parenthesis + if (arg_off(argv[2], &idx, &addr, &maxsize, &maxsize, + MTD_DEV_TYPE_NAND, nand_info[idx].size)) { CHECK: Alignment should match open parenthesis + if (arg_off(argv[3], &dev, &off, &size, &maxsize, + MTD_DEV_TYPE_NAND, nand_info[dev].size)) CHECK: Alignment should match open parenthesis + if (arg_off_size(argc - 3, argv + 3, &dev, &off, &size, + &maxsize, MTD_DEV_TYPE_NAND, total: 0 errors, 0 warnings, 3 checks, 361 lines checked NOTE: Ignored message types: COMPLEX_MACRO CONSIDER_KSTRTO MINMAX MULTISTATEMENT_MACRO_USE_DO_WHILE NETWORKING_BLOCK_COMMENT_STYLE USLEEP_RANGE 20140714_ml_mtdparts/0002-mtd-nand-move-common-functions-from-cmd_nand.c-to-co.patch has style problems, please review. I see not, why this warning pops up ... resend rebased version of this series, as v3 is pending since September 2014... Changes in v6: - add comments from Jagan Teki: new patch in this patchserie, extract this piece of code into a new patch. Changes in v2: - add comment from Daniel Schwierzeck: fix compile error from original patch with "static inline" rather than "static __maybe_unused" Changes in v3: - rebase with d6c1ffc7d23f4fe4ae8c91101861055b8e1501b6 - add comments from scott wood: - align MTD_DEV_TYPE_NAND correct - remove unnecessary inline - rework "jffs2 header" problem later Changes in v4: - rebased against 385a08a60f042061b004642d6b9bb6cfb794ad5a Changes in v5: - add comment from Scott Wood: keep the continuation line aligned with the arguments Changes in v6: - add comments from Jagan Teki: move code, which checks if flash pointer is used into a new patch. - use #ifdef in Code - call mtd register before the spi_release_bus - add Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki(a)gmail.com> - fix Tom Rinis mail addr - add comment from Scott Wood: - fix indentation level - add mtd_ prefix - move str2off and str2long into common place, as they are no mtd specific functions and change return value from int to bool - add comment from Jagan Teki: - append help text - add Reviewed-by from Jagannadha Sutradharudu Teki Daniel Schwierzeck (1): mtd, spi: add MTD layer driver Heiko Schocher (3): mtd, nand: move common functions from cmd_nand.c to common place spi, sf: use offset and size in sf cmd from mtdpartition mtd, spi: check if flash pointer is used README | 3 + common/cmd_nand.c | 148 +++++++++--------------------------------- common/cmd_onenand.c | 19 ++---- common/cmd_sf.c | 61 +++++++++-------- common/cmd_test.c | 12 +--- drivers/mtd/Makefile | 4 +- drivers/mtd/mtd_uboot.c | 99 ++++++++++++++++++++++++++++ drivers/mtd/spi/Makefile | 1 + drivers/mtd/spi/sf_internal.h | 5 ++ drivers/mtd/spi/sf_mtd.c | 104 +++++++++++++++++++++++++++++ drivers/mtd/spi/sf_probe.c | 10 +-- include/linux/mtd/mtd.h | 5 ++ include/vsprintf.h | 2 + lib/vsprintf.c | 16 +++++ 14 files changed, 317 insertions(+), 172 deletions(-) create mode 100644 drivers/mtd/mtd_uboot.c create mode 100644 drivers/mtd/spi/sf_mtd.c -- 2.1.0

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[U-Boot] [PATCH] arm, imx: fix spl compile for mxs boards
by Heiko Schocher 19 Jun '15

19 Jun '15

files in arch/arm/imx-common/ get not yet compiled for SPL case as "mxs" is missing in filter rule. Signed-off-by: Heiko Schocher <hs(a)denx.de> --- Fixes build error on for example the mx28evk_auart_console board: Building mx28evk_auart_console board... text data bss dec hex filename 442689 36826 327648 807163 c50fb ./u-boot make[1]: *** [spl/u-boot-spl] Error 1 make: *** [spl/u-boot-spl] Error 2 drivers/serial/built-in.o: In function `mxs_auart_init': /home/hs/zug/u-boot/drivers/serial/mxs_auart.c:84: undefined reference to `mxs_reset_block' make[1]: *** [spl/u-boot-spl] Error 1 make: *** [spl/u-boot-spl] Error 2 make: *** Warte auf noch nicht beendete Prozesse... arch/arm/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 08946de..55fe509 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -37,7 +37,7 @@ libs-y += arch/arm/cpu/ libs-y += arch/arm/lib/ ifeq ($(CONFIG_SPL_BUILD),y) -ifneq (,$(CONFIG_MX23)$(CONFIG_MX35)$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35)) +ifneq (,$(CONFIG_MX23)$(CONFIG_MX35)$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs)) libs-y += arch/arm/imx-common/ endif else -- 2.1.0

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[U-Boot] Setting up MAC address for eth drivers
by Michal Simek 15 Jun '15

15 Jun '15

Hi, I have a question regarding setting mac address for drivers. Drivers setting up write_hwaddr via eth_write_hwaddr via eth_initialize which is called from common/board_r.c. But then there are some drivers(macb, designware, altera_tse) which also calls mac setup from dev->init which has side effect for example when you setup CONFIG_ENV_OVERWRITE and change mac address you can directly use it. It also means if there is intention to call hwaddr from dev->init that for the first packet mac address is setup twice - in eth core init and then before every driver use. I am asking this question because I would like to know the right flow for eth mac setup. If it is set ethaddr xx.... saveenv reset eth with new mac or if set ethaddr eth with new mac should work The second approach looks reasonable when ethaddr is not set at all but then at least our driver needs to be fixed to support this feature. Thanks, Michal

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[U-Boot] [PATCH v2 0/80] dm: Add USB support
by Simon Glass 11 Jun '15

11 Jun '15

This series adds driver model support to USB. The intent is to permit the various subsystems (OHCI, EHCI, XHCI) to co-exist and allow any number of USB ports of different types. With the RFC series, only USB controllers had a real driver model device. USB devices (including the hub in the controller) were not modelled as driver model devices. While this was expedient, and produced much fewer patches, it is not a long-term solution. Also, since then, driver model Ethernet support (which USB can use) has been merged to u-boot-dm/next. It seems better to bite the bullet and do a full conversion. Unfortunately this results in a very large series. It includes: - USB uclass - USB hub uclass - Adjustments to make USB keyboard, Ethernet and storage continue to work - Sandbox USB emulation support - Sandbox USB emulations for flash and hub devices - A reasonable set of tests - EHCI and XHCI support (not OHCI) - Conversion of Tegra and Exynos drivers to driver model - Adjustments to make the 'usb' command operate as expected - README describing how USB works with driver model Both EHCI and XHCI needed a little bit of refactoring before they are converted to driver model - e.g. removal of weak fuctions and splitting up the init code. This series includes patches to remove the non-driver-model code for Exynos and Tegra, to be applied once everything is stable. For now it is convenient to be able to compare the two options. This series does not change how USB is started up. The 'usb start' command scans the buses as before, and takes just as long. Once it has started you can use 'dm tree' to see the tree structure of the USB bus, although 'usb tree' provides a better view. It is unclear how we could implement lazy init for USB given the long time it takes to probe the bus. A README is provided to describe how USB works under driver model. This series is available at u-boot-dm/usb-working. Changes in v2: - Rewrite and expand series to support driver model fully Simon Glass (80): linker_lists: Add a function to access a linker list entry sandbox: Fix comment for os_open() dm: test: bus: Use a local variable to simplify code dm: exynos: snow: Move the keyboard to I2C dm: core: Support allocating driver-private data for DMA dm: core: Convert driver_bind() to use const dm: core: Rename driver data function to dev_get_driver_data() dm: core: Mark device as active before calling uclass probe() methods dm: core: Add device children and sibling functions dm: gpio: Add an implementation for gpio_get_number() dm: usb: Add a uclass for USB controllers dm: usb: Adjust usb command to prepare for driver model dm: usb: Adjust usb_alloc_new_device() to return an error dm: usb: Convert 'usb' command to support driver model dm: usb: Drop the legacy USB init sequence dm: usb: Refactor port resets dm: usb: Move descriptor setup code into its own function dm: usb: Split out more code from usb_new_device() dm: usb: Complete the splitting up of usb_new_device() dm: usb: Convert core usb.c file to support driver model dm: usb: Split hub detection into its own function dm: usb: Add driver model support for hubs dm: usb: Move USB storage definitions to usb_defs.h dm: usb: Fix type problems in usb_stor_get_info() dm: usb: Simply device finding code in usb_storage dm: usb: Adjust usb_storage to work with sandbox dm: usb: Move storage device scanning into its own function dm: usb: Convert usb_storage to driver model dm: usb: Move all the EHCI weak functions together and declare them dm: usb: Pass EHCI controller pointer to ehci_get_port_speed() dm: usb: Allow ECHI to hold private data for the controller dm: usb: tegra: Store the controller type explicitly dm: usb: Pass EHCI controller pointer to ehci_powerup_fixup() dm: usb: tegra: Drop use of global controller variable dm: usb: Pass EHCI controller pointer to ehci_set_usbmode() dm: usb: Pass EHCI controller pointer to ehci_get_portsc_register() dm: usb: ehci: Use a function to find the controller from struct udevice dm: usb: Refactor EHCI init dm: usb: Drop the EHCI weak functions dm: usb: Change ehci_reset() to use a pointer dm: usb: Add driver model support to EHCI dm: usb: Allow USB drivers to be declared and auto-probed dm: usb: Bind generic USB devices when there is no driver dm: usb: Allow setting up a USB controller as a device/gadget dm: usb: Split out the keyboard probe into its own function dm: usb: Support driver model with USB keyboards dm: usb: tegra: Add vbus GPIOs for nyan dm: usb: Move struct usb_string to a common place dm: usb: sandbox: Add a uclass for USB device emulation dm: usb: sandbox: Reset emulation devices in usb stop() dm: usb: sandbox: Add an emulator for USB flash devices dm: usb: sandbox: Add an emulator for USB hub emulation dm: usb: sandbox: Add a driver for sandbox dm: usb: dts: sandbox: Add some sample USB devices to sandbox dm: usb: Add support for USB ethernet devices with driver model dm: usb: exynos: Add driver model support to exynos EHCI dm: usb: tegra: Remove the port_addr_clear_csc variable dm: usb: tegra: Tidy up error handling and a static function dm: usb: tegra: Move most of init/uninit into a function dm: usb: tegra: Add driver model support to tegra EHCI dm: usb: xhci: Use a function to get xhci_ctrl dm: usb: xhci: Use explicit parameters for xhci_alloc_virt_device() dm: usb: xhci: Use explicit parameters for xhci_setup_addressable_virt_dev() dm: usb: xhci: Factor out common init/uninit dm: usb: Support driver model in XHCI dm: usb: Rename the XHCI HCD to U-Boot dm: usb: exynos: Adjust XHCI driver to support driver model dm: usb: exynos: Use driver model for USB dm: usb: exynos: Enable both USB ports on snow dm: usb: exynos: Enable both EHCI and XHCI on snow dm: usb: tegra: Move to driver model for USB dm: usb: Add a generic descriptor struct dm: usb: Tidy up pipe value decoding dm: usb: sandbox: Enable USB dm: test: Correct printf() output nit in 'dm uclass' dm: test: Allow 'dm test' to select a particular test to run dm: usb: Add tests for the USB uclass dm: usb: tegra: Drop legacy USB code dm: usb: exynos: Drop legacy USB code dm: usb: Add a README for driver model Makefile | 1 + arch/arm/cpu/armv7/exynos/Kconfig | 3 + arch/arm/dts/exynos5250-snow.dts | 5 +- arch/arm/dts/tegra124-nyan-big.dts | 2 + arch/arm/mach-tegra/Kconfig | 3 + arch/sandbox/dts/sandbox.dts | 40 ++ board/genesi/mx51_efikamx/efikamx-usb.c | 4 +- board/nvidia/common/board.c | 1 - common/cmd_usb.c | 198 ++++++++-- common/usb.c | 277 ++++++++------ common/usb_hub.c | 194 ++++++++-- common/usb_kbd.c | 119 ++++-- common/usb_storage.c | 249 ++++++------ configs/sandbox_defconfig | 4 + doc/driver-model/usb-info.txt | 415 ++++++++++++++++++++ drivers/core/device-remove.c | 4 +- drivers/core/device.c | 66 +++- drivers/core/lists.c | 2 +- drivers/gpio/gpio-uclass.c | 12 + drivers/i2c/s3c24x0_i2c.c | 2 +- drivers/i2c/tegra_i2c.c | 6 +- drivers/usb/Kconfig | 16 + drivers/usb/emul/Kconfig | 8 + drivers/usb/emul/Makefile | 10 + drivers/usb/emul/sandbox_flash.c | 423 +++++++++++++++++++++ drivers/usb/emul/sandbox_hub.c | 303 +++++++++++++++ drivers/usb/emul/usb-emul-uclass.c | 263 +++++++++++++ drivers/usb/eth/usb_ether.c | 52 ++- drivers/usb/gadget/ci_udc.c | 4 + drivers/usb/host/Makefile | 5 + drivers/usb/host/ehci-exynos.c | 127 +++---- drivers/usb/host/ehci-faraday.c | 112 +++--- drivers/usb/host/ehci-hcd.c | 379 ++++++++++++++----- drivers/usb/host/ehci-mx5.c | 12 + drivers/usb/host/ehci-tegra.c | 288 +++++++------- drivers/usb/host/ehci.h | 47 +++ drivers/usb/host/usb-sandbox.c | 117 ++++++ drivers/usb/host/usb-uclass.c | 645 ++++++++++++++++++++++++++++++++ drivers/usb/host/xhci-exynos5.c | 106 +++--- drivers/usb/host/xhci-mem.c | 24 +- drivers/usb/host/xhci-ring.c | 8 +- drivers/usb/host/xhci.c | 312 ++++++++++++--- drivers/usb/host/xhci.h | 31 +- drivers/usb/musb-new/musb_uboot.c | 4 +- include/configs/sandbox.h | 2 + include/configs/snow.h | 2 + include/dm/device-internal.h | 2 +- include/dm/device.h | 51 ++- include/dm/test.h | 7 +- include/dm/uclass-id.h | 5 + include/fdtdec.h | 5 - include/linker_lists.h | 10 + include/linux/usb/ch9.h | 18 + include/linux/usb/gadget.h | 13 - include/os.h | 2 +- include/usb.h | 494 +++++++++++++++++++++++- include/usb_defs.h | 68 +++- lib/fdtdec.c | 5 - test/dm/Makefile | 1 + test/dm/bus.c | 16 +- test/dm/cmd_dm.c | 13 +- test/dm/test-dm.sh | 3 + test/dm/test-main.c | 7 +- test/dm/test-uclass.c | 3 +- test/dm/test.dts | 41 ++ test/dm/usb.c | 50 +++ 66 files changed, 4807 insertions(+), 914 deletions(-) create mode 100644 doc/driver-model/usb-info.txt create mode 100644 drivers/usb/emul/Kconfig create mode 100644 drivers/usb/emul/Makefile create mode 100644 drivers/usb/emul/sandbox_flash.c create mode 100644 drivers/usb/emul/sandbox_hub.c create mode 100644 drivers/usb/emul/usb-emul-uclass.c create mode 100644 drivers/usb/host/usb-sandbox.c create mode 100644 drivers/usb/host/usb-uclass.c create mode 100644 test/dm/usb.c -- 2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH 0/14] sandbox: exynos: Move some (mostly) sandbox CONFIG options to Kconfig
by Simon Glass 11 Jun '15

11 Jun '15

These options relate to the sandbox drivers and also sound. There are still more options to move, but this is a start. Simon Glass (14): sandbox: Move GPIO CONFIGs to Kconfig sandbox: Move CONFIG_SYS_VSNPRINTF to Kconfig sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig sandbox: Move CONFIG_SYS_I2C_SANDBOX to Kconfig sandbox: Move CONFIG_SANDBOX_SPI to Kconfig sandbox: Move CONFIG_SPI_FLASH_SANDBOX to Kconfig sandbox: Move CONFIG_TPM_TIS_SANDBOX to Kconfig sandbox: exynos: Move CONFIG_SOUND to Kconfig sandbox: exynos: Move CONFIG_CMD_SOUND to Kconfig sandbox: exynos: Move CONFIG_I2S to Kconfig sandbox: exynos: Move CONFIG_I2S_SAMSUNG to Kconfig sandbox: exynos: Move CONFIG_SOUND_MAX98095 to Kconfig sandbox: exynos: Move CONFIG_SOUND_WM8994 to Kconfig sandbox: exynos: Move CONFIG_SOUND_SANDBOX to Kconfig arch/x86/Kconfig | 3 ++ common/Kconfig | 10 +++++++ configs/arndale_defconfig | 5 ++++ configs/sandbox_defconfig | 10 +++++++ configs/smdk5250_defconfig | 5 ++++ configs/snow_defconfig | 5 ++++ drivers/gpio/Kconfig | 21 ++++++++++++++ drivers/i2c/Kconfig | 30 ++++++++++++++++++++ drivers/mtd/spi/Kconfig | 10 +++++++ drivers/serial/Kconfig | 20 ++++++++++++++ drivers/serial/serial-uclass.c | 5 ++-- drivers/sound/Kconfig | 55 +++++++++++++++++++++++++++++++++++++ drivers/spi/Kconfig | 25 +++++++++++++++++ drivers/tpm/Kconfig | 7 +++++ include/configs/exynos5250-common.h | 10 ------- include/configs/sandbox.h | 16 ----------- include/configs/x86-common.h | 1 - include/fdtdec.h | 6 ++++ lib/Kconfig | 9 ++++++ 19 files changed, 224 insertions(+), 29 deletions(-) -- 2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH v2 0/22] x86: Add bare support for Intel Minnowboard Max
by Simon Glass 11 Jun '15

11 Jun '15

This series adds support for the Intel Minnowboard Max (called Minnowmax for short). Along the way a few refactors and additions are made: - The Intel Firmware Support Package support is moved from queensbay to a common location - PCI support for XHCI is added - A few tweaks are made to the PCI support - Support for the debug UART (early debug output) is provided - The microcode tool now also supports reading in header files This board has been lightly tested. The following seem to work: - USB2 on the blue port (not USB3), e.g. for keyboard - Ethernet - HDMI out and console - UART - uSD card - SPI SATA is detected but I have not attached a drive to try it. USB3 shows signs of life but does not detect a USB stick, and crashes when trying to use a USB Ethernet adaptor. For SPI some parts cannot be read and others cannot be written. This seems to be a feature of the Intel hardware configuration. It may be possible to fix this using the SPI registers but I cannot work out how / lost interest trying. So far, addresses from 500000 to 700000 can be used. I have not tried the ICH GPIO driver but it likely needs work before it will function. I2C is not supported as there is currently no U-Boot driver for this. The zboot command can be used to start a bzImage kernel. Verified boot is supported - use mkimage to sign images as described in this walk-through: doc/uImage.FIT/beaglebone_vboot.txt Boot time is grim: - 1423ms to set up display (Intel FSP) - 454ms to scan AHCI (when no devices are connected) - ~1000ms to power up and start cache-as-RAM init (Intel FSP) (this is not benchmarked, may be inaccurate) - ~950ms to set up memory and initial machine configuration (Intel FSP) (this is not benchmarked, may be inaccurate) So it takes over 4 seconds to get to booting a kernel. Implementing the Memory Reference Code (MRC) cache should improve this slightly (perhaps a reduction of 500-1000ms). This cache is implemented for ivybridge so that code needs to be moved into a generic x86 directory and plumbed into the FSP code. This has not been done in this series. Also the video and SATA/AHCI can be disabled if preferred. It is also possible to run as a coreboot payload. See the instructions in README.x86 for this. In this case video does not work since coreboot does not pass through the VESA display information. To support the single-core 1GB variant, changes would need to be made to arch/x86/cpu/baytrail/fsp_configs.c to select different values for the memory. The microcode update may need to change also. This series is available at u-boot-x86 branch minnow-working. Changes in v2: - Fix missing spaces (code style nit) - Add another comment in pci_find_class() - Fix README typos - Rename MMCONF_BASE_ADDRESS to PCIE_ECAM_BASE - Adjust the Kconfig help according to Bin's comments - Rename pci_rom_emul_t to pci_rom_emul - Move MMC code into a new pci_mmc.c file - Remove setup_early_uart() function prototype - Remove duplicate prototype of setup_early_uart() - Document how to change the SPI speed with ifdtool - Move CONFIG_SYS_CACHELINE_SIZE to the board CONFIG file - Add comment about FSP setting PCIE_ECAM_BASE - Put baytrail Kconfig in alphabetical order - Remove superfluous check for CONFIG_DEBUG_UART in setup_early_uart() - Fix compatible string for SPI flash - Remove commented-out DEBUG_UART_CLOCK baud rate - Rename 'Coreboot' to 'coreboot' in README.x86 Simon Glass (22): x86: Enhance the microcode tool to support header files as input pci: Add a function to find a device by class x86: pci: Add PCI IDs for Minnowboard Max x86: video: Enable video for Minnowboard Max usb: pci: Use pci_find_class() to find the device usb: pci: Add XHCI driver for PCI x86: Add an option to enabling building a ROM file x86: Rename MMCONF_BASE_ADDRESS and make it common across x86 x86: video: Allow video ROM execution to fall back to the other method x86: bootstage: Add time measurement for vesa start-up x86: Move common FSP code into a common location x86: Adjust the FSP types slightly x86: Make CAR and DRAM FSP code common x86: mmc: Move common FSP functions into a common file x86: Remove unnecessary casts and fix comment typos x86: Allow FSP Kconfig settings for all x86 x86: Allow a UART to be set up before the FSP is ready x86: spi: Support ValleyView in ICH SPI driver scsi: bootstage: Measure time taken to scan the bus x86: Enable bootstage features x86: Add some documentation on how to port U-Boot on x86 x86: Add support for Intel Minnowboard Max Makefile | 5 +- arch/x86/Kconfig | 67 + arch/x86/cpu/Makefile | 1 + arch/x86/cpu/baytrail/Kconfig | 9 + arch/x86/cpu/baytrail/Makefile | 10 + arch/x86/cpu/baytrail/early_uart.c | 78 + arch/x86/cpu/baytrail/fsp_configs.c | 156 + arch/x86/cpu/baytrail/pci.c | 47 + arch/x86/cpu/baytrail/valleyview.c | 38 + arch/x86/cpu/ivybridge/gma.c | 3 +- arch/x86/cpu/ivybridge/sdram.c | 2 +- arch/x86/cpu/queensbay/Kconfig | 38 - arch/x86/cpu/queensbay/Makefile | 4 +- arch/x86/cpu/queensbay/fsp_configs.c | 2 +- arch/x86/cpu/queensbay/tnc.c | 29 +- arch/x86/cpu/queensbay/tnc_pci.c | 17 +- arch/x86/cpu/queensbay/topcliff.c | 33 +- arch/x86/dts/Makefile | 3 +- arch/x86/dts/microcode/m0130673322.dtsi | 3284 ++++++++++++++++++++ arch/x86/dts/minnowmax.dts | 45 + arch/x86/dts/serial.dtsi | 2 +- arch/x86/include/asm/arch-baytrail/fsp/azalia.h | 39 + arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h | 95 + arch/x86/include/asm/arch-baytrail/gpio.h | 13 + arch/x86/include/asm/arch-ivybridge/sandybridge.h | 2 +- arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h | 2 - .../include/asm/{arch-queensbay => }/fsp/fsp_api.h | 6 +- .../asm/{arch-queensbay => }/fsp/fsp_bootmode.h | 0 .../include/asm/{arch-queensbay => }/fsp/fsp_ffs.h | 0 .../include/asm/{arch-queensbay => }/fsp/fsp_fv.h | 0 .../include/asm/{arch-queensbay => }/fsp/fsp_hob.h | 0 .../asm/{arch-queensbay => }/fsp/fsp_infoheader.h | 0 .../asm/{arch-queensbay => }/fsp/fsp_platform.h | 0 .../asm/{arch-queensbay => }/fsp/fsp_support.h | 6 +- .../asm/{arch-queensbay => }/fsp/fsp_types.h | 0 arch/x86/include/asm/u-boot-x86.h | 3 + arch/x86/lib/Makefile | 1 + arch/x86/lib/cmd_hob.c | 2 +- arch/x86/lib/fsp/Makefile | 10 + .../{cpu/queensbay/tnc_car.S => lib/fsp/fsp_car.S} | 0 arch/x86/lib/fsp/fsp_common.c | 55 + .../queensbay/tnc_dram.c => lib/fsp/fsp_dram.c} | 2 +- arch/x86/{cpu/queensbay => lib/fsp}/fsp_support.c | 20 +- board/google/chromebook_link/Kconfig | 3 +- board/intel/minnowmax/Kconfig | 30 + board/intel/minnowmax/MAINTAINERS | 6 + board/intel/minnowmax/Makefile | 7 + board/intel/minnowmax/minnowmax.c | 32 + board/intel/minnowmax/start.S | 9 + common/cmd_scsi.c | 2 + configs/minnowmax_defconfig | 13 + doc/README.x86 | 121 +- drivers/mmc/Makefile | 1 + drivers/mmc/pci_mmc.c | 42 + drivers/pci/pci.c | 43 + drivers/pci/pci_rom.c | 32 +- drivers/spi/ich.c | 56 +- drivers/spi/ich.h | 11 +- drivers/usb/host/Makefile | 1 + drivers/usb/host/ehci-pci.c | 53 +- drivers/usb/host/xhci-pci.c | 60 + drivers/video/vesa_fb.c | 9 +- include/bootstage.h | 1 + include/configs/minnowmax.h | 72 + include/configs/x86-common.h | 3 + include/mmc.h | 14 + include/pci.h | 3 +- include/pci_ids.h | 5 + include/pci_rom.h | 15 +- tools/microcode-tool.py | 90 +- 70 files changed, 4608 insertions(+), 255 deletions(-) create mode 100644 arch/x86/cpu/baytrail/Kconfig create mode 100644 arch/x86/cpu/baytrail/Makefile create mode 100644 arch/x86/cpu/baytrail/early_uart.c create mode 100644 arch/x86/cpu/baytrail/fsp_configs.c create mode 100644 arch/x86/cpu/baytrail/pci.c create mode 100644 arch/x86/cpu/baytrail/valleyview.c create mode 100644 arch/x86/dts/microcode/m0130673322.dtsi create mode 100644 arch/x86/dts/minnowmax.dts create mode 100644 arch/x86/include/asm/arch-baytrail/fsp/azalia.h create mode 100644 arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h create mode 100644 arch/x86/include/asm/arch-baytrail/gpio.h rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_api.h (88%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_bootmode.h (100%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_ffs.h (100%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_fv.h (100%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_hob.h (100%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_infoheader.h (100%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_platform.h (100%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_support.h (98%) rename arch/x86/include/asm/{arch-queensbay => }/fsp/fsp_types.h (100%) create mode 100644 arch/x86/lib/fsp/Makefile rename arch/x86/{cpu/queensbay/tnc_car.S => lib/fsp/fsp_car.S} (100%) create mode 100644 arch/x86/lib/fsp/fsp_common.c rename arch/x86/{cpu/queensbay/tnc_dram.c => lib/fsp/fsp_dram.c} (98%) rename arch/x86/{cpu/queensbay => lib/fsp}/fsp_support.c (96%) create mode 100644 board/intel/minnowmax/Kconfig create mode 100644 board/intel/minnowmax/MAINTAINERS create mode 100644 board/intel/minnowmax/Makefile create mode 100644 board/intel/minnowmax/minnowmax.c create mode 100644 board/intel/minnowmax/start.S create mode 100644 configs/minnowmax_defconfig create mode 100644 drivers/mmc/pci_mmc.c create mode 100644 drivers/usb/host/xhci-pci.c create mode 100644 include/configs/minnowmax.h -- 2.2.0.rc0.207.ga3a616c

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[U-Boot] [PATCH] pepper: Add support for DDR3 variants
by Ash Charles 08 Jun '15

08 Jun '15

Some variants of the Gumstix Pepper board use DDR3 memory instead of DDR2. This adds a machine variant to support these DDR3-based boards which can be built as 'pepper_ddr3_defconfig' rather than the normal 'pepper_defconfig'. Signed-off-by: Ash Charles <ashcharles(a)gmail.com> --- board/gumstix/pepper/MAINTAINERS | 1 + board/gumstix/pepper/board.c | 95 ++++++++++++++++++++++++++++++---------- configs/pepper_ddr3_defconfig | 4 ++ 3 files changed, 77 insertions(+), 23 deletions(-) create mode 100644 configs/pepper_ddr3_defconfig diff --git a/board/gumstix/pepper/MAINTAINERS b/board/gumstix/pepper/MAINTAINERS index ae860ec..7132095 100644 --- a/board/gumstix/pepper/MAINTAINERS +++ b/board/gumstix/pepper/MAINTAINERS @@ -4,3 +4,4 @@ S: Maintained F: board/gumstix/pepper/ F: include/configs/pepper.h F: configs/pepper_defconfig +F: configs/pepper_ddr3_defconfig diff --git a/board/gumstix/pepper/board.c b/board/gumstix/pepper/board.c index f644f81..fbbca3b 100644 --- a/board/gumstix/pepper/board.c +++ b/board/gumstix/pepper/board.c @@ -33,13 +33,55 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_SPL_BUILD -static const struct ddr_data ddr2_data = { +#define OSC (V_OSCK/1000000) + +#ifdef CONFIG_USE_DDR3 +static const struct ddr_data ddr_data = { + .datardsratio0 = MT41K256M16HA125E_RD_DQS, + .datawdsratio0 = MT41K256M16HA125E_WR_DQS, + .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE, + .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA, +}; + +static const struct cmd_control ddr_cmd_ctrl_data = { + .cmd0csratio = MT41K256M16HA125E_RATIO, + .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT, + + .cmd1csratio = MT41K256M16HA125E_RATIO, + .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT, + + .cmd2csratio = MT41K256M16HA125E_RATIO, + .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT, +}; + +static struct emif_regs ddr_emif_reg_data = { + .sdram_config = MT41K256M16HA125E_EMIF_SDCFG, + .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF, + .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1, + .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2, + .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3, + .zq_config = MT41K256M16HA125E_ZQ_CFG, + .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY, +}; + +const struct dpll_params dpll_ddr = {400, OSC-1, 1, -1, -1, -1, -1}; + +const struct ctrl_ioregs ioregs_ddr = { + .cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE, + .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, +}; + +#else +static const struct ddr_data ddr_data = { .datardsratio0 = MT47H128M16RT25E_RD_DQS, .datafwsratio0 = MT47H128M16RT25E_PHY_FIFO_WE, .datawrsratio0 = MT47H128M16RT25E_PHY_WR_DATA, }; -static const struct cmd_control ddr2_cmd_ctrl_data = { +static const struct cmd_control ddr_cmd_ctrl_data = { .cmd0csratio = MT47H128M16RT25E_RATIO, .cmd1csratio = MT47H128M16RT25E_RATIO, @@ -47,7 +89,7 @@ static const struct cmd_control ddr2_cmd_ctrl_data = { .cmd2csratio = MT47H128M16RT25E_RATIO, }; -static const struct emif_regs ddr2_emif_reg_data = { +static const struct emif_regs ddr_emif_reg_data = { .sdram_config = MT47H128M16RT25E_EMIF_SDCFG, .ref_ctrl = MT47H128M16RT25E_EMIF_SDREF, .sdram_tim1 = MT47H128M16RT25E_EMIF_TIM1, @@ -56,6 +98,33 @@ static const struct emif_regs ddr2_emif_reg_data = { .emif_ddr_phy_ctlr_1 = MT47H128M16RT25E_EMIF_READ_LATENCY, }; +const struct dpll_params dpll_ddr = {266, OSC-1, 1, -1, -1, -1, -1}; + +const struct ctrl_ioregs ioregs_ddr = { + .cm0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm2ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, +}; +#endif /* CONFIG_USE_DDR3 */ + +const struct dpll_params *get_dpll_ddr_params(void) +{ + return &dpll_ddr; +} + +void sdram_init(void) +{ +#ifdef CONFIG_USE_DDR3 + config_ddr(400, &ioregs_ddr, &ddr_data, + &ddr_cmd_ctrl_data, &ddr_emif_reg_data, 0); +#else + config_ddr(266, &ioregs_ddr, &ddr_data, + &ddr_cmd_ctrl_data, &ddr_emif_reg_data, 0); +#endif +} + #ifdef CONFIG_SPL_OS_BOOT int spl_start_uboot(void) { @@ -64,14 +133,6 @@ int spl_start_uboot(void) } #endif -#define OSC (V_OSCK/1000000) -const struct dpll_params dpll_ddr = {266, OSC-1, 1, -1, -1, -1, -1}; - -const struct dpll_params *get_dpll_ddr_params(void) -{ - return &dpll_ddr; -} - void set_uart_mux_conf(void) { enable_uart0_pin_mux(); @@ -82,19 +143,7 @@ void set_mux_conf_regs(void) enable_board_pin_mux(); } -const struct ctrl_ioregs ioregs = { - .cm0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, - .cm1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, - .cm2ioctl = MT47H128M16RT25E_IOCTRL_VALUE, - .dt0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, - .dt1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, -}; -void sdram_init(void) -{ - config_ddr(266, &ioregs, &ddr2_data, - &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0); -} #endif int board_init(void) diff --git a/configs/pepper_ddr3_defconfig b/configs/pepper_ddr3_defconfig new file mode 100644 index 0000000..8077399 --- /dev/null +++ b/configs/pepper_ddr3_defconfig @@ -0,0 +1,4 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="USE_DDR3" +CONFIG_ARM=y +CONFIG_TARGET_PEPPER=y -- 2.1.4

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[U-Boot] [PATCH] builderthread.py: Keep 'SPL'
by Tom Rini 07 Jun '15

07 Jun '15

On i.MX platforms the SPL binary is called "SPL" so make sure we keep that. Cc: Simon Glass <sjg(a)chromium.org> Signed-off-by: Tom Rini <trini(a)konsulko.com> --- tools/buildman/builderthread.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/buildman/builderthread.py b/tools/buildman/builderthread.py index a65084b..e15d13c 100644 --- a/tools/buildman/builderthread.py +++ b/tools/buildman/builderthread.py @@ -342,7 +342,7 @@ class BuilderThread(threading.Thread): # Now write the actual build output if keep_outputs: self.CopyFiles(result.out_dir, build_dir, '', ['u-boot*', '*.bin', - '*.map', '*.img', 'MLO', 'include/autoconf.mk', + '*.map', '*.img', 'MLO', 'SPL', 'include/autoconf.mk', 'spl/u-boot-spl*']) def CopyFiles(self, out_dir, build_dir, dirname, patterns): -- 1.7.9.5

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[U-Boot] [PATCH 0/4] x86: support of pin-muxing from device tree
by Gabriel Huau 04 Jun '15

04 Jun '15

This serie of patches adds the support of pin-muxing from the device tree through different properties. I have put two example to enable the USB Host on the minnowboard max. The support of the call to 'setup_pch_gpios' is still supported and only the minnowboard has been tested with the device tree implementation. Because the GPIO and IO base register ares different, I have also defined some proxy function to set the function/value and direction of the GPIO as the GPIO register can override some registers in the IO. Gabriel Huau (4): x86: baytrail: fix the GPIOBASE address x86: minnowmax: add GPIO banks in the device tree x86: gpio: add pinctrl support from the device tree x86: minnowmax: initialize the pin-muxing from device tree arch/x86/dts/minnowmax.dts | 63 +++++++++ arch/x86/include/asm/arch-baytrail/gpio.h | 3 +- arch/x86/include/asm/gpio.h | 1 + board/intel/minnowmax/minnowmax.c | 9 ++ drivers/gpio/intel_ich6_gpio.c | 222 ++++++++++++++++++++++++++---- include/configs/minnowmax.h | 1 + include/dt-bindings/gpio/gpio.h | 20 +++ 7 files changed, 292 insertions(+), 27 deletions(-) -- 2.1.4

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