December 2015 - U-Boot

[U-Boot] [PATCH v2] mx6sxsabresd: Fix Ethernet PHY reset sequence
by Fabio Estevam 07 Dec '15

07 Dec '15

From: Fabio Estevam <fabio.estevam(a)freescale.com> Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is registered") Ethernet is no longer functional. This commit does not have an issue in itself, but it revelead a problem with the Ethernet initialization. Fix this by calling enable_fec_anatop_clock() earlier and also by adding a 10ms reset delay as recommended in the AR8031 datasheet. Suggested-by: Jörg Krause <joerg.krause(a)embedded.rocks> Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- Changes since v1: - Fix Jörg's email address board/freescale/mx6sxsabresd/mx6sxsabresd.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 3ee4662..56dc020 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -150,11 +150,15 @@ static int setup_fec(void) { struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; - int reg; + int reg, ret; /* Use 125MHz anatop loopback REF_CLK1 for ENET1 */ clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, 0); + ret = enable_fec_anatop_clock(0, ENET_125MHZ); + if (ret) + return ret; + imx_iomux_v3_setup_multiple_pads(phy_control_pads, ARRAY_SIZE(phy_control_pads)); @@ -163,14 +167,14 @@ static int setup_fec(void) /* Reset AR8031 PHY */ gpio_direction_output(IMX_GPIO_NR(2, 7) , 0); - udelay(500); + mdelay(10); gpio_set_value(IMX_GPIO_NR(2, 7), 1); reg = readl(&anatop->pll_enet); reg |= BM_ANADIG_PLL_ENET_REF_25M_ENABLE; writel(reg, &anatop->pll_enet); - return enable_fec_anatop_clock(0, ENET_125MHZ); + return 0; } int board_eth_init(bd_t *bis) -- 1.9.1

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[U-Boot] [PATCH 1/7] net: phy: micrel: Configure KSZ9021/KSZ9031 skew from OF
by Marek Vasut 07 Dec '15

07 Dec '15

Add code to process the KSZ9021/KSZ9031 OF props if they are present and configure skew registers based on the information from the OF. This code is only enabled if the DM support for ethernet is also enabled. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Joe Hershberger <joe.hershberger(a)ni.com> Cc: Chin Liang See <clsee(a)altera.com> Cc: Dinh Nguyen <dinguyen(a)opensource.altera.com> --- drivers/net/phy/micrel.c | 127 ++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 126 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c index 5e49666..a379230 100644 --- a/drivers/net/phy/micrel.c +++ b/drivers/net/phy/micrel.c @@ -9,9 +9,14 @@ */ #include <config.h> #include <common.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h> #include <micrel.h> #include <phy.h> +DECLARE_GLOBAL_DATA_PTR; + static struct phy_driver KSZ804_driver = { .name = "Micrel KSZ804", .uid = 0x221510, @@ -174,6 +179,58 @@ static int ksz90xx_startup(struct phy_device *phydev) return 0; } +/* Common OF config bits for KSZ9021 and KSZ9031 */ +#if defined(CONFIG_PHY_MICREL_KSZ9021) || defined(CONFIG_PHY_MICREL_KSZ9031) +#ifdef CONFIG_DM_ETH +struct ksz90x1_ofcfg { + u16 reg; + u16 devad; + const char **grp; + u16 grpsz; +}; + +static const char *ksz90x1_rxd_grp[] = + { "rxd0-skew-ps", "rxd1-skew-ps", "rxd2-skew-ps", "rxd3-skew-ps" }; +static const char *ksz90x1_txd_grp[] = + { "txd0-skew-ps", "txd1-skew-ps", "txd2-skew-ps", "txd3-skew-ps" }; + +static int ksz90x1_of_config_group(struct phy_device *phydev, + struct ksz90x1_ofcfg *ofcfg) +{ + struct udevice *dev = phydev->dev; + struct phy_driver *drv = phydev->drv; + const int ps_to_regval = 200; + int val[4]; + int i, changed = 0; + u16 regval = 0; + + if (!drv || !drv->writeext) + return -EOPNOTSUPP; + + for (i = 0; i < ofcfg->grpsz; i++) { + val[i] = fdtdec_get_uint(gd->fdt_blob, dev->of_offset, + ofcfg->grp[i], -1); + if (val[i] == -1) { + /* Default register value for KSZ9021 */ + regval |= 0x7 << (4 * i); + } else { + changed = 1; /* Value was changed in OF */ + /* Calculate the register value and fix corner cases */ + if (val[i] > ps_to_regval * 0xf) + regval |= 0xf << (4 * i); + else + regval |= (val[i] / ps_to_regval) << (4 * i); + } + } + + if (!changed) + return 0; + + return drv->writeext(phydev, 0, ofcfg->devad, ofcfg->reg, regval); +} +#endif +#endif + #ifdef CONFIG_PHY_MICREL_KSZ9021 /* * KSZ9021 @@ -188,6 +245,33 @@ static int ksz90xx_startup(struct phy_device *phydev) #define CTRL1000_CONFIG_MASTER (1 << 11) #define CTRL1000_MANUAL_CONFIG (1 << 12) +#ifdef CONFIG_DM_ETH +static const char *ksz9021_clk_grp[] = + { "txen-skew-ps", "txc-skew-ps", "rxdv-skew-ps", "rxc-skew-ps" }; + +static int ksz9021_of_config(struct phy_device *phydev) +{ + struct ksz90x1_ofcfg ofcfg[] = { + { MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0, ksz90x1_rxd_grp, 4 }, + { MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0, ksz90x1_txd_grp, 4 }, + { MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0, ksz9021_clk_grp, 4 }, + }; + int i, ret = 0; + + for (i = 0; i < ARRAY_SIZE(ofcfg); i++) + ret = ksz90x1_of_config_group(phydev, &(ofcfg[i])); + if (ret) + return ret; + + return 0; +} +#else +static int ksz9021_of_config(struct phy_device *phydev) +{ + return 0; +} +#endif + int ksz9021_phy_extended_write(struct phy_device *phydev, int regnum, u16 val) { /* extended registers */ @@ -224,6 +308,11 @@ static int ksz9021_config(struct phy_device *phydev) const unsigned master = CTRL1000_PREFER_MASTER | CTRL1000_CONFIG_MASTER | CTRL1000_MANUAL_CONFIG; unsigned features = phydev->drv->features; + int ret; + + ret = ksz9021_of_config(phydev); + if (ret) + return ret; if (getenv("disable_giga")) features &= ~(SUPPORTED_1000baseT_Half | @@ -260,6 +349,34 @@ static struct phy_driver ksz9021_driver = { #define MII_KSZ9031_MMD_ACCES_CTRL 0x0d #define MII_KSZ9031_MMD_REG_DATA 0x0e +#ifdef CONFIG_DM_ETH +static const char *ksz9031_ctl_grp[] = { "txen-skew-ps", "rxdv-skew-ps" }; +static const char *ksz9031_clk_grp[] = { "txc-skew-ps", "rxc-skew-ps" }; + +static int ksz9031_of_config(struct phy_device *phydev) +{ + struct ksz90x1_ofcfg ofcfg[] = { + { MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, 2, ksz9031_ctl_grp, 2 }, + { MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, 2, ksz90x1_rxd_grp, 4 }, + { MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, 2, ksz90x1_txd_grp, 4 }, + { MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, 2, ksz9031_clk_grp, 2 }, + }; + int i, ret = 0; + + for (i = 0; i < ARRAY_SIZE(ofcfg); i++) + ret = ksz90x1_of_config_group(phydev, &(ofcfg[i])); + if (ret) + return ret; + + return 0; +} +#else +static int ksz9031_of_config(struct phy_device *phydev) +{ + return 0; +} +#endif + /* Accessors to extended registers*/ int ksz9031_phy_extended_write(struct phy_device *phydev, int devaddr, int regnum, u16 mode, u16 val) @@ -304,13 +421,21 @@ static int ksz9031_phy_extwrite(struct phy_device *phydev, int addr, MII_KSZ9031_MOD_DATA_POST_INC_RW, val); }; +static int ksz9031_config(struct phy_device *phydev) +{ + int ret; + ret = ksz9031_of_config(phydev); + if (ret) + return ret; + return genphy_config(phydev); +} static struct phy_driver ksz9031_driver = { .name = "Micrel ksz9031", .uid = 0x221620, .mask = 0xfffff0, .features = PHY_GBIT_FEATURES, - .config = &genphy_config, + .config = &ksz9031_config, .startup = &ksz90xx_startup, .shutdown = &genphy_shutdown, .writeext = &ksz9031_phy_extwrite, -- 2.1.4

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[U-Boot] [PATCH] mkimage : Fix generating multi and script images
by Philippe De Swert 07 Dec '15

07 Dec '15

Seems 92a655c3 broke creating multi and script type images. Since the file1:file2:file3 string does not get split up, it fails on trying to open an non-existing file. mkimage -A arm -O linux -T multi -C none -d zImage:splash.bmp:device.dtb uimage tools/mkimage: Can't open zImage:splash.bmp:device.dtb: No such file or directory Since the sizes of the different parts seem to get added in the actual routine that handles multi and script type images, we can probably skip the bit of the code that causes the failure for that type of images. Signed-off-by: Philippe De Swert <philippedeswert(a)gmail.com> --- tools/mkimage.c | 31 ++++++++++++++++++------------- 1 file changed, 18 insertions(+), 13 deletions(-) diff --git a/tools/mkimage.c b/tools/mkimage.c index 8af9d50..ae01cb1 100644 --- a/tools/mkimage.c +++ b/tools/mkimage.c @@ -311,21 +311,26 @@ NXTARG: ; exit (retval); } - dfd = open(params.datafile, O_RDONLY | O_BINARY); - if (dfd < 0) { - fprintf(stderr, "%s: Can't open %s: %s\n", - params.cmdname, params.datafile, strerror(errno)); - exit(EXIT_FAILURE); - } + if (!params.type == IH_TYPE_MULTI || + !params.type == IH_TYPE_SCRIPT) { + dfd = open(params.datafile, O_RDONLY | O_BINARY); + if (dfd < 0) { + fprintf(stderr, "%s: Can't open %s: %s\n", + params.cmdname, params.datafile, + strerror(errno)); + exit(EXIT_FAILURE); + } - if (fstat(dfd, &sbuf) < 0) { - fprintf(stderr, "%s: Can't stat %s: %s\n", - params.cmdname, params.datafile, strerror(errno)); - exit(EXIT_FAILURE); - } + if (fstat(dfd, &sbuf) < 0) { + fprintf(stderr, "%s: Can't stat %s: %s\n", + params.cmdname, params.datafile, + strerror(errno)); + exit(EXIT_FAILURE); + } - params.file_size = sbuf.st_size + tparams->header_size; - close(dfd); + params.file_size = sbuf.st_size + tparams->header_size; + close(dfd); + } /* * In case there an header with a variable -- 2.1.4

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[U-Boot] fw_env.config settings for Digilent ZedBoard (Zynq 7020 Soc)
by Brendan Simon (eTRIX) 07 Dec '15

07 Dec '15

Hi, I'm using a Digilent ZedBoard with a Xilinx Zynq 7020 SoC. The kernel is from Analog Devices and is a fork of 4.0.0 (according to the Makefile). I am struggling to work out the fw_env.config file required to use with fw_printenv/fw_saveenv. fw_printenv continually gives me CRC error and uses the defaults. Google hasn't provided much assistance, with some people reporting that the settings required are different to what /proc/mtd shows. Here is info from /proc/mtd and my /etc/fw_env.config. root@bjs:~# cat /proc/mtd dev: size erasesize name mtd0: 00500000 00010000 "boot" mtd1: 00020000 00010000 "bootenv" mtd2: 00020000 00010000 "config" mtd3: 00a80000 00010000 "image" mtd4: 01040000 00010000 "spare" root@bjs:~# cat /etc/fw_env.config # Configuration file for fw_(printenv/setenv) utility. # Up to two entries are valid, in this case the redundant # environment sector is assumed present. # MTD device name Device offset Env. size Flash sector size # /dev/mtd1 0x0000 0x20000 0x40000 # /dev/mtd1 0x0000 0x20000 0x20000 # /dev/mtd1 0x0000 0x20000 0x10000 # /dev/mtd2 0x0000 0x20000 0x40000 # /dev/mtd2 0x0000 0x20000 0x20000 /dev/mtd2 0x0000 0x20000 0x10000 Does anyone have any insight into what the correct fw_env.config settings should be from the above info? How can I find out the correct settings. Is there a command in u-boot itself which will report the correct information? Thanks, Brendan.

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[U-Boot] [PATCH] cgtqmx6eval: Fix defconfig name
by Otavio Salvador 07 Dec '15

07 Dec '15

After the conversion to SPL the defconfig was renamed, so adjust it. Signed-off-by: Otavio Salvador <otavio(a)ossystems.com.br> --- board/congatec/cgtqmx6eval/MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/congatec/cgtqmx6eval/MAINTAINERS b/board/congatec/cgtqmx6eval/MAINTAINERS index c41ebf5..48c0889 100644 --- a/board/congatec/cgtqmx6eval/MAINTAINERS +++ b/board/congatec/cgtqmx6eval/MAINTAINERS @@ -3,4 +3,4 @@ M: Otavio Salvador <otavio(a)ossystems.com.br> S: Maintained F: board/congatec/cgtqmx6eval/ F: include/configs/cgtqmx6eval.h -F: configs/cgtqmx6qeval_defconfig +F: configs/cgtqmx6eval_defconfig -- 2.6.2

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[U-Boot] [PATCH] dm: implement a cfi flash uclass
by Thomas Chou 07 Dec '15

07 Dec '15

Implement a cfi flash uclass to work with drivers/mtd/cfi-flash.c. The flash base address is extracted from device tree, and passed to cfi_flash_bank_addr(). Signed-off-by: Thomas Chou <thomas(a)wytron.com.tw> --- common/board_r.c | 3 ++ drivers/mtd/Kconfig | 11 +++++++ drivers/mtd/Makefile | 1 + drivers/mtd/cfi-flash-uclass.c | 70 ++++++++++++++++++++++++++++++++++++++++++ drivers/mtd/cfi_flash.c | 19 ++++++++++++ include/cfi-flash.h | 27 ++++++++++++++++ include/dm/uclass-id.h | 1 + 7 files changed, 132 insertions(+) create mode 100644 drivers/mtd/cfi-flash-uclass.c create mode 100644 include/cfi-flash.h diff --git a/common/board_r.c b/common/board_r.c index aaf390e..86b606d 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -38,6 +38,7 @@ #include <miiphy.h> #endif #include <mmc.h> +#include <mtd/cfi_flash.h> #include <nand.h> #include <onenand_uboot.h> #include <scsi.h> @@ -348,6 +349,8 @@ static int initr_flash(void) /* update start of FLASH memory */ #ifdef CONFIG_SYS_FLASH_BASE bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; +#else + bd->bi_flashstart = cfi_flash_bank_addr(0); #endif /* size of FLASH memory (final value) */ bd->bi_flashsize = flash_size; diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 59278d1..4b52894 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -1,3 +1,14 @@ +menu "CFI Flash Support" + +config DM_CFI_FLASH + bool "Enable Driver Model for CFI Flash drivers" + depends on DM + help + Enable driver model for CFI flash access. It uses the same API as + drivers/mtd/cfi_flash.c. But now implemented by the uclass. + +endmenu + source "drivers/mtd/nand/Kconfig" source "drivers/mtd/spi/Kconfig" diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile index a623f4c..d86e2c2 100644 --- a/drivers/mtd/Makefile +++ b/drivers/mtd/Makefile @@ -11,6 +11,7 @@ endif obj-$(CONFIG_MTD_PARTITIONS) += mtdpart.o obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o obj-$(CONFIG_HAS_DATAFLASH) += at45.o +obj-$(CONFIG_DM_CFI_FLASH) += cfi-flash-uclass.o obj-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o obj-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o obj-$(CONFIG_HAS_DATAFLASH) += dataflash.o diff --git a/drivers/mtd/cfi-flash-uclass.c b/drivers/mtd/cfi-flash-uclass.c new file mode 100644 index 0000000..1db7e2f --- /dev/null +++ b/drivers/mtd/cfi-flash-uclass.c @@ -0,0 +1,70 @@ +/* + * Copyright (C) 2015 Thomas Chou <thomas(a)wytron.com.tw> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h> +#include <cfi-flash.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Implement a cfi flash uclass to work with drivers/mtd/cfi-flash.c. + */ + +phys_addr_t cfi_flash_get_base(struct udevice *dev) +{ + struct cfi_flash_dev_priv *uc_priv = dev_get_uclass_priv(dev); + + return uc_priv->base; +} + +UCLASS_DRIVER(cfi_flash) = { + .id = UCLASS_CFI_FLASH, + .name = "cfi_flash", + .per_device_auto_alloc_size = sizeof(struct cfi_flash_dev_priv), +}; + +struct cfi_flash_platdata { + phys_addr_t base; +}; + +static int cfi_flash_probe(struct udevice *dev) +{ + struct cfi_flash_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct cfi_flash_platdata *plat = dev->platdata; + + uc_priv->base = plat->base; + + return 0; +} + +static int cfi_flash_ofdata_to_platdata(struct udevice *dev) +{ + struct cfi_flash_platdata *plat = dev_get_platdata(dev); + fdt_size_t size; + + fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", &size); + plat->base = (phys_addr_t)ioremap(dev_get_addr(dev), size); + + return 0; +} + +static const struct udevice_id cfi_flash_ids[] = { + { .compatible = "cfi-flash", }, + { } +}; + +U_BOOT_DRIVER(cfi_flash) = { + .name = "cfi_flash", + .id = UCLASS_CFI_FLASH, + .of_match = cfi_flash_ids, + .ofdata_to_platdata = cfi_flash_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct cfi_flash_platdata), + .probe = cfi_flash_probe, +}; diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 50983b8..6ec0877 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -18,6 +18,9 @@ /* #define DEBUG */ #include <common.h> +#include <dm.h> +#include <errno.h> +#include <cfi-flash.h> #include <asm/processor.h> #include <asm/io.h> #include <asm/byteorder.h> @@ -87,10 +90,26 @@ static u16 cfi_flash_config_reg(int i) int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT; #endif +#ifdef CONFIG_DM_CFI_FLASH +phys_addr_t cfi_flash_bank_addr(int i) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device(UCLASS_CFI_FLASH, i, &dev); + if (ret) + return ret; + if (!dev) + return -ENODEV; + + return cfi_flash_get_base(dev); +} +#else __weak phys_addr_t cfi_flash_bank_addr(int i) { return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i]; } +#endif __weak unsigned long cfi_flash_bank_size(int i) { diff --git a/include/cfi-flash.h b/include/cfi-flash.h new file mode 100644 index 0000000..0064cba --- /dev/null +++ b/include/cfi-flash.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2015 Thomas Chou <thomas(a)wytron.com.tw> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _DM_CFI_FLASH_H_ +#define _DM_CFI_FLASH_H_ + +/* + * Get the cfi flash base address + * + * @dev: The cfi flash device + * @return: the cfi flash base address + */ +phys_addr_t cfi_flash_get_base(struct udevice *dev); + +/* + * struct cfi_flash_dev_priv - information about a device used by the uclass + * + * @base: the cfi flash base address + */ +struct cfi_flash_dev_priv { + phys_addr_t base; +}; + +#endif /* _DM_CFI_FLASH_H_ */ diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index a6982ab..09e370c 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -25,6 +25,7 @@ enum uclass_id { UCLASS_SIMPLE_BUS, /* bus with child devices */ /* U-Boot uclasses start here - in alphabetical order */ + UCLASS_CFI_FLASH, /* cfi flash */ UCLASS_CLK, /* Clock source, e.g. used by peripherals */ UCLASS_CPU, /* CPU, typically part of an SoC */ UCLASS_CROS_EC, /* Chrome OS EC */ -- 2.1.4

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[U-Boot] [PATCH 001/159] LCD: Add an option to skip registration as an stdio output
by Lin Huang 07 Dec '15

07 Dec '15

From: Stephane Ayotte <sayotte(a)tycoint.com> This patch adds an option to skip the registration of LCD stdio output for boards that want to show different text on LCD than on serial output (or the active stdout selected by the environment variable). Signed-off-by: Stephane Ayotte <sayotte(a)tycoint.com> --- common/lcd.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/common/lcd.c b/common/lcd.c index d29308a..ed68be9 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -143,6 +143,16 @@ __weak int lcd_get_size(int *line_length) return *line_length * panel_info.vl_row; } +/* + * Implement a weak default function for boards that optionally + * need to skip the lcd console initialization. + */ +__weak int board_lcd_console_skip(void) +{ + /* As default, don't skip cfb init */ + return 0; +} + int drv_lcd_init(void) { struct stdio_dev lcddev; @@ -152,6 +162,9 @@ int drv_lcd_init(void) lcd_init(lcd_base); + if (board_lcd_console_skip()) + return 0; + /* Device initialization */ memset(&lcddev, 0, sizeof(lcddev)); -- 1.9.1

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[U-Boot] [PATCH] mailmap: Update Jagan Teki's name and email address
by Jagan Teki 07 Dec '15

07 Dec '15

Used quite different name's and e-mail address, all of them mapped to standard name and e-mail address. Cc: Tom Rini <trini(a)konsulko.com> Cc: Masahiro Yamada <yamada.masahiro(a)socionext.com> Signed-off-by: Jagan Teki <jteki(a)openedev.com> --- .mailmap | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/.mailmap b/.mailmap index e1c6663..2ec05ed 100644 --- a/.mailmap +++ b/.mailmap @@ -13,7 +13,11 @@ Andreas Bießmann <andreas.devel(a)googlemail.com> Aneesh V <aneesh(a)ti.com> Dirk Behme <dirk.behme(a)googlemail.com> Fabio Estevam <fabio.estevam(a)freescale.com> -Jagannadha Sutradharudu Teki <402jagan(a)gmail.com> +Jagan Teki <jteki(a)openedev.com> Jagannadha Sutradharudu Teki <402jagan(a)gmail.com> +Jagan Teki <jteki(a)openedev.com> Jagannadha Sutradharudu Teki <jaganna(a)gmail.com> +Jagan Teki <jteki(a)openedev.com> Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> +Jagan Teki <jteki(a)openedev.com> Jagannadha Sutradharudu Teki <jagannadh.teki(a)gmail.com> +Jagan Teki <jteki(a)openedev.com> Jagannadha Sutradharudu Teki <jagannadha.sutradharudu-teki(a)xilinx.com> Markus Klotzbuecher <mk(a)denx.de> Prabhakar Kushwaha <prabhakar(a)freescale.com> Rajeshwari Shinde <rajeshwari.s(a)samsung.com> -- 1.9.1

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[U-Boot] [PATCH 1/2] i2c: cmd: Relocate subcommands when MANUAL_RELOC
by Michal Simek 07 Dec '15

07 Dec '15

Subcommands contain pointers to functions which are not updated when MANUAL_REALOC is enabled. This patch fix it. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- common/cmd_i2c.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c index 3d0de81c32f8..552c875f62dd 100644 --- a/common/cmd_i2c.c +++ b/common/cmd_i2c.c @@ -1944,11 +1944,15 @@ static cmd_tbl_t cmd_i2c_sub[] = { U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""), }; -#ifdef CONFIG_NEEDS_MANUAL_RELOC -void i2c_reloc(void) { - fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub)); +static __maybe_unused void i2c_reloc(void) +{ + static int relocated; + + if (!relocated) { + fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub)); + relocated = 1; + }; } -#endif /** * do_i2c() - Handle the "i2c" command-line command @@ -1964,6 +1968,10 @@ static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) { cmd_tbl_t *c; +#ifdef CONFIG_NEEDS_MANUAL_RELOC + i2c_reloc(); +#endif + if (argc < 2) return CMD_RET_USAGE; -- 1.9.1

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[U-Boot] [PATCH] am33xx: Update serial pdata
by Tom Rini 06 Dec '15

06 Dec '15

We now want to make sure that we have the platform data for NS16550 when we do not have OF_CONTROL set. Signed-off-by: Tom Rini <trini(a)konsulko.com> --- arch/arm/cpu/armv7/am33xx/board.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 1633ddc..466348f 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -38,11 +38,7 @@ DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_DM_SERIAL) && !defined(CONFIG_OF_CONTROL) -/* - * TODO(sjg(a)chromium.org): When we can move SPL serial to DM, we can remove - * the CONFIGs. At the same time, we should move this to the board files. - */ +#if !CONFIG_IS_ENABLED(OF_CONTROL) static const struct ns16550_platdata am33xx_serial[] = { { CONFIG_SYS_NS16550_COM1, 2, CONFIG_SYS_NS16550_CLK }, # ifdef CONFIG_SYS_NS16550_COM2 @@ -57,14 +53,14 @@ static const struct ns16550_platdata am33xx_serial[] = { }; U_BOOT_DEVICES(am33xx_uarts) = { - { "serial_omap", &am33xx_serial[0] }, + { "ns16550_serial", &am33xx_serial[0] }, # ifdef CONFIG_SYS_NS16550_COM2 - { "serial_omap", &am33xx_serial[1] }, + { "ns16550_serial", &am33xx_serial[1] }, # ifdef CONFIG_SYS_NS16550_COM3 - { "serial_omap", &am33xx_serial[2] }, - { "serial_omap", &am33xx_serial[3] }, - { "serial_omap", &am33xx_serial[4] }, - { "serial_omap", &am33xx_serial[5] }, + { "ns16550_serial", &am33xx_serial[2] }, + { "ns16550_serial", &am33xx_serial[3] }, + { "ns16550_serial", &am33xx_serial[4] }, + { "ns16550_serial", &am33xx_serial[5] }, # endif # endif }; -- 1.7.9.5

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