October 2015 - U-Boot

[U-Boot] [PATCH v2 1/2] imx_watchdog: Add a header file for watchdog registers
by Fabio Estevam 02 Oct '15

02 Oct '15

From: Fabio Estevam <fabio.estevam(a)freescale.com> Create fsl_wdog.h to store the watchdog registers and bit fields. This can be useful when accesses to the watchdog block are made from other parts, such as arch/arm/ cpu code. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- Changes since v1: - Newly introduced drivers/watchdog/imx_watchdog.c | 14 +------------- include/fsl_wdog.h | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+), 13 deletions(-) create mode 100644 include/fsl_wdog.h diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index 9a77a54..0d77595 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -8,19 +8,7 @@ #include <asm/io.h> #include <watchdog.h> #include <asm/arch/imx-regs.h> - -struct watchdog_regs { - u16 wcr; /* Control */ - u16 wsr; /* Service */ - u16 wrsr; /* Reset Status */ -}; - -#define WCR_WDZST 0x01 -#define WCR_WDBG 0x02 -#define WCR_WDE 0x04 /* WDOG enable */ -#define WCR_WDT 0x08 -#define WCR_SRS 0x10 -#define SET_WCR_WT(x) (x << 8) +#include <fsl_wdog.h> #ifdef CONFIG_IMX_WATCHDOG void hw_watchdog_reset(void) diff --git a/include/fsl_wdog.h b/include/fsl_wdog.h new file mode 100644 index 0000000..d15a70c --- /dev/null +++ b/include/fsl_wdog.h @@ -0,0 +1,18 @@ +/* + * (C) Copyright 2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +struct watchdog_regs { + u16 wcr; /* Control */ + u16 wsr; /* Service */ + u16 wrsr; /* Reset Status */ +}; + +#define WCR_WDZST 0x01 +#define WCR_WDBG 0x02 +#define WCR_WDE 0x04 +#define WCR_WDT 0x08 +#define WCR_SRS 0x10 +#define SET_WCR_WT(x) (x << 8) -- 1.9.1

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[U-Boot] [PATCH v2 1/2] imx_watchdog: Add a header file for watchdog registers
by Fabio Estevam 02 Oct '15

02 Oct '15

From: Fabio Estevam <fabio.estevam(a)freescale.com> Create fsl_wdog.h to store the watchdog registers and bit fields. This can be useful when accesses to the watchdog block are made from other parts, such as arch/arm/ cpu code. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- Changes since v1: - Newly introduced drivers/watchdog/imx_watchdog.c | 14 +------------- include/fsl_wdog.h | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+), 13 deletions(-) create mode 100644 include/fsl_wdog.h diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index 9a77a54..0d77595 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -8,19 +8,7 @@ #include <asm/io.h> #include <watchdog.h> #include <asm/arch/imx-regs.h> - -struct watchdog_regs { - u16 wcr; /* Control */ - u16 wsr; /* Service */ - u16 wrsr; /* Reset Status */ -}; - -#define WCR_WDZST 0x01 -#define WCR_WDBG 0x02 -#define WCR_WDE 0x04 /* WDOG enable */ -#define WCR_WDT 0x08 -#define WCR_SRS 0x10 -#define SET_WCR_WT(x) (x << 8) +#include <fsl_wdog.h> #ifdef CONFIG_IMX_WATCHDOG void hw_watchdog_reset(void) diff --git a/include/fsl_wdog.h b/include/fsl_wdog.h new file mode 100644 index 0000000..d15a70c --- /dev/null +++ b/include/fsl_wdog.h @@ -0,0 +1,18 @@ +/* + * (C) Copyright 2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +struct watchdog_regs { + u16 wcr; /* Control */ + u16 wsr; /* Service */ + u16 wrsr; /* Reset Status */ +}; + +#define WCR_WDZST 0x01 +#define WCR_WDBG 0x02 +#define WCR_WDE 0x04 +#define WCR_WDT 0x08 +#define WCR_SRS 0x10 +#define SET_WCR_WT(x) (x << 8) -- 1.9.1

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[U-Boot] Please pull u-boot-fdt
by Simon Glass 02 Oct '15

02 Oct '15

The following changes since commit 1f8836396de8215b7f460616926052b32597bb29: Prepare v2015.10-rc4 (2015-09-28 16:57:42 -0400) are available in the git repository at: git://git.denx.de/u-boot-fdt.git for you to fetch changes up to 8809141907528550750420e14c24fa66e089b3f8: dts: Add a comment about CONFIG_OF_EMBED being for local use (2015-09-28 22:30:31 -0600) ---------------------------------------------------------------- Simon Glass (1): dts: Add a comment about CONFIG_OF_EMBED being for local use dts/Kconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)

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[U-Boot] [PATCH v3 00/10] vexpress64 FVP and Juno configuration updates
by Ryan Harkin 02 Oct '15

02 Oct '15

This patch series updates the default configuration of the vexpress64 FVP and Juno platforms to allow it to work on a variety of setups without modification by the user. [PATCH v3 01/10] vexpress64: fix checkpatch warnings [PATCH v3 02/10] vexpress64: Kconfig: tidy up [PATCH v3 03/10] vexpress64: increase max gunzip size [PATCH v3 04/10] vexpress64: fvp dram: add DRAM configuration [PATCH v3 05/10] vexpress64: juno: add androidboot.hardware=juno [PATCH v3 06/10] common/armflash: add command to check if image exists [PATCH v3 07/10] common/armflash: load_image returns success or failure [PATCH v3 08/10] vexpress64: juno: add optional initrd [PATCH v3 09/10] vexpress64: juno: add alternate kernel and device tree [PATCH v3 10/10] vexpress64: juno: use /dev/sda2 arch/arm/Kconfig | 4 ++++ board/armltd/vexpress64/Kconfig | 17 ----------------- board/armltd/vexpress64/MAINTAINERS | 5 +++++ common/cmd_armflash.c | 31 ++++++++++++++++++++++++++----- configs/vexpress_aemv8a_dram_defconfig | 19 +++++++++++++++++++ include/configs/vexpress_aemv8a.h | 61 +++++++++++++++++++++++++++++++++++++++++++++++++++++-------- 6 files changed, 107 insertions(+), 30 deletions(-) Changes since v1: - dropped the Kconfig changes for CONFIG_SYS_BOOTM_LEN - added CONFIG_SYS_BOOTM_LEN to include/configs/vexpress_aemv8a.h Changes since v2: - fixed warning in cmd_armflash.c due to missing hunk from patch 07/10: common/cmd_armflash.c:207:4: warning: 'return' with no value, in function returning non-void [-Wreturn-type]

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[U-Boot] [PATCH] Revert "imx: wdog: correct wcr register settings"
by Fabio Estevam 02 Oct '15

02 Oct '15

From: Fabio Estevam <fabio.estevam(a)freescale.com> This reverts commit 623d96e89aca64c2762150087f4e872c55481f13. commit 623d96e89aca6("imx: wdog: correct wcr register settings") introduced the usage of clrsetbits_le16(), which causes a regression on LS1021 systems. Unlike i.MX, LS1021 uses big-endian ordering for the watchdog controller, which means we cannot use the little endian accessors. Reported-by: Sinan Akman <sinan(a)writeme.com> Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- drivers/watchdog/imx_watchdog.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index 9a77a54..1d18d4b 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -55,8 +55,7 @@ void reset_cpu(ulong addr) { struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; - clrsetbits_le16(&wdog->wcr, 0, WCR_WDE); - + writew(WCR_WDE, &wdog->wcr); writew(0x5555, &wdog->wsr); writew(0xaaaa, &wdog->wsr); /* load minimum 1/2 second timeout */ while (1) { -- 1.9.1

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[U-Boot] [PATCH 1/2] nios2: remap and translate reg address in device tree
by Thomas Chou 02 Oct '15

02 Oct '15

As the io space remapping ioremap() and bridge address translation fdt_translate_address() are not usually used in u-boot driver model by dev_get_addr(). We would better convert the reg address map in the device tree of nios2 boards, so that it is io mapped and bridge translated. Signed-off-by: Thomas Chou <thomas(a)wytron.com.tw> --- arch/nios2/dts/3c120_devboard.dts | 171 +++++++++++++++----------------------- 1 file changed, 69 insertions(+), 102 deletions(-) diff --git a/arch/nios2/dts/3c120_devboard.dts b/arch/nios2/dts/3c120_devboard.dts index 02524ab..70d71a5 100644 --- a/arch/nios2/dts/3c120_devboard.dts +++ b/arch/nios2/dts/3c120_devboard.dts @@ -14,6 +14,73 @@ #address-cells = <1>; #size-cells = <1>; + aliases { + console = &jtag_uart; + }; + + timer_1ms: timer@0x400000 { + compatible = "altr,timer-1.0"; + reg = <0xe8400000 0x00000020>; + interrupt-parent = <&cpu>; + interrupts = <11>; + clock-frequency = <125000000>; + u-boot,dm-pre-reloc; + }; + + jtag_uart: serial@0x4d50 { + compatible = "altr,juart-1.0"; + reg = <0xe8004d50 0x00000008>; + interrupt-parent = <&cpu>; + interrupts = <1>; + u-boot,dm-pre-reloc; + }; + + tse_mac: ethernet@0x4000 { + compatible = "altr,tse-1.0"; + reg = <0xe8004000 0x00000400>, + <0xe8004400 0x00000040>, + <0xe8004800 0x00000040>, + <0xe8002000 0x00002000>; + reg-names = "control_port", "rx_csr", "tx_csr", "s1"; + interrupt-parent = <&cpu>; + interrupts = <2 3>; + interrupt-names = "rx_irq", "tx_irq"; + rx-fifo-depth = <8192>; + tx-fifo-depth = <8192>; + max-frame-size = <1518>; + local-mac-address = [ 00 00 00 00 00 00 ]; + phy-mode = "rgmii-id"; + phy-handle = <&phy0>; + tse_mac_mdio: mdio { + compatible = "altr,tse-mdio"; + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@18 { + reg = <18>; + device_type = "ethernet-phy"; + }; + }; + }; + + uart: serial@0x4c80 { + compatible = "altr,uart-1.0"; + reg = <0xe8004c80 0x00000020>; + interrupt-parent = <&cpu>; + interrupts = <10>; + current-speed = <115200>; + clock-frequency = <62500000>; + u-boot,dm-pre-reloc; + }; + + user_led_pio_8out: gpio@0x4cc0 { + compatible = "altr,pio-1.0"; + reg = <0xe8004cc0 0x00000010>; + resetvalue = <255>; + width = <8>; + #gpio-cells = <2>; + gpio-controller; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -46,108 +113,8 @@ memory@0 { device_type = "memory"; - reg = <0x10000000 0x08000000>, - <0x07fff400 0x00000400>; + reg = <0xd0000000 0x08000000>, + <0xc7fff400 0x00000400>; }; - sopc@0 { - device_type = "soc"; - ranges; - #address-cells = <1>; - #size-cells = <1>; - compatible = "altr,avalon", "simple-bus"; - bus-frequency = <125000000>; - - pb_cpu_to_io: bridge@0x8000000 { - compatible = "simple-bus"; - reg = <0x08000000 0x00800000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00002000 0x08002000 0x00002000>, - <0x00004000 0x08004000 0x00000400>, - <0x00004400 0x08004400 0x00000040>, - <0x00004800 0x08004800 0x00000040>, - <0x00004c80 0x08004c80 0x00000020>, - <0x00004d50 0x08004d50 0x00000008>, - <0x00008000 0x08008000 0x00000020>, - <0x00400000 0x08400000 0x00000020>; - - timer_1ms: timer@0x400000 { - compatible = "altr,timer-1.0"; - reg = <0x00400000 0x00000020>; - interrupt-parent = <&cpu>; - interrupts = <11>; - clock-frequency = <125000000>; - }; - - timer_0: timer@0x8000 { - compatible = "altr,timer-1.0"; - reg = < 0x00008000 0x00000020 >; - interrupt-parent = < &cpu >; - interrupts = < 5 >; - clock-frequency = < 125000000 >; - }; - - jtag_uart: serial@0x4d50 { - compatible = "altr,juart-1.0"; - reg = <0x00004d50 0x00000008>; - interrupt-parent = <&cpu>; - interrupts = <1>; - }; - - tse_mac: ethernet@0x4000 { - compatible = "altr,tse-1.0"; - reg = <0x00004000 0x00000400>, - <0x00004400 0x00000040>, - <0x00004800 0x00000040>, - <0x00002000 0x00002000>; - reg-names = "control_port", "rx_csr", "tx_csr", "s1"; - interrupt-parent = <&cpu>; - interrupts = <2 3>; - interrupt-names = "rx_irq", "tx_irq"; - rx-fifo-depth = <8192>; - tx-fifo-depth = <8192>; - max-frame-size = <1518>; - local-mac-address = [ 00 00 00 00 00 00 ]; - phy-mode = "rgmii-id"; - phy-handle = <&phy0>; - tse_mac_mdio: mdio { - compatible = "altr,tse-mdio"; - #address-cells = <1>; - #size-cells = <0>; - phy0: ethernet-phy@18 { - reg = <18>; - device_type = "ethernet-phy"; - }; - }; - }; - - uart: serial@0x4c80 { - compatible = "altr,uart-1.0"; - reg = <0x00004c80 0x00000020>; - interrupt-parent = <&cpu>; - interrupts = <10>; - current-speed = <115200>; - clock-frequency = <62500000>; - }; - }; - - cfi_flash_64m: flash@0x0 { - compatible = "cfi-flash"; - reg = <0x00000000 0x04000000>; - bank-width = <2>; - device-width = <1>; - #address-cells = <1>; - #size-cells = <1>; - - partition@800000 { - reg = <0x00800000 0x01e00000>; - label = "JFFS2 Filesystem"; - }; - }; - }; - - chosen { - bootargs = "debug console=ttyJ0,115200"; - }; }; -- 2.1.4

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[U-Boot] [PATCH v2] rockchip: Reconfigure the malloc based to point to system memory
by Sjoerd Simons 02 Oct '15

02 Oct '15

When malloc_base initially gets setup in the SPL it is based on the current (early) stack pointer, which for rockchip is pointing into SRAM. This means simple memory allocations happen in SRAM space, which is somewhat unfortunate. Specifically a bounce buffer for the mmc allocated in SRAM space seems to cause the mmc engine to stall/fail causing timeouts and a failure to load the main u-boot image. To resolve this, reconfigure the malloc_base to start at the relocated stack pointer after DRAM has been setup. For reference, things did work fine on rockchip before 596380db was merged to fix memalign_simple due to a combination of rockchip SDRAM starting at address 0 and the dw_mmc driver not checking errors from bounce_buffer_start. As a result, when a bounce buffer needed to be allocated mem_align simple would fail and return NULL. The mmc driver ignored the error and happily continued with the bounce buffer address being set to 0, which just happened to work fine.. Signed-off-by: Sjoerd Simons <sjoerd.simons(a)collabora.co.uk> --- A potentially better fix for this issue would be to reconfigure the malloc_base in spl_relocate_stack_gd following the same steps as is done for the initial setup. However at this point in the release cycle i preferred to do a minimal rockchip only fix (so those boards become bootable again) for this issue to minimize the potential impact on other boards. Changes in v2: - Also gd->malloc_ptr to 0 to not waste any potential space arch/arm/mach-rockchip/board-spl.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/mach-rockchip/board-spl.c b/arch/arm/mach-rockchip/board-spl.c index a241d96..982a1d9 100644 --- a/arch/arm/mach-rockchip/board-spl.c +++ b/arch/arm/mach-rockchip/board-spl.c @@ -217,6 +217,11 @@ void board_init_f(ulong dummy) debug("DRAM init failed: %d\n", ret); return; } + + /* Now that DRAM is initialized setup base pointer for simple malloc + * into RAM */ + gd->malloc_base = CONFIG_SPL_STACK_R_ADDR; + gd->malloc_ptr = 0; } static int setup_led(void) -- 2.5.3

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[U-Boot] [PATCH v2] Reproducible U-Boot build support, using SOURCE_DATE_EPOCH
by Paul Kocialkowski 02 Oct '15

02 Oct '15

In order to achieve reproducible builds in U-Boot, timestamps that are defined at build-time have to be somewhat eliminated. The SOURCE_DATE_EPOCH environment variable allows setting a fixed value for those timestamps. Simply by setting SOURCE_DATE_EPOCH to a fixed value, a number of targets can be built reproducibly. This is the case for e.g. sunxi devices. However, some other devices might need some more tweaks, especially regarding the image generation tools. Signed-off-by: Paul Kocialkowski <contact(a)paulk.fr> --- Makefile | 7 ++++--- README | 12 ++++++++++++ tools/default_image.c | 21 ++++++++++++++++++++- 3 files changed, 36 insertions(+), 4 deletions(-) diff --git a/Makefile b/Makefile index 54ef2cd..596974c 100644 --- a/Makefile +++ b/Makefile @@ -1232,9 +1232,10 @@ define filechk_version.h endef define filechk_timestamp.h - (LC_ALL=C date +'#define U_BOOT_DATE "%b %d %C%y"'; \ - LC_ALL=C date +'#define U_BOOT_TIME "%T"'; \ - LC_ALL=C date +'#define U_BOOT_TZ "%z"') + (SOURCE_DATE="$${SOURCE_DATE_EPOCH:+@$$SOURCE_DATE_EPOCH}"; \ + LC_ALL=C date -u -d "$${SOURCE_DATE:-now}" +'#define U_BOOT_DATE "%b %d %C%y"'; \ + LC_ALL=C date -u -d "$${SOURCE_DATE:-now}" +'#define U_BOOT_TIME "%T"'; \ + LC_ALL=C date -u -d "$${SOURCE_DATE:-now}" +'#define U_BOOT_TZ "%z"' ) endef $(version_h): include/config/uboot.release FORCE diff --git a/README b/README index 4e0ff9f..1bcb63c 100644 --- a/README +++ b/README @@ -5081,6 +5081,18 @@ This firmware often needs to be loaded during U-Boot booting. - CONFIG_SYS_MEM_TOP_HIDE_MIN Define minimum DDR size to be hided from top of the DDR memory +Reproducible builds +------------------- + +In order to achieve reproducible builds, timestamps used in the U-Boot build +process have to be set to a fixed value. + +This is done using the SOURCE_DATE_EPOCH environment variable. +SOURCE_DATE_EPOCH is to be set on the build host's shell, not as a configuration +option for U-Boot or an environment variable in U-Boot. + +SOURCE_DATE_EPOCH should be set to a number of seconds since the epoch, in UTC. + Building the Software: ====================== diff --git a/tools/default_image.c b/tools/default_image.c index cf5c0d4..18940af 100644 --- a/tools/default_image.c +++ b/tools/default_image.c @@ -88,6 +88,9 @@ static void image_set_header(void *ptr, struct stat *sbuf, int ifd, struct image_tool_params *params) { uint32_t checksum; + char *source_date_epoch; + struct tm *time_universal; + time_t time; image_header_t * hdr = (image_header_t *)ptr; @@ -96,9 +99,25 @@ static void image_set_header(void *ptr, struct stat *sbuf, int ifd, sizeof(image_header_t)), sbuf->st_size - sizeof(image_header_t)); + source_date_epoch = getenv("SOURCE_DATE_EPOCH"); + if (source_date_epoch != NULL) { + time = (time_t) strtol(source_date_epoch, NULL, 10); + + time_universal = gmtime(&time); + if (time_universal == NULL) { + fprintf(stderr, "%s: SOURCE_DATE_EPOCH is not valid\n", + __func__); + time = 0; + } else { + time = mktime(time_universal); + } + } else { + time = sbuf->st_mtime; + } + /* Build new header */ image_set_magic(hdr, IH_MAGIC); - image_set_time(hdr, sbuf->st_mtime); + image_set_time(hdr, time); image_set_size(hdr, sbuf->st_size - sizeof(image_header_t)); image_set_load(hdr, params->addr); image_set_ep(hdr, params->ep); -- 1.9.1

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[U-Boot] "Embedding" default script with uboot image
by Zatkovský Dušan 02 Oct '15

02 Oct '15

Hi all, Excuse my question if it was solved somewhere in forum, but I didn't found an answer yet (maybe I can't find the right keywords). I am building the uboot with yocto for imx6 board. I have started with some freescale defaults, edited environment for my needs, saved environment etc ... Now I want to create a custom "default" boot script, that will do some "heurestics", such as "look if usb stick is present, then boot from it, else boot from emmc, etc...". Currently I am storing that script on first partition on emmc and loading it with ext2load. But it has drawbacks: - user should delete that file -> brick - user should broke entire filesystem -> brick I want this script to be "embedded" somehow with uboot image (which is placed outside partition table on device), but I didn't found any doc how to do that. Currently I use CONFIG_EXTRA_ENV_SETTINGS for some basic stuffbut it is unmaintainable for bigger scripts. Any suggestions? Thank you. -- Dusan

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[U-Boot] [PATCH] sunxi: Add generic defconfigs for A33 Q8 tablets with 1024x600 / 800x480 LCD
by Hans de Goede 02 Oct '15

02 Oct '15

The 7" Q8 tablet enclosure is used for a ton of slightly different cheap chinese tablets. There are some differences in which accelerometer / wifi is used, but other then that these are all the same from a u-boot / kernel pov. When we get to adding accelerometer support the plan is to add some kind of autodetection and mangle the dt accordingly (likely using the new quirks mechanism). For now this is a non issue as we do not yet have accelerometer support, and in the future, some sort of auto-detect is the way to go as we cannot expect users to exactly know what is inside their tablet. The dts[i] files this commit adds are indentical to the ones submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- arch/arm/dts/Makefile | 1 + arch/arm/dts/sun8i-a33-q8-tablet.dts | 65 ++++++++++++++++++++++++ arch/arm/dts/sun8i-q8-common.dtsi | 84 ++++++++++++++++++++++++++++++++ board/sunxi/MAINTAINERS | 2 + configs/q8_a33_tablet_1024x600_defconfig | 24 +++++++++ configs/q8_a33_tablet_800x480_defconfig | 24 +++++++++ 6 files changed, 200 insertions(+) create mode 100644 arch/arm/dts/sun8i-a33-q8-tablet.dts create mode 100644 arch/arm/dts/sun8i-q8-common.dtsi create mode 100644 configs/q8_a33_tablet_1024x600_defconfig create mode 100644 configs/q8_a33_tablet_800x480_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 09abc26..1dd5d5d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -156,6 +156,7 @@ dtb-$(CONFIG_MACH_SUN8I_A33) += \ sun8i-a33-et-q8-v1.6.dtb \ sun8i-a33-ga10h-v1.1.dtb \ sun8i-a33-ippo-q8h-v1.2.dtb \ + sun8i-a33-q8-tablet.dtb \ sun8i-a33-sinlinx-sina33.dtb dtb-$(CONFIG_MACH_SUN9I) += \ sun9i-a80-optimus.dtb \ diff --git a/arch/arm/dts/sun8i-a33-q8-tablet.dts b/arch/arm/dts/sun8i-a33-q8-tablet.dts new file mode 100644 index 0000000..44b3229 --- /dev/null +++ b/arch/arm/dts/sun8i-a33-q8-tablet.dts @@ -0,0 +1,65 @@ +/* + * Copyright 2015 Hans de Goede <hdegoede(a)redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun8i-a33.dtsi" +#include "sun8i-q8-common.dtsi" + +/ { + model = "Q8 A33 Tablet"; + compatible = "allwinner,q8-a33", "allwinner,sun8i-a33"; +}; + +/* + * FIXME for now we only support host mode and rely on u-boot to have + * turned on Vbus which is controlled by the axp223 pmic on the board. + * + * Once we have axp223 support we should switch to fully supporting otg. + */ +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/arch/arm/dts/sun8i-q8-common.dtsi b/arch/arm/dts/sun8i-q8-common.dtsi new file mode 100644 index 0000000..07cd268 --- /dev/null +++ b/arch/arm/dts/sun8i-q8-common.dtsi @@ -0,0 +1,84 @@ +/* + * Copyright 2015 Hans de Goede <hdegoede(a)redhat.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ +#include "sunxi-q8-common.dtsi" + +/ { + aliases { + serial0 = &r_uart; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8>; + vmmc-supply = <&reg_vcc3v0>; + bus-width = <4>; + cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ + cd-inverted; + status = "okay"; +}; + +&pio { + bl_en_pin_q8: bl_en_pin@0 { + allwinner,pins = "PH6"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + mmc0_cd_pin_q8: mmc0_cd_pin@0 { + allwinner,pins = "PB4"; + allwinner,function = "gpio_in"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; + }; +}; + +&r_uart { + pinctrl-names = "default"; + pinctrl-0 = <&r_uart_pins_a>; + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 4f5fd44..f7a837a 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -50,6 +50,8 @@ F: configs/ga10h_v1_1_defconfig F: configs/gt90h_v4_defconfig F: configs/Ippo_q8h_v1_2_defconfig F: configs/Ippo_q8h_v1_2_a33_1024x600_defconfig +F: configs/q8_a33_tablet_800x480_defconfig +F: configs/q8_a33_tablet_1024x600_defconfig F: include/configs/sun9i.h F: configs/Merrii_A80_Optimus_defconfig diff --git a/configs/q8_a33_tablet_1024x600_defconfig b/configs/q8_a33_tablet_1024x600_defconfig new file mode 100644 index 0000000..0820a5d --- /dev/null +++ b/configs/q8_a33_tablet_1024x600_defconfig @@ -0,0 +1,24 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN8I_A33=y +CONFIG_DRAM_CLK=456 +CONFIG_DRAM_ZQ=15291 +CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" +CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" +CONFIG_USB0_ID_DET="PH8" +CONFIG_AXP_GPIO=y +CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:51000,le:159,ri:160,up:22,lo:12,hs:1,vs:1,sync:3,vmode:0" +CONFIG_VIDEO_LCD_DCLK_PHASE=0 +CONFIG_VIDEO_LCD_POWER="PH7" +CONFIG_VIDEO_LCD_BL_EN="PH6" +CONFIG_VIDEO_LCD_BL_PWM="PH0" +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_AXP221_DLDO1_VOLT=3300 +CONFIG_AXP221_ALDO1_VOLT=3000 +CONFIG_USB_MUSB_HOST=y diff --git a/configs/q8_a33_tablet_800x480_defconfig b/configs/q8_a33_tablet_800x480_defconfig new file mode 100644 index 0000000..a9c2b62 --- /dev/null +++ b/configs/q8_a33_tablet_800x480_defconfig @@ -0,0 +1,24 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_MACH_SUN8I_A33=y +CONFIG_DRAM_CLK=456 +CONFIG_DRAM_ZQ=15291 +CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" +CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" +CONFIG_USB0_ID_DET="PH8" +CONFIG_AXP_GPIO=y +CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:18,pclk_khz:33000,le:87,ri:167,up:31,lo:13,hs:1,vs:1,sync:3,vmode:0" +CONFIG_VIDEO_LCD_DCLK_PHASE=0 +CONFIG_VIDEO_LCD_POWER="PH7" +CONFIG_VIDEO_LCD_BL_EN="PH6" +CONFIG_VIDEO_LCD_BL_PWM="PH0" +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-q8-tablet" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_AXP221_DLDO1_VOLT=3300 +CONFIG_AXP221_ALDO1_VOLT=3000 +CONFIG_USB_MUSB_HOST=y -- 2.5.0

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