October 2015 - U-Boot

[U-Boot] [PATCH 00/18] dm: test: Add test code for new uclasses
by Simon Glass 03 Oct '15

03 Oct '15

Several new uclasses have been written and we need tests for these before they can be merged. This series adds the test code. Simon Glass (18): dm: Add platform data advice and admonishment dm: test: Allow test names to leave out the dm_test_ prefix dm: test: Add tests for the clk uclass dm: test: Add tests for the pinctrl uclass sandbox: Support multiple reset types dm: reset: Allow reset_walk() to return sandbox: Add a warm and cold reset driver sandbox: Use the reset driver to handle reset dm: test: Add a test for the reset uclass dm: test: Add a test for the ram uclass dm: test: Add a test for the mmc uclass led: Return -ENODEV if the LED device cannot be found dm: test: Add a test for the LED uclass dm: test: Add a test for the system controller uclass dm: test: Add a size to each reg property test: Add a macro to check that a value is not an error pointer dm: core: Add device checking to syscon_get_regmap() test: Add a test for regmap arch/sandbox/cpu/cpu.c | 9 +-- arch/sandbox/cpu/state.c | 4 ++ arch/sandbox/dts/test.dts | 76 ++++++++++++++++++++--- arch/sandbox/include/asm/state.h | 3 + arch/sandbox/include/asm/test.h | 19 ++++++ arch/sandbox/include/asm/u-boot-sandbox.h | 3 + configs/sandbox_defconfig | 8 +++ doc/driver-model/README.txt | 17 ++++- drivers/clk/Makefile | 1 + drivers/clk/clk_sandbox.c | 85 +++++++++++++++++++++++++ drivers/core/syscon-uclass.c | 7 ++- drivers/led/led-uclass.c | 5 +- drivers/led/led_gpio.c | 6 ++ drivers/misc/Makefile | 2 + drivers/misc/reset-uclass.c | 31 +++++++-- drivers/misc/reset_sandbox.c | 100 ++++++++++++++++++++++++++++++ drivers/misc/syscon_sandbox.c | 27 ++++++++ drivers/mmc/Makefile | 1 + drivers/mmc/sandbox_mmc.c | 25 ++++++++ drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinctrl_sandbox.c | 80 ++++++++++++++++++++++++ drivers/ram/Makefile | 1 + drivers/ram/sandbox_ram.c | 38 ++++++++++++ include/dm/platdata.h | 9 +++ include/dt-bindings/clock/sandbox-clk.h | 10 +++ include/led.h | 2 +- include/reset.h | 11 +++- include/test/ut.h | 15 +++++ test/dm/Makefile | 8 +++ test/dm/clk.c | 59 ++++++++++++++++++ test/dm/led.c | 72 +++++++++++++++++++++ test/dm/mmc.c | 27 ++++++++ test/dm/pinctrl.c | 63 +++++++++++++++++++ test/dm/ram.c | 28 +++++++++ test/dm/regmap.c | 82 ++++++++++++++++++++++++ test/dm/reset.c | 74 ++++++++++++++++++++++ test/dm/syscon.c | 31 +++++++++ test/dm/test-main.c | 15 ++++- 38 files changed, 1021 insertions(+), 34 deletions(-) create mode 100644 drivers/clk/clk_sandbox.c create mode 100644 drivers/misc/reset_sandbox.c create mode 100644 drivers/misc/syscon_sandbox.c create mode 100644 drivers/mmc/sandbox_mmc.c create mode 100644 drivers/pinctrl/pinctrl_sandbox.c create mode 100644 drivers/ram/sandbox_ram.c create mode 100644 include/dt-bindings/clock/sandbox-clk.h create mode 100644 test/dm/clk.c create mode 100644 test/dm/led.c create mode 100644 test/dm/mmc.c create mode 100644 test/dm/pinctrl.c create mode 100644 test/dm/ram.c create mode 100644 test/dm/regmap.c create mode 100644 test/dm/reset.c create mode 100644 test/dm/syscon.c -- 2.4.3.573.g4eafbef

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[U-Boot] Please pull u-boot-fdt
by Simon Glass 03 Oct '15

03 Oct '15

Hi Tom, Here are a few last-minute bug fixes mostly stemming from the fdtdec_get_addr() change earlier. The following changes since commit fbb0c7bd92255bfcb13826a8ac81be6e2f94ba48: Merge branch 'master' of git://git.denx.de/u-boot-tegra (2015-10-02 20:35:49 -0400) are available in the git repository at: git://git.denx.de/u-boot-fdt.git for you to fetch changes up to cce573e8d806fd430e7584b36bce6d62ae0430e8: trats: fdt: disable unused DW MMC (2015-10-03 14:39:19 +0100) ---------------------------------------------------------------- Przemyslaw Marczak (4): fdtdec: fix parsing 'reg' property with zero value in '#size-cells' gpio: s5p: call: dev_get_addr() instead of fdtdec_get_addr() mach-exynos: clock: restore calling dead exynos4_get_mmc_clk() trats: fdt: disable unused DW MMC Simon Glass (1): dts: Add a comment about CONFIG_OF_EMBED being for local use Stephen Warren (1): fdt: fix fdtdec_get_addr_size not to require any size cells arch/arm/dts/exynos4210-trats.dts | 4 ++++ arch/arm/mach-exynos/clock.c | 10 ++++------ drivers/gpio/s5p_gpio.c | 18 +++++++++++------- dts/Kconfig | 4 +++- lib/fdtdec.c | 7 ++++--- 5 files changed, 26 insertions(+), 17 deletions(-) Regards, Simon

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[U-Boot] [PATCH] fdt: fix fdtdec_get_addr_size not to require any size cells
by Stephen Warren 03 Oct '15

03 Oct '15

From: Stephen Warren <swarren(a)nvidia.com> fdtdec_get_addr_size() may be used in two cases: a) With sizep supplied, in which case both an address and a size are parsed from DT. In this case, the DT property must be large enough to contain both values. b) With sizep NULL, in which case only an address is parsed from DT. In this case, the DT property only need be large enough to contain this address value. Commit 02464e386bb5 "fdt: add new fdt address parsing functions" broke this relaxed checking, and required the DT property to contain both an address and a size value in all cases. Fix fdtdec_get_addr_size() to vary ns based on whether the size value is being parsed from the DT or not. This is safe since the function only parses the first entry in the property, so the overall value of (na + ns) need not be accurate, since it is never used to step through the property data to find other entries. Besides, this fixed behaviour essentially matches the original behaviour before the patch this patch fixes. (The original code validated that the property was exactly the length of either na or (na + ns), whereas the current code only validates that the property is at least that long. For non-failure cases, the two behaviours are identical). Cc: Przemyslaw Marczak <p.marczak(a)samsung.com> Cc: Simon Glass <sjg(a)chromium.org> Cc: Thierry Reding <treding(a)nvidia.com> Cc: Bin Meng <bmeng.cn(a)gmail.com> Cc: Michal Suchanek <hramrach(a)gmail.com> Fixes: 02464e386bb5 ("fdt: add new fdt address parsing functions") Reported-by: Przemyslaw Marczak <p.marczak(a)samsung.com> Signed-off-by: Stephen Warren <swarren(a)nvidia.com> --- lib/fdtdec.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 9f0b65de3831..1fdb4f0d9ce9 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -180,10 +180,11 @@ fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node, fdt_addr_t fdtdec_get_addr_size(const void *blob, int node, const char *prop_name, fdt_size_t *sizep) { + int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0; + return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0, sizeof(fdt_addr_t) / sizeof(fdt32_t), - sizeof(fdt_size_t) / sizeof(fdt32_t), - sizep); + ns, sizep); } fdt_addr_t fdtdec_get_addr(const void *blob, int node, -- 1.9.1

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[U-Boot] [PATCH 1/2] itest: make memory access work under sandbox
by Stephen Warren 03 Oct '15

03 Oct '15

itest accesses memory, and hence must map/unmap it. Without doing so, it accesses invalid addresses and crashes. Signed-off-by: Stephen Warren <swarren(a)wwwdotorg.org> --- common/cmd_itest.c | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/common/cmd_itest.c b/common/cmd_itest.c index 76af62b46ee2..596341c9635a 100644 --- a/common/cmd_itest.c +++ b/common/cmd_itest.c @@ -15,6 +15,9 @@ #include <common.h> #include <config.h> #include <command.h> +#include <mapmem.h> + +#include <asm/io.h> #define EQ 0 #define NE 1 @@ -49,16 +52,24 @@ static const op_tbl_t op_table [] = { static long evalexp(char *s, int w) { long l = 0; - long *p; + unsigned long addr; + void *buf; /* if the parameter starts with a * then assume is a pointer to the value we want */ if (s[0] == '*') { - p = (long *)simple_strtoul(&s[1], NULL, 16); + addr = simple_strtoul(&s[1], NULL, 16); + buf = map_physmem(addr, w, MAP_WRBACK); + if (!buf) { + puts("Failed to map physical memory\n"); + return 0; + } switch (w) { - case 1: return((long)(*(unsigned char *)p)); - case 2: return((long)(*(unsigned short *)p)); - case 4: return(*p); + case 1: l = (long)(*(unsigned char *)buf); + case 2: l = (long)(*(unsigned short *)buf); + case 4: l = (long)(*(unsigned long *)buf); } + unmap_physmem(buf, w); + return l; } else { l = simple_strtoul(s, NULL, 16); } -- 1.9.1

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[U-Boot] [PATCH v2 1/2] malloc_simple: Add Kconfig option for using only malloc_simple in the SPL
by Hans de Goede 03 Oct '15

03 Oct '15

common/dlmalloc.c is quite big, both in .text and .data usage, therefor on some boards the SPL is build to use only malloc_simple.c and not the dlmalloc.c code. This is done in various include/configs/foo.h with the following construct: #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MALLOC_SIMPLE #endif This commit introduces a SPL_MALLOC_SIMPLE Kconfig bool which allows selecting this functionality through Kconfig instead. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- Changes in v2: -Fix commit message wrt quoting lines starting with a # -Rename Kconfig option from SPL_MALLOC_SIMPLE to SPL_SYS_MALLOC_SIMPLE -Simplify the ifdef checks to #if CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) --- Kconfig | 10 ++++++++++ common/malloc_simple.c | 2 +- include/_exports.h | 2 +- include/exports.h | 2 +- include/malloc.h | 2 +- 5 files changed, 14 insertions(+), 4 deletions(-) diff --git a/Kconfig b/Kconfig index 05a34f7..7770743 100644 --- a/Kconfig +++ b/Kconfig @@ -114,6 +114,16 @@ config SPL help If you want to build SPL as well as the normal image, say Y. +config SPL_SYS_MALLOC_SIMPLE + bool + depends on SPL + prompt "Only use malloc_simple functions in the spl" + help + Say Y here to only use the *_simple malloc functions from + malloc_simple.c, rather then using the versions from dlmalloc.c + this will make the SPL binary smaller at the cost of more heap + usage as the *_simple malloc functions do not re-use free-ed mem. + config SPL_STACK_R depends on SPL bool "Enable SDRAM location for SPL stack" diff --git a/common/malloc_simple.c b/common/malloc_simple.c index c745863..9bf1fed 100644 --- a/common/malloc_simple.c +++ b/common/malloc_simple.c @@ -40,7 +40,7 @@ void *memalign_simple(size_t align, size_t bytes) return ptr; } -#ifdef CONFIG_SYS_MALLOC_SIMPLE +#if CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) void *calloc(size_t nmemb, size_t elem_size) { size_t size = nmemb * elem_size; diff --git a/include/_exports.h b/include/_exports.h index 74a882a..11beeb2 100644 --- a/include/_exports.h +++ b/include/_exports.h @@ -23,7 +23,7 @@ EXPORT_FUNC(dummy, void, free_hdlr, void) #endif EXPORT_FUNC(malloc, void *, malloc, size_t) -#ifndef CONFIG_SYS_MALLOC_SIMPLE +#if !CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) EXPORT_FUNC(free, void, free, void *) #endif EXPORT_FUNC(udelay, void, udelay, unsigned long) diff --git a/include/exports.h b/include/exports.h index a3e0469..deef8fb 100644 --- a/include/exports.h +++ b/include/exports.h @@ -19,7 +19,7 @@ int printf(const char* fmt, ...); void install_hdlr(int, interrupt_handler_t, void*); void free_hdlr(int); void *malloc(size_t); -#ifndef CONFIG_SYS_MALLOC_SIMPLE +#if !CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) void free(void*); #endif void __udelay(unsigned long); diff --git a/include/malloc.h b/include/malloc.h index f4da9e6..f20e4d3 100644 --- a/include/malloc.h +++ b/include/malloc.h @@ -872,7 +872,7 @@ extern Void_t* sbrk(); #else -#ifdef CONFIG_SYS_MALLOC_SIMPLE +#if CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) #define malloc malloc_simple #define realloc realloc_simple #define memalign memalign_simple -- 2.4.3

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[U-Boot] [PATCH] nios2 : convert altera_pio to driver model
by Thomas Chou 03 Oct '15

03 Oct '15

Convert altera_pio to driver model. Signed-off-by: Thomas Chou <thomas(a)wytron.com.tw> --- arch/nios2/dts/3c120_devboard.dts | 38 ++++ arch/nios2/include/asm/gpio.h | 80 +------- board/altera/nios2-generic/nios2-generic.c | 7 - configs/nios2-generic_defconfig | 2 + drivers/gpio/Kconfig | 7 + drivers/gpio/altera_pio.c | 316 +++++++---------------------- include/configs/nios2-generic.h | 20 -- 7 files changed, 124 insertions(+), 346 deletions(-) diff --git a/arch/nios2/dts/3c120_devboard.dts b/arch/nios2/dts/3c120_devboard.dts index a35f5fe..f6ac273 100644 --- a/arch/nios2/dts/3c120_devboard.dts +++ b/arch/nios2/dts/3c120_devboard.dts @@ -132,6 +132,44 @@ clock-frequency = <62500000>; u-boot,dm-pre-reloc; }; + + user_led_pio_8out: gpio@0x4cc0 { + compatible = "altr,pio-1.0"; + reg = <0x00004cc0 0x00000010>; + resetvalue = <255>; + width = <8>; + #gpio-cells = <2>; + gpio-controller; + gpio-bank-name = "led"; + }; + + user_dipsw_pio_8in: gpio@0x4ce0 { + compatible = "altr,pio-1.0"; + reg = <0x00004ce0 0x00000010>; + interrupt-parent = <&cpu>; + interrupts = <8>; + edge_type = <2>; + level_trigger = <0>; + resetvalue = <0>; + width = <8>; + #gpio-cells = <2>; + gpio-controller; + gpio-bank-name = "dipsw"; + }; + + user_pb_pio_4in: gpio@0x4d00 { + compatible = "altr,pio-1.0"; + reg = <0x00004d00 0x00000010>; + interrupt-parent = <&cpu>; + interrupts = <9>; + edge_type = <2>; + level_trigger = <0>; + resetvalue = <0>; + width = <4>; + #gpio-cells = <2>; + gpio-controller; + gpio-bank-name = "pb"; + }; }; cfi_flash_64m: flash@0x0 { diff --git a/arch/nios2/include/asm/gpio.h b/arch/nios2/include/asm/gpio.h index 908381f..306ab4c 100644 --- a/arch/nios2/include/asm/gpio.h +++ b/arch/nios2/include/asm/gpio.h @@ -1,79 +1 @@ -/* - * nios2 gpio driver - * - * This gpio core is described in http://nioswiki.com/GPIO - * bit[0] data - * bit[1] output enable - * - * When CONFIG_SYS_GPIO_BASE is not defined, the board may either - * provide its own driver or the altera_pio driver may be used. - * - * Copyright (C) 2010 Thomas Chou <thomas(a)wytron.com.tw> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _ASM_NIOS2_GPIO_H_ -#define _ASM_NIOS2_GPIO_H_ - -#ifdef CONFIG_SYS_GPIO_BASE -#include <asm/io.h> - -static inline int gpio_request(unsigned gpio, const char *label) -{ - return 0; -} - -static inline int gpio_free(unsigned gpio) -{ - return 0; -} - -static inline int gpio_direction_input(unsigned gpio) -{ - writel(1, CONFIG_SYS_GPIO_BASE + (gpio << 2)); - return 0; -} - -static inline int gpio_direction_output(unsigned gpio, int value) -{ - writel(value ? 3 : 2, CONFIG_SYS_GPIO_BASE + (gpio << 2)); - return 0; -} - -static inline int gpio_get_value(unsigned gpio) -{ - return readl(CONFIG_SYS_GPIO_BASE + (gpio << 2)); -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ - writel(value ? 3 : 2, CONFIG_SYS_GPIO_BASE + (gpio << 2)); -} - -static inline int gpio_is_valid(int number) -{ - return ((unsigned)number) < CONFIG_SYS_GPIO_WIDTH; -} -#else -#ifdef CONFIG_ALTERA_PIO -extern int altera_pio_init(u32 base, u8 width, char iot, - u32 rstval, u32 negmask, - const char *label); - -extern void altera_pio_info(void); -#define gpio_status() altera_pio_info() -#endif - -extern int gpio_request(unsigned gpio, const char *label); -extern int gpio_free(unsigned gpio); -extern int gpio_direction_input(unsigned gpio); -extern int gpio_direction_output(unsigned gpio, int value); -extern int gpio_get_value(unsigned gpio); -extern void gpio_set_value(unsigned gpio, int value); -extern int gpio_is_valid(int number); -#endif /* CONFIG_SYS_GPIO_BASE */ - -#endif /* _ASM_NIOS2_GPIO_H_ */ +#include <asm-generic/gpio.h> diff --git a/board/altera/nios2-generic/nios2-generic.c b/board/altera/nios2-generic/nios2-generic.c index 384fee9..61d32c7 100644 --- a/board/altera/nios2-generic/nios2-generic.c +++ b/board/altera/nios2-generic/nios2-generic.c @@ -37,13 +37,6 @@ int board_early_init_f(void) int board_early_init_r(void) { -#ifdef CONFIG_ALTERA_PIO -#ifdef LED_PIO_BASE - altera_pio_init(LED_PIO_BASE, LED_PIO_WIDTH, 'o', - LED_PIO_RSTVAL, (1 << LED_PIO_WIDTH) - 1, - "led"); -#endif -#endif return 0; } diff --git a/configs/nios2-generic_defconfig b/configs/nios2-generic_defconfig index 9dc6a72..ad72272 100644 --- a/configs/nios2-generic_defconfig +++ b/configs/nios2-generic_defconfig @@ -1,5 +1,6 @@ CONFIG_NIOS2=y CONFIG_DM_SERIAL=y +CONFIG_DM_GPIO=y CONFIG_TARGET_NIOS2_GENERIC=y CONFIG_DEFAULT_DEVICE_TREE="3c120_devboard" CONFIG_HUSH_PARSER=y @@ -15,5 +16,6 @@ CONFIG_CMD_PING=y CONFIG_OF_CONTROL=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y +CONFIG_ALTERA_PIO=y CONFIG_ALTERA_JTAG_UART=y CONFIG_ALTERA_JTAG_UART_BYPASS=y diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index ef57a89..9e49471 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -14,6 +14,13 @@ config DM_GPIO particular GPIOs that they provide. The uclass interface is defined in include/asm-generic/gpio.h. +config ALTERA_PIO + bool "Altera PIO driver" + depends on DM_GPIO + help + Select this to enable PIO for Altera devices. Please find + details on the "Embedded Peripherals IP User Guide" of Altera. + config DWAPB_GPIO bool "DWAPB GPIO driver" depends on DM && DM_GPIO diff --git a/drivers/gpio/altera_pio.c b/drivers/gpio/altera_pio.c index 3ca5907..14a922b 100644 --- a/drivers/gpio/altera_pio.c +++ b/drivers/gpio/altera_pio.c @@ -1,286 +1,122 @@ /* - * Driver for Altera's PIO ip core - * + * Copyright (C) 2015 Thomas Chou <thomas(a)wytron.com.tw> * Copyright (C) 2011 Missing Link Electronics * Joachim Foerster <joachim(a)missinglinkelectronics.com> * * SPDX-License-Identifier: GPL-2.0+ - * - * To use this driver, in your board's config. header: - * #define CONFIG_ALTERA_PIO - * #define CONFIG_SYS_ALTERA_PIO_NUM <number-of-pio-cores> - * #define CONFIG_SYS_ALTERA_PIO_GPIO_NUM <total-number-of-gpios> - * And in your board's early setup routine: - * altera_pio_init(<baseaddr>, <width>, 'i'|'o'|'t', - * <reset-value>, <neg-mask>, "label"); - * - 'i'|'o'|'t': PIO is input-only/output-only/tri-state - * - <reset-value>: for correct initial status display, output-only - * - <neg-mask> is meant to be used to in cases of active-low - * GPIOs, such as LEDs and buttons (on/pressed == 0). Each bit - * which is 1 in <neg-mask> inverts the corresponding GPIO's value - * before set/after get. So: gpio_set_value(gpio, 1) => LED on . - * - * Do NOT define CONFIG_SYS_GPIO_BASE ! - * - * Optionally, in your board's config. header: - * - To force a GPIO numbering scheme like in Linux ... - * #define CONFIG_GPIO_DOWNTO_NUMBERING - * ... starting with 255 (default) - * #define CONFIG_GPIO_DOWNTO_MAX 255 */ #include <common.h> +#include <dm.h> +#include <errno.h> +#include <malloc.h> +#include <fdtdec.h> #include <asm/io.h> #include <asm/gpio.h> -#ifdef CONFIG_GPIO_DOWNTO_NUMBERING -#ifndef CONFIG_GPIO_DOWNTO_MAX -#define CONFIG_GPIO_DOWNTO_MAX 255 -#endif -#endif - -#define ALTERA_PIO_DATA 0x0 -#define ALTERA_PIO_DIR 0x4 - -#define GPIO_LABEL_SIZE 9 +DECLARE_GLOBAL_DATA_PTR; +struct altera_pio_regs { + u32 data; /* Data register */ + u32 direction; /* Direction register */ +}; -static struct altera_pio { - u32 base; - u8 width; - char iot; - u32 negmask; - u32 sh_data; - u32 sh_dir; - int gidx; - char label[GPIO_LABEL_SIZE]; -} pios[CONFIG_SYS_ALTERA_PIO_NUM]; +struct altera_pio_platdata { + struct altera_pio_regs *regs; + int gpio_count; + const char *bank_name; +}; -static int pio_num; - -static struct altera_pio_gpio { - unsigned num; - struct altera_pio *pio; - char reqlabel[GPIO_LABEL_SIZE]; -} gpios[CONFIG_SYS_ALTERA_PIO_GPIO_NUM]; - -static int pio_gpio_num; - - -static int altera_pio_gidx(unsigned gpio) +static int altera_pio_direction_input(struct udevice *dev, unsigned pin) { - int i; + struct altera_pio_platdata *plat = dev_get_platdata(dev); + struct altera_pio_regs *const regs = plat->regs; - for (i = 0; i < pio_gpio_num; ++i) { - if (gpio == gpios[i].num) - break; - } - if (i >= pio_gpio_num) - return -1; - return i; -} + clrbits_le32(&regs->direction, 1 << pin); -static struct altera_pio *altera_pio_get_and_mask(unsigned gpio, u32 *mask) -{ - int gidx = altera_pio_gidx(gpio); - if (gidx < 0) - return NULL; - if (mask) - *mask = 1 << (gidx - gpios[gidx].pio->gidx); - return gpios[gidx].pio; + return 0; } -#define altera_pio_use_gidx(_gidx, _reqlabel) \ - { strncpy(gpios[_gidx].reqlabel, _reqlabel, GPIO_LABEL_SIZE); } -#define altera_pio_unuse_gidx(_gidx) { gpios[_gidx].reqlabel[0] = '\0'; } -#define altera_pio_is_gidx_used(_gidx) (gpios[_gidx].reqlabel[0] != '\0') - -static int altera_pio_gpio_init(struct altera_pio *pio, u8 width) +static int altera_pio_direction_output(struct udevice *dev, unsigned pin, + int val) { - u8 gidx = pio_gpio_num; - int i; - - if (!width) - return -1; - if ((pio_gpio_num + width) > CONFIG_SYS_ALTERA_PIO_GPIO_NUM) - return -1; - - for (i = 0; i < width; ++i) { -#ifdef CONFIG_GPIO_DOWNTO_NUMBERING - gpios[pio_gpio_num + i].num = \ - CONFIG_GPIO_DOWNTO_MAX + 1 - gidx - width + i; -#else - gpios[pio_gpio_num + i].num = pio_gpio_num + i; -#endif - gpios[pio_gpio_num + i].pio = pio; - altera_pio_unuse_gidx(pio_gpio_num + i); - } - pio_gpio_num += width; - return gidx; -} + struct altera_pio_platdata *plat = dev_get_platdata(dev); + struct altera_pio_regs *const regs = plat->regs; -int altera_pio_init(u32 base, u8 width, char iot, u32 rstval, u32 negmask, - const char *label) -{ - if (pio_num >= CONFIG_SYS_ALTERA_PIO_NUM) - return -1; + if (val) + setbits_le32(&regs->data, 1 << pin); + else + clrbits_le32(&regs->data, 1 << pin); + /* change the data first, then the direction. to avoid glitch */ + setbits_le32(&regs->direction, 1 << pin); - pios[pio_num].base = base; - pios[pio_num].width = width; - pios[pio_num].iot = iot; - switch (iot) { - case 'i': - /* input only */ - pios[pio_num].sh_dir = 0; - pios[pio_num].sh_data = readl(base + ALTERA_PIO_DATA); - break; - case 'o': - /* output only */ - pios[pio_num].sh_dir = 0xffffffff & ((1 << width) - 1); - pios[pio_num].sh_data = rstval; - break; - case 't': - /* bidir, tri-state */ - pios[pio_num].sh_dir = readl(base + ALTERA_PIO_DIR); - pios[pio_num].sh_data = readl(base + ALTERA_PIO_DATA); - break; - default: - return -1; - } - pios[pio_num].negmask = negmask & ((1 << width) - 1); - pios[pio_num].gidx = altera_pio_gpio_init(&pios[pio_num], width); - if (pios[pio_num].gidx < 0) - return -1; - strncpy(pios[pio_num].label, label, GPIO_LABEL_SIZE); - return pio_num++; + return 0; } -void altera_pio_info(void) +static int altera_pio_get_value(struct udevice *dev, unsigned pin) { - int i; - int j; - int gidx; - u32 mask; + struct altera_pio_platdata *plat = dev_get_platdata(dev); + struct altera_pio_regs *const regs = plat->regs; - for (i = 0; i < pio_num; ++i) { - printf("Altera PIO % 2d, @0x%08x, " - "width: %u, label: %s\n", - i, pios[i].base, pios[i].width, pios[i].label); - gidx = pios[i].gidx; - for (j = gidx; j < (gidx + pios[i].width); ++j) { - mask = 1 << (j - gidx); - printf("\tGPIO % 4d: %s %s [%c] %s\n", - gpios[j].num, - gpios[j].pio->sh_dir & mask ? "out" : " in", - gpio_get_value(gpios[j].num) ? "set" : "clr", - altera_pio_is_gidx_used(j) ? 'x' : ' ', - gpios[j].reqlabel); - } - } + return !!(readl(&regs->data) & (1 << pin)); } -int gpio_request(unsigned gpio, const char *label) +static int altera_pio_set_value(struct udevice *dev, unsigned pin, int val) { - int gidx = altera_pio_gidx(gpio); - if (gidx < 0) - return gidx; - if (altera_pio_is_gidx_used(gidx)) - return -1; - - altera_pio_use_gidx(gidx, label); - return 0; -} + struct altera_pio_platdata *plat = dev_get_platdata(dev); + struct altera_pio_regs *const regs = plat->regs; -int gpio_free(unsigned gpio) -{ - int gidx = altera_pio_gidx(gpio); - if (gidx < 0) - return gidx; - if (!altera_pio_is_gidx_used(gidx)) - return -1; + if (val) + setbits_le32(&regs->data, 1 << pin); + else + clrbits_le32(&regs->data, 1 << pin); - altera_pio_unuse_gidx(gidx); return 0; } -int gpio_direction_input(unsigned gpio) +static int altera_pio_probe(struct udevice *dev) { - u32 mask; - struct altera_pio *pio; + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct altera_pio_platdata *plat = dev_get_platdata(dev); - pio = altera_pio_get_and_mask(gpio, &mask); - if (!pio) - return -1; - if (pio->iot == 'o') - return -1; + uc_priv->gpio_count = plat->gpio_count; + uc_priv->bank_name = plat->bank_name; - writel(pio->sh_dir &= ~mask, pio->base + ALTERA_PIO_DIR); return 0; } -int gpio_direction_output(unsigned gpio, int value) +static int altera_pio_ofdata_to_platdata(struct udevice *dev) { - u32 mask; - struct altera_pio *pio; + struct altera_pio_platdata *plat = dev_get_platdata(dev); - pio = altera_pio_get_and_mask(gpio, &mask); - if (!pio) - return -1; - if (pio->iot == 'i') - return -1; + plat->regs = ioremap(dev_get_addr(dev), + sizeof(struct altera_pio_regs)); + plat->gpio_count = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "width", 0); + plat->bank_name = fdt_getprop(gd->fdt_blob, dev->of_offset, + "gpio-bank-name", NULL); - value = (pio->negmask & mask) ? !value : value; - if (value) - pio->sh_data |= mask; - else - pio->sh_data &= ~mask; - writel(pio->sh_data, pio->base + ALTERA_PIO_DATA); - writel(pio->sh_dir |= mask, pio->base + ALTERA_PIO_DIR); return 0; } -int gpio_get_value(unsigned gpio) -{ - u32 mask; - struct altera_pio *pio; - u32 val; - - pio = altera_pio_get_and_mask(gpio, &mask); - if (!pio) - return -1; - - if ((pio->sh_dir & mask) || (pio->iot == 'o')) - val = pio->sh_data & mask; - else - val = readl(pio->base + ALTERA_PIO_DATA) & mask; - return (pio->negmask & mask) ? !val : val; -} - -void gpio_set_value(unsigned gpio, int value) -{ - u32 mask; - struct altera_pio *pio; - - pio = altera_pio_get_and_mask(gpio, &mask); - if (!pio) - return; - if (pio->iot == 'i') - return; - - value = (pio->negmask & mask) ? !value : value; - if (value) - pio->sh_data |= mask; - else - pio->sh_data &= ~mask; - writel(pio->sh_data, pio->base + ALTERA_PIO_DATA); - return; -} - -int gpio_is_valid(int number) -{ - int gidx = altera_pio_gidx(number); - - if (gidx < 0) - return 1; - return 0; -} +static const struct dm_gpio_ops altera_pio_ops = { + .direction_input = altera_pio_direction_input, + .direction_output = altera_pio_direction_output, + .get_value = altera_pio_get_value, + .set_value = altera_pio_set_value, +}; + +static const struct udevice_id altera_pio_ids[] = { + { .compatible = "altr,pio-1.0" }, + { } +}; + +U_BOOT_DRIVER(altera_pio) = { + .name = "altera_pio", + .id = UCLASS_GPIO, + .of_match = altera_pio_ids, + .ops = &altera_pio_ops, + .ofdata_to_platdata = altera_pio_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct altera_pio_platdata), + .probe = altera_pio_probe, +}; diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h index dcb90de..90ccbd1 100644 --- a/include/configs/nios2-generic.h +++ b/include/configs/nios2-generic.h @@ -33,26 +33,6 @@ #define CONFIG_SYS_TIMER_RATE CONFIG_SYS_TIMER_FREQ /* - * STATUS LED - */ -#define CONFIG_ALTERA_PIO -#define CONFIG_SYS_ALTERA_PIO_NUM 1 -#define CONFIG_SYS_ALTERA_PIO_GPIO_NUM LED_PIO_WIDTH - -#define CONFIG_STATUS_LED /* Enable status driver */ -#define CONFIG_BOARD_SPECIFIC_LED -#define CONFIG_GPIO_LED /* Enable GPIO LED driver */ -#define CONFIG_GPIO /* Enable GPIO driver */ -#define LED_PIO_BASE USER_LED_PIO_8OUT_BASE -#define LED_PIO_WIDTH 8 -#define LED_PIO_RSTVAL 0xff - -#define STATUS_LED_BIT 0 /* Bit-0 on GPIO */ -#define STATUS_LED_STATE STATUS_LED_ON -#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) /* 500 msec */ -#define STATUS_LED_BOOT STATUS_LED_BIT - -/* * BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE -- 2.1.4

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[U-Boot] [PATCH] nios2: add clear and set bits macros
by Thomas Chou 03 Oct '15

03 Oct '15

These macros can be used to clear and set multiple bits in a register using a single call. Signed-off-by: Thomas Chou <thomas(a)wytron.com.tw> --- arch/nios2/include/asm/io.h | 57 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/arch/nios2/include/asm/io.h b/arch/nios2/include/asm/io.h index b4bd20f..123e885 100644 --- a/arch/nios2/include/asm/io.h +++ b/arch/nios2/include/asm/io.h @@ -116,4 +116,61 @@ static inline void outsl (unsigned long port, const void *src, unsigned long cou while (count--) outl (*p++, port); } +/* + * Clear and set bits in one shot. These macros can be used to clear and + * set multiple bits in a register using a single call. These macros can + * also be used to set a multiple-bit bit pattern using a mask, by + * specifying the mask in the 'clear' parameter and the new bit pattern + * in the 'set' parameter. + */ + +#define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a) +#define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a)) + +#define out_le64(a,v) out_arch(q,le64,a,v) +#define out_le32(a,v) out_arch(l,le32,a,v) +#define out_le16(a,v) out_arch(w,le16,a,v) + +#define in_le64(a) in_arch(q,le64,a) +#define in_le32(a) in_arch(l,le32,a) +#define in_le16(a) in_arch(w,le16,a) + +#define out_be32(a,v) out_arch(l,be32,a,v) +#define out_be16(a,v) out_arch(w,be16,a,v) + +#define in_be32(a) in_arch(l,be32,a) +#define in_be16(a) in_arch(w,be16,a) + +#define out_8(a,v) __raw_writeb(v,a) +#define in_8(a) __raw_readb(a) + +#define clrbits(type, addr, clear) \ + out_##type((addr), in_##type(addr) & ~(clear)) + +#define setbits(type, addr, set) \ + out_##type((addr), in_##type(addr) | (set)) + +#define clrsetbits(type, addr, clear, set) \ + out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) + +#define clrbits_be32(addr, clear) clrbits(be32, addr, clear) +#define setbits_be32(addr, set) setbits(be32, addr, set) +#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) + +#define clrbits_le32(addr, clear) clrbits(le32, addr, clear) +#define setbits_le32(addr, set) setbits(le32, addr, set) +#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) + +#define clrbits_be16(addr, clear) clrbits(be16, addr, clear) +#define setbits_be16(addr, set) setbits(be16, addr, set) +#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) + +#define clrbits_le16(addr, clear) clrbits(le16, addr, clear) +#define setbits_le16(addr, set) setbits(le16, addr, set) +#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) + +#define clrbits_8(addr, clear) clrbits(8, addr, clear) +#define setbits_8(addr, set) setbits(8, addr, set) +#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) + #endif /* __ASM_NIOS2_IO_H_ */ -- 2.1.4

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[U-Boot] [PATCH] serial: rockchip: make ROCKCHIP_SERIAL depend on ARCH_ROCKCHIP
by Masahiro Yamada 03 Oct '15

03 Oct '15

It looks like this line was copy-pasted, but not modified. Signed-off-by: Masahiro Yamada <yamada.masahiro(a)socionext.com> --- drivers/serial/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index ccb80d2..ddb725d 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -111,7 +111,7 @@ config DEBUG_UART_SHIFT config ROCKCHIP_SERIAL bool "Rockchip on-chip UART support" - depends on ARCH_UNIPHIER && DM_SERIAL + depends on ARCH_ROCKCHIP && DM_SERIAL help Select this to enable a debug UART for Rockchip devices. This uses the ns16550 driver. You will need to #define CONFIG_SYS_NS16550 in -- 1.9.1

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[U-Boot] [PATCH v3] rockchip: Reconfigure the malloc based to point to system memory
by Sjoerd Simons 03 Oct '15

03 Oct '15

When malloc_base initially gets setup in the SPL it is based on the current (early) stack pointer, which for rockchip is pointing into SRAM. This means simple memory allocations happen in SRAM space, which is somewhat unfortunate. Specifically a bounce buffer for the mmc allocated in SRAM space seems to cause the mmc engine to stall/fail causing timeouts and a failure to load the main u-boot image. To resolve this, reconfigure the malloc_base to start at the relocated stack pointer after DRAM has been setup. For reference, things did work fine on rockchip before 596380db was merged to fix memalign_simple due to a combination of rockchip SDRAM starting at address 0 and the dw_mmc driver not checking errors from bounce_buffer_start. As a result, when a bounce buffer needed to be allocated mem_align simple would fail and return NULL. The mmc driver ignored the error and happily continued with the bounce buffer address being set to 0, which just happened to work fine.. Signed-off-by: Sjoerd Simons <sjoerd.simons(a)collabora.co.uk> Reviewed-by: Hans de Goede <hdegoede(a)redhat.com> Acked-by: Simon Glass <sjg(a)chromium.org> --- A better fix for this issue would be to reconfigure the malloc_base in spl_relocate_stack_gd following the same steps as is done for the initial setup (for which Hans de Goede already posted some patches). However at this point in the release cycle i preferred to do a minimal rockchip only fix (so those boards become bootable again) for this issue to minimize the potential impact on other boards. Changes in v3: - Fixing coding style for the comment block Changes in v2: - Also gd->malloc_ptr to 0 to not waste any potential space arch/arm/mach-rockchip/board-spl.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/mach-rockchip/board-spl.c b/arch/arm/mach-rockchip/board-spl.c index a241d96..28c3949 100644 --- a/arch/arm/mach-rockchip/board-spl.c +++ b/arch/arm/mach-rockchip/board-spl.c @@ -217,6 +217,13 @@ void board_init_f(ulong dummy) debug("DRAM init failed: %d\n", ret); return; } + + /* + * Now that DRAM is initialized setup base pointer for simple malloc + * into RAM. + */ + gd->malloc_base = CONFIG_SPL_STACK_R_ADDR; + gd->malloc_ptr = 0; } static int setup_led(void) -- 2.5.3

2 1

[U-Boot] [PATCH] dm: tpm: Drop CONFIG_DM_TPM
by Simon Glass 03 Oct '15

03 Oct '15

Now that all TPM drivers use driver model, we can drop the special driver model CONFIG option. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- drivers/tpm/Kconfig | 15 +++------------ drivers/tpm/Makefile | 2 +- 2 files changed, 4 insertions(+), 13 deletions(-) diff --git a/drivers/tpm/Kconfig b/drivers/tpm/Kconfig index 3ab652c..31b35f7 100644 --- a/drivers/tpm/Kconfig +++ b/drivers/tpm/Kconfig @@ -4,15 +4,6 @@ menu "TPM support" -config DM_TPM - bool "Enable driver model for Trusted Platform Module drivers" - depends on DM && TPM - help - Enable driver model for TPMs. The TIS interface (tis_open(), - tis_sendrecv(), etc.) is then implemented by the TPM uclass. Note - that even with driver model only a single TPM is currently - supported, since the tpm library assumes this. - config TPM_TIS_SANDBOX bool "Enable sandbox TPM driver" depends on SANDBOX @@ -24,7 +15,7 @@ config TPM_TIS_SANDBOX config TPM_ATMEL_TWI bool "Enable Atmel TWI TPM device driver" - depends on DM_TPM && DM_I2C + depends on TPM && DM_I2C help This driver supports an Atmel TPM device connected on the I2C bus. The usual tpm operations and the 'tpm' command can be used to talk @@ -33,7 +24,7 @@ config TPM_ATMEL_TWI config TPM_TIS_INFINEON bool "Enable support for Infineon SLB9635/45 TPMs on I2C" - depends on DM_TPM && DM_I2C + depends on TPM && DM_I2C help This driver supports Infineon TPM devices connected on the I2C bus. The usual tpm operations and the 'tpm' command can be used to talk @@ -57,7 +48,7 @@ config TPM_TIS_I2C_BURST_LIMITATION_LEN config TPM_TIS_LPC bool "Enable support for Infineon SLB9635/45 TPMs on LPC" - depends on DM_TPM && X86 + depends on TPM && X86 help This driver supports Infineon TPM devices connected on the I2C bus. The usual tpm operations and the 'tpm' command can be used to talk diff --git a/drivers/tpm/Makefile b/drivers/tpm/Makefile index 5748145..1d49e95 100644 --- a/drivers/tpm/Makefile +++ b/drivers/tpm/Makefile @@ -3,7 +3,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_DM_TPM) += tpm-uclass.o +obj-$(CONFIG_TPM) += tpm-uclass.o obj-$(CONFIG_TPM_ATMEL_TWI) += tpm_atmel_twi.o obj-$(CONFIG_TPM_TIS_INFINEON) += tpm_tis_infineon.o -- 2.6.0.rc2.230.g3dd15c0

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