October 2015 - U-Boot

[U-Boot] [PATCH 1/7] omap-common: Common omap_die_id definition
by Paul Kocialkowski 22 Oct '15

22 Oct '15

This introduces a common definition for omap_die_id, that aims at providing a common interface for accessing omap platform's die id bits. Signed-off-by: Paul Kocialkowski <contact(a)paulk.fr> --- arch/arm/cpu/armv7/omap-common/utils.c | 5 +++++ arch/arm/include/asm/omap_common.h | 2 ++ 2 files changed, 7 insertions(+) diff --git a/arch/arm/cpu/armv7/omap-common/utils.c b/arch/arm/cpu/armv7/omap-common/utils.c index df5f817..acff16b 100644 --- a/arch/arm/cpu/armv7/omap-common/utils.c +++ b/arch/arm/cpu/armv7/omap-common/utils.c @@ -41,6 +41,11 @@ void cancel_out(u32 *num, u32 *den, u32 den_limit) } } +__weak void omap_die_id(unsigned int *die_id) +{ + die_id[0] = die_id[1] = die_id[2] = die_id[3] = 0; +} + void __weak usb_fake_mac_from_die_id(u32 *id) { uint8_t device_mac[6]; diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index b67d4b6..b46e467 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -605,6 +605,8 @@ void omap_smc1(u32 service, u32 val); void enable_edma3_clocks(void); void disable_edma3_clocks(void); +void omap_die_id(unsigned int *die_id); + /* ABB */ #define OMAP_ABB_NOMINAL_OPP 0 #define OMAP_ABB_FAST_OPP 1 -- 1.9.1

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[U-Boot] [U-BOOT][PATCH]ARM Fix pandaboard es and a4 revision ID
by dbatzle＠dcbcyber.com 22 Oct '15

22 Oct '15

board_name environment variable was not getting set correctly for Pandaboard A4 and ES Signed-off-by: David Batzle <dbatzle(a)dcbcyber.com> CC: Albert Aribaud <albert.u.boot(a)aribaud.net>; Tom Rini <trini(a)ti.com>; Peter Robinson <pbrobinson(a)gmail.com> --- board/ti/panda/panda.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c index 783ba35..92e1b63 100644 --- a/board/ti/panda/panda.c +++ b/board/ti/panda/panda.c @@ -101,7 +101,7 @@ int get_board_revision(void) board_id4 = gpio_get_value(PANDA_ES_BOARD_ID_4_GPIO); #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG - setenv("board_name", strcat(CONFIG_SYS_BOARD, "-es")); + setenv("board_name", "panda-es"); #endif board_id = ((board_id4 << 4) | (board_id3 << 3) | (board_id2 << 2) | (board_id1 << 1) | (board_id0)); @@ -115,7 +115,7 @@ int get_board_revision(void) #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG if ((board_id >= 0x3) && (processor_rev == OMAP4430_ES2_3)) - setenv("board_name", strcat(CONFIG_SYS_BOARD, "-a4")); + setenv("board_name", "panda-a4"); #endif } -- 2.1.0

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[U-Boot] [PATCH v3 1/4] spi: zynq_[q]spi: Use BIT macro
by Jagan Teki 22 Oct '15

22 Oct '15

BIT macro used on zynq_spi.c and zynq_qspi.c Replace (1 << nr) to BIT(nr) where nr = 0, 1, 2 .... 31 Cc: Tom Rini <trini(a)konsulko.com> Signed-off-by: Jagan Teki <jteki(a)openedev.com> --- Changes for v3, v2: - none drivers/spi/zynq_qspi.c | 20 ++++++++++---------- drivers/spi/zynq_spi.c | 16 ++++++++-------- 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c index 8aa61d7..dd530a1 100644 --- a/drivers/spi/zynq_qspi.c +++ b/drivers/spi/zynq_qspi.c @@ -16,20 +16,20 @@ DECLARE_GLOBAL_DATA_PTR; /* zynq qspi register bit masks ZYNQ_QSPI_<REG>_<BIT>_MASK */ -#define ZYNQ_QSPI_CR_IFMODE_MASK (1 << 31) /* Flash intrface mode*/ -#define ZYNQ_QSPI_CR_MSA_MASK (1 << 15) /* Manual start enb */ -#define ZYNQ_QSPI_CR_MCS_MASK (1 << 14) /* Manual chip select */ -#define ZYNQ_QSPI_CR_PCS_MASK (1 << 10) /* Peri chip select */ +#define ZYNQ_QSPI_CR_IFMODE_MASK BIT(31) /* Flash intrface mode*/ +#define ZYNQ_QSPI_CR_MSA_MASK BIT(15) /* Manual start enb */ +#define ZYNQ_QSPI_CR_MCS_MASK BIT(14) /* Manual chip select */ +#define ZYNQ_QSPI_CR_PCS_MASK BIT(10) /* Peri chip select */ #define ZYNQ_QSPI_CR_FW_MASK (0x3 << 6) /* FIFO width */ #define ZYNQ_QSPI_CR_SS_MASK (0xF << 10) /* Slave Select */ #define ZYNQ_QSPI_CR_BAUD_MASK (0x7 << 3) /* Baud rate div */ -#define ZYNQ_QSPI_CR_CPHA_MASK (1 << 2) /* Clock phase */ -#define ZYNQ_QSPI_CR_CPOL_MASK (1 << 1) /* Clock polarity */ -#define ZYNQ_QSPI_CR_MSTREN_MASK (1 << 0) /* Mode select */ -#define ZYNQ_QSPI_IXR_RXNEMPTY_MASK (1 << 4) /* RX_FIFO_not_empty */ -#define ZYNQ_QSPI_IXR_TXOW_MASK (1 << 2) /* TX_FIFO_not_full */ +#define ZYNQ_QSPI_CR_CPHA_MASK BIT(2) /* Clock phase */ +#define ZYNQ_QSPI_CR_CPOL_MASK BIT(1) /* Clock polarity */ +#define ZYNQ_QSPI_CR_MSTREN_MASK BIT(0) /* Mode select */ +#define ZYNQ_QSPI_IXR_RXNEMPTY_MASK BIT(4) /* RX_FIFO_not_empty */ +#define ZYNQ_QSPI_IXR_TXOW_MASK BIT(2) /* TX_FIFO_not_full */ #define ZYNQ_QSPI_IXR_ALL_MASK 0x7F /* All IXR bits */ -#define ZYNQ_QSPI_ENR_SPI_EN_MASK (1 << 0) /* SPI Enable */ +#define ZYNQ_QSPI_ENR_SPI_EN_MASK BIT(0) /* SPI Enable */ /* zynq qspi Transmit Data Register */ #define ZYNQ_QSPI_TXD_00_00_OFFSET 0x1C /* Transmit 4-byte inst */ diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c index 65a9633..92e5712 100644 --- a/drivers/spi/zynq_spi.c +++ b/drivers/spi/zynq_spi.c @@ -20,17 +20,17 @@ DECLARE_GLOBAL_DATA_PTR; /* zynq spi register bit masks ZYNQ_SPI_<REG>_<BIT>_MASK */ -#define ZYNQ_SPI_CR_MSA_MASK (1 << 15) /* Manual start enb */ -#define ZYNQ_SPI_CR_MCS_MASK (1 << 14) /* Manual chip select */ +#define ZYNQ_SPI_CR_MSA_MASK BIT(15) /* Manual start enb */ +#define ZYNQ_SPI_CR_MCS_MASK BIT(14) /* Manual chip select */ #define ZYNQ_SPI_CR_CS_MASK (0xF << 10) /* Chip select */ #define ZYNQ_SPI_CR_BAUD_MASK (0x7 << 3) /* Baud rate div */ -#define ZYNQ_SPI_CR_CPHA_MASK (1 << 2) /* Clock phase */ -#define ZYNQ_SPI_CR_CPOL_MASK (1 << 1) /* Clock polarity */ -#define ZYNQ_SPI_CR_MSTREN_MASK (1 << 0) /* Mode select */ -#define ZYNQ_SPI_IXR_RXNEMPTY_MASK (1 << 4) /* RX_FIFO_not_empty */ -#define ZYNQ_SPI_IXR_TXOW_MASK (1 << 2) /* TX_FIFO_not_full */ +#define ZYNQ_SPI_CR_CPHA_MASK BIT(2) /* Clock phase */ +#define ZYNQ_SPI_CR_CPOL_MASK BIT(1) /* Clock polarity */ +#define ZYNQ_SPI_CR_MSTREN_MASK BIT(0) /* Mode select */ +#define ZYNQ_SPI_IXR_RXNEMPTY_MASK BIT(4) /* RX_FIFO_not_empty */ +#define ZYNQ_SPI_IXR_TXOW_MASK BIT(2) /* TX_FIFO_not_full */ #define ZYNQ_SPI_IXR_ALL_MASK 0x7F /* All IXR bits */ -#define ZYNQ_SPI_ENR_SPI_EN_MASK (1 << 0) /* SPI Enable */ +#define ZYNQ_SPI_ENR_SPI_EN_MASK BIT(0) /* SPI Enable */ #define ZYNQ_SPI_CR_BAUD_MAX 8 /* Baud rate divisor max val */ #define ZYNQ_SPI_CR_BAUD_SHIFT 3 /* Baud rate divisor shift */ -- 1.9.1

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[U-Boot] [PATCH V3 1/3] arm: discard relocation entries for secure text
by Peng Fan 22 Oct '15

22 Oct '15

The code such as PSCI in section named secure is bundled with u-boot image, and when bootm, the code will be copied to their runtime address same to compliation/linking address - CONFIG_ARMV7_SECURE_BASE. When compile the PSCI code and link it into the u-boot image, there will be relocation entries in .rel.dyn section for PSCI. Actually, we do not needs these relocation entries. If still keep the relocation entries in .rel.dyn section, r0 at line 103 and 106 in arch/arm/lib/relocate.S may be an invalid address which may not support read/write for one SoC. 102 /* relative fix: increase location by offset */ 103 add r0, r0, r4 104 ldr r1, [r0] 105 add r1, r1, r4 106 str r1, [r0] So discard them to avoid touching the relocation entry in arch/arm/lib/relocate.S. Signed-off-by: Peng Fan <Peng.Fan(a)freescale.com> Cc: Tom Warren <twarren(a)nvidia.com> Cc: York Sun <yorksun(a)freescale.com> Cc: Hans De Goede <hdegoede(a)redhat.com> Cc: Ian Campbell <ijc(a)hellion.org.uk> Cc: Albert Aribaud <albert.u.boot(a)aribaud.net> Cc: Tom Rini <trini(a)konsulko.com> Cc: Jan Kiszka <jan.kiszka(a)siemens.com> Cc: Stefano Babic <sbabic(a)denx.de> --- V2 thread: http://lists.denx.de/pipermail/u-boot/2015-October/230755.html Changes v3: Move the relocation entries to the very begining and discard them. V1 thread: http://lists.denx.de/pipermail/u-boot/2015-October/229426.html Changes V2: Refine commit msg. Discard the relocation entry section for secure text. arch/arm/cpu/u-boot.lds | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index 03cd9f6..d48a905 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -14,6 +14,23 @@ OUTPUT_ARCH(arm) ENTRY(_start) SECTIONS { + /* + * Discard the relocation entries for secure text. + * The secure code is bundled with u-boot image, so there will + * be relocations entries for the secure code, since we use + * "-mword-relocations" to compile and "-pie" to link into the + * final image. We do not need the relocation entries for secure + * code, because secure code will not be relocated, it only needs + * to be copied from loading address to CONFIG_ARMV7_SECURE_BASE, + * which is the linking and running address for secure code. + * If keep the relocation entries in .rel.dyn section, + * "relocation offset + linking address" may locates into an + * address that is reserved by SoC, then will trigger data abort. + * + * The reason that move .rel._secure at the beginning, is to + * avoid hole in the final image. + */ + /DISCARD/ : { *(.rel._secure*) } . = 0x00000000; . = ALIGN(4); -- 1.8.4

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[U-Boot] [PATCH V4 1/3] arm: discard relocation entries for secure text
by Peng Fan 22 Oct '15

22 Oct '15

The code such as PSCI in section named secure is bundled with u-boot image, and when bootm, the code will be copied to their runtime address same to compliation/linking address - CONFIG_ARMV7_SECURE_BASE. When compile the PSCI code and link it into the u-boot image, there will be relocation entries in .rel.dyn section for PSCI. Actually, we do not needs these relocation entries. If still keep the relocation entries in .rel.dyn section, r0 at line 103 and 106 in arch/arm/lib/relocate.S may be an invalid address which may not support read/write for one SoC. 102 /* relative fix: increase location by offset */ 103 add r0, r0, r4 104 ldr r1, [r0] 105 add r1, r1, r4 106 str r1, [r0] So discard them to avoid touching the relocation entry in arch/arm/lib/relocate.S. Signed-off-by: Peng Fan <Peng.Fan(a)freescale.com> Cc: Tom Warren <twarren(a)nvidia.com> Cc: York Sun <yorksun(a)freescale.com> Cc: Hans De Goede <hdegoede(a)redhat.com> Cc: Ian Campbell <ijc(a)hellion.org.uk> Cc: Albert Aribaud <albert.u.boot(a)aribaud.net> Cc: Tom Rini <trini(a)konsulko.com> Cc: Jan Kiszka <jan.kiszka(a)siemens.com> Cc: Stefano Babic <sbabic(a)denx.de> --- Changes v4: none V2 thread: http://lists.denx.de/pipermail/u-boot/2015-October/230755.html Changes v3: Move the relocation entries to the very begining and discard them. V1 thread: http://lists.denx.de/pipermail/u-boot/2015-October/229426.html Changes V2: Refine commit msg. Discard the relocation entry section for secure text. arch/arm/cpu/u-boot.lds | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index 03cd9f6..d48a905 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -14,6 +14,23 @@ OUTPUT_ARCH(arm) ENTRY(_start) SECTIONS { + /* + * Discard the relocation entries for secure text. + * The secure code is bundled with u-boot image, so there will + * be relocations entries for the secure code, since we use + * "-mword-relocations" to compile and "-pie" to link into the + * final image. We do not need the relocation entries for secure + * code, because secure code will not be relocated, it only needs + * to be copied from loading address to CONFIG_ARMV7_SECURE_BASE, + * which is the linking and running address for secure code. + * If keep the relocation entries in .rel.dyn section, + * "relocation offset + linking address" may locates into an + * address that is reserved by SoC, then will trigger data abort. + * + * The reason that move .rel._secure at the beginning, is to + * avoid hole in the final image. + */ + /DISCARD/ : { *(.rel._secure*) } . = 0x00000000; . = ALIGN(4); -- 1.8.4

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[U-Boot] TI8148 EVM
by Lad, Prabhakar 22 Oct '15

22 Oct '15

Hi Tom, I was trying the latest master branch for ti8148 evm to boot from SD card, following are the steps which I followed: 1: make ARCH=arm CROSS_COMPILE=arm-cortex_a8-linux-gnueabi- clean distclean 2: make ARCH=arm CROSS_COMPILE=arm-cortex_a8-linux-gnueabi- ti814x_evm_config 3: make ARCH=arm CROSS_COMPILE=arm-cortex_a8-linux-gnueabi- Copy the MLO and u-boot.bin to SD card boot partition which is bootable, I see no prints coming from the 1st stage bootlaoder, cant debug it as I don’t have access to JTAG. Any pointers is this code tested ? Cheers, --Prabhakar Lad

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[U-Boot] Please pull u-boot-x86.git
by Simon Glass 22 Oct '15

22 Oct '15

Hi Tom, This includes support for booting VxWorks, the Advantech SOM-6896, MRC fixes (speeds up boot), expanded video support and some debug UART improvements. The following changes since commit 5ec0003b19cbdf06ccd6941237cbc0d1c3468e2d: Prepare v2015.10 (2015-10-19 19:59:38 -0400) are available in the git repository at: git://git.denx.de/u-boot-x86.git for you to fetch changes up to e0ae64880b61fdeaf261fddd747efa80fa53d386: x86: Add support for Advantech SOM-6896 (2015-10-21 16:29:27 -0600) ---------------------------------------------------------------- Bin Meng (41): pci: Set PCI_COMMAND_IO bit for VGA device video: vesa_fb: Fix wrong return value check of pci_find_class() dm: pci: Fix pci_last_busno() to return the real last bus no dm: pci: Enable VGA address forwarding on bridges x86: ivybridge: Remove the dead codes that programs pci bridge x86: Allow disabling IGD on Intel Queensbay x86: Initialize GDT entry 1 to be the 32-bit CS as well x86: Move install_e820_map() out of zimage.c x86: Remove quotation mark in CONFIG_HOSTNAME cmd: Convert CONFIG_CMD_ELF to Kconfig cmd: Clean up cmd_elf a little bit cmd: elf: Reorder load_elf_image_phdr() and load_elf_image_shdr() cmd: bootvx: Avoid strlen() calls when constructing VxWorks bootline cmd: bootvx: Pass netmask and gatewayip to VxWorks bootline cmd: bootvx: Always get VxWorks bootline from env cmd: bootvx: Pass E820 information to an x86 VxWorks kernel cmd: bootvx: Add asmlinkage to the VxWorks x86 entry doc: Complement document about booting VxWorks Makefile: Generate U_BOOT_DMI_DATE for SMBIOS x86: Add SMBIOS table support x86: fsp: Compact the output of hob command x86: fsp: Print GUID whenever applicable in the hob command output x86: fsp: Make hob command a sub-command to fsp x86: fsp: Add a hdr sub-command to show header information x86: Add ENABLE_MRC_CACHE Kconfig option x86: Move mrccache.[c|h] to a common place x86: Do sanity test on the cache record in mrccache_update() x86: Add various minor tidy-ups in mrccache codes x86: Add more common routines to manipulate mrc cache x86: ivybridge: Use APIs provided in the mrccache lib x86: Use struct mrc_region to describe a mrc region x86: fsp: Pass mrc cache to fsp_init() and save it to gd after fsp_init() x86: baytrail: Save mrc cache to spi flash x86: Enable mrc cache for bayleybay and minnowmax x86: baytrail: Issue full system reset in reset_cpu() x86: Remove unused rw-mrc-cache properties in the link and panther dts files x86: ivybridge: Correct two typos for MRC x86: quark: Implement mrc cache x86: galileo: Enable mrc cache x86: Pass correct cpu_index to ap_init() x86: ivybridge: Enable the MRC cache George McCollister (3): x86: pci: Add PCI IDs for Wildcat Point x86: spi: Add support for Wildcat Point x86: Add support for Advantech SOM-6896 Simon Glass (16): malloc_simple: Add debug() information dm: pci: Tidy up auto-config error handling dm: pci: Correct a few debug() statements dm: pci: Adjust pci_find_and_bind_driver() to return -EPERM debug_uart: Adjust the declaration of debug_uart_init() debug_uart: Support board-specific UART initialisation debug_uart: Add an option to announce the debug UART x86: Init the debug UART if enabled x86: chromebook_link: Enable the debug UART rtc: mc146818: Add a comment to the #endif rtc: mc146818: Use probe() to set up the device dm: rtc: Correct rtc_read32() return value x86: ivybridge: Use 'ret' instead of 'rcode' x86: ivybridge: Check the RTC return value x86: ivybridge: Fix car_uninit() to correctly set run state x86: ivybridge: Measure the MRC code execution time Makefile | 2 + README | 12 +- arch/x86/Kconfig | 19 +++ arch/x86/cpu/baytrail/valleyview.c | 25 ++++ arch/x86/cpu/cpu.c | 7 +- arch/x86/cpu/ivybridge/Makefile | 1 - arch/x86/cpu/ivybridge/bd82x6x.c | 32 ----- arch/x86/cpu/ivybridge/car.S | 2 +- arch/x86/cpu/ivybridge/cpu.c | 7 + arch/x86/cpu/ivybridge/sdram.c | 162 +++++------------------ arch/x86/cpu/quark/dram.c | 52 +++++++- arch/x86/cpu/quark/quark.c | 19 +++ arch/x86/cpu/queensbay/Kconfig | 8 ++ arch/x86/cpu/queensbay/tnc.c | 19 +++ arch/x86/cpu/sipi_vector.S | 4 +- arch/x86/cpu/start.S | 11 +- arch/x86/dts/Makefile | 3 +- arch/x86/dts/bayleybay.dts | 6 + arch/x86/dts/broadwell_som-6896.dts | 43 ++++++ arch/x86/dts/chromebook_link.dts | 2 - arch/x86/dts/chromebox_panther.dts | 3 - arch/x86/dts/galileo.dts | 4 + arch/x86/dts/minnowmax.dts | 6 + arch/x86/include/asm/arch-ivybridge/mrccache.h | 51 -------- arch/x86/include/asm/arch-queensbay/tnc.h | 5 + arch/x86/include/asm/e820.h | 3 + arch/x86/include/asm/mrccache.h | 107 +++++++++++++++ arch/x86/include/asm/smbios.h | 236 +++++++++++++++++++++++++++++++++ arch/x86/include/asm/zimage.h | 3 - arch/x86/lib/Makefile | 4 +- arch/x86/lib/cmd_hob.c | 65 --------- arch/x86/lib/e820.c | 37 ++++++ arch/x86/lib/fsp/Makefile | 1 + arch/x86/lib/fsp/cmd_fsp.c | 132 +++++++++++++++++++ arch/x86/lib/fsp/fsp_common.c | 30 ++++- arch/x86/lib/fsp/fsp_dram.c | 6 + arch/x86/{cpu/ivybridge => lib}/mrccache.c | 128 +++++++++++++++--- arch/x86/lib/smbios.c | 269 ++++++++++++++++++++++++++++++++++++++ arch/x86/lib/tables.c | 5 + arch/x86/lib/zimage.c | 26 ---- common/Kconfig | 6 + common/cmd_elf.c | 406 +++++++++++++++++++++++++++++++-------------------------- common/malloc_simple.c | 4 + configs/atngw100_defconfig | 1 + configs/atngw100mkii_defconfig | 1 + configs/atstk1002_defconfig | 1 + configs/bayleybay_defconfig | 1 + configs/chromebook_link_defconfig | 5 + configs/chromebox_panther_defconfig | 1 + configs/dbau1000_defconfig | 1 + configs/dbau1100_defconfig | 1 + configs/dbau1500_defconfig | 1 + configs/dbau1550_defconfig | 1 + configs/dbau1550_el_defconfig | 1 + configs/dlvision-10g_defconfig | 1 + configs/dlvision_defconfig | 1 + configs/galileo_defconfig | 1 + configs/gr_cpci_ax2000_defconfig | 1 + configs/gr_ep2s60_defconfig | 1 + configs/gr_xc3s_1500_defconfig | 1 + configs/grasshopper_defconfig | 1 + configs/grsim_defconfig | 1 + configs/grsim_leon2_defconfig | 1 + configs/io_defconfig | 1 + configs/iocon_defconfig | 1 + configs/minnowmax_defconfig | 1 + configs/neo_defconfig | 1 + configs/pb1000_defconfig | 1 + configs/sandbox_defconfig | 1 + configs/vct_platinum_onenand_small_defconfig | 1 + configs/vct_platinum_small_defconfig | 1 + configs/vct_platinumavc_onenand_small_defconfig | 1 + configs/vct_platinumavc_small_defconfig | 1 + configs/vct_premium_onenand_small_defconfig | 1 + configs/vct_premium_small_defconfig | 1 + doc/README.vxworks | 82 ++++++++++-- doc/README.x86 | 10 +- drivers/pci/pci-uclass.c | 93 +++++++------ drivers/pci/pci_auto.c | 6 + drivers/rtc/mc146818.c | 6 +- drivers/rtc/rtc-uclass.c | 2 +- drivers/serial/Kconfig | 21 +++ drivers/serial/ns16550.c | 2 +- drivers/serial/serial_efi.c | 2 +- drivers/serial/serial_s5p.c | 2 +- drivers/spi/ich.c | 3 +- drivers/video/vesa_fb.c | 2 +- include/config_cmd_all.h | 1 - include/config_distro_defaults.h | 1 - include/configs/B4860QDS.h | 1 - include/configs/BSC9131RDB.h | 1 - include/configs/BSC9132QDS.h | 1 - include/configs/C29XPCIE.h | 1 - include/configs/CPCI2DP.h | 1 - include/configs/CPCI4052.h | 1 - include/configs/M5208EVBE.h | 1 - include/configs/M52277EVB.h | 1 - include/configs/M5235EVB.h | 1 - include/configs/M5272C3.h | 1 - include/configs/M5275EVB.h | 1 - include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/M54418TWR.h | 1 - include/configs/M54451EVB.h | 1 - include/configs/M54455EVB.h | 1 - include/configs/M5475EVB.h | 1 - include/configs/M5485EVB.h | 1 - include/configs/MIP405.h | 1 - include/configs/MPC8536DS.h | 1 - include/configs/MPC8540ADS.h | 1 - include/configs/MPC8541CDS.h | 1 - include/configs/MPC8544DS.h | 1 - include/configs/MPC8548CDS.h | 1 - include/configs/MPC8555CDS.h | 1 - include/configs/MPC8560ADS.h | 1 - include/configs/MPC8568MDS.h | 1 - include/configs/MPC8569MDS.h | 1 - include/configs/MPC8572DS.h | 1 - include/configs/P1010RDB.h | 1 - include/configs/P1022DS.h | 1 - include/configs/P2041RDB.h | 1 - include/configs/PIP405.h | 1 - include/configs/PLU405.h | 1 - include/configs/PMC405DE.h | 1 - include/configs/PMC440.h | 1 - include/configs/T102xQDS.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T1040QDS.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/TQM823L.h | 1 - include/configs/TQM823M.h | 1 - include/configs/TQM850L.h | 1 - include/configs/TQM850M.h | 1 - include/configs/TQM855L.h | 1 - include/configs/TQM855M.h | 1 - include/configs/TQM860L.h | 1 - include/configs/TQM860M.h | 1 - include/configs/TQM862L.h | 1 - include/configs/TQM862M.h | 1 - include/configs/TQM866M.h | 1 - include/configs/UCP1020.h | 1 - include/configs/VCMA9.h | 1 - include/configs/VOM405.h | 1 - include/configs/amcc-common.h | 1 - include/configs/arcangel4.h | 1 - include/configs/astro_mcf5373l.h | 1 - include/configs/axs101.h | 1 - include/configs/bf537-minotaur.h | 1 - include/configs/bf537-srv1.h | 1 - include/configs/bfin_adi_common.h | 1 - include/configs/blackstamp.h | 1 - include/configs/blackvme.h | 1 - include/configs/controlcenterd.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/crownbay.h | 1 + include/configs/dbau1x00.h | 1 - include/configs/digsy_mtc.h | 1 - include/configs/dlvision-10g.h | 1 - include/configs/dlvision.h | 1 - include/configs/io.h | 1 - include/configs/iocon.h | 1 - include/configs/km/km_arm.h | 1 - include/configs/lsxl.h | 1 - include/configs/lwmon5.h | 1 - include/configs/malta.h | 1 - include/configs/mecp5123.h | 1 - include/configs/motionpro.h | 1 - include/configs/munices.h | 1 - include/configs/neo.h | 1 - include/configs/nitrogen6x.h | 1 - include/configs/openrisc-generic.h | 1 - include/configs/origen.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/p1_twr.h | 1 - include/configs/pb1x00.h | 2 - include/configs/pcm052.h | 3 - include/configs/qemu-mips.h | 1 - include/configs/qemu-mips64.h | 1 - include/configs/qemu-ppce500.h | 1 - include/configs/sandbox.h | 1 - include/configs/sbc8548.h | 1 - include/configs/smdk2410.h | 1 - include/configs/smdkc100.h | 1 - include/configs/smdkv310.h | 1 - include/configs/som-6896.h | 38 ++++++ include/configs/t4qds.h | 1 - include/configs/tb100.h | 1 - include/configs/vct.h | 2 - include/configs/vme8349.h | 1 - include/configs/x86-common.h | 3 +- include/configs/xilinx-ppc.h | 1 - include/configs/xilinx_zynqmp.h | 1 - include/configs/xpedite1000.h | 1 - include/configs/xpedite517x.h | 1 - include/configs/xpedite520x.h | 1 - include/configs/xpedite537x.h | 1 - include/configs/xpedite550x.h | 1 - include/configs/zmx25.h | 1 - include/configs/zynq-common.h | 1 - include/debug_uart.h | 30 ++++- include/pci_ids.h | 2 + include/vxworks.h | 51 ++++---- lib/efi/efi_stub.c | 2 +- 207 files changed, 1729 insertions(+), 755 deletions(-) create mode 100644 arch/x86/dts/broadwell_som-6896.dts delete mode 100644 arch/x86/include/asm/arch-ivybridge/mrccache.h create mode 100644 arch/x86/include/asm/mrccache.h create mode 100644 arch/x86/include/asm/smbios.h delete mode 100644 arch/x86/lib/cmd_hob.c create mode 100644 arch/x86/lib/e820.c create mode 100644 arch/x86/lib/fsp/cmd_fsp.c rename arch/x86/{cpu/ivybridge => lib}/mrccache.c (51%) create mode 100644 arch/x86/lib/smbios.c create mode 100644 include/configs/som-6896.h Regards, Simon

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[U-Boot] [PATCH 1/2] linux/bitops: Move BIT defination at top
by Jagan Teki 22 Oct '15

22 Oct '15

Since it's a copy from Linux, this patch moved all BIT definations to top so-that it looks same as Linux file. Cc: Tom Rini <trini(a)konsulko.com> Signed-off-by: Jagan Teki <jteki(a)openedev.com> --- include/linux/bitops.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/include/linux/bitops.h b/include/linux/bitops.h index 7d30ace..8ed0cf5 100644 --- a/include/linux/bitops.h +++ b/include/linux/bitops.h @@ -4,6 +4,8 @@ #include <asm/types.h> #define BIT(nr) (1UL << (nr)) +#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) +#define BIT_WORD(nr) ((nr) / BITS_PER_LONG) /* * ffs: find first bit set. This is defined the same way as @@ -106,9 +108,6 @@ static inline unsigned int generic_hweight8(unsigned int w) return (res & 0x0F) + ((res >> 4) & 0x0F); } -#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) -#define BIT_WORD(nr) ((nr) / BITS_PER_LONG) - #include <asm/bitops.h> /* linux/include/asm-generic/bitops/non-atomic.h */ -- 1.9.1

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[U-Boot] [PATCH v3 1/2] linux/bitops: Move BIT definitions at top
by Jagan Teki 22 Oct '15

22 Oct '15

Since it's a copy from Linux, this patch moved all BIT definitions to top so-that it looks same as Linux file. Cc: Tom Rini <trini(a)konsulko.com> Cc: Albert ARIBAUD <albert.u.boot(a)aribaud.net> Signed-off-by: Jagan Teki <jteki(a)openedev.com> --- Changes for v3: - Fix typo defination -> definition. - Used definitions instead of definition as more BIT definitions are moved Changes for v2: - Added tab space for BIT(nr) include/linux/bitops.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/include/linux/bitops.h b/include/linux/bitops.h index 7d30ace..e9bb827 100644 --- a/include/linux/bitops.h +++ b/include/linux/bitops.h @@ -3,7 +3,9 @@ #include <asm/types.h> -#define BIT(nr) (1UL << (nr)) +#define BIT(nr) (1UL << (nr)) +#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) +#define BIT_WORD(nr) ((nr) / BITS_PER_LONG) /* * ffs: find first bit set. This is defined the same way as @@ -106,9 +108,6 @@ static inline unsigned int generic_hweight8(unsigned int w) return (res & 0x0F) + ((res >> 4) & 0x0F); } -#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) -#define BIT_WORD(nr) ((nr) / BITS_PER_LONG) - #include <asm/bitops.h> /* linux/include/asm-generic/bitops/non-atomic.h */ -- 1.9.1

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[U-Boot] Bisected broken Ethernet support on ODROID-X (Exynos4412 board)
by Siarhei Siamashka 22 Oct '15

22 Oct '15

Hello, Ethernet support does not work anymore when using the current U-Boot (version v2014.10) on the ODROID-X board. Bisecting shows that this happened starting from commit 874dde80169e0a0c00020e2e0bbcd380c61097e3 ("dm: usb: exynos: Use driver model for USB"): http://git.denx.de/?p=u-boot.git;a=commitdiff;h=874dde80169e0a0c00020e2e0bb… Below are the logs from the serial console. === works properly == U-Boot 2015.04-00271-g52e6935-dirty (Oct 20 2015 - 16:38:09) CPU: Exynos4412@1000MHz Model: Odroid based on Exynos4412 DRAM: 1 GiB Board PMIC init MMC: SAMSUNG SDHCI: 0, EXYNOS DWMMC: 1 Net: No ethernet found. Hit any key to stop autoboot: 0 reading boot.scr 129 bytes read in 11 ms (10.7 KiB/s) ## Executing script at 40408000 starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 4 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found scanning usb for ethernet devices... 1 Ethernet Device(s) found === fails == U-Boot 2015.04-00273-g78ab40b-dirty (Oct 20 2015 - 16:41:11) CPU: Exynos4412@1000MHz Model: Odroid based on Exynos4412 DRAM: 1 GiB Board PMIC init MMC: SAMSUNG SDHCI: 0, EXYNOS DWMMC: 1 Net: No ethernet found. Hit any key to stop autoboot: 0 reading boot.scr 129 bytes read in 12 ms (9.8 KiB/s) ## Executing script at 40408000 starting USB... USB-1: USB EHCI 1.00 scanning bus 0 for devices... 1 USB Device(s) found scanning usb for ethernet devices... 0 Ethernet Device(s) found === As a test, reverting f56da290b8df14a058b43735494dbbb0f8521a89 ("Drop the code that doesn't use driver model for USB.") and disabling CONFIG_DM_USB in odroid_defconfig makes it work again. -- Best regards, Siarhei Siamashka

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