January 2015 - U-Boot

Re: [U-Boot] [PATCH] net/designware: add error message on DMA reset timeout
by Marek Vasut 30 Jan '15

30 Jan '15

On Friday, January 30, 2015 at 08:10:34 AM, Alexey Brodkin wrote: > Hi Marek, Tom, > > On Fri, 2015-01-16 at 22:16 +0100, Pavel Machek wrote: > > On Tue 2015-01-13 17:10:24, Alexey Brodkin wrote: > > > If for some reason DMA module fails to reset user oserves only this: > > > --->--- > > > # dhcp > > > Trying dwmac.e0018000 > > > FAIL > > > --->--- > > > > > > This message makes not much sense. > > > With proposed change error message will be more helpful: > > > --->--- > > > # dhcp > > > Trying dwmac.e0018000 > > > DMA reset timeout > > > FAIL > > > --->--- > > > > > > For example user may do power toggle to recover board functionality. > > > > > > Signed-off-by: Alexey Brodkin <abrodkin(a)synopsys.com> > > > Cc: Chin Liang See <clsee(a)altera.com> > > > Cc: Dinh Nguyen <dinguyen(a)altera.com> > > > Cc: Albert Aribaud <albert.u.boot(a)aribaud.net> > > > Cc: Tom Rini <trini(a)ti.com> > > > Cc: Wolfgang Denk <wd(a)denx.de> > > > > Acked-by: Pavel Machek <pavel(a)denx.de> > > Any chance for this trivial change to be applied? Joe, can you please pick this ? Best regards, Marek Vasut

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[U-Boot] [PATCH] OMAP3: igep00x0: Fix boot hang and add support for status LED.
by Enric Balletbo i Serra 30 Jan '15

30 Jan '15

From: Enric Balletbo i Serra <enric.balletbo(a)collabora.com> Use the STATUS_LED APIs for indicating a boot progress instead of show_boot_progress. This patch also fixes a problem introduced with commit b3f4ca1135 (dm: omap3: Move to driver model for GPIO and serial). After that commit the board doesn't boot. Looks like the problem is the gpio_request call inside the function show_boot_progress. Signed-off-by: Enric Balletbo i Serra <enric.balletbo(a)collabora.com> --- board/isee/igep00x0/igep00x0.c | 18 +++++------------- board/isee/igep00x0/igep00x0.h | 8 -------- include/configs/omap3_igep00x0.h | 18 ++++++++++++++---- 3 files changed, 19 insertions(+), 25 deletions(-) diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c index 47522f8..693fce7 100644 --- a/board/isee/igep00x0/igep00x0.c +++ b/board/isee/igep00x0/igep00x0.c @@ -5,6 +5,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ #include <common.h> +#include <status_led.h> #include <dm.h> #include <ns16550.h> #include <twl4030.h> @@ -53,21 +54,12 @@ int board_init(void) /* boot param addr */ gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); - return 0; -} - -#if defined(CONFIG_SHOW_BOOT_PROGRESS) && !defined(CONFIG_SPL_BUILD) -void show_boot_progress(int val) -{ - if (val < 0) { - /* something went wrong */ - return; - } +#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) + status_led_set(STATUS_LED_BOOT, STATUS_LED_ON); +#endif - if (!gpio_request(IGEP00X0_GPIO_LED, "")) - gpio_direction_output(IGEP00X0_GPIO_LED, 1); + return 0; } -#endif #ifdef CONFIG_SPL_BUILD /* diff --git a/board/isee/igep00x0/igep00x0.h b/board/isee/igep00x0/igep00x0.h index 181f81f..3c7ff9b 100644 --- a/board/isee/igep00x0/igep00x0.h +++ b/board/isee/igep00x0/igep00x0.h @@ -7,14 +7,6 @@ #ifndef _IGEP00X0_H_ #define _IGEP00X0_H_ -#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) -#define IGEP00X0_GPIO_LED 27 -#endif - -#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) -#define IGEP00X0_GPIO_LED 16 -#endif - const omap3_sysinfo sysinfo = { DDR_STACKED, #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index b2b3750..6295ec5 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -29,11 +29,21 @@ #define CONFIG_REVISION_TAG 1 -/* define to enable boot progress via leds */ -#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \ - (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) -#define CONFIG_SHOW_BOOT_PROGRESS +/* Status LED */ +#define CONFIG_STATUS_LED +#define CONFIG_BOARD_SPECIFIC_LED +#define CONFIG_GPIO_LED +#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) +#define RED_LED_GPIO 27 +#endif +#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) +#define RED_LED_GPIO 16 #endif +#define RED_LED_DEV 0 +#define STATUS_LED_BIT RED_LED_GPIO +#define STATUS_LED_STATE STATUS_LED_ON +#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) +#define STATUS_LED_BOOT RED_LED_DEV /* GPIO banks */ #define CONFIG_OMAP3_GPIO_3 /* GPIO64 .. 95 is in GPIO bank 3 */ -- 2.1.0

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[U-Boot] [PATCH v2] davinci: Do not duplicate setting of gd
by Tom Rini 30 Jan '15

30 Jan '15

In f0c3a6c we stopped setting gd in board_init_f, but later had to revert to due problems on certain platforms. As davinci does not look to have these problems, we can drop the setting here and rely upon crt0.S to do it. Cc: Peter Howard <pjh(a)northern-ridge.com.au> Signed-off-by: Tom Rini <trini(a)ti.com> --- Changes in v2: - Switch to default board_init_f, move the rest of that logic to spl_board_init() Pete, I set my AM18xx EVM back up and confirmed things work there but I'd still appreciate additional testing. Thanks! --- arch/arm/cpu/arm926ejs/davinci/spl.c | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/davinci/spl.c b/arch/arm/cpu/arm926ejs/davinci/spl.c index 59b304e..49349da 100644 --- a/arch/arm/cpu/arm926ejs/davinci/spl.c +++ b/arch/arm/cpu/arm926ejs/davinci/spl.c @@ -34,29 +34,14 @@ void putc(char c) } #endif /* CONFIG_SPL_LIBCOMMON_SUPPORT */ -void board_init_f(ulong dummy) +void spl_board_init(void) { - /* First, setup our stack pointer. */ - asm volatile("mov sp, %0\n" : : "r"(CONFIG_SPL_STACK)); - - /* Second, perform our low-level init. */ #ifdef CONFIG_SOC_DM365 dm36x_lowlevel_init(0); #endif #ifdef CONFIG_SOC_DA8XX arch_cpu_init(); #endif - - /* Third, we clear the BSS. */ - memset(__bss_start, 0, __bss_end - __bss_start); - - /* Finally, setup gd and move to the next step. */ - gd = &gdata; - board_init_r(NULL, 0); -} - -void spl_board_init(void) -{ preloader_console_init(); } -- 1.7.9.5

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[U-Boot] [PATCH v1 0/6] This series extends OMAP3 support for AM/DM37xx and
by Albert ARIBAUD (3ADEV) 30 Jan '15

30 Jan '15

introduces the AM3703-based Quipos Cairo board. NOTES: Two checkpatch diagnostics are left uncorrected: 1. "warning: arch/arm/cpu/armv7/omap3/Kconfig,94: please write a paragraph that describes the config symbol fully" No other symbol of the same nature has such a paragraph, so I left it out. 2. "check: board/quipos/cairo/cairo.c,87: Avoid CamelCase: <SDP_3430_SDRC_RFR_CTRL_165MHz>" Symbol was not defined in this patch. If requested, I will post a separate change to fix the symbol. Albert ARIBAUD (3ADEV) (6): omap3: enable GP9 timer and UART2 omap3: make SDRC SHARING setting configurable omap3: add SDRC settings for Samsung K4X51163PG omap3: mmc: add 1.8v bias setting for MMC1 omap3: add some MUX definitions for upcoming cairo omap3: add support for QUIPOS Cairo board. arch/arm/cpu/armv7/omap3/Kconfig | 5 + arch/arm/cpu/armv7/omap3/clock.c | 9 + arch/arm/cpu/armv7/omap3/sdrc.c | 6 +- arch/arm/include/asm/arch-omap3/mem.h | 43 +++ arch/arm/include/asm/arch-omap3/mmc_host_def.h | 1 + arch/arm/include/asm/arch-omap3/mux.h | 51 ++- arch/arm/include/asm/arch-omap3/sys_proto.h | 1 + board/quipos/cairo/Kconfig | 12 + board/quipos/cairo/Makefile | 8 + board/quipos/cairo/cairo.c | 90 +++++ board/quipos/cairo/cairo.h | 321 ++++++++++++++++++ configs/cairo_defconfig | 4 + drivers/mmc/omap_hsmmc.c | 4 + include/configs/omap3_cairo.h | 437 +++++++++++++++++++++++++ 14 files changed, 989 insertions(+), 3 deletions(-) create mode 100644 board/quipos/cairo/Kconfig create mode 100644 board/quipos/cairo/Makefile create mode 100644 board/quipos/cairo/cairo.c create mode 100644 board/quipos/cairo/cairo.h create mode 100644 configs/cairo_defconfig create mode 100644 include/configs/omap3_cairo.h -- 2.1.0

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[U-Boot] [PATCH] am335x_evm: Enable CONFIG_NAND_OMAP_GPMC_PREFETCH
by Tom Rini 30 Jan '15

30 Jan '15

Signed-off-by: Tom Rini <trini(a)ti.com> --- include/configs/am335x_evm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 0004750..d5e84ab 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -239,6 +239,7 @@ #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) /* NAND: driver related configs */ #define CONFIG_NAND_OMAP_GPMC +#define CONFIG_NAND_OMAP_GPMC_PREFETCH #define CONFIG_NAND_OMAP_ELM #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ -- 1.7.9.5

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[U-Boot] [PATCH] ARM: OMAP5: DRA7xx: Add support for power rail grouping
by Lubomir Popov 30 Jan '15

30 Jan '15

On the DRA72x (J6Eco) EVM one PMIC SMPS is powering three SoC core rails. This concept of using one SMPS to supply multiple core domains (in various, although limited combinations, per primary device use case) has now become common and is used by many customer J6/J6Eco designs; it is supported by a number of corresponding PMIC OTP versions. This patch implements correct operation of the core voltages scaling routine by ensuring that each SMPS that is supplying more than one domain shall be written only once, and with the highest voltage of those fused in the SoC (or of those defined in the corresponding header if fuse read is disabled or fails) for the power rails belonging to the group. The patch also replaces some PMIC-related magic numbers with the appropriate definitions. The default OPP_NOM voltages for the DRA7xx SoCs are updated as well, per the latest DMs. Signed-off-by: Lubomir Popov <l-popov(a)ti.com> --- Tested on the Vayu and J6Eco EVMs. arch/arm/cpu/armv7/omap-common/clocks-common.c | 83 ++++++++++++++++++++++-- arch/arm/cpu/armv7/omap5/hw_data.c | 43 ++++++------ arch/arm/include/asm/arch-omap5/clock.h | 20 +++++- 3 files changed, 118 insertions(+), 28 deletions(-) diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c index 8e7411d..b036cbc 100644 --- a/arch/arm/cpu/armv7/omap-common/clocks-common.c +++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c @@ -437,12 +437,15 @@ void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic) { u32 offset_code; u32 offset = volt_mv; +#ifndef CONFIG_DRA7XX int ret = 0; +#endif if (!volt_mv) return; pmic->pmic_bus_init(); +#ifndef CONFIG_DRA7XX /* See if we can first get the GPIO if needed */ if (pmic->gpio_en) ret = gpio_request(pmic->gpio, "PMIC_GPIO"); @@ -456,7 +459,7 @@ void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic) /* Pull the GPIO low to select SET0 register, while we program SET1 */ if (pmic->gpio_en) gpio_direction_output(pmic->gpio, 0); - +#endif /* convert to uV for better accuracy in the calculations */ offset *= 1000; @@ -467,9 +470,10 @@ void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic) if (pmic->pmic_write(pmic->i2c_slave_addr, vcore_reg, offset_code)) printf("Scaling voltage failed for 0x%x\n", vcore_reg); - +#ifndef CONFIG_DRA7XX if (pmic->gpio_en) gpio_direction_output(pmic->gpio, 1); +#endif } static u32 optimize_vcore_voltage(struct volts const *v) @@ -505,13 +509,79 @@ static u32 optimize_vcore_voltage(struct volts const *v) } /* - * Setup the voltages for vdd_mpu, vdd_core, and vdd_iva - * We set the maximum voltages allowed here because Smart-Reflex is not - * enabled in bootloader. Voltage initialization in the kernel will set - * these to the nominal values after enabling Smart-Reflex + * Setup the voltages for the main SoC core power domains. + * We start with the maximum voltages allowed here, as set in the corresponding + * vcores_data struct, and then scale (usually down) to the fused values that + * are retrieved from the SoC. The scaling happens only if the efuse.reg fields + * are initialised. + * Rail grouping is supported for the DRA7xx SoCs only, therefore the code is + * compiled conditionally. Note that the new code writes the scaled (or zeroed) + * values back to the vcores_data struct for eventual reuse. Zero values mean + * that the corresponding rails are not controlled separately, and are not sent + * to the PMIC. */ void scale_vcores(struct vcores_data const *vcores) { +#if defined(CONFIG_DRA7XX) + int i; + struct volts *pv = (struct volts *)vcores; + struct volts *px; + + for (i=0; i<(sizeof(struct vcores_data)/sizeof(struct volts)); i++) { + debug("%d -> ", pv->value); + if (pv->value) { + /* Handle non-empty members only */ + pv->value = optimize_vcore_voltage(pv); + px = (struct volts *)vcores; + while (px < pv) { + /* + * Scan already handled non-empty members to see + * if we have a group and find the max voltage, + * which is set to the first occurance of the + * particular SMPS; the other group voltages are + * zeroed. + */ + if (px->value) { + if ((pv->pmic->i2c_slave_addr == + px->pmic->i2c_slave_addr) && + (pv->addr == px->addr)) { + /* Same PMIC, same SMPS */ + if (pv->value > px->value) + px->value = pv->value; + + pv->value = 0; + } + } + px++; + } + } + debug("%d\n", pv->value); + pv++; + } + + debug("cor: %d\n", vcores->core.value); + do_scale_vcore(vcores->core.addr, vcores->core.value, vcores->core.pmic); + debug("mpu: %d\n", vcores->mpu.value); + do_scale_vcore(vcores->mpu.addr, vcores->mpu.value, vcores->mpu.pmic); + /* Configure MPU ABB LDO after scale */ + abb_setup((*ctrl)->control_std_fuse_opp_vdd_mpu_2, + (*ctrl)->control_wkup_ldovbb_mpu_voltage_ctrl, + (*prcm)->prm_abbldo_mpu_setup, + (*prcm)->prm_abbldo_mpu_ctrl, + (*prcm)->prm_irqstatus_mpu_2, + OMAP_ABB_MPU_TXDONE_MASK, + OMAP_ABB_FAST_OPP); + + /* The .mm member is not used for the DRA7xx */ + + debug("gpu: %d\n", vcores->gpu.value); + do_scale_vcore(vcores->gpu.addr, vcores->gpu.value, vcores->gpu.pmic); + debug("eve: %d\n", vcores->eve.value); + do_scale_vcore(vcores->eve.addr, vcores->eve.value, vcores->eve.pmic); + debug("iva: %d\n", vcores->iva.value); + do_scale_vcore(vcores->iva.addr, vcores->iva.value, vcores->iva.pmic); + /* Might need udelay(1000) here if debug is enabled to see all prints */ +#else u32 val; val = optimize_vcore_voltage(&vcores->core); @@ -540,6 +610,7 @@ void scale_vcores(struct vcores_data const *vcores) val = optimize_vcore_voltage(&vcores->iva); do_scale_vcore(vcores->iva.addr, val, vcores->iva.pmic); +#endif } static inline void enable_clock_domain(u32 const clkctrl_reg, u32 enable_mode) diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index 95f1686..b9734fe 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -320,6 +320,7 @@ struct pmic_data palmas = { .pmic_write = omap_vc_bypass_send_value, }; +/* The TPS659038 and TPS65917 are software-compatible, use common struct */ struct pmic_data tps659038 = { .base_offset = PALMAS_SMPS_BASE_VOLT_UV, .step = 10000, /* 10 mV represented in uV */ @@ -394,34 +395,38 @@ struct vcores_data dra752_volts = { }; struct vcores_data dra722_volts = { - .mpu.value = 1000, + .mpu.value = VDD_MPU_DRA72x, .mpu.efuse.reg = STD_FUSE_OPP_VMIN_MPU_NOM, - .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, - .mpu.addr = 0x23, + .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, + .mpu.addr = TPS65917_REG_ADDR_SMPS1, .mpu.pmic = &tps659038, - .eve.value = 1000, - .eve.efuse.reg = STD_FUSE_OPP_VMIN_DSPEVE_NOM, - .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS, - .eve.addr = 0x2f, - .eve.pmic = &tps659038, + .core.value = VDD_CORE_DRA72x, + .core.efuse.reg = STD_FUSE_OPP_VMIN_CORE_NOM, + .core.efuse.reg_bits = DRA752_EFUSE_REGBITS, + .core.addr = TPS65917_REG_ADDR_SMPS2, + .core.pmic = &tps659038, - .gpu.value = 1000, + /* + * The DSPEVE, GPU and IVA rails are usually grouped on DRA72x + * designs and powered by TPS65917 SMPS3, as on the J6Eco EVM. + */ + .gpu.value = VDD_GPU_DRA72x, .gpu.efuse.reg = STD_FUSE_OPP_VMIN_GPU_NOM, - .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, - .gpu.addr = 0x2f, + .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, + .gpu.addr = TPS65917_REG_ADDR_SMPS3, .gpu.pmic = &tps659038, - .core.value = 1000, - .core.efuse.reg = STD_FUSE_OPP_VMIN_CORE_NOM, - .core.efuse.reg_bits = DRA752_EFUSE_REGBITS, - .core.addr = 0x27, - .core.pmic = &tps659038, + .eve.value = VDD_EVE_DRA72x, + .eve.efuse.reg = STD_FUSE_OPP_VMIN_DSPEVE_NOM, + .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS, + .eve.addr = TPS65917_REG_ADDR_SMPS3, + .eve.pmic = &tps659038, - .iva.value = 1000, + .iva.value = VDD_IVA_DRA72x, .iva.efuse.reg = STD_FUSE_OPP_VMIN_IVA_NOM, - .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS, - .iva.addr = 0x2f, + .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS, + .iva.addr = TPS65917_REG_ADDR_SMPS3, .iva.pmic = &tps659038, }; diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index 0dc584b..f8e5630 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h @@ -236,13 +236,20 @@ #define VDD_MPU_ES2_LOW 880 #define VDD_MM_ES2_LOW 880 -/* TPS659038 Voltage settings in mv for OPP_NOMINAL */ -#define VDD_MPU_DRA752 1090 +/* DRA74x/75x voltage settings in mv for OPP_NOM per DM */ +#define VDD_MPU_DRA752 1100 #define VDD_EVE_DRA752 1060 #define VDD_GPU_DRA752 1060 -#define VDD_CORE_DRA752 1030 +#define VDD_CORE_DRA752 1060 #define VDD_IVA_DRA752 1060 +/* DRA72x voltage settings in mv for OPP_NOM per DM */ +#define VDD_MPU_DRA72x 1100 +#define VDD_EVE_DRA72x 1060 +#define VDD_GPU_DRA72x 1060 +#define VDD_CORE_DRA72x 1060 +#define VDD_IVA_DRA72x 1060 + /* Efuse register offsets for DRA7xx platform */ #define DRA752_EFUSE_BASE 0x4A002000 #define DRA752_EFUSE_REGBITS 16 @@ -284,6 +291,13 @@ #define TPS659038_REG_ADDR_SMPS7 0x33 #define TPS659038_REG_ADDR_SMPS8 0x37 +/* TPS65917 */ +#define TPS65917_I2C_SLAVE_ADDR 0x58 +#define TPS65917_REG_ADDR_SMPS1 0x23 +#define TPS65917_REG_ADDR_SMPS2 0x27 +#define TPS65917_REG_ADDR_SMPS3 0x2F + + /* TPS */ #define TPS62361_I2C_SLAVE_ADDR 0x60 #define TPS62361_REG_ADDR_SET0 0x0 -- 1.7.9.5

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Re: [U-Boot] [PATCH 0/25] tegra: Add eDP support for nyan-big
by Simon Glass 30 Jan '15

30 Jan '15

Hi Tom / Jimmy, On 20 January 2015 at 09:35, Tom Warren <TWarren(a)nvidia.com> wrote: > I'm no display expert, so I'd like to have Jimmy take a look - he did the Nyan display support, and is going to be doing HDMI on another SoC, IIRC. Added him to CC. > Any news on this please? - Simon >> -----Original Message----- >> From: sjg(a)google.com [mailto:sjg@google.com] On Behalf Of Simon Glass >> Sent: Tuesday, January 20, 2015 8:59 AM >> To: U-Boot Mailing List >> Cc: Tom Warren; Stephen Warren; Simon Glass; Stephen Warren; Marek >> Vasut; Pavel Herrmann; Lukasz Majewski; Jerry Van Baren; Anatolij Gustschin >> Subject: Re: [PATCH 0/25] tegra: Add eDP support for nyan-big >> >> Hi Tom, >> >> On 1 December 2014 at 17:48, Simon Glass <sjg(a)chromium.org> wrote: >> > >> > This series adds eDP support for nyan-bg so that the display works. >> > >> > Nyan-big is based on tegra124. >> > >> > Some support is added for new clocks to make this work. The >> > drm_dp_helper.h file is brought in from Linux since many of the >> > DisplayPort constants are generic. A very simple uclass is added for >> > DisplayPort, and the Tegra driver makes use of that. The U-Boot EDID >> > support is enhanced to read some additional information (detailed >> timings). >> > >> > There is existing video support for Tegra20, but I don't think it >> > works for >> > Tegra30/114 (is this correct?). This series relies on detecting the >> > display at run-time as I cannot find a good device tree binding for >> > things like display depth. But if we could resolve that then it might >> > be possible to move Tegra20 over to use the same driver, etc. There is >> > clearly a lot in common with the display controllers - I have >> > exploited this with the header file but not with the C file. >> > >> > HDMI is not supported at present. If this is easy and there is an >> > existing driver to follow along with then I might be able to incorporate it >> later. >> > >> > This series is available at u-boot-dm/nyan-working >> >> Does this series look OK? >> >> > >> > >> > Simon Glass (25): >> > dm: tegra: config: Increase pre-reloc malloc() to 6KB >> > fdt: Add binding decode function for display-timings >> > tegra: Move the pww into tegra-common >> > tegra: pwm: Allow the clock rate to be left as is >> > tegra: Move checkboard() into the board code >> > tegra: Add a board ID function >> > power: Export register access functions from as3722 >> > tegra: Provide a function to allow LCD PMIC setup >> > tegra: Add support for setting up a as3722 PMIC >> > tegra: nyan-big: Add LCD PMIC init and board ID >> > tegra124: dts: Add host1x node to provide display information >> > tegra: config: Use CONFIG_LCD to detect LCD presence >> > tegra: clock: Add checking for invalid clock IDs >> > tegra: clock: Split the clock source code into a separate function >> > tegra124: clock: Add display clocks and functions >> > tegra: Move display controller header into common >> > video: Add drm_dp_helper.h >> > edid: Add a function to read detailed monitor timings >> > dm: video: Add a uclass for display port >> > tegra: dts: nyan-big: Add definitions for eDP display >> > tegra: video: Support serial output resource (SOR) on tegra124 >> > tegra: video: Add Embedded DisplayPort driver >> > tegra: video: support eDP displays on Tegra124 devices >> > tegra: config: nyan-big: Enable LCD >> > tegra124: video: Add full link training for eDP >> > >> > arch/arm/cpu/armv7/tegra-common/Makefile | 1 + >> > arch/arm/cpu/armv7/{tegra20 => tegra-common}/pwm.c | 5 +- >> > arch/arm/cpu/armv7/tegra20/Makefile | 1 - >> > arch/arm/cpu/armv7/tegra20/display.c | 2 +- >> > arch/arm/cpu/tegra-common/board.c | 8 - >> > arch/arm/cpu/tegra-common/clock.c | 83 +- >> > arch/arm/cpu/tegra124-common/clock.c | 141 +- >> > arch/arm/dts/tegra124-nyan-big.dts | 47 + >> > arch/arm/dts/tegra124.dtsi | 84 ++ >> > arch/arm/include/asm/arch-tegra/clk_rst.h | 15 +- >> > arch/arm/include/asm/arch-tegra/clock.h | 14 + >> > .../include/asm/{arch-tegra20 => arch-tegra}/dc.h | 63 +- >> > arch/arm/include/asm/arch-tegra/pwm.h | 60 + >> > arch/arm/include/asm/arch-tegra/sys_proto.h | 19 +- >> > arch/arm/include/asm/arch-tegra124/clock-tables.h | 3 +- >> > arch/arm/include/asm/arch-tegra124/clock.h | 21 + >> > arch/arm/include/asm/arch-tegra124/display.h | 58 + >> > arch/arm/include/asm/arch-tegra124/pwm.h | 14 + >> > arch/arm/include/asm/arch-tegra20/display.h | 2 +- >> > arch/arm/include/asm/arch-tegra20/pwm.h | 54 +- >> > board/nvidia/common/board.c | 40 +- >> > board/nvidia/nyan-big/nyan-big.c | 34 +- >> > common/edid.c | 106 ++ >> > configs/nyan-big_defconfig | 2 + >> > .../gpu/nvidia,tegra20-host1x.txt | 372 +++++ >> > doc/device-tree-bindings/video/display-timing.txt | 110 ++ >> > drivers/power/as3722.c | 16 +- >> > drivers/video/Kconfig | 14 + >> > drivers/video/Makefile | 6 + >> > drivers/video/dp-uclass.c | 34 + >> > drivers/video/tegra124/Makefile | 10 + >> > drivers/video/tegra124/display.c | 354 +++++ >> > drivers/video/tegra124/displayport.h | 412 ++++++ >> > drivers/video/tegra124/dp.c | 1500 ++++++++++++++++++++ >> > drivers/video/tegra124/sor.c | 951 +++++++++++++ >> > drivers/video/tegra124/sor.h | 913 ++++++++++++ >> > drivers/video/tegra124/tegra124-lcd.c | 94 ++ >> > include/configs/nyan-big.h | 13 + >> > include/configs/tegra-common-post.h | 2 +- >> > include/configs/tegra-common.h | 2 +- >> > include/displayport.h | 60 + >> > include/dm/uclass-id.h | 1 + >> > include/edid.h | 19 + >> > include/fdtdec.h | 83 ++ >> > include/linux/drm_dp_helper.h | 405 ++++++ >> > include/power/as3722.h | 3 + >> > lib/fdtdec.c | 95 ++ >> > 47 files changed, 6224 insertions(+), 122 deletions(-) rename >> > arch/arm/cpu/armv7/{tegra20 => tegra-common}/pwm.c (95%) rename >> > arch/arm/include/asm/{arch-tegra20 => arch-tegra}/dc.h (89%) create >> > mode 100644 arch/arm/include/asm/arch-tegra/pwm.h >> > create mode 100644 arch/arm/include/asm/arch-tegra124/display.h >> > create mode 100644 arch/arm/include/asm/arch-tegra124/pwm.h >> > create mode 100644 >> > doc/device-tree-bindings/gpu/nvidia,tegra20-host1x.txt >> > create mode 100644 doc/device-tree-bindings/video/display-timing.txt >> > create mode 100644 drivers/video/dp-uclass.c create mode 100644 >> > drivers/video/tegra124/Makefile create mode 100644 >> > drivers/video/tegra124/display.c create mode 100644 >> > drivers/video/tegra124/displayport.h >> > create mode 100644 drivers/video/tegra124/dp.c create mode 100644 >> > drivers/video/tegra124/sor.c create mode 100644 >> > drivers/video/tegra124/sor.h create mode 100644 >> > drivers/video/tegra124/tegra124-lcd.c >> > create mode 100644 include/displayport.h create mode 100644 >> > include/linux/drm_dp_helper.h >> > >> > -- >> > 2.2.0.rc0.207.ga3a616c >> > >> >> Regards, >> Simon > > ----------------------------------------------------------------------------------- > This email message is for the sole use of the intended recipient(s) and may contain > confidential information. Any unauthorized review, use, disclosure or distribution > is prohibited. If you are not the intended recipient, please contact the sender by > reply email and destroy all copies of the original message. > -----------------------------------------------------------------------------------

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[U-Boot] [PATCH v2 0/11] avr32: add generic board
by Andreas Bießmann 30 Jan '15

30 Jan '15

This is the first attempt to add generic board support to avr32 architecture. It has at least one relevant part for other manual reloc architectures. This series is currently runtime tested on grasshhopper and atstk1002. Andreas Bießmann BEWARE: The 'common/board_f: factor out reserve_stacks' patch is only partly compile tested for some ppc/arm boards yet. Changes in v2: - new since v1 - new since v1 - provide as extra patch, remove from avr32 generic board support - remove bootparams allocation, provide as extra patch - use the else path in setup_mon_len() - provide arch_reserve_stacks() for avr32 - use the newly introduced dram_init() Changes in v1: - new since RFC - new since RFC - add timer_init in board_r - remove extern declaration of mmu_init_r() - new since RFC Andreas Bießmann (11): avr32: use dlmalloc for DMA buffers avr32: rename cpu_init() -> arch_cpu_init() avr32: factor out cpu_mmc_init() avr32: rename mmu.h definitions avr32: convert to dram_init() common/board_f: factor out reserve_stacks common/board_r: manual relocation for cmd table common/board_r: allocate bootparams avr32: add generic board support grasshopper: enable generic board atstk1002: enable generic board arch/arm/lib/Makefile | 1 + arch/arm/lib/stack.c | 44 ++++++++++++++ arch/avr32/config.mk | 3 + arch/avr32/cpu/Makefile | 1 + arch/avr32/cpu/at32ap700x/mmu.c | 8 +-- arch/avr32/cpu/cpu.c | 2 +- arch/avr32/cpu/mmc.c | 16 +++++ arch/avr32/cpu/u-boot.lds | 2 + arch/avr32/include/asm/arch-at32ap700x/mmu.h | 6 +- arch/avr32/include/asm/config.h | 1 + arch/avr32/include/asm/dma-mapping.h | 7 ++- arch/avr32/include/asm/u-boot.h | 10 ++++ arch/avr32/lib/Makefile | 4 ++ arch/avr32/lib/board.c | 81 ++++---------------------- arch/avr32/lib/dram_init.c | 17 ++++++ arch/avr32/lib/interrupts.c | 5 ++ arch/avr32/lib/stack.c | 23 ++++++++ arch/powerpc/lib/Makefile | 1 + arch/powerpc/lib/stack.c | 33 +++++++++++ board/atmel/atngw100/atngw100.c | 32 +++------- board/atmel/atngw100mkii/atngw100mkii.c | 39 ++++--------- board/atmel/atstk1000/atstk1000.c | 33 +++-------- board/earthlcd/favr-32-ezkit/favr-32-ezkit.c | 33 +++-------- board/in-circuit/grasshopper/grasshopper.c | 32 +++------- board/mimc/mimc200/mimc200.c | 38 ++++-------- board/miromico/hammerhead/hammerhead.c | 32 +++------- common/board_f.c | 48 +-------------- common/board_r.c | 40 ++++++++++++- include/asm-generic/u-boot.h | 4 ++ include/common.h | 9 +++ include/configs/atngw100.h | 1 - include/configs/atngw100mkii.h | 1 - include/configs/atstk1002.h | 5 +- include/configs/atstk1006.h | 1 - include/configs/favr-32-ezkit.h | 1 - include/configs/grasshopper.h | 5 +- include/configs/hammerhead.h | 1 - include/configs/mimc200.h | 1 - 38 files changed, 311 insertions(+), 310 deletions(-) create mode 100644 arch/arm/lib/stack.c create mode 100644 arch/avr32/cpu/mmc.c create mode 100644 arch/avr32/lib/dram_init.c create mode 100644 arch/avr32/lib/stack.c create mode 100644 arch/powerpc/lib/stack.c -- 1.7.10.4

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[U-Boot] [PATCH 0/4] MIPS: unify start.S
by Paul Burton 30 Jan '15

30 Jan '15

Currently we have mips32-specific & mips64-specific versions of start.S, which are very similar. This short series adapts the mips32 start.S to also be suitable for mips64 systems & then shares that single copy between mips32 & mips64 builds. Paul Burton (4): MIPS: use asm.h macros in mips32 start.S MIPS: handle mips64 relocs in mips32 start.S MIPS: handle mips64 ST0_KX bit in mips32 start.S MIPS: share start.S between mips32 & mips64 arch/mips/Makefile | 3 +- arch/mips/cpu/mips32/Makefile | 1 - arch/mips/cpu/mips64/Makefile | 1 - arch/mips/cpu/mips64/start.S | 291 ---------------------------------- arch/mips/lib/Makefile | 2 + arch/mips/{cpu/mips32 => lib}/start.S | 137 +++++++++------- 6 files changed, 83 insertions(+), 352 deletions(-) delete mode 100644 arch/mips/cpu/mips64/start.S rename arch/mips/{cpu/mips32 => lib}/start.S (61%) -- 2.2.2

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[U-Boot] Using u-boot for Powerpc P2041
by Coskun AYYILDIZ 30 Jan '15

30 Jan '15

Hi, I have a powerpc P2041 board which runs a u-boot successfuly when the u-boot is located at the 0xFFF80000 address of the flash. I want to place the u-boot in 0xF0000000 address as 0xFFF80000 will already be used by another software. I changed the address in the config file. Then I connect the board with a debugger and change the program counter (PC) to 0xF0000000. I expected to see the u-boot messages in the serial port but saw nothing. I thought this could be due to a tlb problem. So, I first added the 0xF0000000 address in the tlb range with another little program then jumped to the 0xF0000000, but the result is still failure. So, how come can I configure the u-boot so that it will be able to run at 0xF0000000 address. Any help is really appreciated. Thank you.

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