March 2014 - U-Boot

[U-Boot] ATMEL AT45DB041D spi flash and gplugd
by Yogi P 17 Mar '14

17 Mar '14

Hello all, >From following commit spi write/erase times out on gplugd which uses ATMEL AT45DB041D spi flash. >commit f4f51a8ff894d34eb332f0d11f6c73c7bf509848 >Author: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> >Date: Wed Oct 2 19:36:58 2013 +0530 > > sf: probe: Add support for erase sector selection flag > > SECT_4K, SECT_32K and SECT_64K opeartions are performed to > to specific flash by adding a SECT* flag on respective > spi_flash_params.flag param. > >Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> Prior to this patch erase size was same as sector size; which is 64 * 1024 (64k). This 64K was replaced with 4k and timeout for erase started. If following patch is applied write/erase works well (See bottom) on top of above commit. But similar change on latest git head still has some problem with spi erase. Thanks Yogi diff --git a/drivers/mtd/spi/spi_flash_probe.c b/drivers/mtd/spi/spi_flash_probe.c index 9c2e115..9e1c4c5 100644 --- a/drivers/mtd/spi/spi_flash_probe.c +++ b/drivers/mtd/spi/spi_flash_probe.c @@ -41,7 +41,7 @@ static const struct spi_flash_params spi_flash_params_table[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */ {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, SECT_4K}, {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, SECT_4K}, - {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, SECT_4K}, + {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, 0}, {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, SECT_4K}, {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K}, {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K},

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[U-Boot] [PATCH] dfu: mmc: Replace calls to u-boot commands with native mmc API
by Lukasz Majewski 17 Mar '14

17 Mar '14

For some time we have been using the run_command() with properly crafted string. Such approach turned to be unreliable and error prone. Switch to "native" mmc subsystem API would allow better type checking and shall improve speed. Also, it seems that this API is changing less often than u-boot commands. The approach similar to env operations on the eMMC has been reused. Signed-off-by: Lukasz Majewski <l.majewski(a)samsung.com> --- drivers/dfu/dfu_mmc.c | 31 ++++++++++++++++++++++++------- 1 file changed, 24 insertions(+), 7 deletions(-) diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c index 0816f46..651cfff 100644 --- a/drivers/dfu/dfu_mmc.c +++ b/drivers/dfu/dfu_mmc.c @@ -12,6 +12,7 @@ #include <errno.h> #include <div64.h> #include <dfu.h> +#include <mmc.h> static unsigned char __aligned(CONFIG_SYS_CACHELINE_SIZE) dfu_file_buf[CONFIG_SYS_DFU_MAX_FILE_SIZE]; @@ -20,8 +21,8 @@ static long dfu_file_buf_len; static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu, u64 offset, void *buf, long *len) { - char cmd_buf[DFU_CMD_BUF_SIZE]; - u32 blk_start, blk_count; + struct mmc *mmc = find_mmc_device(dfu->dev_num); + u32 blk_start, blk_count, n = 0; /* * We must ensure that we work in lba_blk_size chunks, so ALIGN @@ -38,12 +39,28 @@ static int mmc_block_op(enum dfu_op op, struct dfu_entity *dfu, return -EINVAL; } - sprintf(cmd_buf, "mmc %s %p %x %x", - op == DFU_OP_READ ? "read" : "write", - buf, blk_start, blk_count); + debug("%s: %s dev: %d start: %d cnt: %d buf: 0x%p\n", __func__, + op == DFU_OP_READ ? "MMC READ" : "MMC WRITE", dfu->dev_num, + blk_start, blk_count, buf); + switch (op) { + case DFU_OP_READ: + n = mmc->block_dev.block_read(dfu->dev_num, blk_start, + blk_count, buf); + break; + case DFU_OP_WRITE: + n = mmc->block_dev.block_write(dfu->dev_num, blk_start, + blk_count, buf); + break; + default: + error("Operation not supported\n"); + } - debug("%s: %s 0x%p\n", __func__, cmd_buf, cmd_buf); - return run_command(cmd_buf, 0); + if (n != blk_count) { + error("MMC operation failed"); + return -EIO; + } + + return 0; } static int mmc_file_buffer(struct dfu_entity *dfu, void *buf, long *len) -- 1.7.10.4

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[U-Boot] Relocation
by mahsmak 17 Mar '14

17 Mar '14

Hi, Can anyone please explain how relocation address is calculated in uboot ? Also, I want to know whether relocation will happen or not when uboot is running from RAM already? If yes, then can it be disabled ? Thank you, -- View this message in context: http://u-boot.10912.n7.nabble.com/Relocation-tp175974.html Sent from the U-Boot mailing list archive at Nabble.com.

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[U-Boot] [PATCH v2 0/4] samsung: Add mmc controller to use dwmmc
by Beomho Seo 17 Mar '14

17 Mar '14

This patch set for use dw mmc controller. Patch enable supporting device tree for dw mmc controller. For use dwmmc controller on trats2 board, enable configuration dw_mmc, exynos_dwmmc, bounce_buffer and then disable sdhci configuration. This patch set tested on TRATS2 board. Changes for v2: - Use device tree for dw mmc controller. - dw mmc node is added device node on exynos4 device tree. - dw mmc controller driver is fixed for use exynos4 and 5. - add fdt compat id of exynos4 dwmmc. - Add comment. Beomho Seo (4): drivers: mmc: dwmmc: enable support for DT arm: exynos: pinmux: Add sdmmc4 gpio configuration arm: exynos: clock: Remove exynos4x12_set_mmc_clk function board: trats2: Enable device tree on Trats2 arch/arm/cpu/armv7/exynos/clock.c | 29 +---------------------------- arch/arm/cpu/armv7/exynos/pinmux.c | 19 +++++++++++++++---- arch/arm/dts/exynos4.dtsi | 8 ++++++++ arch/arm/dts/exynos4412-trats2.dts | 8 ++++++++ drivers/mmc/exynos_dw_mmc.c | 20 ++++++++++++++++---- include/fdtdec.h | 1 + lib/fdtdec.c | 1 + 7 files changed, 50 insertions(+), 36 deletions(-) -- 1.7.9.5 -- Best Regards,

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[U-Boot] [PATCH v2 2/4] arm: exynos: pinmux: Add sdmmc4 gpio configuration
by Beomho Seo 17 Mar '14

17 Mar '14

For use dwmmc controller at exynos4, add SDMMC gpio configuration. In case SDMMC2, do not use 8bit mode at exynos4. Signed-off-by: Beomho Seo <beomho.seo(a)samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung(a)samsung.com> Cc: Lukasz Majewski <l.majewski(a)samsung.com> Cc: Piotr Wilczek <p.wilczek(a)samsung.com> Cc: Minkyu Kang <mk7.kang(a)samsung.com> --- Changes for v2: - Fixed value initialise. - Comment add in function. arch/arm/cpu/armv7/exynos/pinmux.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c index 9edb475..3dce5d2 100644 --- a/arch/arm/cpu/armv7/exynos/pinmux.c +++ b/arch/arm/cpu/armv7/exynos/pinmux.c @@ -632,16 +632,26 @@ static int exynos4_mmc_config(int peripheral, int flags) struct exynos4_gpio_part2 *gpio2 = (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2(); struct s5p_gpio_bank *bank, *bank_ext; + unsigned int func, func_ext; int i; switch (peripheral) { case PERIPH_ID_SDMMC0: bank = &gpio2->k0; bank_ext = &gpio2->k1; + func = GPIO_FUNC(0x2); + func_ext = GPIO_FUNC(0x3); break; case PERIPH_ID_SDMMC2: bank = &gpio2->k2; - bank_ext = &gpio2->k3; + func = GPIO_FUNC(0x2); + func_ext = 0; + break; + case PERIPH_ID_SDMMC4: + bank = &gpio2->k0; + bank_ext = &gpio2->k1; + func = GPIO_FUNC(0x3); + func_ext = GPIO_FUNC(0x4); break; default: return -1; @@ -649,13 +659,14 @@ static int exynos4_mmc_config(int peripheral, int flags) for (i = 0; i < 7; i++) { if (i == 2) continue; - s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2)); + s5p_gpio_cfg_pin(bank, i, func); s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE); s5p_gpio_set_drv(bank, i, GPIO_DRV_4X); } + /* SDMMC do not use 8bit mode at exynos4 */ if (flags & PINMUX_FLAG_8BIT_MODE) { for (i = 3; i < 7; i++) { - s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3)); + s5p_gpio_cfg_pin(bank_ext, i, func_ext); s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE); s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X); } @@ -722,10 +733,10 @@ static int exynos4_pinmux_config(int peripheral, int flags) break; case PERIPH_ID_SDMMC0: case PERIPH_ID_SDMMC2: + case PERIPH_ID_SDMMC4: return exynos4_mmc_config(peripheral, flags); case PERIPH_ID_SDMMC1: case PERIPH_ID_SDMMC3: - case PERIPH_ID_SDMMC4: debug("SDMMC device %d not implemented\n", peripheral); return -1; default: -- 1.7.9.5

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[U-Boot] [PATCH] powerpc/t104xrdb: Add l2switch external PHYs configuration
by Codrin Ciubotariu 17 Mar '14

17 Mar '14

T1040rdb has 2 VSC8514 quad PHYs attached to 8 ports from a layer 2 switch. The PHYs Serdes Auto-negotiation must be enabled in order to have link between internal PHYs and external PHYs. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu(a)freescale.com> Cc: York Sun <yorksun(a)freescale.com> --- board/freescale/t104xrdb/eth.c | 115 +++++++++++++++++++++++++++++++++++++++++ include/configs/T1040RDB.h | 2 + 2 files changed, 117 insertions(+) diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c index 0188fd4..93b758d 100644 --- a/board/freescale/t104xrdb/eth.c +++ b/board/freescale/t104xrdb/eth.c @@ -14,12 +14,101 @@ #include "../common/fman.h" +#define PHY_ID_VSC8514 0x00070670 + +#define PHY_ID_REG1 0x02 +#define PHY_ID_REG2 0x03 + +#define PHY_EXT_PAGE_ACCESS_EXTENDED3 0x3 +#define PHY_EXT_PAGE_ACCESS_GENERAL 0x10 +#define MIIM_VSC8514_MAC_SERDES_CON 0x10 +#define MIIM_VSC8514_MAC_SERDES_ANEG 0x80 + +/* Vitesse VSC8514 control register */ +#define MIIM_VSC8514_GENERAL18 0x12 +#define MIIM_VSC8514_GENERAL19 0x13 +#define MIIM_VSC8514_GENERAL23 0x17 + +/* Vitesse VSC8514 general purpose register 18 */ +#define MIIM_VSC8514_18G_QSGMII 0x80e0 +#define MIIM_VSC8514_18G_CMDSTAT 0x8000 + +#ifdef CONFIG_T1040RDB +static int vsc8514_config(struct mii_dev *bus, int phy_addr, + phy_interface_t interface) +{ + int i; + u32 val; + int timeout = 1000000; + + /* this is a quad PHY, so we must initialize 4 PHYs + * starting with phy_addr */ + for (i = phy_addr; i < phy_addr + 4; i++) { + /* configure register to access 19G */ + bus->write(bus, i, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, + PHY_EXT_PAGE_ACCESS_GENERAL); + + val = bus->read(bus, i, MDIO_DEVAD_NONE, + MIIM_VSC8514_GENERAL19); + if (interface == PHY_INTERFACE_MODE_QSGMII) { + /* set bit 15:14 to '01' for QSGMII mode */ + val = (val & 0x3fff) | (1 << 14); + bus->write(bus, i, MDIO_DEVAD_NONE, + MIIM_VSC8514_GENERAL19, val); + /* Enable 4 ports MAC QSGMII */ + bus->write(bus, i, MDIO_DEVAD_NONE, + MIIM_VSC8514_GENERAL18, + MIIM_VSC8514_18G_QSGMII); + } + + val = bus->read(bus, i, MDIO_DEVAD_NONE, + MIIM_VSC8514_GENERAL18); + /* When bit 15 is cleared the command has completed */ + while ((val & MIIM_VSC8514_18G_CMDSTAT) && timeout--) + val = bus->read(bus, i, MDIO_DEVAD_NONE, + MIIM_VSC8514_GENERAL18); + + if (0 == timeout) { + printf("PHY 8514 config failed\n"); + return -1; + } + + bus->write(bus, i, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, 0); + + /* configure register to access 23 */ + val = bus->read(bus, i, MDIO_DEVAD_NONE, + MIIM_VSC8514_GENERAL23); + /* set bits 10:8 to '000' */ + val = (val & 0xf8ff); + bus->write(bus, i, MDIO_DEVAD_NONE, + MIIM_VSC8514_GENERAL23, val); + + /* Enable Serdes Auto-negotiation */ + bus->write(bus, i, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, + PHY_EXT_PAGE_ACCESS_EXTENDED3); + val = bus->read(bus, i, MDIO_DEVAD_NONE, + MIIM_VSC8514_MAC_SERDES_CON); + val = val | MIIM_VSC8514_MAC_SERDES_ANEG; + bus->write(bus, i, MDIO_DEVAD_NONE, MIIM_VSC8514_MAC_SERDES_CON, + val); + bus->write(bus, i, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, 0); + } + + return 0; +} +#endif + int board_eth_init(bd_t *bis) { #ifdef CONFIG_FMAN_ENET struct memac_mdio_info memac_mdio_info; unsigned int i; int phy_addr = 0; +#ifdef CONFIG_T1040RDB + struct mii_dev *bus; + u32 val; +#endif + printf("Initializing Fman\n"); memac_mdio_info.regs = @@ -66,6 +155,32 @@ int board_eth_init(bd_t *bis) } cpu_eth_init(bis); + +#ifdef CONFIG_T1040RDB + bus = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME); + + /* if there are VSC8514 quad PHYs over QSGMII, configure them + * these are l2switch PHYs and they are not associated + * with ethernet interfaces*/ + val = 0xFFFF & bus->read(bus, CONFIG_SYS_FM1_QSGMII11_PHY_ADDR, + MDIO_DEVAD_NONE, PHY_ID_REG1); + val <<= 16; + val += 0xFFFF & bus->read(bus, CONFIG_SYS_FM1_QSGMII11_PHY_ADDR, + MDIO_DEVAD_NONE, PHY_ID_REG2); + if (val == PHY_ID_VSC8514) + vsc8514_config(bus, CONFIG_SYS_FM1_QSGMII11_PHY_ADDR, + PHY_INTERFACE_MODE_QSGMII); + + val = 0xFFFF & bus->read(bus, CONFIG_SYS_FM1_QSGMII21_PHY_ADDR, + MDIO_DEVAD_NONE, PHY_ID_REG1); + val <<= 16; + val += 0xFFFF & bus->read(bus, CONFIG_SYS_FM1_QSGMII21_PHY_ADDR, + MDIO_DEVAD_NONE, PHY_ID_REG2); + if (val == PHY_ID_VSC8514) + vsc8514_config(bus, CONFIG_SYS_FM1_QSGMII21_PHY_ADDR, + PHY_INTERFACE_MODE_QSGMII); +#endif + #endif return pci_eth_init(bis); diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h index 395845b..af9d073 100644 --- a/include/configs/T1040RDB.h +++ b/include/configs/T1040RDB.h @@ -544,6 +544,8 @@ #endif #ifdef CONFIG_FMAN_ENET +#define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR 0x04 +#define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR 0x08 #define CONFIG_SYS_SGMII1_PHY_ADDR 0x03 #define CONFIG_SYS_RGMII1_PHY_ADDR 0x01 #define CONFIG_SYS_RGMII2_PHY_ADDR 0x02 -- 1.7.11.7

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[U-Boot] [PATCH] usb: eth: smsc95xx: add LAN9500A device ID
by Ilya Ledvich 17 Mar '14

17 Mar '14

Add LAN9500A product ID (0x9e00) in order to support LAN9500A based dongles. Tested on cm_t335. Signed-off-by: Ilya Ledvich <ilya(a)compulab.co.il> --- drivers/usb/eth/smsc95xx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/usb/eth/smsc95xx.c b/drivers/usb/eth/smsc95xx.c index 7bf0a34..7a7a676 100644 --- a/drivers/usb/eth/smsc95xx.c +++ b/drivers/usb/eth/smsc95xx.c @@ -799,6 +799,7 @@ static const struct smsc95xx_dongle smsc95xx_dongles[] = { { 0x0424, 0x9500 }, /* LAN9500 Ethernet */ { 0x0424, 0x9730 }, /* LAN9730 Ethernet (HSIC) */ { 0x0424, 0x9900 }, /* SMSC9500 USB Ethernet Device (SAL10) */ + { 0x0424, 0x9e00 }, /* LAN9500A Ethernet */ { 0x0000, 0x0000 } /* END - Do not remove */ }; -- 1.7.9.5

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[U-Boot] [PATCH 0/3] usb: dfu: introduce dfuMANIFEST state
by Heiko Schocher 17 Mar '14

17 Mar '14

on nand flash using ubi, after the download of the new image into the flash, the "rest" of the nand sectors get erased while flushing the medium. With current u-boot version dfu-util may show: Starting download: [##################################################] finished! state(7) = dfuMANIFEST, status(0) = No error condition is present unable to read DFU status as dfu_get_status is not answered while erasing sectors, if erasing needs some time. So do the following changes to prevent this: - introduce dfuManifest state According to dfu specification [1] section 7: "the device enters the dfuMANIFEST-SYNC state and awaits the solicitation of the status report by the host. Upon receipt of the anticipated DFU_GETSTATUS, the device enters the dfuMANIFEST state, where it completes its reprogramming operations." - when stepping into dfuManifest state, sending a PollTimeout DFU_MANIFEST_POLL_TIMEOUT in ms, to the host, so the host (dfu-util) waits the PollTimeout before sending a get_status again. Patch 0002-usb-dfu-introduce-dfuMANIFEST-state.patch shows following checkpatch errors, but I think they are OK, as the hole file uses CamelCase for the statenames as this in sync with [1] CHECK: Avoid CamelCase: <DFU_STATE_dfuMANIFEST> #103: FILE: drivers/usb/gadget/f_dfu.c:190: + f_dfu->dfu_state = DFU_STATE_dfuMANIFEST; CHECK: Avoid CamelCase: <DFU_STATE_dfuIDLE> #156: FILE: drivers/usb/gadget/f_dfu.c:491: + f_dfu->dfu_state = DFU_STATE_dfuIDLE; CHECK: Avoid CamelCase: <DFU_STATE_dfuERROR> #166: FILE: drivers/usb/gadget/f_dfu.c:501: + f_dfu->dfu_state = DFU_STATE_dfuERROR; total: 0 errors, 0 warnings, 3 checks, 133 lines checked NOTE: Ignored message types: COMPLEX_MACRO CONSIDER_KSTRTO MINMAX MULTISTATEMENT_MACRO_USE_DO_WHILE NETWORKING_BLOCK_COMMENT_STYLE USLEEP_RANGE [1]: http://www.usb.org/developers/devclass_docs/usbdfu10.pdf Heiko Schocher (3): usb, dfu: extract flush code into seperate function usb: dfu: introduce dfuMANIFEST state am335x, dfu: add DFU_MANIFEST_POLL_TIMEOUT to the siemens boards README | 5 +++ drivers/dfu/dfu.c | 45 +++++++++++++------------ drivers/usb/gadget/f_dfu.c | 60 +++++++++++++++++++++++++++++----- include/configs/siemens-am33x-common.h | 1 + include/dfu.h | 4 +++ 5 files changed, 86 insertions(+), 29 deletions(-) Cc: Lukasz Majewski <l.majewski(a)samsung.com> Cc: Kyungmin Park <kyungmin.park(a)samsung.com> Cc: Marek Vasut <marex(a)denx.de> -- 1.8.3.1

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[U-Boot] [RFC PATCH 1/6] fpga: spartan2: Avoid CamelCase
by Michal Simek 17 Mar '14

17 Mar '14

No functional changes. Signed-off-by: Michal Simek <michal.simek(a)xilinx.com> --- board/esd/pmc440/fpga.c | 2 +- board/matrix_vision/mvsmr/fpga.c | 2 +- drivers/fpga/spartan2.c | 40 ++++++++++++++++++++-------------------- drivers/fpga/xilinx.c | 14 +++++++------- include/spartan2.h | 32 ++++++++++++++++---------------- include/xilinx.h | 2 +- 6 files changed, 46 insertions(+), 46 deletions(-) diff --git a/board/esd/pmc440/fpga.c b/board/esd/pmc440/fpga.c index b7b62dd..cef2050 100644 --- a/board/esd/pmc440/fpga.c +++ b/board/esd/pmc440/fpga.c @@ -47,7 +47,7 @@ Xilinx_Spartan3_Slave_Serial_fns pmc440_fpga_fns = { }; #endif -Xilinx_Spartan2_Slave_Serial_fns ngcc_fpga_fns = { +xilinx_spartan2_slave_serial_fns ngcc_fpga_fns = { ngcc_fpga_pre_config_fn, ngcc_fpga_pgm_fn, ngcc_fpga_clk_fn, diff --git a/board/matrix_vision/mvsmr/fpga.c b/board/matrix_vision/mvsmr/fpga.c index 88035a9..639bc7c 100644 --- a/board/matrix_vision/mvsmr/fpga.c +++ b/board/matrix_vision/mvsmr/fpga.c @@ -27,7 +27,7 @@ Xilinx_Spartan3_Slave_Serial_fns fpga_fns = { }; Xilinx_desc spartan3 = { - Xilinx_Spartan2, + xilinx_spartan2, slave_serial, XILINX_XC3S200_SIZE, (void *) &fpga_fns, diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c index 6eab1b5..bd31709 100644 --- a/drivers/fpga/spartan2.c +++ b/drivers/fpga/spartan2.c @@ -31,29 +31,29 @@ #define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */ #endif -static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int Spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -/* static int Spartan2_sp_info(Xilinx_desc *desc ); */ +static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize); +static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +/* static int spartan2_sp_info(Xilinx_desc *desc ); */ -static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize); -static int Spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -/* static int Spartan2_ss_info(Xilinx_desc *desc ); */ +static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize); +static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +/* static int spartan2_ss_info(Xilinx_desc *desc ); */ /* ------------------------------------------------------------------------- */ /* Spartan-II Generic Implementation */ -int Spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize) +int spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; switch (desc->iface) { case slave_serial: PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__); - ret_val = Spartan2_ss_load (desc, buf, bsize); + ret_val = spartan2_ss_load(desc, buf, bsize); break; case slave_parallel: PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__); - ret_val = Spartan2_sp_load (desc, buf, bsize); + ret_val = spartan2_sp_load(desc, buf, bsize); break; default: @@ -64,19 +64,19 @@ int Spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int Spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; switch (desc->iface) { case slave_serial: PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__); - ret_val = Spartan2_ss_dump (desc, buf, bsize); + ret_val = spartan2_ss_dump(desc, buf, bsize); break; case slave_parallel: PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__); - ret_val = Spartan2_sp_dump (desc, buf, bsize); + ret_val = spartan2_sp_dump(desc, buf, bsize); break; default: @@ -87,7 +87,7 @@ int Spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -int Spartan2_info( Xilinx_desc *desc ) +int spartan2_info(Xilinx_desc *desc) { return FPGA_SUCCESS; } @@ -96,10 +96,10 @@ int Spartan2_info( Xilinx_desc *desc ) /* ------------------------------------------------------------------------- */ /* Spartan-II Slave Parallel Generic Implementation */ -static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ - Xilinx_Spartan2_Slave_Parallel_fns *fn = desc->iface_fns; + xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns; PRINTF ("%s: start with interface functions @ 0x%p\n", __FUNCTION__, fn); @@ -248,10 +248,10 @@ static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int Spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ - Xilinx_Spartan2_Slave_Parallel_fns *fn = desc->iface_fns; + xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns; if (fn) { unsigned char *data = (unsigned char *) buf; @@ -296,10 +296,10 @@ static int Spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize) /* ------------------------------------------------------------------------- */ -static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume the worst */ - Xilinx_Spartan2_Slave_Serial_fns *fn = desc->iface_fns; + xilinx_spartan2_slave_serial_fns *fn = desc->iface_fns; int i; unsigned char val; @@ -439,7 +439,7 @@ static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize) return ret_val; } -static int Spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize) +static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize) { /* Readback is only available through the Slave Parallel and */ /* boundary-scan interfaces. */ diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index 2e0db53..47bbf39 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -149,11 +149,11 @@ int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize) printf ("%s: Invalid device descriptor\n", __FUNCTION__); } else switch (desc->family) { - case Xilinx_Spartan2: + case xilinx_spartan2: #if defined(CONFIG_FPGA_SPARTAN2) PRINTF ("%s: Launching the Spartan-II Loader...\n", __FUNCTION__); - ret_val = Spartan2_load (desc, buf, bsize); + ret_val = spartan2_load(desc, buf, bsize); #else printf ("%s: No support for Spartan-II devices.\n", __FUNCTION__); @@ -206,11 +206,11 @@ int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize) printf ("%s: Invalid device descriptor\n", __FUNCTION__); } else switch (desc->family) { - case Xilinx_Spartan2: + case xilinx_spartan2: #if defined(CONFIG_FPGA_SPARTAN2) PRINTF ("%s: Launching the Spartan-II Reader...\n", __FUNCTION__); - ret_val = Spartan2_dump (desc, buf, bsize); + ret_val = spartan2_dump(desc, buf, bsize); #else printf ("%s: No support for Spartan-II devices.\n", __FUNCTION__); @@ -262,7 +262,7 @@ int xilinx_info (Xilinx_desc * desc) if (xilinx_validate (desc, (char *)__FUNCTION__)) { printf ("Family: \t"); switch (desc->family) { - case Xilinx_Spartan2: + case xilinx_spartan2: printf ("Spartan-II\n"); break; case Xilinx_Spartan3: @@ -316,9 +316,9 @@ int xilinx_info (Xilinx_desc * desc) if (desc->iface_fns) { printf ("Device Function Table @ 0x%p\n", desc->iface_fns); switch (desc->family) { - case Xilinx_Spartan2: + case xilinx_spartan2: #if defined(CONFIG_FPGA_SPARTAN2) - Spartan2_info (desc); + spartan2_info(desc); #else /* just in case */ printf ("%s: No support for Spartan-II devices.\n", diff --git a/include/spartan2.h b/include/spartan2.h index 087a27d..a9fc68a 100644 --- a/include/spartan2.h +++ b/include/spartan2.h @@ -10,9 +10,9 @@ #include <xilinx.h> -extern int Spartan2_load(Xilinx_desc *desc, const void *image, size_t size); -extern int Spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize); -extern int Spartan2_info(Xilinx_desc *desc); +int spartan2_load(Xilinx_desc *desc, const void *image, size_t size); +int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +int spartan2_info(Xilinx_desc *desc); /* Slave Parallel Implementation function table */ typedef struct { @@ -29,7 +29,7 @@ typedef struct { Xilinx_busy_fn busy; Xilinx_abort_fn abort; Xilinx_post_fn post; -} Xilinx_Spartan2_Slave_Parallel_fns; +} xilinx_spartan2_slave_parallel_fns; /* Slave Serial Implementation function table */ typedef struct { @@ -40,7 +40,7 @@ typedef struct { Xilinx_done_fn done; Xilinx_wr_fn wr; Xilinx_post_fn post; -} Xilinx_Spartan2_Slave_Serial_fns; +} xilinx_spartan2_slave_serial_fns; /* Device Image Sizes *********************************************************************/ @@ -63,36 +63,36 @@ typedef struct { *********************************************************************/ /* Spartan-II devices */ #define XILINX_XC2S15_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie } #define XILINX_XC2S30_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie } #define XILINX_XC2S50_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie } #define XILINX_XC2S100_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie } #define XILINX_XC2S150_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie } #define XILINX_XC2S200_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie } #define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie } #define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie } #define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie } #define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie } #define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \ -{ Xilinx_Spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie } +{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie } #endif /* _SPARTAN2_H_ */ diff --git a/include/xilinx.h b/include/xilinx.h index 00a585e..9d870b2 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -26,7 +26,7 @@ typedef enum { /* typedef Xilinx_iface */ typedef enum { /* typedef Xilinx_Family */ min_xilinx_type, /* low range check value */ - Xilinx_Spartan2, /* Spartan-II Family */ + xilinx_spartan2, /* Spartan-II Family */ Xilinx_VirtexE, /* Virtex-E Family */ Xilinx_Virtex2, /* Virtex2 Family */ Xilinx_Spartan3, /* Spartan-III Family */ -- 1.8.2.3

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[U-Boot] Secure booting
by JYOTI DUBEY 17 Mar '14

17 Mar '14

Can somebody inform me what all changes I need to make in U-boot 2013 source code to enable secure booting? Thanks in Advance!

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