March 2014 - U-Boot

[U-Boot] setting Ethernet address
by Benedict Hewson 16 Mar '14

16 Mar '14

I am trying to get network support working on the Embest imx6 Marsboard. I have been reading through the various imx6 boards and it appears that some at least store a MAC address in the fuse memory. This does not appear to be set on the MarSboard - the fuse memory contains 0. The original 2009 version used the ethaddr environment variable. If I try to include this in the config header file either as part of the CONFIG_EXTRA_ENV_SETTINGS - #define CONFIG_ETHADDR 00:01:02:03:04:05 #define CONFIG_EXTRA_ENV_SETTINGS \ "ethaddr="__stringify(CONFIG_ETHADDR)"\0" \ or more simply as in the original version "ethaddr=00:01:02:03:04:05\0" \ everything compiles, but when booting I get "Warning: failed to set MAC address" and when listing the environment variables ethhaddr is missing. If I manually set ethaddr and ipaddr the networking seems to work as I can ping the board successfully. I assume I am missing something somewhere and I expect if I go through the source I will eventually find it, but it is probably going to be quicker to ask. many thanks Ben

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[U-Boot] Is non-English documentation allowed ?
by Masahiro Yamada 15 Mar '14

15 Mar '14

Hello Wolfgang, Tom In U-Boot, is there any rule to restrict documents written in a language other than English? I found a README file written in Germany by chance: board/lwmon/README.keybd Best Regards Masahiro Yamada

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[U-Boot] A proposal/hack for an efficient USB DFU for linux based boards
by Krishna Pattabiraman 15 Mar '14

15 Mar '14

Hi All, I was working with dfu-utill couple of years ago as part of my thesis. My task was to provide a firmware upgrade mechanism using USB. I had an open moko so I thought of implementing a solution based on it. The board I used is SAM9G45 http://www.atmel.com/devices/sam9g45.aspx. My observation in the current implementation was that, the partitions are getting listed as DFU capable devices with fixed address and to change their size or address, you need to change the u-boot-env. Considering the requirement I tweaked the protocol and some code to make a fast and flexible upgrade. I have explained about it here http://codelectron.wordpress.com/2014/02/28/flexible-firmware-upgrade/ Header source code here https://github.com/codelectron/DFU-Tweak/ Let me know your comments and feedback about this idea?. Thanks, Krishna

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[U-Boot] [PATCH 0/3] mmc: Cleanup time for mmc_struct
by Pantelis Antoniou 15 Mar '14

15 Mar '14

Struct mmc has picked up a lot of cruft over the years. It is time for it to be split in 3 parts; the original mmc struct containing the state, the mmc_config struct containing the board setup configuration and the mmc_ops struct contains the method pointers. Using the new config structures the mmc device creation now gets much more easier by using the new mmc_create() call Pantelis Antoniou (3): mmc: Remove ops from struct mmc and put in mmc_ops mmc: Convert mmc struct's name array to a pointer mmc: Split mmc struct, rework mmc initialization arch/arm/include/asm/arch-davinci/sdmmc_defs.h | 1 + arch/arm/include/asm/arch-tegra/tegra_mmc.h | 4 + common/cmd_mmc.c | 2 +- common/cmd_mmc_spi.c | 2 +- drivers/mmc/arm_pl180_mmci.c | 50 +++++---- drivers/mmc/arm_pl180_mmci.h | 4 + drivers/mmc/bfin_sdh.c | 40 +++---- drivers/mmc/davinci_mmc.c | 41 ++++--- drivers/mmc/dw_mmc.c | 58 +++++----- drivers/mmc/fsl_esdhc.c | 65 +++++------ drivers/mmc/ftsdc010_mci.c | 63 +++++------ drivers/mmc/gen_atmel_mci.c | 53 +++++---- drivers/mmc/mmc.c | 88 +++++++++------ drivers/mmc/mmc_spi.c | 50 +++++---- drivers/mmc/mmc_write.c | 3 +- drivers/mmc/mxcmmc.c | 45 ++++---- drivers/mmc/mxsmmc.c | 48 ++++----- drivers/mmc/omap_hsmmc.c | 142 +++++++++++++++---------- drivers/mmc/pxa_mmc_gen.c | 70 ++++++------ drivers/mmc/sdhci.c | 84 ++++++++------- drivers/mmc/sh_mmcif.c | 52 ++++----- drivers/mmc/tegra_mmc.c | 53 ++++----- include/dwmmc.h | 2 + include/fsl_esdhc.h | 4 + include/mmc.h | 48 ++++++--- include/sdhci.h | 2 + 26 files changed, 590 insertions(+), 484 deletions(-) -- 1.7.12

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[U-Boot] Pull request: u-boot-sh/maste
by Nobuhiro Iwamatsu 14 Mar '14

14 Mar '14

Dear Tom Rini. Please pull u-boot-sh master branch. The following changes since commit 2e50f6dccb3eeb1a20993c9da73fe355da35cf04: kbuild: delete *.pyc files by "make distclean" (2014-03-12 17:05:00 -0400) are available in the git repository at: git://git.denx.de/u-boot-sh.git master for you to fetch changes up to 194ba5d4ecb2ad1195333cc7453f291e5b316479: sh: ecovec: correct romImage address in comment (2014-03-14 14:50:28 +0900) ---------------------------------------------------------------- Baruch Siach (2): sh: fix PFC registers definition for SH772{2, 3, 4} sh: ecovec: correct romImage address in comment arch/sh/include/asm/cpu_sh7722.h | 5 +++-- arch/sh/include/asm/cpu_sh7723.h | 5 +++-- arch/sh/include/asm/cpu_sh7724.h | 5 +++-- board/renesas/ecovec/lowlevel_init.S | 2 +- 4 files changed, 10 insertions(+), 7 deletions(-) -- Nobuhiro Iwamatsu iwamatsu at {nigauri.org / debian.org} GPG ID: 40AD1FA6

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[U-Boot] [PATCH 1/2] lsxl: use 64bit for LBA48 to support 4 TB drives
by Michael Walle 14 Mar '14

14 Mar '14

Cc: Prafulla Wadaskar <prafulla(a)marvell.com> Signed-off-by: Michael Walle <michael(a)walle.cc> --- include/configs/lsxl.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index 92865df..cc7a6ab 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -160,6 +160,7 @@ #undef CONFIG_SYS_IDE_MAXDEVICE #define CONFIG_SYS_IDE_MAXDEVICE 1 #define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET +#define CONFIG_SYS_64BIT_LBA #endif #endif /* _CONFIG_LSXL_H */ -- 1.7.10.4

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[U-Boot] [PATCH 2/2] board/t208xrdb: Add support of 2-stage NAND bootloader
by Shengzhou Liu 14 Mar '14

14 Mar '14

Add support of 2-stage NAND boot loader using SPL framework on T2080RDB. PBL initialise the internal SRAM and copy SPL(96K), this further initialise DDR using SPD and environment and copy u-boot from NAND to DDR, finally SPL transfer control to u-boot. Signed-off-by: Shengzhou Liu <Shengzhou.Liu(a)freescale.com> --- board/freescale/t208xrdb/Makefile | 5 +++ board/freescale/t208xrdb/README | 8 ++-- board/freescale/t208xrdb/ddr.c | 7 ++- board/freescale/t208xrdb/spl.c | 93 +++++++++++++++++++++++++++++++++++++++ board/freescale/t208xrdb/tlb.c | 4 +- boards.cfg | 2 +- include/configs/T208xRDB.h | 58 +++++++++++++++++++++--- 7 files changed, 164 insertions(+), 13 deletions(-) create mode 100644 board/freescale/t208xrdb/spl.c diff --git a/board/freescale/t208xrdb/Makefile b/board/freescale/t208xrdb/Makefile index 092c9ff..9605f8b 100644 --- a/board/freescale/t208xrdb/Makefile +++ b/board/freescale/t208xrdb/Makefile @@ -4,10 +4,15 @@ # SPDX-License-Identifier: GPL-2.0+ # +ifdef CONFIG_SPL_BUILD +obj-y += spl.o +else obj-$(CONFIG_T2080RDB) += t208xrdb.o obj-$(CONFIG_T2080RDB) += eth_t208xrdb.o obj-$(CONFIG_T2080RDB) += cpld.o obj-$(CONFIG_PCI) += pci.o +endif + obj-y += ddr.o obj-y += law.o obj-y += tlb.o diff --git a/board/freescale/t208xrdb/README b/board/freescale/t208xrdb/README index 0012c6c..dfa73ae 100644 --- a/board/freescale/t208xrdb/README +++ b/board/freescale/t208xrdb/README @@ -164,10 +164,10 @@ Software configurations and board settings 2. NAND Boot: a. build PBL image for NAND boot $ make T2080RDB_NAND_config - $ make u-boot.pbl - b. program u-boot.pbl to NAND flash - => tftp 1000000 u-boot.pbl - => nand erase 0 d0000 + $ make u-boot-with-spl-pbl.bin + b. program u-boot-with-spl-pbl.bin to NAND flash + => tftp 1000000 u-boot-with-spl-pbl.bin + => nand erase 0 c0000 => nand write 1000000 0 $filesize set SW1[1:8] = '10000010', SW2[1] = '1', SW3[4] = '1' for NAND boot diff --git a/board/freescale/t208xrdb/ddr.c b/board/freescale/t208xrdb/ddr.c index 01e9173..18c9abd 100644 --- a/board/freescale/t208xrdb/ddr.c +++ b/board/freescale/t208xrdb/ddr.c @@ -102,11 +102,14 @@ phys_size_t initdram(int board_type) puts("Initializing....using SPD\n"); +#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_RAMBOOT_PBL) dram_size = fsl_ddr_sdram(); dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; - - puts(" DDR: "); +#else + puts("DDR has been initialised by first stage boot loader\n"); + dram_size = 0x80000000; +#endif return dram_size; } diff --git a/board/freescale/t208xrdb/spl.c b/board/freescale/t208xrdb/spl.c new file mode 100644 index 0000000..648481c --- /dev/null +++ b/board/freescale/t208xrdb/spl.c @@ -0,0 +1,93 @@ +/* Copyright 2013 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/spl.h> +#include <malloc.h> +#include <ns16550.h> +#include <nand.h> +#include <i2c.h> + +DECLARE_GLOBAL_DATA_PTR; + +phys_size_t get_effective_memsize(void) +{ + return CONFIG_SYS_L3_SIZE; +} + +unsigned long get_board_sys_clk(void) +{ + return CONFIG_SYS_CLK_FREQ; +} + +unsigned long get_board_ddr_clk(void) +{ + return CONFIG_DDR_CLK_FREQ; +} + +void board_init_f(ulong bootflag) +{ + u32 plat_ratio, sys_clk, ccb_clk; + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + + /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */ + memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t)); + + /* Update GD pointer */ + gd = (gd_t *)(CONFIG_SPL_GD_ADDR); + __asm__ __volatile__("" : : : "memory"); + + console_init_f(); + + /* initialize selected port with appropriate baud rate */ + sys_clk = get_board_sys_clk(); + plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; + ccb_clk = sys_clk * plat_ratio / 2; + + NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, + ccb_clk / 16 / CONFIG_BAUDRATE); + + relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + bd_t *bd; + + bd = (bd_t *)(gd + sizeof(gd_t)); + memset(bd, 0, sizeof(bd_t)); + gd->bd = bd; + bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR; + bd->bi_memsize = CONFIG_SYS_L3_SIZE; + + probecpu(); + get_clocks(); + mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, + CONFIG_SPL_RELOC_MALLOC_SIZE); + +#ifndef CONFIG_SPL_NAND_BOOT + env_init(); +#endif + + /* relocate environment function pointers etc. */ +#ifdef CONFIG_SPL_NAND_BOOT + nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, + (uchar *)CONFIG_ENV_ADDR); + gd->env_addr = (ulong)(CONFIG_ENV_ADDR); + gd->env_valid = 1; +#else + env_relocate(); +#endif + + i2c_init_all(); + + puts("\n\n"); + + gd->ram_size = initdram(0); + +#ifdef CONFIG_SPL_NAND_BOOT + nand_boot(); +#endif +} diff --git a/board/freescale/t208xrdb/tlb.c b/board/freescale/t208xrdb/tlb.c index 085d9f5..2ebea36 100644 --- a/board/freescale/t208xrdb/tlb.c +++ b/board/freescale/t208xrdb/tlb.c @@ -65,6 +65,7 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SR, MAS2_W|MAS2_G, 0, 2, BOOKE_PAGESZ_256M, 1), +#ifndef CONFIG_SPL_BUILD /* *I*G* - PCIe 1, 0x80000000 */ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, @@ -110,6 +111,7 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 12, BOOKE_PAGESZ_16M, 1), #endif +#endif #ifdef CONFIG_SYS_DCSRBAR_PHYS SET_TLB_ENTRY(1, CONFIG_SYS_DCSRBAR, CONFIG_SYS_DCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, @@ -140,7 +142,7 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G, 0, 18, BOOKE_PAGESZ_1M, 1), #endif -#if defined(CONFIG_SYS_RAMBOOT) +#if defined(CONFIG_RAMBOOT_PBL) && !defined(CONFIG_SPL_BUILD) SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE, MAS3_SX|MAS3_SW|MAS3_SR, 0, 0, 19, BOOKE_PAGESZ_2G, 1) diff --git a/boards.cfg b/boards.cfg index 2715a20..17d8133 100644 --- a/boards.cfg +++ b/boards.cfg @@ -986,7 +986,7 @@ Active powerpc mpc85xx - freescale t208xqds Active powerpc mpc85xx - freescale t208xrdb T2080RDB T208xRDB:PPC_T2080 Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SDCARD T208xRDB:PPC_T2080,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SPIFLASH T208xRDB:PPC_T2080,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000 -Active powerpc mpc85xx - freescale t208xrdb T2080RDB_NAND T208xRDB:PPC_T2080,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000 +Active powerpc mpc85xx - freescale t208xrdb T2080RDB_NAND T208xRDB:PPC_T2080,RAMBOOT_PBL,RAMBOOT_SPLPBL,NAND Active powerpc mpc85xx - freescale t208xrdb T2080RDB_SRIO_PCIE_BOOT T208xRDB:PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000 Active powerpc mpc85xx - freescale t4qds T4160QDS T4240QDS:PPC_T4160 - Active powerpc mpc85xx - freescale t4qds T4160QDS_SDCARD T4240QDS:PPC_T4160,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 - diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 979843b..f751689 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -39,10 +39,44 @@ #define CONFIG_ENV_OVERWRITE #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t208xrdb/t2080_pbi.cfg #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t208xrdb/t2080_rcw.cfg +#ifndef CONFIG_NAND +#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#else +#define CONFIG_SPL +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +#define CONFIG_FSL_LAW /* Use common FSL init code */ +#define CONFIG_SYS_TEXT_BASE 0x00201000 +#define CONFIG_SPL_TEXT_BASE 0xFFFD0000 +#define CONFIG_SPL_PAD_TO 0x40000 +#define CONFIG_SPL_MAX_SIZE 0x30000 +#define RESET_VECTOR_OFFSET 0x2FFFC +#define BOOT_PAGE_OFFSET 0x2F000 +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) +#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000 +#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 +#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) +#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" +#define CONFIG_SPL_NAND_BOOT +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_SKIP_RELOCATE +#define CONFIG_SPL_COMMON_INIT_DDR +#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE +#define CONFIG_SYS_NO_FLASH +#endif +#define CONFIG_RAMBOOT_TEXT_BASE 0xFFFE0000 +#endif #endif #define CONFIG_SRIO_PCIE_BOOT_MASTER @@ -103,7 +137,7 @@ #elif defined(CONFIG_NAND) #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE +#define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_OFFSET (2 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) #define CONFIG_ENV_IS_IN_REMOTE @@ -129,7 +163,16 @@ unsigned long get_board_ddr_clk(void); /* * Config the L3 Cache as L3 SRAM */ -#define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE +#define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 +#define CONFIG_SYS_L3_SIZE (256 << 10) +#define CONFIG_SPL_GD_ADDR CONFIG_SYS_INIT_L3_ADDR +#ifdef CONFIG_NAND +#define CONFIG_ENV_ADDR (CONFIG_SYS_INIT_L3_ADDR + 4 * 1024) +#endif +#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L3_ADDR + 10 * 1024) +#define CONFIG_SPL_RELOC_MALLOC_SIZE (30 << 10) +#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L3_ADDR + 64 * 1024) +#define CONFIG_SPL_RELOC_STACK_SIZE (20 << 10) #define CONFIG_SYS_DCSRBAR 0xf0000000 #define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull @@ -301,7 +344,12 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_RAMBOOT #endif -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE +#else +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ +#endif + #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ #define CONFIG_MISC_INIT_R #define CONFIG_HWCONFIG -- 1.8.0

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[U-Boot] Swiching u-boot image in SPI-NOR
by JYOTI DUBEY 14 Mar '14

14 Mar '14

Hello I am trying to bring in u-boot.imx (uboot image of u-boot 2013) onto SPI-NOR of nitrogen 6x board.I used following commands: >> sf probe 1 >>sf erase 0 0x40000 >> fatload mmc 0:1 12000000 u-boot.imx reading u-boot.imx 343040 bytes read in 54 ms (6.1 MiB/s) >>sf write 0x12000000 0x0 343040 ERROR: attempting write past flash size (0x200000) I have no clue as how to overcome this error.Can somebody help me with this error. Thanks in Advance!

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[U-Boot] [PATCH] p1010rdb-pb/usb: remove re-power on for p1010rdb-pb
by Zhao Qiang 14 Mar '14

14 Mar '14

usb hub for p1010rdb-pb is not needed to re-power on when init it. Signed-off-by: Zhao Qiang <B45475(a)freescale.com> --- common/usb_hub.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/common/usb_hub.c b/common/usb_hub.c index ffac0e7..edb1fc0 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -90,12 +90,15 @@ static void usb_hub_power_on(struct usb_hub_device *hub) int i; struct usb_device *dev; unsigned pgood_delay = hub->desc.bPwrOn2PwrGood * 2; +#ifndef CONFIG_P1010RDB_PB ALLOC_CACHE_ALIGN_BUFFER(struct usb_port_status, portsts, 1); unsigned short portstatus; int ret; +#endif dev = hub->pusb_dev; +#ifndef CONFIG_P1010RDB_PB /* * Enable power to the ports: * Here we Power-cycle the ports: aka, @@ -132,6 +135,7 @@ static void usb_hub_power_on(struct usb_hub_device *hub) continue; } } +#endif for (i = 0; i < dev->maxchild; i++) { usb_set_port_feature(dev, i + 1, USB_PORT_FEAT_POWER); -- 1.8.5

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[U-Boot] [PATCH] cfi_flash: Micron Nor flash don't support read operation after send
by Qi Wang 王起 (qiwang) 14 Mar '14

14 Mar '14

Micron Nor flash don't support read operation after send write command. As below, flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER); cnt = len >> shift; flash_write_cmd(info, sector, offset, cnt - 1); switch (info->portwidth) { case FLASH_CFI_8BIT: while (cnt-- > 0) { flash_write8(flash_read8(src), dst); src += 1, dst += 1; } break; If the src address locate in NOR flash, flash_read operation will be failed. So, read out the data to DRAM before send write command operation. --- drivers/mtd/cfi_flash.c | 70 +++++++++++++++++++++++++++++++---------------- 1 file changed, 46 insertions(+), 24 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index a389cd1..0f532c0 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -25,6 +25,8 @@ #include <environment.h> #include <mtd/cfi_flash.h> #include <watchdog.h> +#include <malloc.h> +#include <asm-generic/errno.h> /* * This file implements a Common Flash Interface (CFI) driver for @@ -855,6 +857,8 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int cnt; int retcode; void *src = cp; + void *src2; + void *src2_bak; void *dst = (void *)dest; void *dst2 = dst; int flag = 1; @@ -880,29 +884,45 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, goto out_unmap; } + src2 = malloc(len); + if(!src2) + { + free(src2); + return -ENOMEM; + } + + src2_bak = src2; cnt = len >> shift; while ((cnt-- > 0) && (flag == 1)) { switch (info->portwidth) { case FLASH_CFI_8BIT: - flag = ((flash_read8(dst2) & flash_read8(src)) == - flash_read8(src)); + *(u8 *)src2 = flash_read8(src); + flag = ((flash_read8(dst2) & *(u8 *)src2) == + *(u8 *)src2); src += 1, dst2 += 1; + src2 +=1; break; case FLASH_CFI_16BIT: - flag = ((flash_read16(dst2) & flash_read16(src)) == - flash_read16(src)); + *(u16 *)src2 = flash_read16(src); + flag = ((flash_read16(dst2) & *(u16 *)src2) == + *(u16 *)src2); src += 2, dst2 += 2; + src2 += 2; break; case FLASH_CFI_32BIT: - flag = ((flash_read32(dst2) & flash_read32(src)) == - flash_read32(src)); + *(u32 *)src2 = flash_read32(src); + flag = ((flash_read32(dst2) & *(u32 *)src2) == + *(u32 *)src2); src += 4, dst2 += 4; + src2 += 4; break; case FLASH_CFI_64BIT: - flag = ((flash_read64(dst2) & flash_read64(src)) == - flash_read64(src)); + *(u64 *)src2 = flash_read64(src); + flag = ((flash_read64(dst2) & *(u64 *)src2) == + *(u64 *)src2); src += 8, dst2 += 8; + src2 += 8; break; } } @@ -912,6 +932,7 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, } src = cp; + src2 = src2_bak; sector = find_sector (info, dest); switch (info->vendor) { @@ -934,20 +955,20 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, while (cnt-- > 0) { switch (info->portwidth) { case FLASH_CFI_8BIT: - flash_write8(flash_read8(src), dst); - src += 1, dst += 1; + flash_write8(*(u8 *)src2, dst); + src2 += 1, dst += 1; break; case FLASH_CFI_16BIT: - flash_write16(flash_read16(src), dst); - src += 2, dst += 2; + flash_write16(*(u16 *)src2, dst); + src2 += 2, dst += 2; break; case FLASH_CFI_32BIT: - flash_write32(flash_read32(src), dst); - src += 4, dst += 4; + flash_write32(*(u32 *)src2, dst); + src2 += 4, dst += 4; break; case FLASH_CFI_64BIT: - flash_write64(flash_read64(src), dst); - src += 8, dst += 8; + flash_write64(*(u64 *)src2, dst); + src2 += 8, dst += 8; break; default: retcode = ERR_INVAL; @@ -977,26 +998,26 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, switch (info->portwidth) { case FLASH_CFI_8BIT: while (cnt-- > 0) { - flash_write8(flash_read8(src), dst); - src += 1, dst += 1; + flash_write8(*(u8 *)src2, dst); + src2 += 1, dst += 1; } break; case FLASH_CFI_16BIT: while (cnt-- > 0) { - flash_write16(flash_read16(src), dst); - src += 2, dst += 2; + flash_write16(*(u16 *)src2, dst); + src2 += 2, dst += 2; } break; case FLASH_CFI_32BIT: while (cnt-- > 0) { - flash_write32(flash_read32(src), dst); - src += 4, dst += 4; + flash_write32(*(u32 *)src2, dst); + src2 += 4, dst += 4; } break; case FLASH_CFI_64BIT: while (cnt-- > 0) { - flash_write64(flash_read64(src), dst); - src += 8, dst += 8; + flash_write64(*(u64 *)src2, dst); + src2 += 8, dst += 8; } break; default: @@ -1023,6 +1044,7 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, } out_unmap: + free(src2_bak); return retcode; } #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ -- 1.7.9.5 Best Regards, Qi Wang EBU APAC SE Tel: 86-021-38997158 Mobile: 86-15201958202 Email: qiwang(a)micron.com Address: No 601 Fasai Rd, Pudong, Shanghai, China, 200131

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