November 2014 - U-Boot

[U-Boot] [PATCH] mpc85xx/kmp204x: raise u-boot size to 768KB
by Valentin Longchamp 14 Nov '14

14 Nov '14

Until now this defined to be 512KB and the total binary size actually was on the edge of this limit. Most of the powerpc boards have thus moved to 768KB. Since on the current kmp204x boards there is 1MB reserved for u-boot on the SPI boot flash, there is no problem to set the limit to 768KB as well to be on line with the other powerpc boards and to eventually configure in some additional features (and binary size) to u-boot. Signed-off-by: Valentin Longchamp <valentin.longchamp(a)keymile.com> --- include/configs/km/kmp204x-common.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index a0f9d29..c5c9dfc 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -11,7 +11,7 @@ #define CONFIG_PHYS_64BIT #define CONFIG_PPC_P2041 -#define CONFIG_SYS_TEXT_BASE 0xfff80000 +#define CONFIG_SYS_TEXT_BASE 0xfff40000 #define CONFIG_KM_DEF_NETDEV "netdev=eth0\0" @@ -235,7 +235,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MONITOR_LEN (768 * 1024) #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Serial Port - controlled on board with jumper J8 -- 1.8.0.1

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[U-Boot] [PATCH v7 0/6] fs: fat/ext4/sandbox - Deal with files greater than 2GB
by Suriyan Ramasami 14 Nov '14

14 Nov '14

The commands fatls/ext4ls give negative values when dealing with files greater than 2GB. The commands fatsize/ext4size do not update the variable filesize for these files. To deal with this, the fs functions have been modified to take an additional parameter of type "* loff_t" which is then populated. The return value of th fs functions are used only for error conditions. Changes in v7: * No changes * Split it so that its bisectable. * Split it so that its bisectable. * Split it so that its bisectable. * Simon - API change in separate patch * Simon - take care of fat/vfat in mkfs - fs/nonfs test code repeats, put it in function Suriyan Ramasami (6): sandbox: Use md5sum and fatwrite to enable testing of fs commands fat: prepare for API change for files greater than 2GB ext4: prepare for API change for files greater than 2GB sandbox: prepare for API change for files greater than 2GB fs: API changes to enable extra parameter to return size of type loff_t sandbox: script for testing sandbox/ext4/fat/fs commands arch/sandbox/cpu/os.c | 13 +- arch/sandbox/cpu/state.c | 8 +- common/board_f.c | 8 +- common/cmd_ext4.c | 61 +---- common/cmd_fat.c | 9 +- common/cmd_fs.c | 17 ++ common/cmd_md5sum.c | 12 +- common/env_fat.c | 4 +- fs/ext4/ext4_common.c | 24 +- fs/ext4/ext4_common.h | 4 +- fs/ext4/ext4_write.c | 32 +++ fs/ext4/ext4fs.c | 37 +-- fs/fat/fat.c | 129 ++++++----- fs/fat/fat_write.c | 61 ++--- fs/fat/file.c | 4 +- fs/fs.c | 77 ++++--- fs/sandbox/sandboxfs.c | 75 ++++--- include/configs/sandbox.h | 2 + include/ext4fs.h | 13 +- include/fat.h | 18 +- include/fs.h | 41 ++-- include/os.h | 5 +- include/sandboxfs.h | 14 +- test/fs/fs-test.sh | 561 ++++++++++++++++++++++++++++++++++++++++++++++ 24 files changed, 945 insertions(+), 284 deletions(-) create mode 100755 test/fs/fs-test.sh -- 1.9.1

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[U-Boot] [GIT] Pull request: u-boot-dfu
by Lukasz Majewski 14 Nov '14

14 Nov '14

Hi Marek, The following changes since commit 6a559bbe2f60ab64e28662f7ab52551a2eaa7163: usb_storage: blacklist Enclosure Service Devices (2014-11-08 12:03:35 +0100) are available in the git repository at: git://git.denx.de/u-boot-dfu.git for you to fetch changes up to 8f605197a872946d0a8a5b34c0eaee38ddd52dbf: test: ums: Add sleep before unmount directory (2014-11-14 11:42:09 +0100) ---------------------------------------------------------------- Łukasz Majewski (2): dfu: thor: fix: Modify dfu_get_alt() function to support absolute paths test: ums: Add sleep before unmount directory drivers/dfu/dfu.c | 29 +++++++++++++++++++++++++++-- test/ums/ums_gadget_test.sh | 10 +++++++++- 2 files changed, 36 insertions(+), 3 deletions(-) Thanks in advance. -- Best regards, Lukasz Majewski Samsung R&D Institute Poland (SRPOL) | Linux Platform Group

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[U-Boot] [PATCH] arm: socfpga: dts: Move to SPDX license identifiers
by Stefan Roese 14 Nov '14

14 Nov '14

The socfpga dts files are copied from the Rocketboards.org repository. In U-Boot we usually replace the full-blown license header text with the SPDX license identifiers. Lets do this for these new dts files as well. I just forgot to do this while adding the DT support for socfpga. Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Marek Vasut <marex(a)denx.de> Cc: Pavel Machek <pavel(a)denx.de> Cc: Chin Liang See <clsee(a)altera.com> Cc: Dinh Nguyen <dinguyen(a)altera.com> Cc: Vince Bridgers <vbridger(a)altera.com> --- arch/arm/dts/socfpga.dtsi | 13 +------------ arch/arm/dts/socfpga_cyclone5.dtsi | 13 +------------ arch/arm/dts/socfpga_cyclone5_socrates.dts | 13 +------------ 3 files changed, 3 insertions(+), 36 deletions(-) diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi index 4472fd9..bca6832 100644 --- a/arch/arm/dts/socfpga.dtsi +++ b/arch/arm/dts/socfpga.dtsi @@ -1,18 +1,7 @@ /* * Copyright (C) 2012 Altera <www.altera.com> * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. + * SPDX-License-Identifier: GPL-2.0+ */ #include "skeleton.dtsi" diff --git a/arch/arm/dts/socfpga_cyclone5.dtsi b/arch/arm/dts/socfpga_cyclone5.dtsi index 28c05e7..234a901 100644 --- a/arch/arm/dts/socfpga_cyclone5.dtsi +++ b/arch/arm/dts/socfpga_cyclone5.dtsi @@ -1,18 +1,7 @@ /* * Copyright (C) 2012 Altera Corporation <www.altera.com> * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. + * SPDX-License-Identifier: GPL-2.0+ */ /dts-v1/; diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts index a1814b4..0454108 100644 --- a/arch/arm/dts/socfpga_cyclone5_socrates.dts +++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts @@ -1,18 +1,7 @@ /* * Copyright (C) 2014 Steffen Trumtrar <s.trumtrar(a)pengutronix.de> * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. + * SPDX-License-Identifier: GPL-2.0+ */ #include "socfpga_cyclone5.dtsi" -- 2.1.3

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[U-Boot] [PATCH] arm: socfpga: Add myself as maintainer for the SoCrates board
by Stefan Roese 14 Nov '14

14 Nov '14

Signed-off-by: Stefan Roese <sr(a)denx.de> Cc: Marek Vasut <marex(a)denx.de> Cc: Pavel Machek <pavel(a)denx.de> Cc: Chin Liang See <clsee(a)altera.com> Cc: Dinh Nguyen <dinguyen(a)altera.com> Cc: Vince Bridgers <vbridger(a)altera.com> Cc: Masahiro Yamada <yamada.m(a)jp.panasonic.com> --- board/altera/socfpga/MAINTAINERS | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/board/altera/socfpga/MAINTAINERS b/board/altera/socfpga/MAINTAINERS index 626c0f7..0482581 100644 --- a/board/altera/socfpga/MAINTAINERS +++ b/board/altera/socfpga/MAINTAINERS @@ -5,3 +5,8 @@ S: Maintained F: board/altera/socfpga/ F: include/configs/socfpga_cyclone5.h F: configs/socfpga_cyclone5_defconfig + +SOCRATES BOARD +M: Stefan Roese <sr(a)denx.de> +S: Maintained +F: configs/socfpga_socrates_defconfig -- 2.1.3

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[U-Boot] [PATCH v4 0/3] Add board level usb support for mxsxsabresd and mx6slevk
by Peng Fan 14 Nov '14

14 Nov '14

Changes v4: - Take Marek's suggestions, implement usb_phy_mode function and introduce a weak function board_usb_phy_mode. - change usb_phy_enable's return value with 0. - reimplement board_usb_phy_mode in board code. - add prototype type for board_usb_phy_mode and usb_phy_mode Changes v3: - Take Marek's suggestions, replace 'return val & USBPHY_CTRL_OTG_ID' with this new function like 'return board_usb_phy_mode(index);' Detailed discussion here: http://lists.denx.de/pipermail/u-boot/2014-November/194131.html Changes v2: - Introduce a new weak function to let board have a choice to decide which mode to work at. - move pinmux setting into board_init - add otg polarity setting in board_ehci_hcd_init - set pinmux struct static Peng Fan (3): usb:ehci-mx6 add phy mode query function imx:mx6sxsabresd add board level support for usb imx:mx6slevk add board level support for usb arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 5 +++ board/freescale/mx6slevk/mx6slevk.c | 49 +++++++++++++++++++++++++++++ board/freescale/mx6sxsabresd/mx6sxsabresd.c | 49 +++++++++++++++++++++++++++++ drivers/usb/host/ehci-mx6.c | 27 ++++++++++++++-- include/configs/mx6slevk.h | 14 +++++++++ include/configs/mx6sxsabresd.h | 14 +++++++++ include/usb/ehci-fsl.h | 2 ++ 7 files changed, 158 insertions(+), 2 deletions(-) -- 1.8.4

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[U-Boot] [PATCH 0/4] tqma6: improvements and cleanup
by Markus Niebel 14 Nov '14

14 Nov '14

From: Markus Niebel <Markus.Niebel(a)tq-group.com> This series contains some cosmetic and code cleanups. No functional changes. Markus Niebel (4): tqma6: (cosmetic) remove CONFIG_FLASH_SECTOR_SIZE tqma6: add missing include tqma6: add warning on failed setup_i2c tqma6: use imx_ddr_size board/tqc/tqma6/tqma6.c | 13 ++++++++++--- board/tqc/tqma6/tqma6_mba6.c | 10 ++++++++-- include/configs/tqma6.h | 28 ++++++++++++++-------------- 3 files changed, 32 insertions(+), 19 deletions(-) -- 2.1.1

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[U-Boot] [PATCH] sunxi: ahci: Add a delay after enabling target power
by Hans de Goede 14 Nov '14

14 Nov '14

If the target power is connected through a gpio, then give the target some time to power up before continuing with ahci / sata probing, this avoids link timeouts, without penalizing other boards where there is no target power gpio. Why 500 ms ? I started with 200, that was not enough, then I went to 500 which worked, lowering it to 350 broke things again, so 500 seems the minimum my vertex2 needs to be ready to get probed. Signed-off-by: Hans de Goede <hdegoede(a)redhat.com> --- board/sunxi/ahci.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/sunxi/ahci.c b/board/sunxi/ahci.c index 5e12328..b7f0dda 100644 --- a/board/sunxi/ahci.c +++ b/board/sunxi/ahci.c @@ -76,6 +76,8 @@ void scsi_init(void) #ifdef CONFIG_SATAPWR gpio_request(CONFIG_SATAPWR, "satapwr"); gpio_direction_output(CONFIG_SATAPWR, 1); + /* Give attached sata device time to power-up to avoid link timeouts */ + mdelay(500); #endif if (sunxi_ahci_phy_init(SUNXI_SATA_BASE) < 0) -- 2.1.0

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[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code
by Fabio Estevam 14 Nov '14

14 Nov '14

From: Fabio Estevam <fabio.estevam(a)freescale.com> mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR. Move the configuration to the spl code. CCM_CCOSR setting is no longer required to get audio functionality in the kernel, so remove such setting. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- Hi Stefano, Actually I would like to get rid of mx6sabresd_spl.cfg completely, but when I tried to remove it, I ended up with SPL not being built. Any suggestions? board/freescale/mx6sabresd/mx6sabresd.c | 27 +++++++++++++++++++ board/freescale/mx6sabresd/mx6sabresd_spl.cfg | 38 --------------------------- 2 files changed, 27 insertions(+), 38 deletions(-) diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 1142e8a..343c3b6 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -729,6 +729,30 @@ static struct mx6_ddr3_cfg mem_ddr = { .trasmin = 3500, }; +static void ccgr_init(void) +{ + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + writel(0x00C03F3F, &ccm->CCGR0); + writel(0x0030FC03, &ccm->CCGR1); + writel(0x0FFFC000, &ccm->CCGR2); + writel(0x3FF00000, &ccm->CCGR3); + writel(0x00FFF300, &ccm->CCGR4); + writel(0x0F0000C3, &ccm->CCGR5); + writel(0x000003FF, &ccm->CCGR6); +} + +static void gpr_init(void) +{ + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + + /* enable AXI cache for VDOA/VPU/IPU */ + writel(0xF00000CF, &iomux->gpr[4]); + /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ + writel(0x007F007F, &iomux->gpr[6]); + writel(0x007F007F, &iomux->gpr[7]); +} + /* * This section require the differentiation * between iMX6 Sabre Families. @@ -768,6 +792,9 @@ void board_init_f(ulong dummy) /* setup AIPS and disable watchdog */ arch_cpu_init(); + ccgr_init(); + gpr_init(); + /* iomux and setup of i2c */ board_early_init_f(); diff --git a/board/freescale/mx6sabresd/mx6sabresd_spl.cfg b/board/freescale/mx6sabresd/mx6sabresd_spl.cfg index 2bf4817..1d031ba 100644 --- a/board/freescale/mx6sabresd/mx6sabresd_spl.cfg +++ b/board/freescale/mx6sabresd/mx6sabresd_spl.cfg @@ -18,41 +18,3 @@ IMAGE_VERSION 2 * spi, sd (the board has no nand neither onenand) */ BOOT_FROM sd - -/* - * Device Configuration Data (DCD) - * - * Each entry must have the format: - * Addr-type Address Value - * - * where: - * Addr-type register length (1,2 or 4 bytes) - * Address absolute address of the register - * value value to be stored in the register - */ - -/* set the default clock gate to save power */ -DATA 4 0x020c4068 0x00C03F3F -DATA 4 0x020c406c 0x0030FC03 -DATA 4 0x020c4070 0x0FFFC000 -DATA 4 0x020c4074 0x3FF00000 -DATA 4 0x020c4078 0x00FFF300 -DATA 4 0x020c407c 0x0F0000C3 -DATA 4 0x020c4080 0x000003FF - -/* enable AXI cache for VDOA/VPU/IPU */ -DATA 4 0x020e0010 0xF00000CF -/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ -DATA 4 0x020e0018 0x007F007F -DATA 4 0x020e001c 0x007F007F - -/* - * Setup CCM_CCOSR register as follows: - * - * cko1_en = 1 --> CKO1 enabled - * cko1_div = 111 --> divide by 8 - * cko1_sel = 1011 --> ahb_clk_root - * - * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz - */ -DATA 4 0x020c4060 0x000000fb -- 1.9.1

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[U-Boot] [PATCH] ARM: OMAP5: DRA7xx: Enable I2C5 operation
by Lubomir Popov 14 Nov '14

14 Nov '14

Unlike regular OMAP5, on the DRA7xx SoCs the I2C5 module belongs to the IPU clock domain. This patch takes care of the appropriate clock preparation and makes I2C5 operational - it fixes the 'data abort' exception that otherwise happened upon accessing the I2C5 controller. Signed-off-by: Lubomir Popov <l-popov(a)ti.com> --- arch/arm/cpu/armv7/omap5/hw_data.c | 9 +++++++++ arch/arm/cpu/armv7/omap5/prcm-regs.c | 4 ++++ arch/arm/include/asm/omap_common.h | 4 ++++ 3 files changed, 17 insertions(+) diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index 0257383..5f7b392 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -515,6 +515,10 @@ void enable_basic_clocks(void) void enable_basic_uboot_clocks(void) { u32 const clk_domains_essential[] = { +#ifdef CONFIG_DRA7XX + /* Needed for I2C5 operation */ + (*prcm)->cm_ipu_clkstctrl, +#endif 0 }; @@ -528,7 +532,12 @@ void enable_basic_uboot_clocks(void) (*prcm)->cm_l4per_i2c2_clkctrl, (*prcm)->cm_l4per_i2c3_clkctrl, (*prcm)->cm_l4per_i2c4_clkctrl, +#ifdef CONFIG_DRA7XX + /* I2C5 is in the IPU clock domain on the DRA7xx */ + (*prcm)->cm_ipu_i2c5_clkctrl, +#else (*prcm)->cm_l4per_i2c5_clkctrl, +#endif (*prcm)->cm_l3init_hsusbhost_clkctrl, (*prcm)->cm_l3init_fsusb_clkctrl, 0 diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c index ff08ef4..1337198 100644 --- a/arch/arm/cpu/armv7/omap5/prcm-regs.c +++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c @@ -808,6 +808,10 @@ struct prcm_regs const dra7xx_prcm = { /* cm1.dsp */ .cm_dsp_clkstctrl = 0x4a005400, .cm_dsp_dsp_clkctrl = 0x4a005420, + + /* cm1.ipu */ + .cm_ipu_clkstctrl = 0x4a005540, + .cm_ipu_i2c5_clkctrl = 0x4a005578, /* prm irqstatus regs */ .prm_irqstatus_mpu_2 = 0x4ae06014, diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 1838234..962c8a5 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -80,6 +80,10 @@ struct prcm_regs { u32 cm_dsp_clkstctrl; u32 cm_dsp_dsp_clkctrl; + /* cm1.ipu */ + u32 cm_ipu_clkstctrl; + u32 cm_ipu_i2c5_clkctrl; + /* cm1.abe */ u32 cm1_abe_clkstctrl; u32 cm1_abe_l4abe_clkctrl; -- 1.7.9.5

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