September 2013 - U-Boot

[U-Boot] [PATCH v2] powerpc/p1010rdb: update readme for p1010rdb-pb board
by Shengzhou Liu 05 Sep '13

05 Sep '13

- Remove duplicate doc/README.p1010rdb - Update for P1010RDB-PB board P1010RDB-PB is a variation of previous P1010RDB-PA board. Henceforth we support P1010RDB-PB board instead of P1010RDB-PA. Signed-off-by: Shengzhou Liu <Shengzhou.Liu(a)freescale.com> --- v2: removed duplicate doc/README.p1010rdb board/freescale/p1010rdb/README | 285 ++++++++++++++++++---------------------- doc/README.p1010rdb | 199 ---------------------------- 2 files changed, 127 insertions(+), 357 deletions(-) delete mode 100644 doc/README.p1010rdb diff --git a/board/freescale/p1010rdb/README b/board/freescale/p1010rdb/README index 7f18aaa..4d6553d 100644 --- a/board/freescale/p1010rdb/README +++ b/board/freescale/p1010rdb/README @@ -1,58 +1,40 @@ Overview ========= -The P1010RDB is a Freescale reference design board that hosts the P1010 SoC. +The P1010RDB is a Freescale Reference Design Board that hosts the P1010 SoC. +P1010RDB-PB is a variation of previous P1010RDB-PA board. The P1010 is a cost-effective, low-power, highly integrated host processor -based on a Power Architecture e500v2 core (maximum core frequency 800/1000 MHz), -that addresses the requirements of several routing, gateways, storage, consumer, +based on a Power Architecture e500v2 core (maximum core frequency 1GHz),that +addresses the requirements of several routing, gateways, storage, consumer, and industrial applications. Applications of interest include the main CPUs and I/O processors in network attached storage (NAS), the voice over IP (VoIP) router/gateway, and wireless LAN (WLAN) and industrial controllers. -The P1010RDB board features are as follows: +The P1010RDB-PB board features are as following: Memory subsystem: - - 1Gbyte unbuffered DDR3 SDRAM discrete devices (32-bit bus) - - 32 Mbyte NOR flash single-chip memory - - 32 Mbyte NAND flash memory - - 256 Kbit M24256 I2C EEPROM - - 16 Mbyte SPI memory + - 1G bytes unbuffered DDR3 SDRAM discrete devices (32-bit bus) + - 32M bytes NOR flash single-chip memory + - 2G bytes NAND flash memory + - 16M bytes SPI memory + - 256K bit M24256 I2C EEPROM - I2C Board EEPROM 128x8 bit memory - SD/MMC connector to interface with the SD memory card Interfaces: - - PCIe: - - Lane0: x1 mini-PCIe slot - - Lane1: x1 PCIe standard slot - - SATA: - - 1 internal SATA connector to 2.5” 160G SATA2 HDD - - 1 eSATA connector to rear panel - - 10/100/1000 BaseT Ethernet ports: - - eTSEC1, RGMII: one 10/100/1000 port using Vitesse VSC8641XKO - - eTSEC2, SGMII: one 10/100/1000 port using Vitesse VSC8221 - - eTSEC3, SGMII: one 10/100/1000 port using Vitesse VSC8221 - - USB 2.0 port: - - x1 USB2.0 port via an external ULPI PHY to micro-AB connector - - x1 USB2.0 port via an internal UTMI PHY to micro-AB connector - - FlexCAN ports: - - 2 DB-9 female connectors for FlexCAN bus(revision 2.0B) - interface; - - DUART interface: - - DUART interface: supports two UARTs up to 115200 bps for - console display - - RJ45 connectors are used for these 2 UART ports. - - TDM - - 2 FXS ports connected via an external SLIC to the TDM interface. - SLIC is controllled via SPI. - - 1 FXO port connected via a relay to FXS for switchover to POTS + - Three 10/100/1000 BaseT Ethernet ports (One RGMII and two SGMII) + - PCIe 2.0: two x1 mini-PCIe slots + - SATA 2.0: two SATA interfaces + - USB 2.0: one USB interface + - FlexCAN: two FlexCAN interfaces (revision 2.0B) + - UART: one USB-to-Serial interface + - TDM: 2 FXS ports connected via an external SLIC to the TDM interface. + 1 FXO port connected via a relay to FXS for switchover to POTS + Board connectors: - Mini-ITX power supply connector - JTAG/COP for debugging -IEEE Std. 1588 signals for test and measurement -Real-time clock on I2C bus -POR - - support critical POR setting changed via switch on board -PCB - - 6-layer routing (4-layer signals, 2-layer power and ground) +POR: support critical POR setting changed via switch on board +PCB: 6-layer routing (4-layer signals, 2-layer power and ground) Physical Memory Map on P1010RDB =============================== @@ -77,132 +59,119 @@ Configure the serial port of the attached computer with the following values: -Flow Control: Hardware/None -Settings of DIP-switch -====================== - SW4[1:4]= 1111 and SW6[4]=0 for boot from 16bit NOR flash - SW4[1:4]= 1000 and SW6[4]=1 for boot from 8bit NAND flash - SW4[1:4]= 0110 and SW6[4]=0 for boot from SPI flash +P1010RDB-PB default DIP-switch settings +======================================= +SW1[1:8]= 10101010 +SW2[1:8]= 11011000 +SW3[1:8]= 10010000 +SW4[1:4]= 1010 +SW5[1:8]= 11111010 + + +P1010RDB-PB boot mode settings via DIP-switch +============================================= +SW4[1:4]= 1111 and SW3[3:4]= 00 for 16bit NOR boot +SW4[1:4]= 1010 and SW3[3:4]= 01 for 8bit NAND boot +SW4[1:4]= 0110 and SW3[3:4]= 00 for SPI boot +SW4[1:4]= 0111 and SW3[3:4]= 10 for SD boot Note: 1 stands for 'on', 0 stands for 'off' -Setting of hwconfig +Switch P1010RDB-PB boot mode via software without setting DIP-switch +==================================================================== +=> run boot_bank0 (boot from NOR bank0) +=> run boot_bank1 (boot from NOR bank1) +=> run boot_nand (boot from NAND flash) +=> run boot_spi (boot from SPI flash) +=> run boot_sd (boot from SD card) + + +Setting of pin mux =================== -If FlexCAN or TDM is needed, please set "fsl_p1010mux:tdm_can=can" or -"fsl_p1010mux:tdm_can=tdm" explicitly in u-booot prompt as below for example: -setenv hwconfig "fsl_p1010mux:tdm_can=tdm;usb1:dr_mode=host,phy_type=utmi" -By default, don't set fsl_p1010mux:tdm_can, in this case, spi chip selection -is set to spi-flash instead of to SLIC/TDM/DAC and tdm_can_sel is set to TDM -instead of to CAN/UART1. - - -Build and burn u-boot to NOR flash -================================== -1. Build u-boot.bin image - export ARCH=powerpc - export CROSS_COMPILE=/your_path/powerpc-linux-gnu- - make P1010RDB_NOR - -2. Burn u-boot.bin into NOR flash - => tftp $loadaddr $uboot - => protect off eff80000 +$filesize - => erase eff80000 +$filesize - => cp.b $loadaddr eff80000 $filesize - -3. Check SW4[1:4]= 1111 and SW6[4]=0, then power on. - - -Alternate NOR bank -================== -1. Burn u-boot.bin into alternate NOR bank - => tftp $loadaddr $uboot - => protect off eef80000 +$filesize - => erase eef80000 +$filesize - => cp.b $loadaddr eef80000 $filesize - -2. Switch to alternate NOR bank - => mw.b ffb00009 1 - => reset - or set SW1[8]= ON - -SW1[8]= OFF: Upper bank used for booting start -SW1[8]= ON: Lower bank used for booting start -CPLD NOR bank selection register address 0xFFB00009 Bit[0]: -0 - boot from upper 4 sectors -1 - boot from lower 4 sectors - - -Build and burn u-boot to NAND flash -=================================== -1. Build u-boot.bin image - export ARCH=powerpc - export CROSS_COMPILE=/your_path/powerpc-linux-gnu- - make P1010RDB_NAND - -2. Burn u-boot-nand.bin into NAND flash - => tftp $loadaddr $uboot-nand - => nand erase 0 $filesize - => nand write $loadaddr 0 $filesize - -3. Check SW4[1:4]= 1000 and SW6[4]=1, then power on. - - -Build and burn u-boot to SPI flash -================================== -1. Build u-boot-spi.bin image - make P1010RDB_SPIFLASH_config; make - Boot up kernel with rootfs.ext2.gz.uboot.p1010rdb - Download u-boot.bin to linux and you can find some config files - under /usr/share such as config_xx.dat. Do below command: - boot_format config_ddr3_1gb_p1010rdb_800M.dat u-boot.bin -spi \ - u-boot-spi.bin - to generate u-boot-spi.bin. - -2. Burn u-boot-spi.bin into SPI flash - => tftp $loadaddr $uboot-spi - => sf erase 0 100000 - => sf write $loadaddr 0 $filesize - -3. Check SW4[1:4]= 0110 and SW6[4]=0, then power on. - - -CPLD POR setting registers -========================== -1. Set POR switch selection register (addr 0xFFB00011) to 0. -2. Write CPLD POR registers (BCSR0~BCSR3, addr 0xFFB00014~0xFFB00017) with - proper values. - If change boot ROM location to NOR or NAND flash, need write the IFC_CS0 - switch command by I2C. -3. Send reset command. - After reset, the new POR setting will be implemented. - -Two examples are given in below: -Switch from NOR to NAND boot with default frequency: - => i2c dev 0 - => i2c mw 18 1 f9 - => i2c mw 18 3 f0 - => mw.b ffb00011 0 - => mw.b ffb00017 1 - => reset -Switch from NAND to NOR boot with Core/CCB/DDR (800/400/667 MHz): - => i2c dev 0 - => i2c mw 18 1 f1 - => i2c mw 18 3 f0 - => mw.b ffb00011 0 - => mw.b ffb00014 2 - => mw.b ffb00015 5 - => mw.b ffb00016 3 - => mw.b ffb00017 f - => reset - - -Boot Linux from network using TFTP on P1010RDB -============================================== -Place uImage, p1010rdb.dtb and rootfs files in the TFTP disk area. +Since pins multiplexing, TDM and CAN are muxed with SPI flash. +SDHC is muxed with IFC. IFC and SPI flash are enabled by default. + +To enable TDM: +=> setenv hwconfig fsl_p1010mux:tdm_can=tdm +=> save;reset + +To enable FlexCAN: +=> setenv hwconfig fsl_p1010mux:tdm_can=can +=> save;reset + +To enable SDHC in case of NOR/NAND/SPI boot + a) For temporary use case in runtime without reboot system + run 'mux sdhc' in u-boot to validate SDHC with invalidating IFC. + + b) For long-term use case + set 'esdhc' in hwconfig and save it. + +To enable IFC in case of SD boot + run 'mux ifc' in u-boot to validate IFC with invalidating SDHC. + + +Build images for different boot mode: +===================================== +First, setup cross compile environment on your build host + $ export ARCH=powerpc + $ export CROSS_COMPILE=<your-compiler-path>/powerpc-linux-gnu- + +1. For NOR boot + $ make distclean + $ make P1010RDB-PB_NOR + +2. For NAND boot + $ make distclean + $ make P1010RDB-PB_NAND + +3. For SPI boot + $ make distclean + $ make P1010RDB-PB_SPIFLASH + +4. For SD boot + $ make distclean + $ make P1010RDB-PB_SDCARD + + +Steps to burn images for different boot mode: +============================================= +1. NOR boot + => tftp 1000000 u-boot.bin + For bank0 + => pro off all;era eff80000 efffffff;cp.b 1000000 eff80000 $filesize + set SW1[8]=0, SW4[1:4]= 1111 and SW3[3:4]= 00, then power on the board + + For bank1 + => pro off all;era eef80000 eeffffff;cp.b 1000000 eef80000 $filesize + set SW1[8]=1, SW4[1:4]= 1111 and SW3[3:4]= 00, then power on the board + +2. NAND boot + => tftp 1000000 u-boot-nand.bin + => nand erase 0 $filesize; nand write $loadaddr 0 $filesize + Set SW4[1:4]= 1010 and SW3[3:4]= 01, then power on the board + +3. SPI boot + 1) cat p1010rdb-config-header.bin u-boot.bin > u-boot-spi-combined.bin + 2) => tftp 1000000 u-boot-spi-combined.bin + 3) => sf probe 0; sf erase 0 100000; sf write 1000000 0 100000 + set SW4[1:4]= 0110 and SW3[3:4]= 00, then power on the board + +4. SD boot + 1) cat p1010rdb-config-header.bin u-boot.bin > u-boot-sd-combined.bin + 2) => tftp 1000000 u-boot-sd-combined.bin + 3) => mux sdhc + 4) => mmc write 1000000 0 1050 + set SW4[1:4]= 0111 and SW3[3:4]= 10, then power on the board + + +Boot Linux from network using TFTP on P1010RDB-PB +================================================= +Place uImage, p1010rdb.dtb and rootfs files in the TFTP download path. => tftp 1000000 uImage => tftp 2000000 p1010rdb.dtb => tftp 3000000 rootfs.ext2.gz.uboot.p1010rdb => bootm 1000000 3000000 2000000 -Please contact your local field applications engineer or sales representative -to obtain related documents, such as P1010-RDB User Guide for details. +For more details, please refer to P1010RDB-PB User Guide and access website +www.freescale.com and Freescale QorIQ SDK Infocenter document. diff --git a/doc/README.p1010rdb b/doc/README.p1010rdb deleted file mode 100644 index dee63d7..0000000 --- a/doc/README.p1010rdb +++ /dev/null @@ -1,199 +0,0 @@ -Overview -========= -The P1010RDB is a Freescale reference design board that hosts the P1010 SoC. - -The P1010 is a cost-effective, low-power, highly integrated host processor -based on a Power Architecture e500v2 core (maximum core frequency 800/1000 MHz), -that addresses the requirements of several routing, gateways, storage, consumer, -and industrial applications. Applications of interest include the main CPUs and -I/O processors in network attached storage (NAS), the voice over IP (VoIP) -router/gateway, and wireless LAN (WLAN) and industrial controllers. - -The P1010RDB board features are as follows: -Memory subsystem: - - 1Gbyte unbuffered DDR3 SDRAM discrete devices (32-bit bus) - - 32 Mbyte NOR flash single-chip memory - - 32 Mbyte NAND flash memory - - 256 Kbit M24256 I2C EEPROM - - 16 Mbyte SPI memory - - I2C Board EEPROM 128x8 bit memory - - SD/MMC connector to interface with the SD memory card -Interfaces: - - PCIe: - - Lane0: x1 mini-PCIe slot - - Lane1: x1 PCIe standard slot - - SATA: - - 1 internal SATA connector to 2.5" 160G SATA2 HDD - - 1 eSATA connector to rear panel - - 10/100/1000 BaseT Ethernet ports: - - eTSEC1, RGMII: one 10/100/1000 port using Vitesse VSC8641XKO - - eTSEC2, SGMII: one 10/100/1000 port using Vitesse VSC8221 - - eTSEC3, SGMII: one 10/100/1000 port using Vitesse VSC8221 - - USB 2.0 port: - - x1 USB2.0 port: via an ULPI PHY to micro-AB connector - - x1 USB2.0 poort via an internal PHY to micro-AB connector - - FlexCAN ports: - - x2 DB-9 female connectors for FlexCAN bus(revision 2.0B) - interface; - - DUART interface: - - DUART interface: supports two UARTs up to 115200 bps for - console display - - J45 connectors are used for these 2 UART ports. - - TDM - - 2 FXS ports connected via an external SLIC to the TDM - interface. SLIC is controllled via SPI. - - 1 FXO port connected via a relay to FXS for switchover to - POTS -Board connectors: - - Mini-ITX power supply connector - - JTAG/COP for debugging -IEEE Std. 1588 signals for test and measurement -Real-time clock on I2C bus -POR - - support critical POR setting changed via switch on board -PCB - - 6-layer routing (4-layer signals, 2-layer power and ground) - - -Serial Port Configuration on P1010RDB -===================================== -Configure the serial port of the attached computer with the following values: - -Data rate: 115200 bps - -Number of data bits: 8 - -Parity: None - -Number of Stop bits: 1 - -Flow Control: Hardware/None - - -Settings of DIP-switch -====================== - SW4[1:4]= 1111 and SW6[4]=0 for boot from 16bit NOR flash - SW4[1:4]= 1000 and SW6[4]=1 for boot from 8bit NAND flash - SW4[1:4]= 0110 and SW6[4]=0 for boot from SPI flash -Note: 1 stands for 'on', 0 stands for 'off' - - -Setting of hwconfig -=================== -If FlexCAN or TDM is needed, please set "fsl_p1010mux:tdm_can=can" or -"fsl_p1010mux:tdm_can=tdm" explicitly in u-booot prompt as below for example: -setenv hwconfig "fsl_p1010mux:tdm_can=tdm;usb1:dr_mode=host,phy_type=utmi" -By default, don't set fsl_p1010mux:tdm_can, in this case, spi chip selection -is set to spi-flash instead of to SLIC/TDM/DAC and tdm_can_sel is set to TDM -instead of to CAN/UART1. - - -Build and burn u-boot to NOR flash -================================== -1. Build u-boot.bin image - export ARCH=powerpc - export CROSS_COMPILE=/your_path/powerpc-linux-gnu- - make P1010RDB_NOR - -2. Burn u-boot.bin into NOR flash - => tftp $loadaddr $uboot - => protect off eff80000 +$filesize - => erase eff80000 +$filesize - => cp.b $loadaddr eff80000 $filesize - -3. Check SW4[1:4]= 1111 and SW6[4]=0, then power on. - - -Alternate NOR bank -============================ -1. Burn u-boot.bin into alternate NOR bank - => tftp $loadaddr $uboot - => protect off eef80000 +$filesize - => erase eef80000 +$filesize - => cp.b $loadaddr eef80000 $filesize - -2. Switch to alternate NOR bank - => mw.b ffb00009 1 - => reset - or set SW1[8]= ON - -SW1[8]= OFF: Upper bank used for booting start -SW1[8]= ON: Lower bank used for booting start -CPLD NOR bank selection register address 0xFFB00009 Bit[0]: -0 - boot from upper 4 sectors -1 - boot from lower 4 sectors - - -Build and burn u-boot to NAND flash -=================================== -1. Build u-boot.bin image - export ARCH=powerpc - export CROSS_COMPILE=/your_path/powerpc-linux-gnu- - make P1010RDB_NAND - -2. Burn u-boot-nand.bin into NAND flash - => tftp $loadaddr $uboot-nand - => nand erase 0 $filesize - => nand write $loadaddr 0 $filesize - -3. Check SW4[1:4]= 1000 and SW6[4]=1, then power on. - - - -Build and burn u-boot to SPI flash -================================== -1. Build u-boot-spi.bin image - make P1010RDB_SPIFLASH_config; make - Boot up kernel with rootfs.ext2.gz.uboot.p1010rdb - Download u-boot.bin to linux and you can find some config files - under /usr/share such as config_xx.dat. Do below command: - boot_format config_ddr3_1gb_p1010rdb_800M.dat u-boot.bin -spi \ - u-boot-spi.bin - to generate u-boot-spi.bin. - -2. Burn u-boot-spi.bin into SPI flash - => tftp $loadaddr $uboot-spi - => sf erase 0 100000 - => sf write $loadaddr 0 $filesize - -3. Check SW4[1:4]= 0110 and SW6[4]=0, then power on. - - - -CPLD POR setting registers -========================== -1. Set POR switch selection register (addr 0xFFB00011) to 0. -2. Write CPLD POR registers (BCSR0~BCSR3, addr 0xFFB00014~0xFFB00017) with - proper values. - If change boot ROM location to NOR or NAND flash, need write the IFC_CS0 - switch command by I2C. -3. Send reset command. - After reset, the new POR setting will be implemented. - -Two examples are given in below: -Switch from NOR to NAND boot with default frequency: - => i2c dev 0 - => i2c mw 18 1 f9 - => i2c mw 18 3 f0 - => mw.b ffb00011 0 - => mw.b ffb00017 1 - => reset -Switch from NAND to NOR boot with Core/CCB/DDR (800/400/667 MHz): - => i2c dev 0 - => i2c mw 18 1 f1 - => i2c mw 18 3 f0 - => mw.b ffb00011 0 - => mw.b ffb00014 2 - => mw.b ffb00015 5 - => mw.b ffb00016 3 - => mw.b ffb00017 f - => reset - - - -Boot Linux from network using TFTP on P1010RDB -============================================== -Place uImage, p1010rdb.dtb and rootfs files in the TFTP disk area. - => tftp 1000000 uImage - => tftp 2000000 p1010rdb.dtb - => tftp 3000000 rootfs.ext2.gz.uboot.p1010rdb - => bootm 1000000 3000000 2000000 - - -Please contact your local field applications engineer or sales representative -to obtain related documents, such as P1010-RDB User Guide for details. -- 1.8.0

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[U-Boot] [PATCH v2] usb: gadget: Fix data aborts during USB ethernet boot
by Joel Fernandes 05 Sep '13

05 Sep '13

As seen on GCC 4.6 Linaro compiler, control_req buffer is not aligned on 4 byte boundaray causing data aborts in eth_setup -> conf_buf during dhcp boot over usb_ether. Fix the issue my aligning control_req buffer to 4-byte boundary. Tested on am335x_evm platform (beaglebone). Applies on 2013.10-rc1 branch. Cc: Tom Rini <trini(a)ti.com> Cc: Marek Vasut <marex(a)denx.de> Signed-off-by: Joel Fernandes <joelf(a)ti.com> --- v2 changes: - Using DEFINE_CACHE_ALIGN_BUFFER macro for the alignment. - Also fixed alignment for status_req. drivers/usb/gadget/ether.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 579893c..700d5fb 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -849,9 +849,10 @@ static struct usb_gadget_strings stringtab = { }; /*============================================================================*/ -static u8 control_req[USB_BUFSIZ]; +DEFINE_CACHE_ALIGN_BUFFER(u8, control_req, USB_BUFSIZ); + #if defined(CONFIG_USB_ETH_CDC) || defined(CONFIG_USB_ETH_RNDIS) -static u8 status_req[STATUS_BYTECOUNT] __attribute__ ((aligned(4))); +DEFINE_CACHE_ALIGN_BUFFER(u8, status_req, STATUS_BYTECOUNT); #endif -- 1.8.1.2

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[U-Boot] [PATCH] usb: gadget: Fix data aborts during USB ethernet boot
by Joel Fernandes 05 Sep '13

05 Sep '13

As seen on GCC 4.6 Linaro compiler, control_req buffer is not aligned on 4 byte boundaray causing data aborts in eth_setup -> conf_buf during dhcp boot over usb_ether. Fix the issue my aligning control_req buffer to 4-byte boundary. Tested on am335x_evm platform (beaglebone). Applies on 2013.10-rc1 branch. Cc: Tom Rini <trini(a)ti.com> Signed-off-by: Joel Fernandes <joelf(a)ti.com> --- drivers/usb/gadget/ether.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c index 579893c..251d7b2 100644 --- a/drivers/usb/gadget/ether.c +++ b/drivers/usb/gadget/ether.c @@ -849,7 +849,7 @@ static struct usb_gadget_strings stringtab = { }; /*============================================================================*/ -static u8 control_req[USB_BUFSIZ]; +static u8 control_req[USB_BUFSIZ] __attribute__ ((aligned(4))); #if defined(CONFIG_USB_ETH_CDC) || defined(CONFIG_USB_ETH_RNDIS) static u8 status_req[STATUS_BYTECOUNT] __attribute__ ((aligned(4))); #endif -- 1.7.9.5

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[U-Boot] Compiling certain files with extra compiler flags
by Vadim Bendebury 04 Sep '13

04 Sep '13

Does u-boot provide the ability to change compilation options 'on the fly', say when certain files need to be compiled for symbolic debugging? I looked but did not find any. How about something like this: vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv $ git diff config.mk diff --git a/config.mk b/config.mk index 853e6d8..41cafbb 100644 --- a/config.mk +++ b/config.mk @@ -406,7 +406,7 @@ $(obj)%.o: %.c ifneq ($(CHECKSRC),0) $(CHECK) $(CHECKFLAGS) $(ALL_CFLAGS) $< endif - $(CC) $(ALL_CFLAGS) -o $@ $< -c + $(CC) $(ALL_CFLAGS) $(CPP_$(subst .,_,$<)) -o $@ $< -c $(obj)%.i: %.c $(CPP) $(ALL_CFLAGS) -o $@ $< -c $(obj)%.s: %.c ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Then, say I want to have spl_boot.c compiled with extra flags, just invoking make like this does the trick: CPP_spl_boot_c='-O0 -fno-default-inline' make ... Or is there a better way? --vb

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Re: [U-Boot] U-Boot 2009.11.1 USB Issue and Building U-Boot 2013.07
by Wolfgang Denk 04 Sep '13

04 Sep '13

Dear Chuck, please always keep the mailing list on Cc: And please don't top post / full quote. Thanks. In message <005001cea968$9eaa58e0$dbff0aa0$(a)amanomcgann.com> you wrote: > > Thank you for the reply! Yes the same loadaddr is used for both tftp > and fatload as follows: loadaddr=0x21000000 OK. > I'm not sure what you mean by a complete console log so a little > direction would be helpful so I can provide what you are asking for. I Please copy all input and all output of your system into a file and include this with your posting. For example, you coul use the "script" command, or your terminal emulator may have a logging feature, or you could simply use copy & paste. > can tell you when I run the commands manually I get the same result each > time. I have attached a txt file that shows what happens when I run the > command. At the bottom of the file I included the environment > variables. If you look at the variable usbgetrootfs this is the command > being run. I cannot see any such attachment. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de When the bosses talk about improving productivity, they are never talking about themselves.

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Re: [U-Boot] [PATCH] powerpc/p1010rdb-pb: add support for p1010rdb-pb board
by Scott Wood 04 Sep '13

04 Sep '13

On Thu, 2013-08-29 at 06:10 -0500, Liu Shengzhou-B36685 wrote: > > -----Original Message----- > > From: Wood Scott-B07421 > > Sent: Wednesday, August 14, 2013 8:35 AM > > To: Liu Shengzhou-B36685 > > Cc: u-boot(a)lists.denx.de > > Subject: Re: [U-Boot] [PATCH] powerpc/p1010rdb-pb: add support for p1010rdb-pb > > board > > > > > struct law_entry law_table[] = { > > > -#ifndef CONFIG_SDCARD > > > SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_IFC), > > > SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_128K, LAW_TRGT_IF_IFC), > > > SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC), > > > -#endif }; > > > > If this is applicable to the current board as well (is that P1010RDB-PA?), then > > it isn't related to adding PB support and thus belongs in a separate patch. > > > As P1010RDB-PA will no longer be supported officially, Why? Don't confuse Freescale supporting the board with U-Boot supporting the board. > but we still keep previous code for P1010RDB-PA. > will add some description for P1010RDB-PA in commit message. I don't see how this answers my question. > > > +uint pin_mux; > > This is too generic for a global variable. Does it even need to be global? > > Will rename to "static uint sd_ifc_mux", need to be global for invoking in several different functions. If it's static, it's not global. > > > +#if defined(CONFIG_P1010RDB) && defined(DEBUG) > > > void cpld_show(void) > > > { > > > struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); > > > > > > - printf("CPLD: V%x.%x PCBA: V%x.0\n", > > > - in_8(&cpld_data->cpld_ver) & 0xF0, > > > - in_8(&cpld_data->cpld_ver) & 0x0F, > > > - in_8(&cpld_data->pcba_ver) & 0x0F); > > > > Why are you removing this? Where is cpld_show() called? > > > previous code for debug, actually no longer needed, will remove cpld_show(). Make such cleanup a separate patch. > > > @@ -246,6 +446,16 @@ void fdt_del_sdhc(void *blob) > > > } > > > } > > > > > > +void fdt_del_ifc(void *blob) > > > +{ > > > + int nodeoff = 0; > > > + > > > + while ((nodeoff = fdt_node_offset_by_compatible(blob, 0, > > > + "fsl,ifc")) >= 0) { > > > + fdt_del_node(blob, nodeoff); > > > + } > > > +} > > > > Is this PB-specific? If no, why is it in this patch? If not, why isn't the > > caller guarded by the PB ifdef? > > > for both PA and PB, this patch also tune for PA(though PA no longer be supported officially). Why is it in this patch? > > > + > > > +U_BOOT_CMD( > > > + mux, 2, 0, pin_mux_cmd, > > > + "configure multiplexing pin for IFC/SDHC bus in runtime", > > > + "bus_type (e.g. mux sdhc)" > > > +); > > > > Are you sure this is a good idea? What happens to the drivers using said > > hardware at the time? Granted they should be idle when not running a command > > that actively uses them, but still... Usually we use hwconfig for this sort of thing. > > The patch supports two ways simultaneously: > 1) mux command: for temporary use case in runtime for accessing IFC and SDHC without reboot, > this way is very useful in practice and in some test cases. > 2) hwconfig: for long-term use case. This should be a separate patch from basic board support. > > > -#define CONFIG_SYS_DDR_MODE_2_800 0x8000c000 > > > +#define CONFIG_SYS_DDR_MODE_1_800 0x00441420 > > > +#define CONFIG_SYS_DDR_MODE_2_800 0x00000000 > > > #define CONFIG_SYS_DDR_INTERVAL_800 0x0C300100 > > > -#define CONFIG_SYS_DDR_WRLVL_CONTROL_800 0x8655A608 > > > +#define CONFIG_SYS_DDR_WRLVL_CONTROL_800 0x8675f608 > > > > Shouldn't this be ifdeffed by the board revision? > > No, this is for both PA and PB. old parameters were not the optimal, > will add some description for P1010RDB-PA in commit message. Separate patch. -Scott

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[U-Boot] OMAP5 xHCI support
by Dan Murphy 04 Sep '13

04 Sep '13

This patch series adds the OMAP5 xHCI support. It is has dependencies on the following patches http://patchwork.ozlabs.org/patch/268797/ http://patchwork.ozlabs.org/patch/268766/ At this time the uBoot USB engine does not allow more then one stack to be enabled at a time. Since the ethernet port is on the eHCI port I have opt'd to keep the eHCI enabled over the xHCI. To enable the xHCI stack for OMAP add the following configs in addition to the standard USB defines. NOTE: eHCI must be disabled CONFIG_USB_XHCI CONFIG_USB_XHCI_OMAP CONFIG_PALMAS_USB_SS_PWR

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[U-Boot] Please pull u-boot-ti/master
by Tom Rini 04 Sep '13

04 Sep '13

Hello, The following changes since commit 9ed887caecb9ecb0c68773a1870d143b9f28d3da: Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' (2013-08-17 18:24:13 +0200) are available in the git repository at: git://git.denx.de/u-boot-ti.git master for you to fetch changes up to 901ce27c6f018992b7dd6c08d3c98cf217cc4c96: siemens-am33x-common.h: Always build CONFIG_OMAP_GPIO support (2013-08-28 12:01:30 -0400) ---------------------------------------------------------------- Albert ARIBAUD (1): arm: omap3: fix SRAM copy and execution sequence Heiko Schocher (6): arm, am33xx: add defines for gmii_sel_register bits arm, am335x: add some missing registers and defines for lcd and epwm support arm, spl: add watchdog library to SPL arm, am335x: add watchdog support video: add formike lcd panel init arm, am335x: add support for 3 siemens boards Javier Martinez Canillas (1): ARM: igep00x0.h: Enable raw initrd support Lubomir Popov (1): ARM: OMAP4470: Add Elpida EDB8164B3PF memory configuration Oleksandr Tyshchenko (1): sdp4430: Initialize board id using CONFIG_MACH_TYPE Taras Kondratiuk (3): ARM: OMAP4470: Add OMAP4470 identification ARM: OMAP4470: Add voltage and dpll data ARM: OMAP4460: sdp: Limit TPS mux config to 4460 Tom Rini (13): am33xx: Correct and expand comments on CONFIG_SPL_MAX_SIZE TI:armv7: Move CONFIG_SPL_LIBDISK_SUPPORT to MMC section omap5: Expand CONFIG_SPL_MAX_SIZE and comment upon SRAM_SCRATCH_SPACE_ADDR TI:am335x: Better comment and organize the networking related options am335x_evm: Add comment by SPL SPI support am335x_evm: Regroup USB options TI:armv7: Re-order slightly the generic CONFIG options, expand related comments am335x_evm: Update README for customization TI:am33xx: Move SPL YMODEM support to the per-board config TI:omap5: Clarify comments about SPL and DDR timings in common config omap5_uevm: Better comment why we have TCA642X and the reset time dra7xx_evm: Re-order and comment the networking related config options siemens-am33x-common.h: Always build CONFIG_OMAP_GPIO support MAINTAINERS | 5 + arch/arm/cpu/armv7/omap3/clock.c | 6 +- arch/arm/cpu/armv7/omap3/lowlevel_init.S | 8 +- arch/arm/cpu/armv7/omap4/hw_data.c | 36 ++ arch/arm/cpu/armv7/omap4/hwinit.c | 3 + arch/arm/cpu/armv7/omap4/sdram_elpida.c | 41 +- arch/arm/include/asm/arch-am33xx/cpu.h | 74 ++- arch/arm/include/asm/arch-am33xx/hardware_am33xx.h | 7 + arch/arm/include/asm/arch-am33xx/omap.h | 2 +- arch/arm/include/asm/arch-omap3/clock.h | 2 - arch/arm/include/asm/arch-omap4/clock.h | 7 +- arch/arm/include/asm/arch-omap4/omap.h | 1 + arch/arm/include/asm/arch-omap5/omap.h | 11 +- arch/arm/include/asm/omap_common.h | 1 + board/isee/igep0033/board.c | 6 +- board/phytec/pcm051/board.c | 2 - board/siemens/common/board.c | 171 +++++++ board/siemens/common/factoryset.c | 284 +++++++++++ board/siemens/common/factoryset.h | 27 ++ board/siemens/dxr2/Makefile | 49 ++ board/siemens/dxr2/board.c | 241 +++++++++ board/siemens/dxr2/board.h | 69 +++ board/siemens/dxr2/mux.c | 112 +++++ board/siemens/pxm2/Makefile | 49 ++ board/siemens/pxm2/board.c | 429 ++++++++++++++++ board/siemens/pxm2/board.h | 22 + board/siemens/pxm2/mux.c | 186 +++++++ board/siemens/pxm2/pmic.h | 71 +++ board/siemens/rut/Makefile | 49 ++ board/siemens/rut/board.c | 432 +++++++++++++++++ board/siemens/rut/board.h | 22 + board/siemens/rut/mux.c | 347 +++++++++++++ board/ti/am335x/README | 28 +- board/ti/am335x/board.c | 6 +- board/ti/sdp4430/sdp.c | 4 +- boards.cfg | 3 + doc/README.SPL | 2 +- drivers/video/Makefile | 1 + drivers/video/formike.c | 511 ++++++++++++++++++++ drivers/watchdog/Makefile | 1 + drivers/watchdog/omap_wdt.c | 121 +++++ include/configs/am335x_evm.h | 93 ++-- include/configs/dra7xx_evm.h | 18 +- include/configs/dxr2.h | 94 ++++ include/configs/igep00x0.h | 1 + include/configs/omap4_sdp4430.h | 1 + include/configs/omap5_common.h | 19 +- include/configs/omap5_uevm.h | 3 + include/configs/pxm2.h | 153 ++++++ include/configs/rut.h | 156 ++++++ include/configs/siemens-am33x-common.h | 461 ++++++++++++++++++ include/configs/ti_am335x_common.h | 22 +- include/configs/ti_armv7_common.h | 26 +- include/video.h | 4 + spl/Makefile | 1 + tools/logos/siemens.bmp | Bin 0 -> 25766 bytes 56 files changed, 4387 insertions(+), 114 deletions(-) create mode 100644 board/siemens/common/board.c create mode 100644 board/siemens/common/factoryset.c create mode 100644 board/siemens/common/factoryset.h create mode 100644 board/siemens/dxr2/Makefile create mode 100644 board/siemens/dxr2/board.c create mode 100644 board/siemens/dxr2/board.h create mode 100644 board/siemens/dxr2/mux.c create mode 100644 board/siemens/pxm2/Makefile create mode 100644 board/siemens/pxm2/board.c create mode 100644 board/siemens/pxm2/board.h create mode 100644 board/siemens/pxm2/mux.c create mode 100644 board/siemens/pxm2/pmic.h create mode 100644 board/siemens/rut/Makefile create mode 100644 board/siemens/rut/board.c create mode 100644 board/siemens/rut/board.h create mode 100644 board/siemens/rut/mux.c create mode 100644 drivers/video/formike.c create mode 100644 drivers/watchdog/omap_wdt.c create mode 100644 include/configs/dxr2.h create mode 100644 include/configs/pxm2.h create mode 100644 include/configs/rut.h create mode 100644 include/configs/siemens-am33x-common.h create mode 100644 tools/logos/siemens.bmp -- Tom

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[U-Boot] [PATCH] mtd: atmel_nand: pmecc: fix bug fail to correct bit error in 1024-bytes sector
by Josh Wu 04 Sep '13

04 Sep '13

The PMECC use BCH algorithm to correct error. In BCH algorithm, the primitive polynomial value is GF(2^13) for 512-bytes sector size. And it is GF(2^14) for 1024-bytes sector size. This patch will choose correct degree of the remainders(13 or 14) for different sector size. Tested in AT91SAM9X5-EK with MLC nand flash. More detail can be refered to section 5.4.1 of: AT91SAM ARM-based Embedded MPU Application Note <http://www.atmel.com/Images/doc11127.pdf> Signed-off-by: Josh Wu <josh.wu(a)atmel.com> --- drivers/mtd/nand/atmel_nand.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index 96aca00..da83f06 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -827,7 +827,8 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand, switch (mtd->writesize) { case 2048: case 4096: - host->pmecc_degree = PMECC_GF_DIMENSION_13; + host->pmecc_degree = (sector_size == 512) ? + PMECC_GF_DIMENSION_13 : PMECC_GF_DIMENSION_14; host->pmecc_cw_len = (1 << host->pmecc_degree) - 1; host->pmecc_sector_number = mtd->writesize / sector_size; host->pmecc_bytes_per_sector = pmecc_get_ecc_bytes( -- 1.7.9.5

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[U-Boot] patchwork updated
by Tom Rini 04 Sep '13

04 Sep '13

Hey all, I've gone over the unassigned patchwork queue and done a triage and assign. There's some obvious superseded patches I'll mark soon, if not beaten to it. Any incorrect assignments are clearly my fault. -- Tom

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