February 2013 - U-Boot

[U-Boot] [PATCH 0/2 V2] EXYNOS5: SNOW: Add initial dts and config file
by Rajeshwari Shinde 27 Feb '13

27 Feb '13

This patch set adds initial dts and configuration file for snow. Changes in V2: - Added Maintainer. Rajeshwari Shinde (2): EXYNOS5: Add initial DTS file for Snow. EXYNOS5: Snow: Add a configuration file MAINTAINERS | 4 ++ board/samsung/dts/exynos5250-snow.dts | 69 +++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/snow.h | 33 ++++++++++++++++ 4 files changed, 107 insertions(+), 0 deletions(-) create mode 100644 board/samsung/dts/exynos5250-snow.dts create mode 100644 include/configs/snow.h -- 1.7.4.4

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[U-Boot] [PATCH 0/20] Improvements to memory, hashing functions for sandbox
by Simon Glass 27 Feb '13

27 Feb '13

This series aims to get all the memory functions running correctly on sandbox. There was some discussion about this a while ago, and a commit was added to show a possible approach: 355a8357 sandbox: Change md command to use map_physmem This commit was subsequently reverted because it used map_physmem() instead of the NOP that most architectures need for the memory functions. This series introduces map_sysmem(), a NOP on all architectures except sandbox. It allows us to use a ram buffer to which all U-Boot addresses are relative. The memory commands (including hashing) are updated to use this so that sandbox can now use those commands. Half of the mtest code is behind #ifdefs and there is duplication of some functions in both versions of the memory test. Several patches here clean this up a bit and get it working on sandbox. The numeric setenv_ulong() function is a useful way of avoiding a 'char buf[17]; sprintf(buf, "%ld", ...); setenv("...", buf)' sequence. There is also setenv_addr(). What is missing is setenv_hex() which sets a ulong in hex format. Add this function and then make use of it in the main places: common/ drivers/ and net/. The recently added and very basic hash instructure can help reduce code duplication in some cases. Redo the crc32 command to use this, and make it available through the 'hash' command. Also a few bugs were found in hashing with verify disabled - the arg count was not checked and a variable declaration was missing. To permit the memory tester to run on sandbox, we need ctrl-C to work. To achieve this, add a proper implementation of sandbox's tstc(), with a simple FIFO for character input. An os_usleep() is added to ensure that U-Boot does not consume infinite CPU when setting at the command prompt. With all of this it is possible to use the memory commands in sandbox, as well as crc32 and the other hashing commands. Simon Glass (19): Tidy up error checking and fix bug in hash command Update print_buffer() to use const sandbox: Add un/map_sysmen() to deal with sandbox's ram_buf sandbox: Change memory commands to use map_physmem Split out the memory tests into separate functions Use common mtest iteration counting Fix mtest indenting Bring mtest putc() into common code Reduce casting in mtest Update set_working_fdt_addr() to use setenv_addr() common: Use new numeric setenv functions drivers: Use new numeric setenv functions net: Use new numeric setenv functions image: Use crc header file instead of C prototypes Roll crc32 into hash infrastructure sandbox: config: Enable hash functions and mtest Move CONFIG_SYS_MEMTEST_SCRATCH #ifdef to top of file sandbox: Update mtest to fix crashes sandbox: Allow hash functions to work correctly Taylor Hutt (1): sandbox: Improve sandbox serial port keyboard interface README | 9 + arch/sandbox/config.mk | 1 + arch/sandbox/cpu/os.c | 8 + arch/sandbox/include/asm/io.h | 10 + common/cmd_bootm.c | 11 +- common/cmd_cbfs.c | 4 +- common/cmd_cramfs.c | 4 +- common/cmd_fdos.c | 4 +- common/cmd_fdt.c | 11 +- common/cmd_hash.c | 4 + common/cmd_jffs2.c | 4 +- common/cmd_load.c | 12 +- common/cmd_mem.c | 798 ++++++++++++++++++++--------------------- common/cmd_mtdparts.c | 4 +- common/cmd_nand.c | 12 +- common/cmd_nvedit.c | 11 +- common/cmd_reiser.c | 4 +- common/cmd_setexpr.c | 39 ++- common/cmd_unzip.c | 4 +- common/cmd_ximg.c | 7 +- common/cmd_zfs.c | 3 +- common/cmd_zip.c | 4 +- common/hash.c | 31 ++- common/image.c | 4 +- drivers/net/fm/fm.c | 4 +- drivers/serial/sandbox.c | 44 ++- fs/fs.c | 4 +- fs/ubifs/ubifs.c | 4 +- include/common.h | 29 ++- include/configs/sandbox.h | 9 +- include/hash.h | 2 +- include/os.h | 10 + include/u-boot/crc.h | 11 + lib/crc32.c | 9 + lib/display_options.c | 3 +- net/net.c | 8 +- 36 files changed, 612 insertions(+), 528 deletions(-) -- 1.7.7.3

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[U-Boot] [PATCH v2] Tegra114: fdt: Sync DT nodes with kernel DT files (GPIO, tegra_car)
by Tom Warren 27 Feb '13

27 Feb '13

Minor edit to tegra_car node, add gpio node. Signed-off-by: Tom Warren <twarren(a)nvidia.com> --- v2: Remove Tegra30 from tegra_car compatible field as per StephenW arch/arm/dts/tegra114.dtsi | 19 ++++++++++++++++++- 1 files changed, 18 insertions(+), 1 deletions(-) diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi index f0f82de..dfeac53 100644 --- a/arch/arm/dts/tegra114.dtsi +++ b/arch/arm/dts/tegra114.dtsi @@ -11,12 +11,29 @@ i2c4 = "/i2c@7000c700"; }; - tegra_car: clock@60006000 { + tegra_car: clock { compatible = "nvidia,tegra114-car"; reg = <0x60006000 0x1000>; #clock-cells = <1>; }; + gpio: gpio { + compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio"; + reg = <0x6000d000 0x1000>; + interrupts = <0 32 0x04 + 0 33 0x04 + 0 34 0x04 + 0 35 0x04 + 0 55 0x04 + 0 87 0x04 + 0 89 0x04 + 0 125 0x04>; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; + i2c@7000c000 { compatible = "nvidia,tegra114-i2c"; reg = <0x7000c000 0x100>; -- 1.7.0.4

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Re: [U-Boot] [PATCH 1/4] sf: Add extended address register writing support
by Langer Thomas (LQDE RD ST PON SW) 27 Feb '13

27 Feb '13

Hello Jagan, > > diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c > index 00aece9..232ccc0 100644 > --- a/drivers/mtd/spi/spi_flash.c > +++ b/drivers/mtd/spi/spi_flash.c > @@ -269,6 +269,47 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr) > return 0; > } > > +int spi_flash_cmd_extaddr_write(struct spi_flash *flash, u8 ear) > +{ > + u8 cmd; > + u8 idcode0; > + int ret; > + > + ret = spi_flash_cmd(flash->spi, CMD_READ_ID, &idcode0, 1); > + if (ret) { > + debug("SF: fail to read read id\n"); > + return ret; > + } Instead of reading the id each time this function is executed, it should be decided during flash probing, if the feature is available and calling this functions should be done only then. > + > + if (idcode0 == 0x01) > + cmd = CMD_EXT_BRWR; > + else { > + printf("SF: unable to support extaddr reg write" > + " for %s flash\n", flash->name); This error will be hit every time for non-Spansion flashes, after you add the calls in patch 3/4 unconditionally! > + return -1; > + } > + > + ret = spi_flash_cmd_write_enable(flash); > + if (ret < 0) { > + debug("SF: enabling write failed\n"); > + return ret; > + } > + > + ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &ear, 1); > + if (ret) { > + debug("SF: fail to write ext addr register\n"); > + return ret; > + } > + > + ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); > + if (ret < 0) { > + debug("SF: write config register timed out\n"); > + return ret; > + } > + > + return 0; > +} > + > /* > * The following table holds all device probe functions > * > diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h > index 141cfa8..dbceb81 100644 > --- a/drivers/mtd/spi/spi_flash_internal.h > +++ b/drivers/mtd/spi/spi_flash_internal.h > @@ -28,6 +28,9 @@ > #define CMD_ERASE_64K 0xd8 > #define CMD_ERASE_CHIP 0xc7 > > +/* Extended addr acess commands */ > +#define CMD_EXT_BRWR 0x17 Please comment, that this is the Spansion-only code. > + > /* Common status */ > #define STATUS_WIP 0x01 > > @@ -77,6 +80,9 @@ static inline int spi_flash_cmd_write_disable(struct spi_flash *flash) > /* Program the status register. */ > int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr); > > +/* Program the extended address register */ > +int spi_flash_cmd_extaddr_write(struct spi_flash *flash, u8 ear); > + > /* > * Same as spi_flash_cmd_read() except it also claims/releases the SPI > * bus. Used as common part of the ->read() operation. > Best Regards, Thomas

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[U-Boot] [PATCH 3/4] sf: Add extended address access support
by Jagannadha Sutradharudu Teki 27 Feb '13

27 Feb '13

This patch provides support to access an extended addressing in 3-byte address mode. The current implementation in spi_flash supports 3-byte address mode due to this up to 16MB amount of flash is able to access for those flashes which has an actual size of > 16MB. extended/bank address register contains an information to access the 4th byte addressing hence the flashes which has > 16MB can be accessible. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna(a)xilinx.com> --- drivers/mtd/spi/spi_flash.c | 81 ++++++++++++++++++++++++++++++++++ drivers/mtd/spi/spi_flash_internal.h | 8 +++ 2 files changed, 89 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index c168c1c..16e5f59 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -23,6 +23,30 @@ static void spi_flash_addr(u32 addr, u8 *cmd) cmd[3] = addr >> 0; } +static int spi_flash_check_extaddr_access(struct spi_flash *flash, u32 *offset) +{ + int ret; + + if (*offset >= 0x1000000) { + ret = spi_flash_extaddr_access(flash, STATUS_EXTADDR_ENABLE); + if (ret) { + debug("SF: fail to %s ext addr bit\n", + STATUS_EXTADDR_ENABLE ? "set" : "reset"); + return ret; + } + *offset -= 0x1000000; + } else { + ret = spi_flash_extaddr_access(flash, STATUS_EXTADDR_DISABLE); + if (ret) { + debug("SF: fail to %s ext addr bit\n", + STATUS_EXTADDR_DISABLE ? "set" : "reset"); + return ret; + } + } + + return ret; +} + static int spi_flash_read_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, const u8 *data_out, u8 *data_in, @@ -73,6 +97,14 @@ int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset, int ret; u8 cmd[4]; + if (flash->size > 0x1000000) { + ret = spi_flash_check_extaddr_access(flash, &offset); + if (ret) { + debug("SF: fail to acess ext_addr\n"); + return ret; + } + } + page_size = flash->page_size; page_addr = offset / page_size; byte_addr = offset % page_size; @@ -139,6 +171,15 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset, size_t len, void *data) { u8 cmd[5]; + int ret; + + if (flash->size > 0x1000000) { + ret = spi_flash_check_extaddr_access(flash, &offset); + if (ret) { + debug("SF: fail to acess ext_addr\n"); + return ret; + } + } cmd[0] = CMD_READ_ARRAY_FAST; spi_flash_addr(offset, cmd); @@ -196,6 +237,14 @@ int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len) int ret; u8 cmd[4]; + if (flash->size > 0x1000000) { + ret = spi_flash_check_extaddr_access(flash, &offset); + if (ret) { + debug("SF: fail to acess ext_addr\n"); + return ret; + } + } + erase_size = flash->sector_size; if (offset % erase_size || len % erase_size) { debug("SF: Erase offset/length not multiple of erase size\n"); @@ -333,6 +382,38 @@ int spi_flash_cmd_extaddr_read(struct spi_flash *flash, void *data) return spi_flash_read_common(flash, &cmd, 1, data, 1); } +int spi_flash_extaddr_access(struct spi_flash *flash, u8 status) +{ + int ret, pass; + u8 data = 0, write_done = 0; + + for (pass = 0; pass < 2; pass++) { + ret = spi_flash_cmd_extaddr_read(flash, (void *)&data); + if (ret < 0) { + debug("SF: fail to read ext addr register\n"); + return ret; + } + + if ((data != status) & !write_done) { + debug("SF: need to %s ext addr bit\n", + status ? "set" : "reset"); + + write_done = 1; + ret = spi_flash_cmd_extaddr_write(flash, status); + if (ret < 0) { + debug("SF: fail to write ext addr bit\n"); + return ret; + } + } else { + debug("SF: ext addr bit is %s.\n", + status ? "set" : "reset"); + return ret; + } + } + + return -1; +} + /* * The following table holds all device probe functions * diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index 65960ad..a6b04d7 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -34,6 +34,8 @@ /* Common status */ #define STATUS_WIP 0x01 +#define STATUS_EXTADDR_ENABLE 0x01 +#define STATUS_EXTADDR_DISABLE 0x00 /* Send a single-byte command to the device and read the response */ int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); @@ -86,6 +88,12 @@ int spi_flash_cmd_extaddr_write(struct spi_flash *flash, u8 ear); /* Read the extended address register */ int spi_flash_cmd_extaddr_read(struct spi_flash *flash, void *data); +/* + * Extended address access + * access 4th byte address in 3-byte addessing mode for flashes + * which has an actual size of > 16MB. + */ +int spi_flash_extaddr_access(struct spi_flash *flash, u8 status); /* * Same as spi_flash_cmd_read() except it also claims/releases the SPI -- 1.7.4

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Re: [U-Boot] [PATCH 0/4] sf: Accessing > 16MBytes flashes in existing 3-byte addr mode.
by Langer Thomas (LQDE RD ST PON SW) 27 Feb '13

27 Feb '13

Hello Jagan, thanks for your contribution. As there is currently no explicit custodian for sf, I would like to give some comments to your code. Am 23.02.2013 12:38, schrieb Jagannadha Sutradharudu Teki: > The current implementation in spi_flash supports 3-byte address mode > due to this up to 16MB amount of flash is able to access for those > flashes which has an actual size of > 16MB. > > List of flashes: > S25FL256S > N25Q256 > N25Q256A > W25Q256(not yet mainlined) > > extended/bank address register contains an information to access the > 4th byte addressing hence the flashes which has > 16MB can be accessible. > I don't see a config option described here (and also don't find it in the patches). Please keep in mind that the code size for existing boards should not increase! See http://www.denx.de/wiki/U-Boot/DesignPrinciples , points 1 and 5 The code might fit for your use-case, but has influence on other boards/systems, and this is not acceptable. Please add a config option for this new code and also use the existing options, like CONFIG_SPI_FLASH_SPANSION, in your code. > > Thanks, > Jagan. > Best Regards, Thomas

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[U-Boot] [PATCH v2 1/2] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT
by Fabio Estevam 27 Feb '13

27 Feb '13

Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND controller drivers could use it when a 16-bit NAND is deployed. drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that other NAND drivers could reuse the same symbol. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- Changes since v1: - Improve README README | 9 ++++++--- drivers/mtd/nand/ndfc.c | 4 ++-- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/README b/README index d8cb394..bdd2c81 100644 --- a/README +++ b/README @@ -3713,9 +3713,12 @@ Low Level (hardware related) configuration options: - CONFIG_SYS_SRIOn_MEM_SIZE: Size of SRIO port 'n' memory region -- CONFIG_SYS_NDFC_16 - Defined to tell the NDFC that the NAND chip is using a - 16 bit bus. +- CONFIG_SYS_NAND_BUSWIDTH_16BIT + Defined to tell the NAND controller that the NAND chip is using + a 16 bit bus. + Not all NAND drivers use this symbol. + Example of driver that uses it: + - drivers/mtd/nand/ndfc.c - CONFIG_SYS_NDFC_EBC0_CFG Sets the EBC0_CFG register for the NDFC. If not defined diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c index 6ebbb5e..213d2c9 100644 --- a/drivers/mtd/nand/ndfc.c +++ b/drivers/mtd/nand/ndfc.c @@ -156,7 +156,7 @@ static uint8_t ndfc_read_byte(struct mtd_info *mtd) struct nand_chip *chip = mtd->priv; -#ifdef CONFIG_SYS_NDFC_16BIT +#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT return (uint8_t) readw(chip->IO_ADDR_R); #else return readb(chip->IO_ADDR_R); @@ -218,7 +218,7 @@ int board_nand_init(struct nand_chip *nand) nand->ecc.bytes = 3; nand->select_chip = ndfc_select_chip; -#ifdef CONFIG_SYS_NDFC_16BIT +#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT nand->options |= NAND_BUSWIDTH_16; #endif -- 1.7.9.5

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[U-Boot] [PATCH] Tegra114: fdt: Sync DT nodes with kernel DT files (GPIO, tegra_car)
by Tom Warren 27 Feb '13

27 Feb '13

Minor edit to tegra_car node, add gpio node. Signed-off-by: Tom Warren <twarren(a)nvidia.com> --- arch/arm/dts/tegra114.dtsi | 21 +++++++++++++++++++-- 1 files changed, 19 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi index f0f82de..6c85fb0 100644 --- a/arch/arm/dts/tegra114.dtsi +++ b/arch/arm/dts/tegra114.dtsi @@ -11,12 +11,29 @@ i2c4 = "/i2c@7000c700"; }; - tegra_car: clock@60006000 { - compatible = "nvidia,tegra114-car"; + tegra_car: clock { + compatible = "nvidia,tegra114-car", "nvidia,tegra30-car"; reg = <0x60006000 0x1000>; #clock-cells = <1>; }; + gpio: gpio { + compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio"; + reg = <0x6000d000 0x1000>; + interrupts = <0 32 0x04 + 0 33 0x04 + 0 34 0x04 + 0 35 0x04 + 0 55 0x04 + 0 87 0x04 + 0 89 0x04 + 0 125 0x04>; + #gpio-cells = <2>; + gpio-controller; + #interrupt-cells = <2>; + interrupt-controller; + }; + i2c@7000c000 { compatible = "nvidia,tegra114-i2c"; reg = <0x7000c000 0x100>; -- 1.7.0.4

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Re: [U-Boot] Flash protection and fw_setenv tool
by Waibel Georg 27 Feb '13

27 Feb '13

Hi again, the previous patch missed some places to apply the unprotect switch. Here's an improved version: Index: common/env_flash.c =================================================================== --- common/env_flash.c (revision 4065) +++ common/env_flash.c (working copy) @@ -218,9 +218,12 @@ done: if (saved_data) free(saved_data); + +#ifndef CONFIG_ENV_UNPROTECTED /* try to re-protect */ flash_sect_protect(1, (ulong)flash_addr, end_addr); flash_sect_protect(1, (ulong)flash_addr_new, end_addr_new); +#endif return rc; } @@ -310,7 +313,9 @@ if (saved_data) free(saved_data); /* try to re-protect */ +#ifndef CONFIG_ENV_UNPROTECTED flash_sect_protect(1, (long)flash_addr, end_addr); +#endif return rc; } #endif /* CMD_SAVEENV */ @@ -340,7 +345,9 @@ flash_write(&flag, (ulong)&(flash_addr_new->flags), sizeof(flash_addr_new->flags)); +#ifndef CONFIG_ENV_UNPROTECTED flash_sect_protect(1, (ulong)flash_addr_new, end_addr_new); +#endif } if (flash_addr->flags != ACTIVE_FLAG && @@ -352,7 +359,9 @@ flash_write(&flag, (ulong)&(flash_addr->flags), sizeof(flash_addr->flags)); +#ifndef CONFIG_ENV_UNPROTECTED flash_sect_protect(1, (ulong)flash_addr, end_addr); +#endif } if (gd->env_valid == 2) Index: drivers/mtd/cfi_flash.c =================================================================== --- drivers/mtd/cfi_flash.c (revision 4065) +++ drivers/mtd/cfi_flash.c (working copy) @@ -2294,7 +2294,7 @@ #endif /* Environment protection ON by default */ -#ifdef CONFIG_ENV_IS_IN_FLASH +#if defined(CONFIG_ENV_IS_IN_FLASH) && !defined(CONFIG_ENV_UNPROTECTED) flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR, CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, @@ -2302,7 +2302,7 @@ #endif /* Redundant environment protection ON by default */ -#ifdef CONFIG_ENV_ADDR_REDUND +#if defined(CONFIG_ENV_ADDR_REDUND) && !defined(CONFIG_ENV_UNPROTECTED) flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR_REDUND, CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, Regards Georg -----Ursprüngliche Nachricht----- Von: u-boot-bounces(a)lists.denx.de [mailto:u-boot-bounces@lists.denx.de] Im Auftrag von Waibel Georg Gesendet: Dienstag, 26. Februar 2013 12:05 An: 'u-boot(a)lists.denx.de' Betreff: [U-Boot] Flash protection and fw_setenv tool Hi, I activated flash sector protection for our CFI NOR flash chip (CONFIG_SYS_FLASH_PROTECTION). Protection bits for U-Boot code sectors and environment sector are set by default during U-Boot startup. Thus from Linux, I cannot write to this sectors, which is generally a correct behavior. BUT, with this, changing the environment from user space with the fw_setenv tool does not work anymore. And here's the question: How to deal with this issue correctly? Two approaches came in my mind: a) Unprotecting the flash sectors by the Linux kernel (in CFI driver). This seems not to be implemented yet, at least for AMD CFI command set (0x0002). However, when unprotecting flash sectors from Linux side, does a sector protection actually makes sense? b) Introduce a config option in U-Boot which allows to leave the environment unprotected. See patch below. I called this option CONFIG_ENV_UNPROTECTED When defined, U-Boot does not protect the environment. For compatibility with boards in which the environment sector is already protected, I left the unprotect part in the saveenv function untouched. Any comments about this issue? Thanks and regards Georg Index: common/env_flash.c =================================================================== --- common/env_flash.c (revision 3966) +++ common/env_flash.c (working copy) @@ -218,9 +218,12 @@ done: if (saved_data) free(saved_data); + +#ifndef CONFIG_ENV_UNPROTECTED /* try to re-protect */ flash_sect_protect(1, (ulong)flash_addr, end_addr); flash_sect_protect(1, (ulong)flash_addr_new, end_addr_new); +#endif return rc; } Index: drivers/mtd/cfi_flash.c =================================================================== --- drivers/mtd/cfi_flash.c (revision 3966) +++ drivers/mtd/cfi_flash.c (working copy) @@ -2294,7 +2294,7 @@ #endif /* Environment protection ON by default */ -#ifdef CONFIG_ENV_IS_IN_FLASH +#if defined(CONFIG_ENV_IS_IN_FLASH) && !defined(CONFIG_ENV_UNPROTECTED) flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR, CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, _______________________________________________ U-Boot mailing list U-Boot(a)lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

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[U-Boot] [PATCH v1 1/2] blackfin: Set correct early debug serial baudrate.
by Sonic Zhang 27 Feb '13

27 Feb '13

From: Sonic Zhang <sonic.zhang(a)analog.com> Calculate the early uart clock from the system clock registers set by the bootrom other than the predefine uboot clock macros. Split the early baudrate setting function and the normal baudrate setting one. Signed-off-by: Sonic Zhang <sonic.zhang(a)analog.com> --- arch/blackfin/cpu/initcode.c | 43 +++++++-------------- arch/blackfin/cpu/serial.c | 12 +++++- arch/blackfin/cpu/serial1.h | 43 ++++++++------------- arch/blackfin/cpu/serial4.h | 27 ++++--------- arch/blackfin/include/asm/clock.h | 74 +++++++++++++++++++++++++++++++++++++ arch/blackfin/lib/clocks.c | 12 +----- 6 files changed, 123 insertions(+), 88 deletions(-) create mode 100644 arch/blackfin/include/asm/clock.h diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c index e8ea0ba..5c12726 100644 --- a/arch/blackfin/cpu/initcode.c +++ b/arch/blackfin/cpu/initcode.c @@ -194,15 +194,8 @@ static inline void serial_init(void) #endif if (BFIN_DEBUG_EARLY_SERIAL) { - int enabled = serial_early_enabled(uart_base); - serial_early_init(uart_base); - - /* If the UART is off, that means we need to program - * the baud rate ourselves initially. - */ - if (!enabled) - serial_early_set_baud(uart_base, CONFIG_BAUDRATE); + serial_early_set_baud(uart_base, CONFIG_BAUDRATE); } } @@ -714,37 +707,29 @@ program_clocks(ADI_BOOT_DATA *bs, bool put_into_srfs) __attribute__((always_inline)) static inline void update_serial_clocks(ADI_BOOT_DATA *bs, uint sdivB, uint divB, uint vcoB) { - serial_putc('a'); - /* Since we've changed the SCLK above, we may need to update * the UART divisors (UART baud rates are based on SCLK). * Do the division by hand as there are no native instructions * for dividing which means we'd generate a libgcc reference. */ - if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) { - unsigned int sdivR, vcoR; - int dividend = sdivB * divB * vcoR; - int divisor = vcoB * sdivR; - unsigned int quotient; + unsigned int sdivR, vcoR; + unsigned int dividend = sdivB * divB * vcoR; + unsigned int divisor = vcoB * sdivR; + unsigned int quotient; - serial_putc('b'); + serial_putc('a'); #ifdef __ADSPBF60x__ - sdivR = bfin_read_CGU_DIV(); - sdivR = ((sdivR >> 8) & 0x1f) * ((sdivR >> 5) & 0x7); - vcoR = (bfin_read_CGU_CTL() >> 8) & 0x7f; + sdivR = bfin_read_CGU_DIV(); + sdivR = ((sdivR >> 8) & 0x1f) * ((sdivR >> 5) & 0x7); + vcoR = (bfin_read_CGU_CTL() >> 8) & 0x7f; #else - sdivR = bfin_read_PLL_DIV() & 0xf; - vcoR = (bfin_read_PLL_CTL() >> 9) & 0x3f; + sdivR = bfin_read_PLL_DIV() & 0xf; + vcoR = (bfin_read_PLL_CTL() >> 9) & 0x3f; #endif - - for (quotient = 0; dividend > 0; ++quotient) - dividend -= divisor; - serial_early_put_div(quotient - ANOMALY_05000230); - serial_putc('c'); - } - - serial_putc('d'); + quotient = early_division(dividend, divisor); + serial_early_put_div(quotient - ANOMALY_05000230); + serial_putc('c'); } __attribute__((always_inline)) static inline void diff --git a/arch/blackfin/cpu/serial.c b/arch/blackfin/cpu/serial.c index 9847e9f..36d2a5c 100644 --- a/arch/blackfin/cpu/serial.c +++ b/arch/blackfin/cpu/serial.c @@ -195,6 +195,14 @@ static void uart_loop(uint32_t uart_base, int state) #endif +static inline void __serial_set_baud(uint32_t uart_base, uint32_t baud) +{ + uint16_t divisor = (get_uart_clk() + (baud * 8)) / (baud * 16) + - ANOMALY_05000230; + + /* Program the divisor to get the baud rate we want */ + serial_set_divisor(uart_base, divisor); +} #ifdef CONFIG_SYS_BFIN_UART static void uart_puts(uint32_t uart_base, const char *s) @@ -209,7 +217,7 @@ static int uart##n##_init(void) \ const unsigned short pins[] = { _P_UART(n, RX), _P_UART(n, TX), 0, }; \ peripheral_request_list(pins, "bfin-uart"); \ uart_init(MMR_UART(n)); \ - serial_early_set_baud(MMR_UART(n), gd->baudrate); \ + __serial_set_baud(MMR_UART(n), gd->baudrate); \ uart_lsr_clear(MMR_UART(n)); \ return 0; \ } \ @@ -221,7 +229,7 @@ static int uart##n##_uninit(void) \ \ static void uart##n##_setbrg(void) \ { \ - serial_early_set_baud(MMR_UART(n), gd->baudrate); \ + __serial_set_baud(MMR_UART(n), gd->baudrate); \ } \ \ static int uart##n##_getc(void) \ diff --git a/arch/blackfin/cpu/serial1.h b/arch/blackfin/cpu/serial1.h index a20175b..52f1c62 100644 --- a/arch/blackfin/cpu/serial1.h +++ b/arch/blackfin/cpu/serial1.h @@ -15,6 +15,8 @@ #ifndef __ASSEMBLY__ +#include <asm/clock.h> + #define MMR_UART(n) _PASTE_UART(n, UART, DLL) #ifdef UART_DLL # define UART0_DLL UART_DLL @@ -230,19 +232,6 @@ static inline void serial_early_do_portmux(void) } __attribute__((always_inline)) -static inline uint32_t uart_sclk(void) -{ -#if defined(BFIN_IN_INITCODE) || defined(CONFIG_DEBUG_EARLY_SERIAL) - /* We cannot use get_sclk() early on as it uses - * caches in external memory - */ - return CONFIG_CLKIN_HZ * CONFIG_VCO_MULT / CONFIG_SCLK_DIV; -#else - return get_sclk(); -#endif -} - -__attribute__((always_inline)) static inline int uart_init(uint32_t uart_base) { /* always enable UART -- avoids anomalies 05000309 and 05000350 */ @@ -275,21 +264,8 @@ static inline int serial_early_uninit(uint32_t uart_base) } __attribute__((always_inline)) -static inline int serial_early_enabled(uint32_t uart_base) +static inline void serial_set_divisor(uint32_t uart_base, uint16_t divisor) { - return bfin_read(&pUART->gctl) & UCEN; -} - -__attribute__((always_inline)) -static inline void serial_early_set_baud(uint32_t uart_base, uint32_t baud) -{ - /* Translate from baud into divisor in terms of SCLK. The - * weird multiplication is to make sure we over sample just - * a little rather than under sample the incoming signals. - */ - uint16_t divisor = (uart_sclk() + (baud * 8)) / (baud * 16) - - ANOMALY_05000230; - /* Set DLAB in LCR to Access DLL and DLH */ ACCESS_LATCH(); SSYNC(); @@ -305,6 +281,19 @@ static inline void serial_early_set_baud(uint32_t uart_base, uint32_t baud) } __attribute__((always_inline)) +static inline void serial_early_set_baud(uint32_t uart_base, uint32_t baud) +{ + /* Translate from baud into divisor in terms of SCLK. The + * weird multiplication is to make sure we over sample just + * a little rather than under sample the incoming signals. + */ + uint16_t divisor = early_division(early_get_uart_clk() + (baud * 8), + baud * 16) - ANOMALY_05000230; + + serial_set_divisor(uart_base, divisor); +} + +__attribute__((always_inline)) static inline void serial_early_put_div(uint16_t divisor) { uint32_t uart_base = UART_BASE; diff --git a/arch/blackfin/cpu/serial4.h b/arch/blackfin/cpu/serial4.h index 887845c..6548396 100644 --- a/arch/blackfin/cpu/serial4.h +++ b/arch/blackfin/cpu/serial4.h @@ -15,6 +15,8 @@ #ifndef __ASSEMBLY__ +#include <asm/clock.h> + #define MMR_UART(n) _PASTE_UART(n, UART, REVID) #define UART_BASE MMR_UART(CONFIG_UART_CONSOLE) @@ -84,20 +86,6 @@ static inline void serial_early_do_portmux(void) } __attribute__((always_inline)) -static inline uint32_t uart_sclk(void) -{ -#if defined(BFIN_IN_INITCODE) || defined(CONFIG_DEBUG_EARLY_SERIAL) - /* We cannot use get_sclk() early on as it uses caches in - * external memory - */ - return CONFIG_CLKIN_HZ * CONFIG_VCO_MULT / CONFIG_SCLK_DIV / - CONFIG_SCLK0_DIV; -#else - return get_sclk0(); -#endif -} - -__attribute__((always_inline)) static inline int uart_init(uint32_t uart_base) { /* always enable UART to 8-bit mode */ @@ -127,19 +115,20 @@ static inline int serial_early_uninit(uint32_t uart_base) } __attribute__((always_inline)) -static inline int serial_early_enabled(uint32_t uart_base) +static inline void serial_set_divisor(uint32_t uart_base, uint16_t divisor) { - return bfin_read(&pUART->control) & UEN; + /* Program the divisor to get the baud rate we want */ + bfin_write(&pUART->clock, divisor); + SSYNC(); } __attribute__((always_inline)) static inline void serial_early_set_baud(uint32_t uart_base, uint32_t baud) { - uint32_t divisor = uart_sclk() / (baud * 16); + uint16_t divisor = early_division(early_get_uart_clk(), baud * 16); /* Program the divisor to get the baud rate we want */ - bfin_write(&pUART->clock, divisor); - SSYNC(); + serial_set_divisor(uart_base, divisor); } __attribute__((always_inline)) diff --git a/arch/blackfin/include/asm/clock.h b/arch/blackfin/include/asm/clock.h new file mode 100644 index 0000000..df6cd68 --- /dev/null +++ b/arch/blackfin/include/asm/clock.h @@ -0,0 +1,74 @@ + +/* + * Copyright (C) 2012 Analog Devices Inc. + * Licensed under the GPL-2 or later. + */ + +#ifndef __CLOCK_H__ +#define __CLOCK_H__ + +#include <asm/blackfin.h> +#ifdef PLL_CTL +#include <asm/mach-common/bits/pll.h> +# define pll_is_bypassed() (bfin_read_PLL_STAT() & DF) +#else +#include <asm/mach-common/bits/cgu.h> +# define pll_is_bypassed() (bfin_read_CGU_STAT() & PLLBP) +# define bfin_read_PLL_CTL() bfin_read_CGU_CTL() +# define bfin_read_PLL_DIV() bfin_read_CGU_DIV() +# define SSEL SYSSEL +# define SSEL_P SYSSEL_P +#endif + +__attribute__((always_inline)) +static inline uint32_t early_division(uint32_t dividend, uint32_t divisor) +{ + uint32_t quotient; + uint32_t i, j; + + for (quotient = 1, i = 1; dividend > divisor; ++i) { + j = divisor << i; + if (j > dividend || (j & 0x80000000)) { + --i; + quotient += (1 << i); + dividend -= (divisor << i); + i = 0; + } + } + + return quotient; +} + +__attribute__((always_inline)) +static inline uint32_t early_get_uart_clk(void) +{ + uint32_t msel, pll_ctl, vco; + uint32_t div, ssel, sclk, uclk; + + pll_ctl = bfin_read_PLL_CTL(); + msel = (pll_ctl & MSEL) >> MSEL_P; + if (msel == 0) + msel = (MSEL >> MSEL_P) + 1; + + vco = (CONFIG_CLKIN_HZ >> (pll_ctl & DF)) * msel; + sclk = vco; + if (!pll_is_bypassed()) { + div = bfin_read_PLL_DIV(); + ssel = (div & SSEL) >> SSEL_P; + sclk = early_division(vco, ssel); + } + uclk = sclk; +#ifdef CGU_DIV + ssel = (div & S0SEL) >> S0SEL_P; + uclk = early_division(sclk, ssel); +#endif + return uclk; +} + +#ifdef CGU_DIV +# define get_uart_clk get_sclk0 +#else +# define get_uart_clk get_sclk +#endif + +#endif diff --git a/arch/blackfin/lib/clocks.c b/arch/blackfin/lib/clocks.c index d852f5e..97795e1 100644 --- a/arch/blackfin/lib/clocks.c +++ b/arch/blackfin/lib/clocks.c @@ -7,17 +7,7 @@ */ #include <common.h> -#include <asm/blackfin.h> - -#ifdef PLL_CTL -# include <asm/mach-common/bits/pll.h> -# define pll_is_bypassed() (bfin_read_PLL_STAT() & DF) -#else -# include <asm/mach-common/bits/cgu.h> -# define pll_is_bypassed() (bfin_read_CGU_STAT() & PLLBP) -# define bfin_read_PLL_CTL() bfin_read_CGU_CTL() -# define bfin_read_PLL_DIV() bfin_read_CGU_DIV() -#endif +#include <asm/clock.h> /* Get the voltage input multiplier */ u_long get_vco(void) -- 1.7.0.4

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