August 2012 - U-Boot

[U-Boot] [Patch 6/16] add mips64/interrupts.c
by Zhi-zhou Zhang 14 Aug '12

14 Aug '12

diff --git a/arch/mips/cpu/mips64/interrupts.c b/arch/mips/cpu/mips64/interrupts.c new file mode 100644 index 0000000..27aa179 --- /dev/null +++ b/arch/mips/cpu/mips64/interrupts.c @@ -0,0 +1,38 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, <wd(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/mipsregs.h> + +void enable_interrupts(void) +{ + int status = read_c0_status(); + write_c0_status(status | ST0_IE); +} + +int disable_interrupts(void) +{ + int status = read_c0_status(); + write_c0_status(status & ~ST0_IE); + return status | ST0_IE; +} -- Regards, Zhizhou Zhang

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[U-Boot] [Patch 3/16] add mips64/cache.S
by Zhi-zhou Zhang 14 Aug '12

14 Aug '12

diff --git a/arch/mips/cpu/mips64/cache.S b/arch/mips/cpu/mips64/cache.S new file mode 100644 index 0000000..ba7c1b8 --- /dev/null +++ b/arch/mips/cpu/mips64/cache.S @@ -0,0 +1,229 @@ +/* + * Cache-handling routined for MIPS CPUs + * + * Copyright (c) 2003 Wolfgang Denk <wd(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <asm-offsets.h> +#include <config.h> +#include <asm/asm.h> +#include <asm/regdef.h> +#include <asm/mipsregs.h> +#include <asm/addrspace.h> +#include <asm/cacheops.h> + +#define RA t9 + +/* + * 16kB is the maximum size of instruction and data caches on MIPS 4K, + * 64kB is on 4KE, 24K, 5K, etc. Set bigger size for convenience. + * + * Note that the above size is the maximum size of primary cache. U-Boot + * doesn't have L2 cache support for now. + */ +#define MIPS_MAX_CACHE_SIZE 0x10000 + +#define INDEX_BASE CKSEG0 + + .macro cache_op op addr + .set push + .set noreorder + .set mips3 + cache \op, 0(\addr) + .set pop + .endm + + .macro f_fill64 dst, offset, val + LONG_S \val, (\offset + 0 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 1 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 2 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 3 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 4 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 5 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 6 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 7 * LONGSIZE)(\dst) +#if LONGSIZE == 4 + LONG_S \val, (\offset + 8 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 9 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 10 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 11 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 12 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 13 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 14 * LONGSIZE)(\dst) + LONG_S \val, (\offset + 15 * LONGSIZE)(\dst) +#endif + .endm + +/* + * mips_init_icache(uint PRId, ulong icache_size, unchar icache_linesz) + */ +LEAF(mips_init_icache) + blez a1, 9f + mtc0 zero, CP0_TAGLO + /* clear tag to invalidate */ + PTR_LI t0, INDEX_BASE + PTR_ADDU t1, t0, a1 +1: cache_op Index_Store_Tag_I t0 + PTR_ADDU t0, a2 + bne t0, t1, 1b + /* fill once, so data field parity is correct */ + PTR_LI t0, INDEX_BASE +2: cache_op Fill t0 + PTR_ADDU t0, a2 + bne t0, t1, 2b + /* invalidate again - prudent but not strictly neccessary */ + PTR_LI t0, INDEX_BASE +1: cache_op Index_Store_Tag_I t0 + PTR_ADDU t0, a2 + bne t0, t1, 1b +9: jr ra + END(mips_init_icache) + +/* + * mips_init_dcache(uint PRId, ulong dcache_size, unchar dcache_linesz) + */ +LEAF(mips_init_dcache) + blez a1, 9f + mtc0 zero, CP0_TAGLO + /* clear all tags */ + PTR_LI t0, INDEX_BASE + PTR_ADDU t1, t0, a1 +1: cache_op Index_Store_Tag_D t0 + PTR_ADDU t0, a2 + bne t0, t1, 1b + /* load from each line (in cached space) */ + PTR_LI t0, INDEX_BASE +2: LONG_L zero, 0(t0) + PTR_ADDU t0, a2 + bne t0, t1, 2b + /* clear all tags */ + PTR_LI t0, INDEX_BASE +1: cache_op Index_Store_Tag_D t0 + PTR_ADDU t0, a2 + bne t0, t1, 1b +9: jr ra + END(mips_init_dcache) + +/* + * mips_cache_reset - low level initialisation of the primary caches + * + * This routine initialises the primary caches to ensure that they have good + * parity. It must be called by the ROM before any cached locations are used + * to prevent the possibility of data with bad parity being written to memory. + * + * To initialise the instruction cache it is essential that a source of data + * with good parity is available. This routine will initialise an area of + * memory starting at location zero to be used as a source of parity. + * + * RETURNS: N/A + * + */ +NESTED(mips_cache_reset, 0, ra) + move RA, ra + li t2, CONFIG_SYS_ICACHE_SIZE + li t3, CONFIG_SYS_DCACHE_SIZE + li t8, CONFIG_SYS_CACHELINE_SIZE + + li v0, MIPS_MAX_CACHE_SIZE + + /* + * Now clear that much memory starting from zero. + */ + PTR_LI a0, CKSEG1 + PTR_ADDU a1, a0, v0 +2: PTR_ADDIU a0, 64 + f_fill64 a0, -64, zero + bne a0, a1, 2b + + /* + * The caches are probably in an indeterminate state, + * so we force good parity into them by doing an + * invalidate, load/fill, invalidate for each line. + */ + + /* + * Assume bottom of RAM will generate good parity for the cache. + */ + + /* + * Initialize the I-cache first, + */ + move a1, t2 + move a2, t8 + PTR_LA v1, mips_init_icache + jalr v1 + + /* + * then initialize D-cache. + */ + move a1, t3 + move a2, t8 + PTR_LA v1, mips_init_dcache + jalr v1 + + jr RA + END(mips_cache_reset) + +/* + * dcache_status - get cache status + * + * RETURNS: 0 - cache disabled; 1 - cache enabled + * + */ +LEAF(dcache_status) + mfc0 t0, CP0_CONFIG + li t1, CONF_CM_UNCACHED + andi t0, t0, CONF_CM_CMASK + move v0, zero + beq t0, t1, 2f + li v0, 1 +2: jr ra + END(dcache_status) + +/* + * dcache_disable - disable cache + * + * RETURNS: N/A + * + */ +LEAF(dcache_disable) + mfc0 t0, CP0_CONFIG + li t1, -8 + and t0, t0, t1 + ori t0, t0, CONF_CM_UNCACHED + mtc0 t0, CP0_CONFIG + jr ra + END(dcache_disable) + +/* + * dcache_enable - enable cache + * + * RETURNS: N/A + * + */ +LEAF(dcache_enable) + mfc0 t0, CP0_CONFIG + ori t0, CONF_CM_CMASK + xori t0, CONF_CM_CMASK + ori t0, CONF_CM_CACHABLE_NONCOHERENT + mtc0 t0, CP0_CONFIG + jr ra + END(dcache_enable) -- Regards, Zhizhou Zhang

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[U-Boot] [Patch 2/17] add mips64/Makefile
by Zhi-zhou Zhang 14 Aug '12

14 Aug '12

diff --git a/arch/mips/cpu/mips64/Makefile b/arch/mips/cpu/mips64/Makefile new file mode 100644 index 0000000..eb8e005 --- /dev/null +++ b/arch/mips/cpu/mips64/Makefile @@ -0,0 +1,48 @@ +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(CPU).o + +START = start.o +SOBJS-y = cache.o +COBJS-y = cpu.o interrupts.o time.o + +SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) +START := $(addprefix $(obj),$(START)) + +all: $(obj).depend $(START) $(LIB) + +$(LIB): $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### -- Regards, Zhizhou Zhang

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[U-Boot] [PATCH] km/ivm: fix string len check to support 7 char board names
by Holger Brunck 14 Aug '12

14 Aug '12

From: Valentin Longchamp <valentin.longchamp(a)keymile.com> The fanless boards now have a 7-digit (XXXXX-F) board name. This triggers a border condition when reading this string in the IVM although this string is smaller than the currenly read string size, but only by 1 character. This patch corrects this by changing the size check condition for string length. Signed-off-by: Valentin Longchamp <valentin.longchamp(a)keymile.com> cc: Wolfgang Denk <wd(a)denx.de> --- board/keymile/common/ivm.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c index 9bc3c21..eaa924f 100644 --- a/board/keymile/common/ivm.c +++ b/board/keymile/common/ivm.c @@ -163,7 +163,7 @@ static int ivm_findinventorystring(int type, if (addr == INVENTORYDATASIZE) { xcode = -1; printf("Error end of string not found\n"); - } else if ((size >= (maxlen - 1)) && + } else if ((size > (maxlen - 1)) && (buf[addr] != '\r')) { xcode = -1; printf("string too long till next CR\n"); -- 1.7.1

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[U-Boot] [PATCH] disk/partition: Fix the depend for all the partitions file
by Zhong Hongbo 14 Aug '12

14 Aug '12

From: Zhong Hongbo <bocui107(a)gmail.com> all the patitions should depend CONFIG_PARTITIONS, no the CONFIG_CMD_$(device). The device symbol may be SATA, SCSI, USB, MMC, SYSTEMACE. Or else when the filesystem command be enabled, But board's configure file can not include any CONFIG_CMD_$(device), The u-boot will fail build. For example: CONFIG_CMD_EXT2 is defined in smdk6400.h, but the boards can not define any disk device. The error of build as following: --- disk/part.c | 21 +++------------------ disk/part_amiga.c | 6 +----- disk/part_dos.c | 7 +------ disk/part_efi.c | 7 +------ disk/part_iso.c | 7 +------ disk/part_mac.c | 7 +------ 6 files changed, 8 insertions(+), 47 deletions(-) diff --git a/disk/part.c b/disk/part.c index 76f3939..d296a55 100644 --- a/disk/part.c +++ b/disk/part.c @@ -34,12 +34,7 @@ #define PRINTF(fmt,args...) #endif -#if (defined(CONFIG_CMD_IDE) || \ - defined(CONFIG_CMD_SATA) || \ - defined(CONFIG_CMD_SCSI) || \ - defined(CONFIG_CMD_USB) || \ - defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) ) +#ifdef CONFIG_PARTITIONS struct block_drvr { char *name; @@ -103,12 +98,7 @@ block_dev_desc_t *get_dev(char* ifname, int dev) } #endif -#if (defined(CONFIG_CMD_IDE) || \ - defined(CONFIG_CMD_SATA) || \ - defined(CONFIG_CMD_SCSI) || \ - defined(CONFIG_CMD_USB) || \ - defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) ) +#ifdef CONFIG_PARTITIONS /* ------------------------------------------------------------------------- */ /* @@ -238,12 +228,7 @@ void dev_print (block_dev_desc_t *dev_desc) } #endif -#if (defined(CONFIG_CMD_IDE) || \ - defined(CONFIG_CMD_SATA) || \ - defined(CONFIG_CMD_SCSI) || \ - defined(CONFIG_CMD_USB) || \ - defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) ) +#ifdef CONFIG_PARTITIONS #if defined(CONFIG_MAC_PARTITION) || \ defined(CONFIG_DOS_PARTITION) || \ diff --git a/disk/part_amiga.c b/disk/part_amiga.c index dc7d462..5df55c8 100644 --- a/disk/part_amiga.c +++ b/disk/part_amiga.c @@ -26,11 +26,7 @@ #include <ide.h> #include "part_amiga.h" -#if defined(CONFIG_CMD_IDE) || \ - defined(CONFIG_CMD_SCSI) || \ - defined(CONFIG_CMD_USB) || \ - defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) +#ifdef CONFIG_PARTITIONS #undef AMIGA_DEBUG diff --git a/disk/part_dos.c b/disk/part_dos.c index a43dd9c..b49ebe2 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -35,12 +35,7 @@ #include <ide.h> #include "part_dos.h" -#if defined(CONFIG_CMD_IDE) || \ - defined(CONFIG_CMD_SATA) || \ - defined(CONFIG_CMD_SCSI) || \ - defined(CONFIG_CMD_USB) || \ - defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) +#ifdef CONFIG_PARTITIONS /* Convert char[4] in little endian format to the host format integer */ diff --git a/disk/part_efi.c b/disk/part_efi.c index 02927a0..22dc0ea 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -37,12 +37,7 @@ #include "part_efi.h" #include <linux/ctype.h> -#if defined(CONFIG_CMD_IDE) || \ - defined(CONFIG_CMD_SATA) || \ - defined(CONFIG_CMD_SCSI) || \ - defined(CONFIG_CMD_USB) || \ - defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) +#ifdef CONFIG_PARTITIONS /* Convert char[2] in little endian format to the host format integer */ diff --git a/disk/part_iso.c b/disk/part_iso.c index 4401790..f929563 100644 --- a/disk/part_iso.c +++ b/disk/part_iso.c @@ -25,12 +25,7 @@ #include <command.h> #include "part_iso.h" -#if defined(CONFIG_CMD_IDE) || \ - defined(CONFIG_CMD_SCSI) || \ - defined(CONFIG_CMD_SATA) || \ - defined(CONFIG_CMD_USB) || \ - defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) +#ifdef CONFIG_PARTITIONS /* #define ISO_PART_DEBUG */ diff --git a/disk/part_mac.c b/disk/part_mac.c index c1afc8c..c3b2aa3 100644 --- a/disk/part_mac.c +++ b/disk/part_mac.c @@ -34,12 +34,7 @@ #include <ide.h> #include "part_mac.h" -#if defined(CONFIG_CMD_IDE) || \ - defined(CONFIG_CMD_SCSI) || \ - defined(CONFIG_CMD_SATA) || \ - defined(CONFIG_CMD_USB) || \ - defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) +#ifdef CONFIG_PARTITIONS /* stdlib.h causes some compatibility problems; should fixe these! -- wd */ #ifndef __ldiv_t_defined -- 1.7.5.4

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[U-Boot] Change console output from DUART to APPUART
by mad mad 14 Aug '12

14 Aug '12

Hi, I'm new to this list and don't know whether this is the right place to ask this question. I have a board nearly equal to the mx28evk, excepting that I need to use AUART3 instead of DUART for the console output. My idea was to simply to change CONFIG_PL01x_PORTS in the board configuration from MXS_UARTDBG_BASE to MXS_UARTAPP3_BASE and keep the CONFIG_CONS_INDEX at 0. But this isn't working. Now, i have no idea how to continue. I searched the documentation, the source code and the internet for days, but I can't find any useful solution. Maybe someone can give me a clue how to solve this issue. Thanks! Matt

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[U-Boot] Commit 8b5a02640adf77301f943e8754992c50df004e8a breaks about 20 ARM builds
by Albert ARIBAUD 14 Aug '12

14 Aug '12

Hi all, I have encountered an issue when rebasing the ARM tree above u-boot/master, with this commit : 8b5a02640adf77301f943e8754992c50df004e8a It seems to break about 20 ARM builds, for instance spear600, on my stock Ubuntu 12.04 ARM gcc: uboot@lilith:~/src/u-boot-arm$ git checkout 8b5a02640adf77301f943e8754992c50df004e8a^ Previous HEAD position was 8b5a026... Makefile: cosmetic: optimize usage of LIBS-y HEAD is now at f52d7b3... Makefile: replace LIBS by LIBS-y uboot@lilith:~/src/u-boot-arm$ LANG=C ./MAKEALL spear600 Configuring for spear600 - Board: spear6xx_evb, Options: spear600 text data bss dec hex filename 190670 8604 21924 221198 3600e ./u-boot --------------------- SUMMARY ---------------------------- Boards compiled: 1 ---------------------------------------------------------- uboot@lilith:~/src/u-boot-arm$ git checkout 8b5a02640adf77301f943e8754992c50df004e8a Previous HEAD position was f52d7b3... Makefile: replace LIBS by LIBS-y HEAD is now at 8b5a026... Makefile: cosmetic: optimize usage of LIBS-y uboot@lilith:~/src/u-boot-arm$ LANG=C ./MAKEALL spear600 Configuring for spear600 - Board: spear6xx_evb, Options: spear600 make: *** [u-boot] Error 139 arm-linux-gnueabi-size: ./u-boot: File format not recognized arch/arm/cpu/arm926ejs/start.o: In function `flush_dcache': /home/uboot/src/u-boot-arm/arch/arm/cpu/arm926ejs/start.S:393: undefined reference to `lowlevel_init' arch/arm/lib/libarm.o: In function `board_init_r': /home/uboot/src/u-boot-arm/arch/arm/lib/board.c:585: undefined reference to `misc_init_r' arch/arm/lib/libarm.o:(.data+0x4): undefined reference to `board_early_init_f' arch/arm/lib/libarm.o:(.data+0x28): undefined reference to `dram_init' board/spear/spear600/libspear600.o: In function `board_init': /home/uboot/src/u-boot-arm/board/spear/spear600/spear600.c:38: undefined reference to `spear_board_init' arm-linux-gnueabi-ld: BFD (GNU Binutils for Ubuntu) 2.22 assertion fail ../../bfd/elf32-arm.c:13830 /bin/bash: line 1: 10706 Segmentation fault (core dumped) arm-linux-gnueabi-ld -pie -T u-boot.lds -Bstatic -Ttext 0x00700000 $UNDEF_SYM arch/arm/cpu/arm926ejs/start.o --start-group api/libapi.o arch/arm/cpu/arm926ejs/libarm926ejs.o arch/arm/cpu/arm926ejs/spear/libspear.o arch/arm/lib/libarm.o common/libcommon.o disk/libdisk.o drivers/bios_emulator/libatibiosemu.o drivers/block/libblock.o drivers/dma/libdma.o drivers/fpga/libfpga.o drivers/gpio/libgpio.o drivers/hwmon/libhwmon.o drivers/i2c/libi2c.o drivers/input/libinput.o drivers/misc/libmisc.o drivers/mmc/libmmc.o drivers/mtd/libmtd.o drivers/mtd/nand/libnand.o drivers/mtd/onenand/libonenand.o drivers/mtd/spi/libspi_flash.o drivers/mtd/ubi/libubi.o drivers/net/libnet.o drivers/net/phy/libphy.o drivers/pci/libpci.o drivers/pcmcia/libpcmcia.o drivers/power/libpower.o drivers/rtc/librtc.o drivers/serial/libserial.o drivers/spi/libspi.o drivers/twserial/libtws.o drivers/usb/eth/libusb_eth.o drivers/usb/gadget/libusb_gadget.o drivers/usb/host/libusb_host.o drivers/usb/musb/libusb_musb.o drivers/usb/phy/libusb_phy.o drivers/usb/ulpi/libusb_ulpi.o drivers/video/libvideo.o drivers/watchdog/libwatchdog.o fs/cramfs/libcramfs.o fs/ext2/libext2fs.o fs/fat/libfat.o fs/fdos/libfdos.o fs/jffs2/libjffs2.o fs/reiserfs/libreiserfs.o fs/ubifs/libubifs.o fs/yaffs2/libyaffs2.o fs/zfs/libzfs.o lib/libfdt/libfdt.o lib/libgeneric.o lib/lzma/liblzma.o lib/lzo/liblzo.o lib/zlib/libz.o net/libnet.o post/libpost.o test/libtest.o board/spear/spear600/libspear600.o --end-group /home/uboot/src/u-boot-arm/arch/arm/lib/eabi_compat.o -L /usr/lib/gcc/arm-linux-gnueabi/4.6 -lgcc -Map u-boot.map -o u-boot make: *** [u-boot] Error 139 --------------------- SUMMARY ---------------------------- Boards compiled: 1 Boards with errors: 1 ( spear600 ) ---------------------------------------------------------- Daniel, can you please investigate this? Amicalement, -- Albert.

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[U-Boot] [PATCH] arm: Remove additional config flags
by Michal Simek 14 Aug '12

14 Aug '12

These options are just duplicated from arch/arm/cpu/armv7/config.mk Signed-off-by: Michal Simek <monstr(a)monstr.eu> --- arch/arm/cpu/armv7/highbank/config.mk | 1 - arch/arm/cpu/armv7/omap-common/config.mk | 9 --------- 2 files changed, 0 insertions(+), 10 deletions(-) delete mode 100644 arch/arm/cpu/armv7/highbank/config.mk diff --git a/arch/arm/cpu/armv7/highbank/config.mk b/arch/arm/cpu/armv7/highbank/config.mk deleted file mode 100644 index 935a147..0000000 --- a/arch/arm/cpu/armv7/highbank/config.mk +++ /dev/null @@ -1 +0,0 @@ -PLATFORM_CPPFLAGS += -march=armv7-a diff --git a/arch/arm/cpu/armv7/omap-common/config.mk b/arch/arm/cpu/armv7/omap-common/config.mk index c400dcc..217fc14 100644 --- a/arch/arm/cpu/armv7/omap-common/config.mk +++ b/arch/arm/cpu/armv7/omap-common/config.mk @@ -20,15 +20,6 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float # Make ARMv5 to allow more compilers to work, even though its v7a. PLATFORM_CPPFLAGS += -march=armv5 -# ========================================================================= -# -# Supply options according to compiler version -# -# ========================================================================= -PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,\ - $(call cc-option,-malignment-traps,)) -PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT) -- 1.7.0.4

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[U-Boot] [PATCH 4/4] mxc_spi: apply new mxc_spi version configs to other soc configs
by Terry Lv 14 Aug '12

14 Aug '12

Apply new mxc_spi version configs to other soc configs. Signed-off-by: Terry Lv <r65388(a)freescale.com> --- arch/arm/include/asm/arch-mx31/imx-regs.h | 4 ++++ include/configs/efikamx.h | 4 ++++ include/configs/flea3.h | 3 +++ include/configs/imx31_litekit.h | 5 +++++ include/configs/imx31_phycore.h | 4 ++++ include/configs/mx31ads.h | 4 ++++ include/configs/mx31pdk.h | 4 ++++ include/configs/mx35pdk.h | 8 +++++++- include/configs/mx51evk.h | 4 ++++ include/configs/qong.h | 4 ++++ include/configs/tt01.h | 5 +++++ 11 files changed, 48 insertions(+), 1 deletions(-) diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h index 0147920..4f9c78c 100644 --- a/arch/arm/include/asm/arch-mx31/imx-regs.h +++ b/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -24,6 +24,10 @@ #ifndef __ASM_ARCH_MX31_IMX_REGS_H #define __ASM_ARCH_MX31_IMX_REGS_H +#define CSPI1_BASE_ADDR 0x43fa4000 +#define CSPI2_BASE_ADDR 0x50010000 +#define CSPI3_BASE_ADDR 0x53f84000 + #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) #include <asm/types.h> diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h index a07c8b5..1fe558d 100644 --- a/include/configs/efikamx.h +++ b/include/configs/efikamx.h @@ -99,6 +99,10 @@ #define CONFIG_HARD_SPI #define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_2_3 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) diff --git a/include/configs/flea3.h b/include/configs/flea3.h index d88c578..0d85ed5 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -71,6 +71,9 @@ #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SLAVE 0xfe #define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_0_7 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR #define CONFIG_MXC_GPIO /* diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h index 1455ea2..d213ed0 100644 --- a/include/configs/imx31_litekit.h +++ b/include/configs/imx31_litekit.h @@ -69,6 +69,11 @@ #define CONFIG_HARD_SPI 1 #define CONFIG_MXC_SPI 1 +#define CONFIG_SPI_VER_0_5 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR + #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h index 1b75197..f7c2e2d 100644 --- a/include/configs/imx31_phycore.h +++ b/include/configs/imx31_phycore.h @@ -213,6 +213,10 @@ #define CONFIG_HARD_SPI #define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_0_5 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR #define CONFIG_CMD_SPI #define CONFIG_S6E63D6 diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h index 7e011ae..eff70de 100644 --- a/include/configs/mx31ads.h +++ b/include/configs/mx31ads.h @@ -65,6 +65,10 @@ #define CONFIG_HARD_SPI 1 #define CONFIG_MXC_SPI 1 +#define CONFIG_SPI_VER_0_5 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) #define CONFIG_MXC_GPIO diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 4253c3e..8210f97 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -67,6 +67,10 @@ #define CONFIG_HARD_SPI #define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_0_5 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index 32ed609..26eb1d5 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -62,9 +62,15 @@ #define CONFIG_SYS_I2C_MX35_PORT1 #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SLAVE 0xfe -#define CONFIG_MXC_SPI #define CONFIG_MXC_GPIO +/* + * SPI Configs + */ +#define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_0_7 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR /* * PMIC Configs diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 7c7544f..0c23d04 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -68,6 +68,10 @@ #define CONFIG_CMD_SPI #define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_2_3 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR /* PMIC Controller */ #define CONFIG_PMIC diff --git a/include/configs/qong.h b/include/configs/qong.h index 3346802..d2bc39d 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -56,6 +56,10 @@ #define CONFIG_HW_WATCHDOG #define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_0_5 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) #define CONFIG_RTC_MC13XXX diff --git a/include/configs/tt01.h b/include/configs/tt01.h index 6ef25cd..1de0f10 100644 --- a/include/configs/tt01.h +++ b/include/configs/tt01.h @@ -151,6 +151,11 @@ #define CONFIG_SYS_MX31_UART2 #define CONFIG_MXC_SPI +#define CONFIG_SPI_VER_0_5 1 +#define CONFIG_CSPI1_BASE_ADDR CSPI1_BASE_ADDR +#define CONFIG_CSPI2_BASE_ADDR CSPI2_BASE_ADDR +#define CONFIG_CSPI3_BASE_ADDR CSPI3_BASE_ADDR + #define CONFIG_MXC_GPIO /* MC13783 connected to CSPI3 and SS0 */ -- 1.7.0.4

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[U-Boot] [PATCH 3/4] mxc_spi: change to use version config instead of soc config in mxc_spi
by Terry Lv 14 Aug '12

14 Aug '12

In mxc_spi, we used to use soc config, e.g. CONFIG_MX35, CONFIG_MX51. In this way, we can't exlain the difference of spi in each soc and we need to modify the driver for each new soc. Thus, now it use spi version config which can be found in reference manual to diff. And new soc just need to add spi version config in config files to enable it. it would be eaiser than before. Signed-off-by: Terry Lv <r65388(a)freescale.com> --- README | 4 ++- drivers/spi/mxc_spi.c | 59 ++++++++++++++++++++++++------------------------- 2 files changed, 32 insertions(+), 31 deletions(-) mode change 100644 => 100755 drivers/spi/mxc_spi.c diff --git a/README b/README index 07f1d11..19268d9 100644 --- a/README +++ b/README @@ -1910,7 +1910,9 @@ The following options need to be configured: CONFIG_MXC_SPI Enables the driver for the SPI controllers on i.MX and MXC - SoCs. Currently i.MX31/35/51 are supported. + SoCs. The board must also define the version of SPI controller + and SPI base addresses that will be used. + Currently i.MX31/35/51/53 are supported. - FPGA Support: CONFIG_FPGA diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c old mode 100644 new mode 100755 index 2fa7486..2f48483 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -27,14 +27,12 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h> -#ifdef CONFIG_MX27 -/* i.MX27 has a completely wrong register layout and register definitions in the - * datasheet, the correct one is in the Freescale's Linux driver */ +#if defined(CONFIG_SPI_VER_0_4) || defined(CONFIG_SPI_VER_0_0) -#error "i.MX27 CSPI not supported due to drastic differences in register definitions" \ +#error "CSPI version not supported due to drastic differences in register definitions" \ "See linux mxc_spi driver from Freescale for details." -#elif defined(CONFIG_MX31) +#elif defined(CONFIG_SPI_VER_0_5) #define MXC_CSPICTRL_EN (1 << 0) #define MXC_CSPICTRL_MODE (1 << 1) @@ -54,13 +52,7 @@ #define MXC_CSPIPERIOD_32KHZ (1 << 15) #define MAX_SPI_BYTES 4 -static unsigned long spi_bases[] = { - 0x43fa4000, - 0x50010000, - 0x53f84000, -}; - -#elif defined(CONFIG_MX51) +#elif defined(CONFIG_SPI_VER_2_3) #define MXC_CSPICTRL_EN (1 << 0) #define MXC_CSPICTRL_MODE (1 << 1) @@ -85,13 +77,7 @@ static unsigned long spi_bases[] = { #define MXC_CSPICON_PHA 0 #define MXC_CSPICON_SSPOL 12 -static unsigned long spi_bases[] = { - CSPI1_BASE_ADDR, - CSPI2_BASE_ADDR, - CSPI3_BASE_ADDR, -}; - -#elif defined(CONFIG_MX35) +#elif defined(CONFIG_SPI_VER_0_7) #define MXC_CSPICTRL_EN (1 << 0) #define MXC_CSPICTRL_MODE (1 << 1) @@ -111,15 +97,28 @@ static unsigned long spi_bases[] = { #define MXC_CSPIPERIOD_32KHZ (1 << 15) #define MAX_SPI_BYTES 4 -static unsigned long spi_bases[] = { - 0x43fa4000, - 0x50010000, -}; - #else -#error "Unsupported architecture" +#error "Unsupported cspi version" #endif +static unsigned long spi_bases[] = { +#ifdef CONFIG_CSPI1_BASE_ADDR + CONFIG_CSPI1_BASE_ADDR, +#endif +#ifdef CONFIG_CSPI2_BASE_ADDR + CONFIG_CSPI2_BASE_ADDR, +#endif +#ifdef CONFIG_CSPI3_BASE_ADDR + CONFIG_CSPI3_BASE_ADDR, +#endif +#ifdef CONFIG_CSPI4_BASE_ADDR + CONFIG_CSPI4_BASE_ADDR, +#endif +#ifdef CONFIG_CSPI5_BASE_ADDR + CONFIG_CSPI5_BASE_ADDR, +#endif +}; + #define OUT MXC_GPIO_DIRECTION_OUT #define reg_read readl @@ -129,7 +128,7 @@ struct mxc_spi_slave { struct spi_slave slave; unsigned long base; u32 ctrl_reg; -#if defined(CONFIG_MX51) +#if defined(CONFIG_SPI_VER_2_3) u32 cfg_reg; #endif int gpio; @@ -167,7 +166,7 @@ u32 get_cspi_div(u32 div) return i; } -#if defined(CONFIG_MX31) || defined(CONFIG_MX35) +#if defined(CONFIG_SPI_VER_0_5) || defined(CONFIG_SPI_VER_0_7) static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, unsigned int max_hz, unsigned int mode) { @@ -187,7 +186,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, MXC_CSPICTRL_BITCOUNT(MXC_CSPICTRL_MAXBITS) | MXC_CSPICTRL_DATARATE(div) | MXC_CSPICTRL_EN | -#ifdef CONFIG_MX35 +#ifdef CONFIG_SPI_VER_0_7 MXC_CSPICTRL_SSCTL | #endif MXC_CSPICTRL_MODE; @@ -204,7 +203,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, } #endif -#if defined(CONFIG_MX51) +#if defined(CONFIG_SPI_VER_2_3) static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, unsigned int max_hz, unsigned int mode) { @@ -316,7 +315,7 @@ int spi_xchg_single(struct spi_slave *slave, unsigned int bitlen, MXC_CSPICTRL_BITCOUNT(bitlen - 1); reg_write(&regs->ctrl, mxcs->ctrl_reg | MXC_CSPICTRL_EN); -#ifdef CONFIG_MX51 +#ifdef CONFIG_SPI_VER_2_3 reg_write(&regs->cfg, mxcs->cfg_reg); #endif -- 1.7.0.4

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