May 2012 - U-Boot

[U-Boot] [PATCH 1/2] ARM: omap3: Set SPL stack size to 8KB, image to 54KB.
by Tom Rini 09 May '12

09 May '12

With older toolchains it is possible to not fit entirely into the 45KB that we had assigned to SPL. Adjust to allow for 8KB of stack (which should be more than required) and 54KB of text/data. Cc: Vaibhav Hiremath <hvaibhav(a)ti.com> Cc: Nagendra T S <nagendra(a)mistralsolutions.com> Cc: Thomas Weber <weber(a)corscience.de> Cc: Ilya Yanok <yanok(a)emcraft.com> Cc: Steve Sakoman <sakoman(a)gmail.com> Cc: Stefano Babic <sbabic(a)denx.de> Signed-off-by: Tom Rini <trini(a)ti.com> --- doc/SPL/README.omap3 | 4 ++-- include/configs/am3517_crane.h | 2 +- include/configs/am3517_evm.h | 2 +- include/configs/devkit8000.h | 2 +- include/configs/mcx.h | 2 +- include/configs/omap3_beagle.h | 2 +- include/configs/omap3_evm_common.h | 2 +- include/configs/omap3_overo.h | 2 +- include/configs/tam3517-common.h | 2 +- include/configs/tricorder.h | 2 +- 10 files changed, 11 insertions(+), 11 deletions(-) diff --git a/doc/SPL/README.omap3 b/doc/SPL/README.omap3 index cc5d5c0..a543e65 100644 --- a/doc/SPL/README.omap3 +++ b/doc/SPL/README.omap3 @@ -34,14 +34,14 @@ DDR1: 0x80000000 - 0xBFFFFFFF Option 1 (SPL only): 0x40200800 - 0x4020BBFF: Area for SPL text, data and rodata -0x4020BC00 - 0x4020FFFC: Area for the SPL stack. +0x4020E000 - 0x4020FFFC: Area for the SPL stack. 0x80000000 - 0x8007FFFF: Area for the SPL BSS. 0x80100000: CONFIG_SYS_TEXT_BASE of U-Boot 0x80208000 - 0x80307FFF: malloc() pool available to SPL. Option 2 (SPL or X-Loader): 0x40200800 - 0x4020BBFF: Area for SPL text, data and rodata -0x4020BC00 - 0x4020FFFC: Area for the SPL stack. +0x4020E000 - 0x4020FFFC: Area for the SPL stack. 0x80008000: CONFIG_SYS_TEXT_BASE of U-Boot 0x87000000 - 0x8707FFFF: Area for the SPL BSS. 0x87080000 - 0x870FFFFF: malloc() pool available to SPL. diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index b0dd2f0..9843eae 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -326,7 +326,7 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (45 * 1024) +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000000 diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index b5f75d1..49e665d 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -326,7 +326,7 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (45 * 1024) +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000000 diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index eb7c376..248a5b2 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -324,7 +324,7 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */ +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/ diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 1315c3c..fd6a435 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -327,7 +327,7 @@ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE (45 << 10) +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK /* move malloc and bss high to prevent clashing with the main image */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index ddeb414..6bdc2c3 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -399,7 +399,7 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (45 * 1024) +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000000 diff --git a/include/configs/omap3_evm_common.h b/include/configs/omap3_evm_common.h index 4910dda..47ebbef 100644 --- a/include/configs/omap3_evm_common.h +++ b/include/configs/omap3_evm_common.h @@ -282,7 +282,7 @@ /* Defines for SPL */ #define CONFIG_SPL #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (45 * 1024) /* 45 KB */ +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000000 diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 64adc74..b0d144f 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -303,7 +303,7 @@ #define CONFIG_SPL #define CONFIG_SPL_NAND_SIMPLE #define CONFIG_SPL_TEXT_BASE 0x40200800 -#define CONFIG_SPL_MAX_SIZE (45 * 1024) +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK /* move malloc and bss high to prevent clashing with the main image */ diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index 4c4321d..de10f4f 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -258,7 +258,7 @@ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE (45 << 10) /* 45 K */ +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 801a24f..ab911aa 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -293,7 +293,7 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ -#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */ +#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK #define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/ -- 1.7.9.5

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[U-Boot] [PATCH] OMAP4/5: Change omap4_sdp, omap4_panda, omap5_evm maintainer
by R Sricharan 09 May '12

09 May '12

Signed-off-by: R Sricharan <r.sricharan(a)ti.com> CC: Aneesh V <aneesh(a)ti.com> CC: Tom Rini <trini(a)ti.com> --- MAINTAINERS | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index e2441d8..71e6bb5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -788,6 +788,12 @@ Stelian Pop <stelian(a)popies.net> at91sam9263ek ARM926EJS (AT91SAM9263 SoC) at91sam9rlek ARM926EJS (AT91SAM9RL SoC) +Sricharan R <r.sricharan(a)ti.com> + + omap4_panda ARM ARMV7 (OMAP4xx SoC) + omap4_sdp4430 ARM ARMV7 (OMAP4xx SoC) + omap5_evm ARM ARMV7 (OMAP5xx Soc) + Thierry Reding <thierry.reding(a)avionic-design.de> plutux Tegra2 (ARM7 & A9 Dual Core) @@ -860,12 +866,6 @@ Greg Ungerer <greg.ungerer(a)opengear.com> cm4116 ks8695p cm4148 ks8695p -Aneesh V <aneesh(a)ti.com> - - omap4_panda ARM ARMV7 (OMAP4xx SoC) - omap4_sdp4430 ARM ARMV7 (OMAP4xx SoC) - omap5_evm ARM ARMV7 (OMAP5xx Soc) - Marek Vasut <marek.vasut(a)gmail.com> balloon3 xscale/pxa -- 1.7.1

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[U-Boot] LCD Support on mx51 vision2
by Fabio Estevam 09 May '12

09 May '12

Hi, Could anyone confirm that LCD support is functional on top-of-tree U-boot for mx51 vision2 board? I am working on adding LCD support for mx51evk and I am getting the following error from mxcfb_map_video_memory: U-Boot 2012.04.01-00075-g6efea73-dirty (May 08 2012 - 14:40:01) CPU: Freescale i.MX51 rev3.0 at 800 MHz Reset cause: POR Board: MX51EVK DRAM: 512 MiB WARNING: Caches not enabled MMC: FSL_SDHC: 0, FSL_SDHC: 1 Unable to allocate framebuffer memory Regards, Fabio Estevam

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Re: [U-Boot] [PATCH 4/4] mx53loco: Add CONFIG_REVISION_TAG
by Stefano Babic 09 May '12

09 May '12

On 09/05/2012 13:41, Liu Hui-R64343 wrote: >> -----Original Message----- >> From: Fabio Estevam [mailto:festevam@gmail.com] >> Sent: Wednesday, May 09, 2012 7:21 PM >> To: Liu Hui-R64343 >> Cc: u-boot(a)lists.denx.de; sbabic(a)denx.de; Estevam Fabio-R49496 >> Subject: Re: [PATCH 4/4] mx53loco: Add CONFIG_REVISION_TAG >> >> On Wed, May 9, 2012 at 6:15 AM, Liu Hui-R64343 <r64343(a)freescale.com> >> wrote: >> >>> As you said, could you please use accessor for it? >> >> Yes, I did it in v2: >> http://git.denx.de/?p=u-boot/u-boot- >> imx.git;a=commitdiff;h=b9e28549a2b5c8a2d7d6d6238bd0a64e5730c7cc;hp=9 >> b07d877120f9d1a575df14a101966e04867d0b7 > > OK, Stefano, you may need pick up this v2 patch. This is was I already did - V2 is on u-boot-imx Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic(a)denx.de =====================================================================

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[U-Boot] [PATCH 1/3] pmic: dialog: Avoid name conflicts
by Fabio Estevam 09 May '12

09 May '12

From: Fabio Estevam <fabio.estevam(a)freescale.com> As mx53loco board has two variants: one with Dialog PMIC and another with FSL MC34708 PMIC, we need to be able to build both drivers. Change pmic_init() and PMIC_NUM_OF_REGS names to avoid build conflicts when both drivers are present. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- board/freescale/mx53loco/mx53loco.c | 2 +- drivers/misc/pmic_dialog.c | 4 ++-- include/dialog_pmic.h | 2 +- include/pmic.h | 1 + 4 files changed, 5 insertions(+), 4 deletions(-) diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index 0dcec9b..7ed5c4e 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -322,7 +322,7 @@ static int power_init(void) unsigned int val, ret; struct pmic *p; - pmic_init(); + pmic_dialog_init(); p = get_pmic(); /* Set VDDA to 1.25V */ diff --git a/drivers/misc/pmic_dialog.c b/drivers/misc/pmic_dialog.c index 7242073..e97af1d 100644 --- a/drivers/misc/pmic_dialog.c +++ b/drivers/misc/pmic_dialog.c @@ -20,13 +20,13 @@ #include <pmic.h> #include <dialog_pmic.h> -int pmic_init(void) +int pmic_dialog_init(void) { struct pmic *p = get_pmic(); static const char name[] = "DIALOG_PMIC"; p->name = name; - p->number_of_regs = PMIC_NUM_OF_REGS; + p->number_of_regs = DIALOG_NUM_OF_REGS; p->interface = PMIC_I2C; p->hw.i2c.addr = CONFIG_SYS_DIALOG_PMIC_I2C_ADDR; diff --git a/include/dialog_pmic.h b/include/dialog_pmic.h index b0925f5..8d43585 100644 --- a/include/dialog_pmic.h +++ b/include/dialog_pmic.h @@ -164,7 +164,7 @@ enum { DA9053_GPID7_REG, DA9053_GPID8_REG, DA9053_GPID9_REG, - PMIC_NUM_OF_REGS, + DIALOG_NUM_OF_REGS, }; #define DA_BUCKCORE_VBCORE_1_250V 0x1E diff --git a/include/pmic.h b/include/pmic.h index 52a1526..6a05b40 100644 --- a/include/pmic.h +++ b/include/pmic.h @@ -55,6 +55,7 @@ struct pmic { }; int pmic_init(void); +int pmic_dialog_init(void); int check_reg(u32 reg); struct pmic *get_pmic(void); int pmic_probe(struct pmic *p); -- 1.7.1

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[U-Boot] [PATCH] common/cmd_bootm.c: Fix GCC 4.6 warnings
by Stefano Babic 09 May '12

09 May '12

cmd_bootm.c: In function 'do_bootz': cmd_bootm.c:1590:9: warning: variable 'iflag' set but not used [-Wunused-but-set-variable] Signed-off-by: Stefano Babic <sbabic(a)denx.de> --- common/cmd_bootm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 5685232..c574ce0 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -1587,7 +1587,7 @@ static int bootz_start(cmd_tbl_t *cmdtp, int flag, int argc, static int do_bootz(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - ulong iflag; + __maybe_unused ulong iflag; bootm_headers_t images; if (bootz_start(cmdtp, flag, argc, argv, &images)) -- 1.7.9.5

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[U-Boot] [PATCH] MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged
by Stefano Babic 09 May '12

09 May '12

After an update to the MX51 reference manual (Rev. 5), the values of the PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH are now clearly wrong: "Bit 13: High / Low Output Voltage Range. This bit selects the output voltage mode for SD2_CMD. 0 High output voltage mode 1 Low output voltage mode" The values are currently negated in code - fixed. Reported-by: David Jander <david.jander(a)protonic.nl> Signed-off-by: Stefano Babic <sbabic(a)denx.de> CC: Marek Vasut <marek.vasut(a)gmail.com> CC: David Jander <david.jander(a)protonic.nl> --- arch/arm/include/asm/arch-mx5/iomux.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-mx5/iomux.h b/arch/arm/include/asm/arch-mx5/iomux.h index 760371b..e3765a3 100644 --- a/arch/arm/include/asm/arch-mx5/iomux.h +++ b/arch/arm/include/asm/arch-mx5/iomux.h @@ -66,8 +66,8 @@ typedef enum iomux_pad_config { PAD_CTL_HYS_ENABLE = 0x1 << 8, /* Hysteresis enabled */ PAD_CTL_DDR_INPUT_CMOS = 0x0 << 9,/* DDR input CMOS */ PAD_CTL_DDR_INPUT_DDR = 0x1 << 9,/* DDR input DDR */ - PAD_CTL_DRV_VOT_LOW = 0x0 << 13, /* Low voltage mode */ - PAD_CTL_DRV_VOT_HIGH = 0x1 << 13,/* High voltage mode */ + PAD_CTL_DRV_VOT_LOW = 0x1 << 13, /* Low voltage mode */ + PAD_CTL_DRV_VOT_HIGH = 0x0 << 13,/* High voltage mode */ } iomux_pad_config_t; /* various IOMUX input functions */ -- 1.7.9.5

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[U-Boot] [resent] New chapter in i.MX51 datasheet an issue?
by David Jander 09 May '12

09 May '12

Hi all, I discovered a bug in u-boot, that got evident after Freescale updated the i.MX51 datasheets to revision 5 in March this year. I don't know if it is a serious problem or not, but if I believe the wording of the datasheet many of the boards that use a i.MX51 processor and running u-boot as of latest git, can potentially suffer "permanent damage", whatever that means. I am referring to the new paragraphs at the end of chapter 4.3.4 of the datasheet, and the wrong interpretation of the meaning of the HVE bit in the iomuxc.h header file of u-boot here: arch/arm/include/asm/arch-mx5/iomux.h: ... 69 PAD_CTL_DRV_VOT_LOW = 0x0 << 13, /* Low voltage mode */ 70 PAD_CTL_DRV_VOT_HIGH = 0x1 << 13,/* High voltage mode */ ... According to the reference manual, the correct meaning of this bit is negated: "Bit 13: High / Low Output Voltage Range. This bit selects the output voltage mode for SD2_CMD. 0 High output voltage mode 1 Low output voltage mode" Added to the new paragraph in the datasheet: "The UHVIO type of I/O cells have to be configured properly according to their supply voltage level, in order to prevent permanent damage to them and in order to not degrade their timing performance." Seems like we may have a problem here! I would like to know if anyone is aware of this? Does anyone know of a board that is actually destroyed this way? Best regards, -- David Jander Protonic Holland.

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[U-Boot] [PATCH v2 1/2] spi: mxs: Introduce spi_cs_is_valid()
by Fabio Estevam 09 May '12

09 May '12

Introduce spi_cs_is_valid() for validating spi bus and chip select numbers. Signed-off-by: Fabio Estevam <fabio.estevam(a)freescale.com> --- Changes since v1: - Newly introduced in v2 drivers/spi/mxs_spi.c | 13 +++++++++++-- 1 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c index 4e6f14e..e7237e7 100644 --- a/drivers/spi/mxs_spi.c +++ b/drivers/spi/mxs_spi.c @@ -51,14 +51,23 @@ void spi_init(void) { } +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + /* MXS SPI: 4 ports and 3 chip selects maximum */ + if (bus > 3 || cs > 2) + return 0; + else + return 1; +} + struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode) { struct mxs_spi_slave *mxs_slave; uint32_t addr; - if (bus > 3) { - printf("MXS SPI: Max bus number is 3\n"); + if (!spi_cs_is_valid(bus, cs)) { + printf("mxs_spi: invalid bus %d / chip select %d\n", bus, cs); return NULL; } -- 1.7.1

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[U-Boot] [PATCH] mxs-i2c: Fix internal address byte order
by Torsten Fleischer 09 May '12

09 May '12

Large EEPROMs, e.g. 24lc32, need 2 byte to address the internal memory. These devices require that the high byte of the internal address has to be written first. The mxs_i2c driver currently writes the address' low byte first. The following patch fixes the byte order of the internal address that should be written to the I2C device. Signed-off-by: Torsten Fleischer <to-fleischer(a)t-online.de> CC: Marek Vasut <marex(a)denx.de> CC: Stefano Babic <sbabic(a)denx.de> CC: Fabio Estevam <fabio.estevam(a)freescale.com> --- drivers/i2c/mxs_i2c.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c index c8fea32..48aaaa6 100644 --- a/drivers/i2c/mxs_i2c.c +++ b/drivers/i2c/mxs_i2c.c @@ -97,7 +97,7 @@ void mxs_i2c_write(uchar chip, uint addr, int alen, for (i = 0; i < alen; i++) { data >>= 8; - data |= ((char *)&addr)[i] << 24; + data |= ((char *)&addr)[alen - i - 1] << 24; if ((i & 3) == 2) writel(data, &i2c_regs->hw_i2c_data); } -- 1.7.7

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