October 2012 - U-Boot

[U-Boot] [PATCH v7] qi_lb60: add nand spl support
by xiangfu＠openmobilefree.net 08 Jan '13

08 Jan '13

From: Xiangfu <xiangfu(a)openmobilefree.net> Big thanks to Tom Rini, Daniel Schwierzeck and Marek Vasut for feedback. For the usbboot code. I can not fast re-write them to u-boot USB sub-system. but I don't want wait. so let's finish the nand spl code first. :) V7: * fix typo V6: * remove usbboot code * add u-boot-xburst.bin rule to main Makefile V5: * use puts instread of serial_puts (enable CONFIG_SPL_LIBCOMMON_SUPPORT) * update my email address * fix compiles warnings V4: * split to 2 patches (nand spl/usbbot) * remove use define string.c using CONFIG_SPL_LIBGENERIC_SUPPORT * fix checkputch.pl warnings V3: * add simpile string.c to mips/lib * some cleanup on jz4740.c * move to new spl/ structure * support software usbboot mode Xiangfu (1): qi_lb60: add nand spl support Makefile | 12 +++ arch/mips/cpu/xburst/Makefile | 7 +- arch/mips/cpu/xburst/cpu.c | 4 + arch/mips/cpu/xburst/jz4740.c | 82 +++++++---------- arch/mips/cpu/xburst/spl/Makefile | 47 ++++++++++ arch/mips/cpu/xburst/spl/start.S | 63 +++++++++++++ board/qi/qi_lb60/Makefile | 4 + board/qi/qi_lb60/qi_lb60-spl.c | 30 +++++++ board/qi/qi_lb60/qi_lb60.c | 8 +- board/qi/qi_lb60/u-boot-spl.lds | 61 +++++++++++++ drivers/mtd/nand/jz4740_nand.c | 39 ++++++++- include/configs/qi_lb60.h | 175 ++++++++++++++++++------------------- 12 files changed, 386 insertions(+), 146 deletions(-) create mode 100644 arch/mips/cpu/xburst/spl/Makefile create mode 100644 arch/mips/cpu/xburst/spl/start.S create mode 100644 board/qi/qi_lb60/qi_lb60-spl.c create mode 100644 board/qi/qi_lb60/u-boot-spl.lds -- 1.7.9.5

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[U-Boot] [PATCH 1/2] video:cache:fix: Buffer alignment and dcache flush for lcd subsystem
by Lukasz Majewski 07 Jan '13

07 Jan '13

This commit makes the video subsystem code cache aware. Memory allocated for decompressed BMP memory is now cache line aligned. Flushing of the dcache is also performed after copying BMP data to fb address. Signed-off-by: Lukasz Majewski <l.majewski(a)samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park(a)samsung.com> Cc: Anatolij Gustschin <agust(a)denx.de> --- common/cmd_bmp.c | 2 +- common/lcd.c | 3 +++ 2 files changed, 4 insertions(+), 1 deletions(-) diff --git a/common/cmd_bmp.c b/common/cmd_bmp.c index b8809e3..7d3f45a 100644 --- a/common/cmd_bmp.c +++ b/common/cmd_bmp.c @@ -54,7 +54,7 @@ bmp_image_t *gunzip_bmp(unsigned long addr, unsigned long *lenp) * Decompress bmp image */ len = CONFIG_SYS_VIDEO_LOGO_MAX_SIZE; - dst = malloc(CONFIG_SYS_VIDEO_LOGO_MAX_SIZE); + dst = memalign(CONFIG_SYS_CACHELINE_SIZE, len); if (dst == NULL) { puts("Error: malloc in gunzip failed!\n"); return NULL; diff --git a/common/lcd.c b/common/lcd.c index 506a138..b092a11 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -802,6 +802,9 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) } fb -= (lcd_line_length + width * (bpix / 8)); } + flush_dcache_range((unsigned long) fb, + (unsigned long) fb + + (lcd_line_length * height)); break; #endif /* CONFIG_BMP_32BPP */ default: -- 1.7.2.3

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[U-Boot] [PATCH 00/32] Initial sparse fix series
by Kim Phillips 06 Jan '13

06 Jan '13

This 32-patch series only begins to address making u-boot source more 'sparseable,' or sparse-clean, ultimately to catch type, address space, and endianness mismatches and generally improve code quality. E.g., in this initial dose whose main purpose is to reduce the output volume to workable levels, a couple of endianness bugs are found and fixed in of_bus_default_translate() and fdt_get_base_address(). See [PATCH 14/32] common/fdt_support.c: sparse fixes. Patch 1 adds endianness attributes to byteorder.h helpers, e.g., cpu_to_be32(). This is required for correct operation and prevents sparse from emitting false-positives. Patches 2-6 fix issues where u-boot had imported linux header code and the importer simply force-#defined sparse-specific attributes to nothing, to allow u-boot to build. Patches 7-10 are general sparse fixes to common header areas. Patch 11 is too, which also changes the long-standing u-boot image header types to __be32, as per u-boot image definition. Patches 12-14 address further misc. sparse issues in common/. Patches 15-16 do the same for the net subsystem. Patches 17-18 do the same for lib/. Patch 19 for include/fdt.h. Patches 20-23 for Power Arch's mpc8xxx, 83xx, and 85xx subsystems. Last but not least, patches 24-32 attempt to clean up various drivers. Note that there are two libfdt dependencies: 1. commits aa28b89b "libfdt: Add helpers for 64-bit integer properties" and commit 786ed04 "libfdt: Add support for appending the values to a existing property", currently sitting in u-boot-fdt/next. This series is based on today's mainline u-boot/next with those two patches pre-applied. 2. potential upstream dtc change dependencies, due to having to attribute base device tree header types to __be32 in include/libfdt. See patch 19/32 "include/fdt.h: sparse fixes". It is unknown whether such changes would be welcome to dtc (but there's a way to find out :). For authors of new patches not willing to sift through the still quite large sparse output for their board/platform, though interested in what sparse has to say about their new code, it is recommended to build with make C=1 after changes such that sparse output will only include newly built code. For your convenience, I've pushed the series onto the u-boot-mpc83xx tree, 'sparsefixes' branch [1]. The branch includes libfdt dependency #1 mentioned above. Build-tested in both endians :). Please help test. Thanks, Kim [1] see http://git.denx.de/u-boot.git/?p=u-boot/u-boot-mpc83xx.git;a=shortlog;h=ref… Kim Phillips (32): include/linux/byteorder: import latest endian definitions from linux include/linux/compat.h: fix warning: preprocessor token __iomem redefined include/linux/unaligned/generic.h: fix warning: preprocessor token __force redefined include/linux/stddef.h: avoid 'warning: preprocessor token offsetof redefined' arch/powerpc/include/asm/io.h: fix warning: preprocessor token __iomem redefined arch/powerpc/lib/bootm.c: fix noinline attribute arch/powerpc/lib/extable.c: sparse fix arch/powerpc/lib/board.c,*traps.c: sparse fixes include/common.h: sparse fix include/command.h: sparse fix include/image.h: sparse fixes common/cmd_*.c: sparse fixes common/misc: sparse fixes common/fdt_support.c: sparse fixes net/: sparse fixes drivers/net/: sparse fixes lib/zlib: sparse fixes lib/vsprintf.c: sparse fixes include/fdt.h: sparse fixes arch/powerpc/cpu/mpc8xxx/: sparse fixes arch/powerpc/cpu/mpc85xx/fdt.c: sparse fixes powerpc/mpc85xx: sparse fixes powerpc/mpc83xx: sparse fixes drivers/block/: sparse fixes drivers/gpio/mpc83xx_gpio.c: sparse fixes drivers/input/input.c: sparse fix drivers/i2c/fsl_i2c.c: sparse fix drivers/mmc/mmc.c: sparse fixes drivers/mmc/fsl_esdhc.c: sparse fixes drivers/mtd/cfi_flash.c: sparse fixes drivers/mtd/nand: sparse fixes drivers/serial/serial_ns16550.c: sparse fixes arch/powerpc/cpu/74xx_7xx/traps.c | 6 +- arch/powerpc/cpu/mpc512x/traps.c | 6 +- arch/powerpc/cpu/mpc5xx/traps.c | 6 +- arch/powerpc/cpu/mpc5xxx/traps.c | 6 +- arch/powerpc/cpu/mpc8220/traps.c | 6 +- arch/powerpc/cpu/mpc824x/traps.c | 6 +- arch/powerpc/cpu/mpc8260/traps.c | 6 +- arch/powerpc/cpu/mpc83xx/fdt.c | 4 +- arch/powerpc/cpu/mpc83xx/speed.c | 4 +- arch/powerpc/cpu/mpc83xx/traps.c | 6 +- arch/powerpc/cpu/mpc85xx/cpu_init.c | 2 +- arch/powerpc/cpu/mpc85xx/fdt.c | 57 +++++---- arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 2 +- arch/powerpc/cpu/mpc85xx/traps.c | 6 +- arch/powerpc/cpu/mpc86xx/traps.c | 6 +- arch/powerpc/cpu/mpc8xx/traps.c | 6 +- arch/powerpc/cpu/mpc8xxx/cpu.c | 8 +- arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | 2 +- .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c | 4 +- arch/powerpc/cpu/mpc8xxx/fdt.c | 3 +- arch/powerpc/cpu/mpc8xxx/fsl_lbc.c | 2 +- arch/powerpc/cpu/ppc4xx/traps.c | 6 +- arch/powerpc/include/asm/io.h | 1 - arch/powerpc/lib/board.c | 12 +- arch/powerpc/lib/bootm.c | 2 +- arch/powerpc/lib/extable.c | 2 +- board/freescale/common/ngpixis.c | 10 +- board/freescale/mpc8313erdb/mpc8313erdb.c | 24 ++-- board/freescale/mpc8568mds/bcsr.c | 8 +- board/freescale/mpc8569mds/bcsr.c | 8 +- common/cmd_boot.c | 5 +- common/cmd_bootm.c | 27 +++-- common/cmd_console.c | 2 +- common/cmd_date.c | 2 +- common/cmd_echo.c | 2 +- common/cmd_exit.c | 2 +- common/cmd_fat.c | 5 +- common/cmd_fdt.c | 19 +-- common/cmd_flash.c | 6 +- common/cmd_help.c | 2 +- common/cmd_i2c.c | 18 +-- common/cmd_irq.c | 2 +- common/cmd_itest.c | 4 +- common/cmd_load.c | 44 +++---- common/cmd_mdio.c | 20 +-- common/cmd_mem.c | 25 ++-- common/cmd_misc.c | 2 +- common/cmd_mmc.c | 6 +- common/cmd_mp.c | 20 ++- common/cmd_mtdparts.c | 28 +++-- common/cmd_nand.c | 17 +-- common/cmd_net.c | 8 +- common/cmd_nvedit.c | 23 ++-- common/cmd_pci.c | 15 ++- common/cmd_reginfo.c | 3 +- common/cmd_sata.c | 4 +- common/cmd_setexpr.c | 2 +- common/cmd_source.c | 11 +- common/cmd_test.c | 6 +- common/cmd_usb.c | 30 ++--- common/cmd_version.c | 2 +- common/cmd_ximg.c | 11 +- common/command.c | 9 +- common/console.c | 2 +- common/dlmalloc.c | 36 +++--- common/fdt_support.c | 78 ++++++------ common/hush.c | 30 ++--- common/image.c | 8 +- common/main.c | 6 +- common/update.c | 1 + common/usb_storage.c | 20 +-- common/xyzModem.c | 6 +- drivers/block/fsl_sata.c | 79 ++---------- drivers/block/fsl_sata.h | 12 +- drivers/block/sata_sil.c | 13 +- drivers/gpio/mpc83xx_gpio.c | 4 +- drivers/i2c/fsl_i2c.c | 2 +- drivers/input/input.c | 2 +- drivers/mmc/fsl_esdhc.c | 4 +- drivers/mmc/mmc.c | 37 +++--- drivers/mtd/cfi_flash.c | 20 +-- drivers/mtd/nand/nand_base.c | 9 +- drivers/mtd/nand/nand_ecc.c | 1 + drivers/net/fm/eth.c | 2 +- drivers/net/fm/p1023.c | 2 +- drivers/net/fm/p4080.c | 2 +- drivers/net/fm/p5020.c | 2 +- drivers/net/fm/tgec_phy.c | 10 +- drivers/net/phy/atheros.c | 2 +- drivers/net/phy/phy.c | 19 +-- drivers/net/phy/vitesse.c | 2 +- drivers/net/vsc7385.c | 1 + drivers/qe/qe.h | 34 +++--- drivers/serial/serial_ns16550.c | 12 +- include/command.h | 2 +- include/common.h | 4 - include/fdt.h | 33 ++--- include/fdt_support.h | 4 +- include/image.h | 15 +-- include/libfdt.h | 4 +- include/linux/byteorder/big_endian.h | 135 ++++++++++++++------- include/linux/byteorder/little_endian.h | 133 +++++++++++++------- include/linux/byteorder/swab.h | 6 +- include/linux/compat.h | 3 - include/linux/stddef.h | 2 + include/linux/unaligned/generic.h | 3 - include/net.h | 9 +- include/u-boot/zlib.h | 2 +- lib/libfdt/fdt.c | 2 +- lib/libfdt/fdt_ro.c | 2 +- lib/libfdt/fdt_rw.c | 4 +- lib/libfdt/fdt_sw.c | 4 +- lib/libfdt/fdt_wip.c | 2 +- lib/vsprintf.c | 4 +- lib/zlib/adler32.c | 5 +- lib/zlib/inffast.c | 5 +- lib/zlib/inflate.c | 29 ++--- lib/zlib/inftrees.c | 10 +- lib/zlib/zutil.c | 10 +- net/arp.c | 6 +- net/bootp.c | 6 +- net/net.c | 2 +- net/ping.h | 3 - net/tftp.h | 3 + 124 files changed, 789 insertions(+), 730 deletions(-) -- 1.7.12.3

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[U-Boot] [PATCH v2 2/2] spi: Add SPI flash test
by Simon Glass 26 Dec '12

26 Dec '12

It is useful to have a basic SPI flash test, which tests that the SPI chip, the SPI bus and the driver are behaving. This test erases part of the flash, writes data and reads it back as a sanity check that all is well. Use CONFIG_SF_TEST to enable it. Signed-off-by: Simon Glass <sjg(a)chromium.org> --- Changes in v2: - Add arguments to 'sf test' (may as well do this TODO now) README | 5 ++ common/cmd_sf.c | 168 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 173 insertions(+), 0 deletions(-) diff --git a/README b/README index 0d17e7d..193986e 100644 --- a/README +++ b/README @@ -2315,6 +2315,11 @@ The following options need to be configured: CONFIG_SF_DEFAULT_MODE (see include/spi.h) CONFIG_SF_DEFAULT_SPEED in Hz + CONFIG_CMD_SF_TEST + + Define this option to include a destructive SPI flash + test ('sf test'). + - SystemACE Support: CONFIG_SYSTEMACE diff --git a/common/cmd_sf.c b/common/cmd_sf.c index e22a45e..269afcc 100644 --- a/common/cmd_sf.c +++ b/common/cmd_sf.c @@ -5,6 +5,7 @@ * Licensed under the GPL-2 or later. */ +#include <div64.h> #include <common.h> #include <malloc.h> #include <spi_flash.h> @@ -312,6 +313,161 @@ static int do_spi_flash_erase(int argc, char * const argv[]) return 0; } +#ifdef CONFIG_CMD_SF_TEST +enum { + STAGE_ERASE, + STAGE_CHECK, + STAGE_WRITE, + STAGE_READ, + + STAGE_COUNT, +}; + +static char *stage_name[STAGE_COUNT] = { + "erase", + "check", + "write", + "read", +}; + +struct test_info { + int stage; + int bytes; + unsigned base_ms; + unsigned time_ms[STAGE_COUNT]; +}; + +static void show_time(struct test_info *test, int stage) +{ + uint64_t speed; /* KiB/s */ + int bps; /* Bits per second */ + + speed = (long long)test->bytes * 1000; + do_div(speed, test->time_ms[stage] * 1024); + bps = speed * 8; + + printf("%d %s: %d ticks, %d KiB/s %d.%03d Mbps\n", stage, + stage_name[stage], test->time_ms[stage], + (int)speed, bps / 1000, bps % 1000); +} + +static void spi_test_next_stage(struct test_info *test) +{ + test->time_ms[test->stage] = get_timer(test->base_ms); + show_time(test, test->stage); + test->base_ms = get_timer(0); + test->stage++; +} + +/** + * Run a test on the SPI flash + * + * @param flash SPI flash to use + * @param buf Source buffer for data to write + * @param len Size of data to read/write + * @param offset Offset within flash to check + * @param vbuf Verification buffer + * @return 0 if ok, -1 on error + */ +static int spi_flash_test(struct spi_flash *flash, char *buf, ulong len, + ulong offset, char *vbuf) +{ + struct test_info test; + int i; + + printf("SPI flash test:\n"); + memset(&test, '\0', sizeof(test)); + test.base_ms = get_timer(0); + test.bytes = len; + if (spi_flash_erase(flash, offset, len)) { + printf("Erase failed\n"); + return -1; + } + spi_test_next_stage(&test); + + if (spi_flash_read(flash, offset, len, vbuf)) { + printf("Check read failed\n"); + return -1; + } + for (i = 0; i < len; i++) { + if (vbuf[i] != 0xff) { + printf("Check failed at %d\n", i); + print_buffer(i, vbuf + i, 1, min(len - i, 0x40), 0); + return -1; + } + } + spi_test_next_stage(&test); + + if (spi_flash_write(flash, offset, len, buf)) { + printf("Write failed\n"); + return -1; + } + memset(vbuf, '\0', len); + spi_test_next_stage(&test); + + if (spi_flash_read(flash, offset, len, vbuf)) { + printf("Read failed\n"); + return -1; + } + spi_test_next_stage(&test); + + for (i = 0; i < len; i++) { + if (buf[i] != vbuf[i]) { + printf("Verify failed at %d, good data:\n", i); + print_buffer(i, buf + i, 1, min(len - i, 0x40), 0); + printf("Bad data:\n"); + print_buffer(i, vbuf + i, 1, min(len - i, 0x40), 0); + return -1; + } + } + printf("Test passed\n"); + for (i = 0; i < STAGE_COUNT; i++) + show_time(&test, i); + + return 0; +} + +static int do_spi_flash_test(int argc, char * const argv[]) +{ + unsigned long offset; + unsigned long len; + char *buf = (char *)CONFIG_SYS_TEXT_BASE; + char *endp; + char *vbuf; + int ret; + + offset = simple_strtoul(argv[1], &endp, 16); + if (*argv[1] == 0 || *endp != 0) + return -1; + len = simple_strtoul(argv[2], &endp, 16); + if (*argv[2] == 0 || *endp != 0) + return -1; + + vbuf = malloc(len); + if (!vbuf) { + printf("Cannot allocate memory\n"); + return 1; + } + buf = malloc(len); + if (!buf) { + free(vbuf); + printf("Cannot allocate memory\n"); + return 1; + } + + memcpy(buf, (char *)CONFIG_SYS_TEXT_BASE, len); + ret = spi_flash_test(flash, buf, len, offset, vbuf); + free(vbuf); + free(buf); + if (ret) { + printf("Test failed\n"); + return 1; + } + + return 0; +} +#endif /* CONFIG_CMD_SF_TEST */ + static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { const char *cmd; @@ -341,6 +497,10 @@ static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[ ret = do_spi_flash_read_write(argc, argv); else if (strcmp(cmd, "erase") == 0) ret = do_spi_flash_erase(argc, argv); +#ifdef CONFIG_CMD_SF_TEST + else if (!strcmp(cmd, "test")) + ret = do_spi_flash_test(argc, argv); +#endif else ret = -1; @@ -352,6 +512,13 @@ usage: return CMD_RET_USAGE; } +#ifdef CONFIG_CMD_SF_TEST +#define SF_TEST_HELP "\nsf test offset len " \ + "- run a very basic destructive test" +#else +#define SF_TEST_HELP +#endif + U_BOOT_CMD( sf, 5, 1, do_spi_flash, "SPI flash sub-system", @@ -365,4 +532,5 @@ U_BOOT_CMD( " `+len' round up `len' to block size\n" "sf update addr offset len - erase and write `len' bytes from memory\n" " at `addr' to flash at `offset'" + SF_TEST_HELP ); -- 1.7.7.3

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[U-Boot] [PATCH] EXYNOS: EXYNOS4X12: extract Exynos4x12 IPs clock frequency
by Chander Kashyap 26 Dec '12

26 Dec '12

Adds functions to extract clock frequency of Exynos4x12 IPs. Signed-off-by: Chander Kashyap <chander.kashyap(a)linaro.org> --- arch/arm/cpu/armv7/exynos/clock.c | 163 +++++++++++++++++++++++++++++++++++-- 1 file changed, 158 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index a042423..012beab 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -100,6 +100,36 @@ static unsigned long exynos4_get_pll_clk(int pllreg) return exynos_get_pll_clk(pllreg, r, k); } +/* exynos4x12: return pll clock frequency */ +static unsigned long exynos4x12_get_pll_clk(int pllreg) +{ + struct exynos4x12_clock *clk = + (struct exynos4x12_clock *)samsung_get_base_clock(); + unsigned long r, k = 0; + + switch (pllreg) { + case APLL: + r = readl(&clk->apll_con0); + break; + case MPLL: + r = readl(&clk->mpll_con0); + break; + case EPLL: + r = readl(&clk->epll_con0); + k = readl(&clk->epll_con1); + break; + case VPLL: + r = readl(&clk->vpll_con0); + k = readl(&clk->vpll_con1); + break; + default: + printf("Unsupported PLL (%d)\n", pllreg); + return 0; + } + + return exynos_get_pll_clk(pllreg, r, k); +} + /* exynos5: return pll clock frequency */ static unsigned long exynos5_get_pll_clk(int pllreg) { @@ -181,6 +211,28 @@ static unsigned long exynos4_get_arm_clk(void) return armclk; } +/* exynos4x12: return ARM clock frequency */ +static unsigned long exynos4x12_get_arm_clk(void) +{ + struct exynos4x12_clock *clk = + (struct exynos4x12_clock *)samsung_get_base_clock(); + unsigned long div; + unsigned long armclk; + unsigned int core_ratio; + unsigned int core2_ratio; + + div = readl(&clk->div_cpu0); + + /* CORE_RATIO: [2:0], CORE2_RATIO: [30:28] */ + core_ratio = (div >> 0) & 0x7; + core2_ratio = (div >> 28) & 0x7; + + armclk = get_pll_clk(APLL) / (core_ratio + 1); + armclk /= (core2_ratio + 1); + + return armclk; +} + /* exynos5: return ARM clock frequency */ static unsigned long exynos5_get_arm_clk(void) { @@ -246,6 +298,20 @@ static unsigned long exynos4_get_pwm_clk(void) return pclk; } +/* exynos4x12: return pwm clock frequency */ +static unsigned long exynos4x12_get_pwm_clk(void) +{ + unsigned long pclk, sclk; + unsigned int ratio; + + sclk = get_pll_clk(MPLL); + ratio = 8; + + pclk = sclk / (ratio + 1); + + return pclk; +} + /* exynos5: return pwm clock frequency */ static unsigned long exynos5_get_pwm_clk(void) { @@ -314,6 +380,51 @@ static unsigned long exynos4_get_uart_clk(int dev_index) return uclk; } +/* exynos4x12: return uart clock frequency */ +static unsigned long exynos4x12_get_uart_clk(int dev_index) +{ + struct exynos4x12_clock *clk = + (struct exynos4x12_clock *)samsung_get_base_clock(); + unsigned long uclk, sclk; + unsigned int sel; + unsigned int ratio; + + /* + * CLK_SRC_PERIL0 + * UART0_SEL [3:0] + * UART1_SEL [7:4] + * UART2_SEL [8:11] + * UART3_SEL [12:15] + * UART4_SEL [16:19] + */ + sel = readl(&clk->src_peril0); + sel = (sel >> (dev_index << 2)) & 0xf; + + if (sel == 0x6) + sclk = get_pll_clk(MPLL); + else if (sel == 0x7) + sclk = get_pll_clk(EPLL); + else if (sel == 0x8) + sclk = get_pll_clk(VPLL); + else + return 0; + + /* + * CLK_DIV_PERIL0 + * UART0_RATIO [3:0] + * UART1_RATIO [7:4] + * UART2_RATIO [8:11] + * UART3_RATIO [12:15] + * UART4_RATIO [16:19] + */ + ratio = readl(&clk->div_peril0); + ratio = (ratio >> (dev_index << 2)) & 0xf; + + uclk = sclk / (ratio + 1); + + return uclk; +} + /* exynos5: return uart clock frequency */ static unsigned long exynos5_get_uart_clk(int dev_index) { @@ -388,6 +499,33 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int div) writel(val, addr); } +/* exynos4x12: set the mmc clock */ +static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div) +{ + struct exynos4x12_clock *clk = + (struct exynos4x12_clock *)samsung_get_base_clock(); + unsigned int addr; + unsigned int val; + + /* + * CLK_DIV_FSYS1 + * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24] + * CLK_DIV_FSYS2 + * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24] + */ + if (dev_index < 2) { + addr = (unsigned int)&clk->div_fsys1; + } else { + addr = (unsigned int)&clk->div_fsys2; + dev_index -= 2; + } + + val = readl(addr); + val &= ~(0xff << ((dev_index << 4) + 8)); + val |= (div & 0xff) << ((dev_index << 4) + 8); + writel(val, addr); +} + /* exynos5: set the mmc clock */ static void exynos5_set_mmc_clk(int dev_index, unsigned int div) { @@ -710,16 +848,22 @@ unsigned long get_pll_clk(int pllreg) { if (cpu_is_exynos5()) return exynos5_get_pll_clk(pllreg); - else + else { + if (proid_is_exynos4412()) + return exynos4x12_get_pll_clk(pllreg); return exynos4_get_pll_clk(pllreg); + } } unsigned long get_arm_clk(void) { if (cpu_is_exynos5()) return exynos5_get_arm_clk(); - else + else { + if (proid_is_exynos4412()) + return exynos4x12_get_arm_clk(); return exynos4_get_arm_clk(); + } } unsigned long get_i2c_clk(void) @@ -736,24 +880,33 @@ unsigned long get_pwm_clk(void) { if (cpu_is_exynos5()) return exynos5_get_pwm_clk(); - else + else { + if (proid_is_exynos4412()) + return exynos4x12_get_pwm_clk(); return exynos4_get_pwm_clk(); + } } unsigned long get_uart_clk(int dev_index) { if (cpu_is_exynos5()) return exynos5_get_uart_clk(dev_index); - else + else { + if (proid_is_exynos4412()) + return exynos4x12_get_uart_clk(dev_index); return exynos4_get_uart_clk(dev_index); + } } void set_mmc_clk(int dev_index, unsigned int div) { if (cpu_is_exynos5()) exynos5_set_mmc_clk(dev_index, div); - else + else { + if (proid_is_exynos4412()) + exynos4x12_set_mmc_clk(dev_index, div); exynos4_set_mmc_clk(dev_index, div); + } } unsigned long get_lcd_clk(void) -- 1.7.9.5

2 1

[U-Boot] [PATCH] arm: bugfix: Move vector table before jumping relocated code
by Tetsuyuki Kobayashi 26 Dec '12

26 Dec '12

Interrupts and exceptions doesn't work in relocated code. It badly use IRQ_STACK_START_IN in rom area as interrupt stack. It is because the vecotr table is not moved to ram area. This patch moves vector table before jumping relocated code. Signed-off-by: Tetsuyuki Kobayashi <koba(a)kmckk.co.jp> --- arch/arm/cpu/armv7/start.S | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 52f7f6e..5098f7b 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -277,6 +277,18 @@ jump_2_ram: mcr p15, 0, r0, c7, c10, 4 @ DSB mcr p15, 0, r0, c7, c5, 4 @ ISB #endif +/* + * Move vector table + */ +#if !defined(CONFIG_TEGRA2) +#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD)) + /* Set vector address in CP15 VBAR register */ + ldr r0, =_start + add r0, r0, r9 + mcr p15, 0, r0, c12, c0, 0 @Set VBAR +#endif +#endif /* !Tegra2 */ + ldr r0, _board_init_r_ofs adr r1, _start add lr, r0, r1 -- 1.7.9.5

5 10

[U-Boot] [PATCH 1/2] spi: Add progress percentage and write speed to `sf update`
by Simon Glass 21 Dec '12

21 Dec '12

From: James Miller <jamesmiller(a)chromium.org> Output a progress update only at most 10 times per second, to avoid saturating (and waiting on) the console. Make the summary line to fit on a single line. Make sure that cursor sits at the end of each update line instead of the beginning. Sample output: SF: Detected W25Q32 with page size 4 KiB, total 4 MiB Update SPI 1331200 bytes written, 2863104 bytes skipped in 21.912s, speed 199728 B/s time: 21.919 seconds, 21919 ticks Skipping verify Signed-off-by: Simon Glass <sjg(a)chromium.org> Signed-off-by: James Miller <jamesmiller(a)chromium.org> Signed-off-by: Taylor Hutt <thutt(a)chromium.org> --- common/cmd_sf.c | 41 +++++++++++++++++++++++++++++++++++++++-- 1 files changed, 39 insertions(+), 2 deletions(-) diff --git a/common/cmd_sf.c b/common/cmd_sf.c index 5ac1d0c..e22a45e 100644 --- a/common/cmd_sf.c +++ b/common/cmd_sf.c @@ -67,6 +67,23 @@ static int sf_parse_len_arg(char *arg, ulong *len) return 1; } +/** + * This function takes a byte length and a delta unit of time to compute the + * approximate bytes per second + * + * @param len amount of bytes currently processed + * @param start_ms start time of processing in ms + * @return bytes per second if OK, 0 on error + */ +static const ulong bytes_per_second(unsigned int len, ulong start_ms) +{ + /* less accurate but avoids overflow */ + if (len >= ((unsigned int) -1) / 1024) + return len / (max(get_timer(start_ms) / 1024, 1)); + else + return 1024 * len / max(get_timer(start_ms), 1); +} + static int do_spi_flash_probe(int argc, char * const argv[]) { unsigned int bus = CONFIG_SF_DEFAULT_BUS; @@ -167,11 +184,26 @@ static int spi_flash_update(struct spi_flash *flash, u32 offset, const char *end = buf + len; size_t todo; /* number of bytes to do in this pass */ size_t skipped = 0; /* statistics */ + const ulong start_time = get_timer(0); + size_t scale = 1; + const char *start_buf = buf; + ulong delta; + if (end - buf >= 200) + scale = (end - buf) / 100; cmp_buf = malloc(flash->sector_size); if (cmp_buf) { + ulong last_update = get_timer(0); + for (; buf < end && !err_oper; buf += todo, offset += todo) { todo = min(end - buf, flash->sector_size); + if (get_timer(last_update) > 100) { + printf(" \rUpdating, %zu%% %lu B/s", + 100 - (end - buf) / scale, + bytes_per_second(buf - start_buf, + start_time)); + last_update = get_timer(0); + } err_oper = spi_flash_update_block(flash, offset, todo, buf, cmp_buf, &skipped); } @@ -179,12 +211,17 @@ static int spi_flash_update(struct spi_flash *flash, u32 offset, err_oper = "malloc"; } free(cmp_buf); + putc('\r'); if (err_oper) { printf("SPI flash failed in %s step\n", err_oper); return 1; } - printf("%zu bytes written, %zu bytes skipped\n", len - skipped, - skipped); + + delta = get_timer(start_time); + printf("%zu bytes written, %zu bytes skipped", len - skipped, + skipped); + printf(" in %ld.%lds, speed %ld B/s\n", + delta / 1000, delta % 1000, bytes_per_second(len, start_time)); return 0; } -- 1.7.7.3

5 20

[U-Boot] [PATCH] mv-common.h: increase malloc arena to 4MiB
by Andreas Bießmann 20 Dec '12

20 Dec '12

This will fix the following error: ---8<--- UBIFS error (pid 0): ubifs_mount: Error reading superblock on volume 'ubi:root' errno=-12! --->8--- Signed-off-by: Andreas Bießmann <andreas.devel(a)googlemail.com> Cc: prafulla(a)marvell.com Cc: dimax.main(a)gmail.com --- include/configs/mv-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 7086d1d..405a842 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -92,7 +92,7 @@ /* * Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* 1MiB for malloc() */ +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 * 4) /* 4MiB for malloc() */ /* * Other required minimal configurations -- 1.7.10.4

4 8

[U-Boot] [PATCH] ARM: lacie_kw: add support for WIRELESS_SPACE
by Albert ARIBAUD 20 Dec '12

20 Dec '12

Signed-off-by: Albert ARIBAUD <albert.u.boot(a)aribaud.net> --- This patch adds the Wireless Space to the lacie_kw sub-targets. It *should* not change a thing to the already existing sub-targets (except that each one gets its own prompt). Owners of NETSPACE_[MAX]_V2, INETSPACE_V2, NET2BIG_V2 please test. board/LaCie/netspace_v2/netspace_v2.c | 42 ++---------- board/LaCie/netspace_v2/netspace_v2.h | 121 +++++++++++++++++++++++++++++++++ boards.cfg | 1 + drivers/net/mvgbe.c | 10 ++- include/configs/lacie_kw.h | 38 ++++++++++- 5 files changed, 175 insertions(+), 37 deletions(-) diff --git a/board/LaCie/netspace_v2/netspace_v2.c b/board/LaCie/netspace_v2/netspace_v2.c index 68e8a77..084f0cf 100644 --- a/board/LaCie/netspace_v2/netspace_v2.c +++ b/board/LaCie/netspace_v2/netspace_v2.c @@ -39,40 +39,7 @@ int board_early_init_f(void) NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH); /* Multi-Purpose Pins Functionality configuration */ - u32 kwmpp_config[] = { - MPP0_SPI_SCn, - MPP1_SPI_MOSI, - MPP2_SPI_SCK, - MPP3_SPI_MISO, - MPP4_NF_IO6, - MPP5_NF_IO7, - MPP6_SYSRST_OUTn, - MPP7_GPO, /* Fan speed (bit 1) */ - MPP8_TW_SDA, - MPP9_TW_SCK, - MPP10_UART0_TXD, - MPP11_UART0_RXD, - MPP12_GPO, /* Red led */ - MPP14_GPIO, /* USB fuse */ - MPP16_GPIO, /* SATA 0 power */ - MPP17_GPIO, /* SATA 1 power */ - MPP18_NF_IO0, - MPP19_NF_IO1, - MPP20_SATA1_ACTn, - MPP21_SATA0_ACTn, - MPP22_GPIO, /* Fan speed (bit 0) */ - MPP23_GPIO, /* Fan power */ - MPP24_GPIO, /* USB mode select */ - MPP25_GPIO, /* Fan rotation fail */ - MPP26_GPIO, /* USB vbus-in detection */ - MPP28_GPIO, /* USB enable vbus-out */ - MPP29_GPIO, /* Blue led (slow register) */ - MPP30_GPIO, /* Blue led (command register) */ - MPP31_GPIO, /* Board power off */ - MPP32_GPIO, /* Button (0 = Released, 1 = Pushed) */ - MPP33_GPIO, /* Fan speed (bit 2) */ - 0 - }; + u32 kwmpp_config[] = NETSPACE_V2_MPP_CONFIG; kirkwood_mpp_conf(kwmpp_config, NULL); return 0; @@ -107,7 +74,12 @@ int misc_init_r(void) /* Configure and initialize PHY */ void reset_phy(void) { - mv_phy_88e1116_init("egiga0", 8); +#ifdef CONFIG_EGIGA0_PHY + mv_phy_88e1116_init("egiga0", CONFIG_EGIGA0_PHY); +#endif +#ifdef CONFIG_EGIGA1_PHY + mv_phy_88e1116_init("egiga1", CONFIG_EGIGA1_PHY); +#endif } #endif diff --git a/board/LaCie/netspace_v2/netspace_v2.h b/board/LaCie/netspace_v2/netspace_v2.h index 34e492c..fc1d571 100644 --- a/board/LaCie/netspace_v2/netspace_v2.h +++ b/board/LaCie/netspace_v2/netspace_v2.h @@ -24,11 +24,132 @@ #define NETSPACE_V2_H /* GPIO configuration */ + +/* Net Space V2, Net Space Max V2, Internet Space V2: */ +#if defined(CONFIG_NETSPACE_MAX_V2) \ + || defined(CONFIG_NETSPACE_V2) \ + || defined(CONFIG_NET2BIG_V2) \ + || defined(CONFIG_INETSPACE_V2) + #define NETSPACE_V2_OE_LOW 0x06004000 #define NETSPACE_V2_OE_HIGH 0x00000031 #define NETSPACE_V2_OE_VAL_LOW 0x10030000 #define NETSPACE_V2_OE_VAL_HIGH 0x00000000 +/* Wireless Space */ + +#elif defined(CONFIG_WIRELESS_SPACE) + +#define NETSPACE_V2_OE_LOW 0xFF006808 +#define NETSPACE_V2_OE_HIGH 0x0000F989 +#define NETSPACE_V2_OE_VAL_LOW 0x00000000 +#define NETSPACE_V2_OE_VAL_HIGH 0x00000000 + +#else + +#error Undefined or unsupported LaCie KW board variant + +#endif + #define NETSPACE_V2_GPIO_BUTTON 32 +/* MPP configuration */ + +/* Net Space V2, Net Space Max V2, Internet Space V2: */ +#if defined(CONFIG_NETSPACE_MAX_V2) \ + || defined(CONFIG_NETSPACE_V2) \ + || defined(CONFIG_NET2BIG_V2) \ + || defined(CONFIG_INETSPACE_V2) + +#define NETSPACE_V2_MPP_CONFIG { \ + MPP0_SPI_SCn, \ + MPP1_SPI_MOSI, \ + MPP2_SPI_SCK, \ + MPP3_SPI_MISO, \ + MPP4_NF_IO6, \ + MPP5_NF_IO7, \ + MPP6_SYSRST_OUTn, \ + MPP7_GPO, /* Fan speed (bit 1) */ \ + MPP8_TW_SDA, \ + MPP9_TW_SCK, \ + MPP10_UART0_TXD, \ + MPP11_UART0_RXD, \ + MPP12_GPO, /* Red led */ \ + MPP14_GPIO, /* USB fuse */ \ + MPP16_GPIO, /* SATA 0 power */ \ + MPP17_GPIO, /* SATA 1 power */ \ + MPP18_NF_IO0, \ + MPP19_NF_IO1, \ + MPP20_SATA1_ACTn, \ + MPP21_SATA0_ACTn, \ + MPP22_GPIO, /* Fan speed (bit 0) */ \ + MPP23_GPIO, /* Fan power */ \ + MPP24_GPIO, /* USB mode select */ \ + MPP25_GPIO, /* Fan rotation fail */ \ + MPP26_GPIO, /* USB vbus-in detection */ \ + MPP28_GPIO, /* USB enable vbus-out */ \ + MPP29_GPIO, /* Blue led (slow register) */ \ + MPP30_GPIO, /* Blue led (command register) */ \ + MPP31_GPIO, /* Board power off */ \ + MPP32_GPIO, /* Button (0 = Released, 1 = Pushed) */ \ + MPP33_GPIO, /* Fan speed (bit 2) */ \ + 0 \ + } + +#elif defined(CONFIG_WIRELESS_SPACE) + +#define NETSPACE_V2_MPP_CONFIG { \ + MPP0_NF_IO2, \ + MPP1_NF_IO3, \ + MPP2_NF_IO4, \ + MPP3_NF_IO5, \ + MPP4_NF_IO6, \ + MPP5_NF_IO7, \ + MPP6_SYSRST_OUTn, \ + MPP7_GPO, /* Fan speed (bit 1) */ \ + MPP8_TW_SDA, \ + MPP9_TW_SCK, \ + MPP10_UART0_TXD, \ + MPP11_UART0_RXD, \ + MPP13_GPIO, /* Red led */ \ + MPP14_GPIO, /* USB fuse */ \ + MPP15_SATA0_ACTn, \ + MPP16_GPIO, /* SATA 0 power */ \ + MPP17_GPIO, /* SATA 1 power */ \ + MPP18_NF_IO0, \ + MPP19_NF_IO1, \ + MPP20_GE1_0, /* Gigabit Ethernet 1 */ \ + MPP21_GE1_1, \ + MPP22_GE1_2, \ + MPP23_GE1_3, \ + MPP24_GE1_4, \ + MPP25_GE1_5, \ + MPP26_GE1_6, \ + MPP27_GE1_7, \ + MPP28_GE1_8, \ + MPP29_GE1_9, \ + MPP30_GE1_10, \ + MPP31_GE1_11, \ + MPP32_GE1_12, \ + MPP33_GE1_13, \ + MPP34_GE1_14, \ + MPP35_GE1_15, \ + MPP36_GPIO, /* Fan speed (bit 2) */ \ + MPP37_GPIO, /* Fan speed (bit 0) */ \ + MPP38_GPIO, /* Fan power */ \ + MPP39_GPIO, /* Fan rotation fail */ \ + MPP40_GPIO, /* Ethernet switch link */ \ + MPP41_GPIO, /* USB enable host vbus */ \ + MPP42_GPIO, /* LED clock control */ \ + MPP43_GPIO, /* WPS button (0 = Pushed, 1 = Released) */ \ + MPP44_GPIO, /* Red LED on/off */ \ + MPP45_GPIO, /* Red LED timer blink (on=100ms, off=100ms) */ \ + MPP46_GPIO, /* Green LED on/off */ \ + MPP47_GPIO, /* LED (blue, green) SATA activity blink */ \ + MPP48_GPIO, /* Blue LED on/off */ \ + 0 \ + } + +#endif + #endif /* NETSPACE_V2_H */ diff --git a/boards.cfg b/boards.cfg index edd750c..f001b29 100644 --- a/boards.cfg +++ b/boards.cfg @@ -157,6 +157,7 @@ inetspace_v2 arm arm926ejs netspace_v2 LaCie net2big_v2 arm arm926ejs net2big_v2 LaCie kirkwood lacie_kw:NET2BIG_V2 netspace_max_v2 arm arm926ejs netspace_v2 LaCie kirkwood lacie_kw:NETSPACE_MAX_V2 netspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood lacie_kw:NETSPACE_V2 +wireless_space arm arm926ejs netspace_v2 LaCie kirkwood lacie_kw:WIRELESS_SPACE dreamplug arm arm926ejs - Marvell kirkwood guruplug arm arm926ejs - Marvell kirkwood mv88f6281gtw_ge arm arm926ejs - Marvell kirkwood diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index 47bf27c..670edb0 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -653,6 +653,14 @@ int mvgbe_initialize(bd_t *bis) struct eth_device *dev; int devnum; u8 used_ports[MAX_MVGBE_DEVS] = CONFIG_MVGBE_PORTS; +#if defined(CONFIG_MVGBE_PHY_ADRS) +#define MVGBE_PHY_ADRS CONFIG_MVGBE_PHY_ADRS +#elif defined(CONFIG_PHY_BASE_ADR) +#define MVGBE_PHY_ADRS {CONFIG_PHY_BASE_ADR,CONFIG_PHY_BASE_ADR+1} +#else +#define MVGBE_PHY_ADRS {8,9} +#endif + u8 used_phy_adrs[MAX_MVGBE_DEVS] = MVGBE_PHY_ADRS; for (devnum = 0; devnum < MAX_MVGBE_DEVS; devnum++) { /*skip if port is configured not to use */ @@ -733,7 +741,7 @@ error1: miiphy_register(dev->name, smi_reg_read, smi_reg_write); /* Set phy address of the port */ miiphy_write(dev->name, MV_PHY_ADR_REQUEST, - MV_PHY_ADR_REQUEST, PHY_BASE_ADR + devnum); + MV_PHY_ADR_REQUEST, used_phy_adrs[devnum]); #endif } return 0; diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h index c35c2db..a979ab4 100644 --- a/include/configs/lacie_kw.h +++ b/include/configs/lacie_kw.h @@ -33,6 +33,10 @@ #elif defined(CONFIG_NET2BIG_V2) #define CONFIG_MACH_TYPE MACH_TYPE_NET2BIG_V2 #define CONFIG_IDENT_STRING " 2Big v2" +#elif defined(CONFIG_WIRELESS_SPACE) +#define MACH_TYPE_WIRELESS_SPACE 2500 /* is missing in mach-types.h */ +#define CONFIG_MACH_TYPE MACH_TYPE_WIRELESS_SPACE +#define CONFIG_IDENT_STRING " Wireless Space" #else #error "Unknown board" #endif @@ -73,6 +77,12 @@ #define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-is2.cfg #endif +#ifdef CONFIG_WIRELESS_SPACE +/* No SPI but NAND */ +#undef CONFIG_CMD_SF +#define CONFIG_CMD_NAND +#endif + /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros @@ -90,8 +100,14 @@ #define CONFIG_SYS_IDE_MAXDEVICE 1 #if defined(CONFIG_NET2BIG_V2) #define CONFIG_SYS_PROMPT "2big2> " -#else +#elif defined(CONFIG_NETSPACE_V2) #define CONFIG_SYS_PROMPT "ns2> " +#elif defined(CONFIG_INETSPACE_V2) +#define CONFIG_SYS_PROMPT "is2> " +#elif defined(CONFIG_WIRELESS_SPACE) +#define CONFIG_SYS_PROMPT "ws> " +#else +#define CONFIG_SYS_PROMPT "lacie-kw> " #endif /* @@ -99,7 +115,16 @@ */ #ifdef CONFIG_CMD_NET #define CONFIG_MISC_INIT_R /* Call misc_init_r() to initialize MAC address */ +#if defined(CONFIG_WIRELESS_SPACE) +#define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports only */ +#define CONFIG_EGIGA1_PHY 0x6 /* egiga1 has a PHY, egiga0 has NOT */ +#define CONFIG_MVGBE_PHY_ADRS {0xa, 0x6} +#define CONFIG_MII +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +#else #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ +#define CONFIG_EGIGA0_PHY 0x8 +#endif #define CONFIG_NETCONSOLE #endif @@ -154,11 +179,20 @@ /* * Environment variables configurations */ + +#if defined(CONFIG_WIRELESS_SPACE) +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64KB */ +#define CONFIG_ENV_SIZE 0x1000 /* 4KB */ +#define CONFIG_ENV_ADDR 0x70000 +#define CONFIG_ENV_OFFSET 0x70000 /* env starts here */ +#else #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SECT_SIZE 0x10000 /* 64KB */ #define CONFIG_ENV_SIZE 0x1000 /* 4KB */ #define CONFIG_ENV_ADDR 0x70000 #define CONFIG_ENV_OFFSET 0x70000 /* env starts here */ +#endif /* * Default environment variables @@ -185,4 +219,6 @@ "usbload=usb start && " \ "fatload usb 0:1 $loadaddr /boot/$bootfile\0" +//#define DEBUG + #endif /* _CONFIG_LACIE_KW_H */ -- 1.7.9.5

5 31

[U-Boot] [PATCH] Add a memory get command
by Joe Hershberger 20 Dec '12

20 Dec '12

This command allows you to read the value of a memory address and store it in an environment variable. Signed-off-by: Joe Hershberger <joe.hershberger(a)ni.com> --- common/cmd_mem.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/common/cmd_mem.c b/common/cmd_mem.c index 18f0a3f..08c7d69 100644 --- a/common/cmd_mem.c +++ b/common/cmd_mem.c @@ -32,6 +32,7 @@ #ifdef CONFIG_HAS_DATAFLASH #include <dataflash.h> #endif +#include <asm/io.h> #include <watchdog.h> static int mod_mem(cmd_tbl_t *, int, int, int, char * const []); @@ -147,6 +148,45 @@ int do_mem_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return (rc); } +#ifdef CONFIG_CMD_MEM_GET +int do_mem_mg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + ulong addr; + int size; + char *var; + char buf[11]; + + if (argc < 3) + return CMD_RET_USAGE; + + /* Check for a size specification. + * Defaults to long if no or incorrect specification. + */ + size = cmd_get_data_size(argv[0], 4); + if (size < 0) + return 1; + + var = argv[1]; + + addr = simple_strtoul(argv[2], NULL, 16); + addr += base_address; + + if (size == 4) { + uint32_t value = readl(addr); + sprintf(buf, "0x%08x", value); + } else if (size == 2) { + uint16_t value = readw(addr); + sprintf(buf, "0x%04x", value); + } else { + uint8_t value = readb(addr); + sprintf(buf, "0x%02x", value); + } + setenv(var, buf); + + return 0; +} +#endif + int do_mem_mm ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { return mod_mem (cmdtp, 1, flag, argc, argv); @@ -1145,6 +1185,13 @@ U_BOOT_CMD( "[.b, .w, .l] address [# of objects]" ); +#ifdef CONFIG_CMD_MEM_GET +U_BOOT_CMD( + mg, 3, 1, do_mem_mg, + "memory get", + "[.b, .w, .l] variable address" +); +#endif U_BOOT_CMD( mm, 2, 1, do_mem_mm, -- 1.7.11.5

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