October 2012 - U-Boot

[U-Boot] [PATCH V1 0/5] prepare for mx6dl/ mx6solo
by Troy Kisky 23 Jan '13

23 Jan '13

Each patch in this series should be able to be applied independently of the others. These patch have been seen before but I marked this as version 1, because they were in the middle of another series previously. Troy Kisky (5): mx6: soc: update get_cpu_rev and get_imx_type for mx6solo/sololite mx6: use CONFIG_MX6 instead of CONFIG_MX6Q imx-common: cpu: add imx_ddr_size arch-mx6: add mx6dl_pins.h imximage.cfg: run files through C preprocessor .gitignore | 1 + Makefile | 11 +- arch/arm/cpu/armv7/mx6/soc.c | 32 ++- arch/arm/imx-common/cpu.c | 66 +++++- arch/arm/include/asm/arch-mx5/sys_proto.h | 10 +- arch/arm/include/asm/arch-mx6/imx-regs.h | 2 + arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 149 +++++++++++++ arch/arm/include/asm/arch-mx6/sys_proto.h | 10 +- board/esg/ima3-mx53/imximage.cfg | 120 ++++++----- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg | 90 ++++---- board/freescale/mx25pdk/imximage.cfg | 77 +++---- board/freescale/mx51evk/imximage.cfg | 114 +++++----- board/freescale/mx53ard/imximage_dd3.cfg | 83 ++++---- board/freescale/mx53evk/imximage.cfg | 86 ++++---- board/freescale/mx53loco/imximage.cfg | 83 ++++---- board/freescale/mx53smd/imximage.cfg | 83 ++++---- board/freescale/mx6qarm2/imximage.cfg | 88 ++++---- board/freescale/mx6qsabreauto/imximage.cfg | 82 +++---- board/genesi/mx51_efikamx/imximage_mx.cfg | 132 ++++++------ board/genesi/mx51_efikamx/imximage_sb.cfg | 126 +++++------ board/ttcontrol/vision2/imximage_hynix.cfg | 295 ++++++++++++++------------ drivers/gpio/mxc_gpio.c | 6 +- drivers/video/ipu_regs.h | 2 +- include/configs/mx6qarm2.h | 1 + include/configs/mx6qsabre_common.h | 1 + include/configs/mx6qsabrelite.h | 1 + 26 files changed, 1036 insertions(+), 715 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx6/mx6dl_pins.h -- 1.7.9.5

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[U-Boot] Custodians, Maintainers and old platforms
by Tom Rini 22 Jan '13

22 Jan '13

Hey all, (I had attempted to bcc this to all listed maintainer, but that upset Google greatly. I'll send this out manually instead later). I'd like to put this out here for custodians and maintainers to consider, especially in light of the device model work that's not just coming but has already started being posted. One of the keys to the success of U-Boot has been the number of platforms that are supported. But part of supporting platforms is needing people to volunteer to maintain them long term and help with testing changes and so forth. So first of all, I've just tagged v2012.10-rc1. Please give this at least a basic test on whatever platforms you're able to. Second, with this, my next branch is now open and I'd like to start it by asking that platforms that people wish to abandon be removed. With the device model, lots of code will need adjusting and while it's mechanical in ways, it still needs to be run-time tested. And it's changes that someone must do. I know others have suggested adding or better publicizing our to-remove file. But one of the advantages of git is that it's easy to bring platforms back, should someone later wish to bring it back. But this also requires the removal to be done cleanly. All of that said, I would like to stress that if you maintain a platform and you wish to help with the testing and perhaps even the conversion effort, no matter the age of the platform it would be welcome and appreciated. And finally, if everyone really wants to go another direction with old platforms, I'm open to discussion of course. I just want to miminize work done on platforms that aren't active and we don't know if they will come back. -- Tom

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[U-Boot] Read-only env variables
by Joe Hershberger 15 Jan '13

15 Jan '13

Hi u-boot, I see u-boot supports readonly serial# and ethaddr, but I have a few other variables that I need to be read-only. I'm planning to implement a generic list of variables that cannot be changed or deleted. I'm interested to know what sort of specification people would find most appropriate. My current thought is to follow the same delimiter as the env itself, i.e. null separated list with double null terminator. This list would then be defined in the board config header. It also seems that you should be able to specify simple access rules for each variable name perhaps using "=<val>" after each var name where <val> could have constants (probably numbers for performance, but could be string literals) to define modes. Right now I'm thinking read-only, create-only, change-default, and change-only (i.e no delete) are the modes that make sense. I'm also interested if anyone would be opposed to simply using this new specification of readonly vars to implement the serial# and ethaddr protection. The CONFIG_HAS_UID is a bit odd... should that be available in general for read-only vars? Comments? Thanks, -Joe

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[U-Boot] [PATCH v3] davinci: cleanup davinci_sync_env_enetaddr() fucntion
by Manjunath Hadli 14 Jan '13

14 Jan '13

check for the return status for eth_getenv_enetaddr_by_index() and eth_setenv_enetaddr() functions and print appropriate message on failure. Signed-off-by: Manjunath Hadli <manjunath.hadli(a)ti.com> Cc: Tom Rini <trini(a)ti.com> Cc: Mike Frysinger <vapier(a)gentoo.org> Cc: Wolfgang Denk <wd(a)denx.de> --- Changes for v3: undo conversion of debug statement to printf(). Changes for v2: Removed additional check of comparing ethernet address is all zeros, As the core code already calls is_valid_ether_addr() and one of the checks in there is for all zeros. arch/arm/cpu/arm926ejs/davinci/misc.c | 9 ++++++--- 1 files changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/davinci/misc.c b/arch/arm/cpu/arm926ejs/davinci/misc.c index 5f510b6..c310c69 100644 --- a/arch/arm/cpu/arm926ejs/davinci/misc.c +++ b/arch/arm/cpu/arm926ejs/davinci/misc.c @@ -101,9 +101,10 @@ void davinci_emac_mii_mode_sel(int mode_sel) void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr) { uint8_t env_enetaddr[6]; + int ret; - eth_getenv_enetaddr_by_index("eth", 0, env_enetaddr); - if (!memcmp(env_enetaddr, "\0\0\0\0\0\0", 6)) { + ret = eth_getenv_enetaddr_by_index("eth", 0, env_enetaddr); + if (ret) { /* * There is no MAC address in the environment, so we * initialize it from the value in the EEPROM. @@ -111,8 +112,10 @@ void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr) debug("### Setting environment from EEPROM MAC address = " "\"%pM\"\n", env_enetaddr); - eth_setenv_enetaddr("ethaddr", rom_enetaddr); + ret = !eth_setenv_enetaddr("ethaddr", rom_enetaddr); } + if (!ret) + printf("Failed to set mac address from EEPROM\n"); } #endif /* CONFIG_DRIVER_TI_EMAC */ -- 1.6.2.4

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[U-Boot] [PATCH V2 1/1] mx31/mx35/mx51/mx53/mx6: add watchdog
by Troy Kisky 13 Jan '13

13 Jan '13

Use a common watchdog driver for all these cpus. Signed-off-by: Troy Kisky <troy.kisky(a)boundarydevices.com> --- v2: add README.watchdog include mx31/mx35 watchdogs move to drivers/watchdog Please test on a mx31 and mx35 board. qong and mx31pdk would be best!! --- arch/arm/cpu/arm1136/mx31/timer.c | 39 ----------------- arch/arm/cpu/arm1136/mx35/generic.c | 6 --- arch/arm/cpu/armv7/imx-common/cpu.c | 5 --- arch/arm/include/asm/arch-mx31/clock.h | 2 - arch/arm/include/asm/arch-mx31/imx-regs.h | 15 +------ arch/arm/include/asm/arch-mx35/imx-regs.h | 12 +----- arch/arm/include/asm/arch-mx5/imx-regs.h | 11 +---- arch/arm/include/asm/arch-mx6/imx-regs.h | 1 + board/davedenx/qong/qong.c | 9 +--- board/freescale/mx31pdk/mx31pdk.c | 9 +--- board/hale/tt01/tt01.c | 2 +- doc/README.watchdog | 33 +++++++++++++++ drivers/watchdog/Makefile | 1 + drivers/watchdog/imx_watchdog.c | 66 +++++++++++++++++++++++++++++ include/configs/mx31pdk.h | 1 + include/configs/qong.h | 1 + include/watchdog.h | 1 + 17 files changed, 112 insertions(+), 102 deletions(-) create mode 100644 doc/README.watchdog create mode 100644 drivers/watchdog/imx_watchdog.c diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c index 72081a8..d6c52d7 100644 --- a/arch/arm/cpu/arm1136/mx31/timer.c +++ b/arch/arm/cpu/arm1136/mx31/timer.c @@ -161,42 +161,3 @@ ulong get_tbclk(void) { return CONFIG_MX31_CLK32; } - -void reset_cpu(ulong addr) -{ - struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE; - wdog->wcr = WDOG_ENABLE; - while (1) - ; -} - -#ifdef CONFIG_HW_WATCHDOG -void mxc_hw_watchdog_enable(void) -{ - struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE; - u16 secs; - - /* - * The timer watchdog can be set between - * 0.5 and 128 Seconds. If not defined - * in configuration file, sets 64 Seconds - */ -#ifdef CONFIG_SYS_WD_TIMER_SECS - secs = (CONFIG_SYS_WD_TIMER_SECS << 1) & 0xFF; - if (!secs) secs = 1; -#else - secs = 64; -#endif - setbits_le16(&wdog->wcr, (secs << WDOG_WT_SHIFT) | WDOG_ENABLE - | WDOG_WDZST); -} - - -void mxc_hw_watchdog_reset(void) -{ - struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE; - - writew(0x5555, &wdog->wsr); - writew(0xAAAA, &wdog->wsr); -} -#endif diff --git a/arch/arm/cpu/arm1136/mx35/generic.c b/arch/arm/cpu/arm1136/mx35/generic.c index ea1f730..1af870c 100644 --- a/arch/arm/cpu/arm1136/mx35/generic.c +++ b/arch/arm/cpu/arm1136/mx35/generic.c @@ -495,9 +495,3 @@ int get_clocks(void) #endif return 0; } - -void reset_cpu(ulong addr) -{ - struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR; - writew(4, &wdog->wcr); -} diff --git a/arch/arm/cpu/armv7/imx-common/cpu.c b/arch/arm/cpu/armv7/imx-common/cpu.c index fa1d468..ebded87 100644 --- a/arch/arm/cpu/armv7/imx-common/cpu.c +++ b/arch/arm/cpu/armv7/imx-common/cpu.c @@ -122,11 +122,6 @@ int cpu_mmc_init(bd_t *bis) } #endif -void reset_cpu(ulong addr) -{ - __raw_writew(4, WDOG1_BASE_ADDR); -} - u32 get_ahb_clk(void) { struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; diff --git a/arch/arm/include/asm/arch-mx31/clock.h b/arch/arm/include/asm/arch-mx31/clock.h index 852c19c..6cb2611 100644 --- a/arch/arm/include/asm/arch-mx31/clock.h +++ b/arch/arm/include/asm/arch-mx31/clock.h @@ -43,7 +43,5 @@ extern void mx31_set_gpr(enum iomux_gp_func gp, char en); void mx31_uart1_hw_init(void); void mx31_uart2_hw_init(void); void mx31_spi2_hw_init(void); -void mxc_hw_watchdog_enable(void); -void mxc_hw_watchdog_reset(void); #endif /* __ASM_ARCH_CLOCK_H */ diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h index bba37ac..594d613 100644 --- a/arch/arm/include/asm/arch-mx31/imx-regs.h +++ b/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -68,17 +68,6 @@ struct cspi_regs { u32 test; }; -/* Watchdog Timer (WDOG) registers */ -#define WDOG_ENABLE (1 << 2) -#define WDOG_WT_SHIFT 8 -#define WDOG_WDZST (1 << 0) - -struct wdog_regs { - u16 wcr; /* Control */ - u16 wsr; /* Service */ - u16 wrsr; /* Reset Status */ -}; - /* IIM Control Registers */ struct iim_regs { u32 iim_stat; @@ -673,8 +662,8 @@ struct esdc_regs { #define ARM_PPMRR 0x40000015 -#define WDOG_BASE 0x53FDC000 - +#define WDOG1_BASE_ADDR 0x53FDC000 +#define CONFIG_IMX_WATCHDOG /* cpu_reset implemented in watchdog */ /* * GPIO */ diff --git a/arch/arm/include/asm/arch-mx35/imx-regs.h b/arch/arm/include/asm/arch-mx35/imx-regs.h index b18b984..45b331f 100644 --- a/arch/arm/include/asm/arch-mx35/imx-regs.h +++ b/arch/arm/include/asm/arch-mx35/imx-regs.h @@ -76,7 +76,8 @@ #define GPIO2_BASE_ADDR 0x53FD0000 #define SDMA_BASE_ADDR 0x53FD4000 #define RTC_BASE_ADDR 0x53FD8000 -#define WDOG_BASE_ADDR 0x53FDC000 +#define WDOG1_BASE_ADDR 0x53FDC000 +#define CONFIG_IMX_WATCHDOG /* cpu_reset implemented in watchdog */ #define PWM_BASE_ADDR 0x53FE0000 #define RTIC_BASE_ADDR 0x53FEC000 #define IIM_BASE_ADDR 0x53FF0000 @@ -312,15 +313,6 @@ struct cspi_regs { u32 test; }; -/* Watchdog Timer (WDOG) registers */ -struct wdog_regs { - u16 wcr; /* Control */ - u16 wsr; /* Service */ - u16 wrsr; /* Reset Status */ - u16 wicr; /* Interrupt Control */ - u16 wmcr; /* Misc Control */ -}; - struct esdc_regs { u32 esdctl0; u32 esdcfg0; diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h index c53465f..caac574 100644 --- a/arch/arm/include/asm/arch-mx5/imx-regs.h +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -78,6 +78,7 @@ #define GPIO4_BASE_ADDR (AIPS1_BASE_ADDR + 0x00090000) #define KPP_BASE_ADDR (AIPS1_BASE_ADDR + 0x00094000) #define WDOG1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00098000) +#define CONFIG_IMX_WATCHDOG /* cpu_reset implemented in watchdog */ #define WDOG2_BASE_ADDR (AIPS1_BASE_ADDR + 0x0009C000) #define GPT1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A0000) #define SRTC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A4000) @@ -216,16 +217,6 @@ */ #define WBED 1 -/* - * WEIM WCR - */ -#define BCM 1 -#define GBCD(x) (((x) & 0x3) << 1) -#define INTEN (1 << 4) -#define INTPOL (1 << 5) -#define WDOG_EN (1 << 8) -#define WDOG_LIMIT(x) (((x) & 0x3) << 9) - #define CS0_128 0 #define CS0_64M_CS1_64M 1 #define CS0_64M_CS1_32M_CS2_32M 2 diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index dacb9ea..0f59567 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -115,6 +115,7 @@ #define GPIO7_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x34000) #define KPP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x38000) #define WDOG1_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x3C000) +#define CONFIG_IMX_WATCHDOG /* cpu_reset implemented in watchdog */ #define WDOG2_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x40000) #define ANATOP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x48000) #define USB_PHY0_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x49000) diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c index c41f11d..d45b25c 100644 --- a/board/davedenx/qong/qong.c +++ b/board/davedenx/qong/qong.c @@ -36,13 +36,6 @@ DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_HW_WATCHDOG -void hw_watchdog_reset(void) -{ - mxc_hw_watchdog_reset(); -} -#endif - int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ @@ -182,7 +175,7 @@ int board_late_init(void) pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI); #ifdef CONFIG_HW_WATCHDOG - mxc_hw_watchdog_enable(); + hw_watchdog_init(); #endif return 0; diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c index 9f8bc53..54ac961 100644 --- a/board/freescale/mx31pdk/mx31pdk.c +++ b/board/freescale/mx31pdk/mx31pdk.c @@ -35,13 +35,6 @@ DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_HW_WATCHDOG -void hw_watchdog_reset(void) -{ - mxc_hw_watchdog_reset(); -} -#endif - int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ @@ -92,7 +85,7 @@ int board_late_init(void) pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN); pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI); #ifdef CONFIG_HW_WATCHDOG - mxc_hw_watchdog_enable(); + hw_watchdog_init(); #endif return 0; } diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c index 02e75ed..137c7e9 100644 --- a/board/hale/tt01/tt01.c +++ b/board/hale/tt01/tt01.c @@ -178,7 +178,7 @@ int board_init(void) int board_late_init(void) { #ifdef CONFIG_HW_WATCHDOG - mxc_hw_watchdog_enable(); + hw_watchdog_init(); #endif return 0; diff --git a/doc/README.watchdog b/doc/README.watchdog new file mode 100644 index 0000000..e4e9bd1 --- /dev/null +++ b/doc/README.watchdog @@ -0,0 +1,33 @@ +Watchdog driver general info + +CONFIG_HW_WATCHDOG + This enables hw_watchdog_reset to be called during various loops, + including waiting for a character on a serial port. But it + does not also call hw_watchdog_init. Boards which want this + enabled must call this function in their board file. This split + is useful because some rom's enable the watchdog when downloading + new code, so it must be serviced, but the board would rather it + was off. And, it cannot always be turned off once on. + +CONFIG_WATCHDOG_TIMEOUT_MSECS + Can be used to change the timeout for i.mx31/35/5x/6x. + If not given, will default to maximum timeout. This would + be 128000 msec for i.mx31/35/5x/6x. + +CONFIG_AT91SAM9_WATCHDOG + Available for AT91SAM9 to service the watchdog. + +CONFIG_FTWDT010_WATCHDOG + Available for FTWDT010 to service the watchdog. + +CONFIG_FTWDT010_HW_TIMEOUT + Can be used to change the timeout for FTWDT010. + +CONFIG_IMX_WATCHDOG + Compiles imx_watchdog.c. This is automatically set for i.mx31/35/5x/6x + boards because the file implements reset_cpu. + +CONFIG_IMX_HW_WATCHDOG + Available for i.mx31/35/5x/6x to service the watchdog. This is not + automatically set because some boards (vision2) still need to define + their own hw_watchdog_reset routine. diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 5579bf2..71e3c88 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -27,6 +27,7 @@ LIB := $(obj)libwatchdog.o COBJS-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o COBJS-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o +COBJS-$(CONFIG_IMX_WATCHDOG) += imx_watchdog.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c new file mode 100644 index 0000000..3e5ea6d --- /dev/null +++ b/drivers/watchdog/imx_watchdog.c @@ -0,0 +1,66 @@ +/* + * watchdog.c - driver for i.mx on-chip watchdog + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <asm/io.h> +#include <watchdog.h> +#include <asm/arch/imx-regs.h> + +struct watchdog_regs { + u16 wcr; /* Control */ + u16 wsr; /* Service */ + u16 wrsr; /* Reset Status */ +}; + +#define WCR_WDZST 0x01 +#define WCR_WDBG 0x02 +#define WCR_WDE 0x04 /* WDOG enable */ +#define WCR_WDT 0x08 +#define WCR_WDW 0x80 +#define SET_WCR_WT(x) (x << 8) + +#ifdef CONFIG_IMX_HW_WATCHDOG +void hw_watchdog_reset(void) +{ + struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; + + writew(0x5555, &wdog->wsr); + writew(0xaaaa, &wdog->wsr); +} + +void hw_watchdog_init(void) +{ + struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; + u16 timeout; + + /* + * The timer watchdog can be set between + * 0.5 and 128 Seconds. If not defined + * in configuration file, sets 128 Seconds + */ +#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS +#define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000 +#endif + timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1; + writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | + WCR_WDW | SET_WCR_WT(timeout), &wdog->wcr); + hw_watchdog_reset(); +} +#endif + +void reset_cpu(ulong addr) +{ + struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; + + writew(WCR_WDE, &wdog->wcr); + writew(0x5555, &wdog->wsr); + writew(0xaaaa, &wdog->wsr); /* load minimum 1/2 second timeout */ + while (1) { + /* + * spin for .5 seconds before reset + */ + } +} diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 7634de7..6c287a7 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -63,6 +63,7 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE #define CONFIG_HW_WATCHDOG +#define CONFIG_IMX_HW_WATCHDOG #define CONFIG_MXC_GPIO #define CONFIG_HARD_SPI diff --git a/include/configs/qong.h b/include/configs/qong.h index e824e17..cdde1cb 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -54,6 +54,7 @@ #define CONFIG_MXC_GPIO #define CONFIG_HW_WATCHDOG +#define CONFIG_IMX_HW_WATCHDOG #define CONFIG_MXC_SPI #define CONFIG_DEFAULT_SPI_BUS 1 diff --git a/include/watchdog.h b/include/watchdog.h index b959914..328a30b 100644 --- a/include/watchdog.h +++ b/include/watchdog.h @@ -35,6 +35,7 @@ * Hardware watchdog */ #ifdef CONFIG_HW_WATCHDOG + void hw_watchdog_init(void); #if defined(__ASSEMBLY__) #define WATCHDOG_RESET bl hw_watchdog_reset #else -- 1.7.9.5

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[U-Boot] [RFC PATCH 0/2] USB: XHCI: Add xHCI host controller stack driver
by Vivek Gautam 11 Jan '13

11 Jan '13

This change adds necessary framework support for USB3.0 (Super-speed) and xHCI host controller stack layer. This stack will eventually interact with SOC specific USB 3.0 controllers. Based on 'master' branch of u-boot tree. Tested successfully with local patches on xHCI support for exynos5 with Kingston USB 2.0 data traveler (512 MB) and Corsair USB 3.0 flash voyager. However, also saw failures with Transcend USB 3.0 (8 GB) and a Jetflash 256 MB. We are further debugging and testing this thoroughly. In the meantime can this be reviewed please? This definitely needs further improvements ;-). Although, code is based on linux's xHCI host controller driver, at certain points putting some delays seemed to make the device working (couldn't get proper explanation on delays in xHCI or USB 3.0 specifications :-(, any help in this regard will be very much appreciated). Vivek Gautam (2): USB: SS: Add support for Super Speed USB interface USB: xHCI: Add stack support for xHCI common/cmd_usb.c | 6 +- common/usb.c | 41 +- common/usb_hub.c | 26 +- common/usb_storage.c | 35 +- drivers/usb/host/xhci.c | 3330 ++++++++++++++++++++++++++++++++++++++++++++++ drivers/usb/host/xhci.h | 1360 +++++++++++++++++++ include/common.h | 2 + include/linux/usb/ch9.h | 2 +- include/usb.h | 15 +- include/usb_defs.h | 26 +- include/usbdescriptors.h | 201 +++ 11 files changed, 5012 insertions(+), 32 deletions(-) create mode 100644 drivers/usb/host/xhci.c create mode 100644 drivers/usb/host/xhci.h -- 1.7.6.5

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[U-Boot] Pull request for u-boot-marvell.git
by Prafulla Wadaskar 10 Jan '13

10 Jan '13

Dear Albert Please kindly pull The following changes since commit ca849aa4b86b282f837c58a0b129460ebfad2239: David MÃ¼ller (ELSOFT AG) (1): ARM: activate DISPLAY_CPUINFO for VCMA9 + SMDK2410 board are available in the git repository at: u-boot-marvell.git master branch. Albert ARIBAUD (5): edminiv2: add hush parser, cmdline editing and long help Rename ehci-kirkwood as ehci-marvell Remove kirkwood-specifics from marvell EHCI driver orion5x: add USB host ehci-marvell support edminiv2: add USB host support Holger Brunck (2): arm/km: speed up i2c access for keymile boards arm/km: checkpatch cleanup Ian Campbell (1): kirkwood_spi: correct access to irq_mask register Michael Walle (1): arm, arm-kirkwood: disable l2c before linux boot Prafulla Wadaskar (1): bugfix: all Marvell specific build fails due to undefined reference to `get_ticks' Stefan (1): kirkwood: add support for D-Link DNS-325 MAINTAINERS | 4 + arch/arm/cpu/arm926ejs/armada100/timer.c | 18 ++ arch/arm/cpu/arm926ejs/cache.c | 9 + arch/arm/cpu/arm926ejs/cpu.c | 2 + arch/arm/cpu/arm926ejs/kirkwood/Makefile | 1 + arch/arm/cpu/arm926ejs/kirkwood/cache.c | 34 ++++ arch/arm/cpu/arm926ejs/kirkwood/timer.c | 18 ++ arch/arm/cpu/arm926ejs/orion5x/timer.c | 18 ++ arch/arm/cpu/arm926ejs/pantheon/timer.c | 18 ++ arch/arm/include/asm/arch-kirkwood/config.h | 2 +- arch/arm/include/asm/arch-kirkwood/kirkwood.h | 12 ++ arch/arm/include/asm/arch-orion5x/orion5x.h | 12 ++ board/d-link/dns325/Makefile | 49 +++++ board/d-link/dns325/dns325.c | 148 ++++++++++++++ board/d-link/dns325/dns325.h | 48 +++++ board/d-link/dns325/kwbimage.cfg | 208 ++++++++++++++++++++ board/keymile/km_arm/km_arm.c | 23 +-- boards.cfg | 1 + drivers/spi/kirkwood_spi.c | 2 +- drivers/usb/host/Makefile | 2 +- .../usb/host/{ehci-kirkwood.c => ehci-marvell.c} | 36 ++-- include/configs/dns325.h | 188 ++++++++++++++++++ include/configs/edminiv2.h | 24 +++ include/configs/km/km_arm.h | 2 +- 24 files changed, 849 insertions(+), 30 deletions(-) create mode 100644 arch/arm/cpu/arm926ejs/kirkwood/cache.c create mode 100644 board/d-link/dns325/Makefile create mode 100644 board/d-link/dns325/dns325.c create mode 100644 board/d-link/dns325/dns325.h create mode 100644 board/d-link/dns325/kwbimage.cfg rename drivers/usb/host/{ehci-kirkwood.c => ehci-marvell.c} (73%) create mode 100644 include/configs/dns325.h Regards.. Prafulla . . .

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[U-Boot] [PATCH] fs: fat: Fix mkcksum() function parameters
by Marek Vasut 09 Jan '13

09 Jan '13

The mkcksum() function now takes one parameter, the pointer to 11-byte wide character array, which it then operates on. Currently, the function is wrongly passed (dir_entry)->name, which is only 8-byte wide character array. Though by further inspecting the dir_entry structure, it can be noticed that the name[8] entry is immediatelly followed by ext[3] entry. Thus, name[8] and ext[3] in the dir_entry structure actually work as this 11-byte wide array since they're placed right next to each other by current compiler behavior. Depending on this is obviously wrong, thus fix this by correctly passing both (dir_entry)->name and (dir_entry)->ext to the mkcksum() function and adjust the function appropriately. Signed-off-by: Marek Vasut <marex(a)denx.de> Cc: Tom Rini <trini(a)ti.com> --- fs/fat/fat.c | 20 ++++++++++++-------- fs/fat/fat_write.c | 2 +- 2 files changed, 13 insertions(+), 9 deletions(-) diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 41ae15e..8870292 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -567,15 +567,16 @@ get_vfatname(fsdata *mydata, int curclust, __u8 *cluster, } /* Calculate short name checksum */ -static __u8 mkcksum(const char *str) +static __u8 mkcksum(const char name[8], const char ext[3]) { int i; __u8 ret = 0; - for (i = 0; i < 11; i++) { - ret = (((ret & 1) << 7) | ((ret & 0xfe) >> 1)) + str[i]; - } + for (i = 0; i < sizeof(name); i++) + ret = (((ret & 1) << 7) | ((ret & 0xfe) >> 1)) + name[i]; + for (i = 0; i < sizeof(ext); i++) + ret = (((ret & 1) << 7) | ((ret & 0xfe) >> 1)) + ext[i]; return ret; } @@ -678,7 +679,8 @@ static dir_entry *get_dentfromdir(fsdata *mydata, int startsect, return NULL; } #ifdef CONFIG_SUPPORT_VFAT - if (dols && mkcksum(dentptr->name) == prevcksum) { + __u8 csum = mkcksum(dentptr->name, dentptr->ext); + if (dols && csum == prevcksum) { prevcksum = 0xffff; dentptr++; continue; @@ -946,13 +948,16 @@ do_fat_read_at(const char *filename, unsigned long pos, void *buffer, for (i = 0; i < DIRENTSPERBLOCK; i++) { char s_name[14], l_name[VFAT_MAXLEN_BYTES]; + __u8 csum; l_name[0] = '\0'; if (dentptr->name[0] == DELETED_FLAG) { dentptr++; continue; } - if ((dentptr->attr & ATTR_VOLUME)) { + + csum = mkcksum(dentptr->name, dentptr->ext); + if (dentptr->attr & ATTR_VOLUME) { #ifdef CONFIG_SUPPORT_VFAT if ((dentptr->attr & ATTR_VFAT) == ATTR_VFAT && (dentptr->name[0] & LAST_LONG_ENTRY_MASK)) { @@ -1015,8 +1020,7 @@ do_fat_read_at(const char *filename, unsigned long pos, void *buffer, goto exit; } #ifdef CONFIG_SUPPORT_VFAT - else if (dols == LS_ROOT && - mkcksum(dentptr->name) == prevcksum) { + else if (dols == LS_ROOT && csum == prevcksum) { prevcksum = 0xffff; dentptr++; continue; diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c index 5829adf..97a18cb 100644 --- a/fs/fat/fat_write.c +++ b/fs/fat/fat_write.c @@ -335,7 +335,7 @@ fill_dir_slot(fsdata *mydata, dir_entry **dentptr, const char *l_name) /* Get short file name and checksum value */ strncpy(s_name, (*dentptr)->name, 16); - checksum = mkcksum(s_name); + checksum = mkcksum(*dentptr->name, *dentptr->ext); do { memset(slotptr, 0x00, sizeof(dir_slot)); -- 1.7.10.4

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[U-Boot] Secure update of uboot devices?
by Andreas Bäck 08 Jan '13

08 Jan '13

With the new threats like Stuxnet and Duqu one need to improve on how new updates to software is distrubuted to devcies so one can be sure that it's not a hacked or modified software that runs in the device. We use uboot + usb stick to update the software in our devices. Have anyone been trying out to add e.g cryptated,certificates or rsa keys to uboot?

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[U-Boot] [PATCH 00/13] mxc nand: Add support for i.MX5
by Benoît Thébaudeau 08 Jan '13

08 Jan '13

Hi all, This series aims at adding support for i.MX5 to the mxc nand mtd and spl drivers. It also fixes several issues and cleans up the code a little bit. Best regards, Benoît

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