July 2011 - U-Boot

Re: [U-Boot] [PATCH 2/2] mtd/nand : workaround for Freescale FCM to supportlarge-page Nand chip
by Matthew L. Creech 08 Jul '11

08 Jul '11

On Tue, Jun 28, 2011 at 12:30 PM, Scott Wood <scottwood(a)freescale.com> wrote: > On Tue, 28 Jun 2011 11:35:12 -0400 > Mike Hench <mhench(a)elutions.com> wrote: > >> >> Any boot ideas ? >> Will the FCM load 2k and run it? > > The 4K boot region will have to be split over pages 0 and 2 (2k view) or > the first half of pages 0 and 1 (4k view). > (Redirecting to the U-Boot list) Hi Scott, Does this kind of page-splitting only apply to the IPL and nothing else? If so, it seems that if: 1. modifications are made to U-Boot's fsl_elbc_nand driver similar to Liu Shuo's kernel mods, and 2. an option is added to generate u-boot-nand.bin with its IPL split into two 2k chunks then we can boot and run entirely from a 4k page device on MPC 83xx, correct? That would be very good news, as it seems that [some] 2k NAND parts are starting to go EOL. Thanks! -- Matthew L. Creech

3 4

[U-Boot] [PATCH] AT91: enable MMC on at91sam(9260/9g20/0xe)ek
by Reinhard Meyer 08 Jul '11

08 Jul '11

Signed-off-by: Reinhard Meyer <u-boot(a)emk-elektronik.de> --- board/atmel/at91sam9260ek/at91sam9260ek.c | 33 +++++++++++++++++++++ include/configs/at91sam9260ek.h | 45 ++++++++++++++++++---------- 2 files changed, 62 insertions(+), 16 deletions(-) diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index 682b922..784632e 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -23,6 +23,7 @@ */ #include <common.h> +#include <mmc.h> #include <asm/io.h> #include <asm/arch/at91sam9260_matrix.h> #include <asm/arch/at91sam9_smc.h> @@ -143,6 +144,38 @@ static void at91sam9260ek_macb_hw_init(void) } #endif +#ifdef CONFIG_GENERIC_ATMEL_MCI +/* this is a weak define that we are overriding */ +int board_mmc_init(bd_t *bd) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + + /* Enable MCI clock */ + writel(1 << ATMEL_ID_MCI, &pmc->pcer); + + /* Initialize MCI hardware */ + at91_mci_hw_init(); + + /* This calls the atmel_mmc_init in gen_atmel_mci.c */ + return atmel_mci_init((void *)ATMEL_BASE_MCI); +} + +/* this is a weak define that we are overriding */ +int board_mmc_getcd(u8 *cd, struct mmc *mmc) +{ + /* + * the only currently existing use of this function + * (fsl_esdhc.c) suggests this function must return + * *cs = TRUE if a card is NOT detected -> in most + * cases the value of the pin when the detect switch + * closes to GND + */ + *cd = at91_get_gpio_value(CONFIG_SYS_MMC_CD_PIN) ? 1 : 0; + return 0; +} + +#endif + int board_early_init_f(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 88578c6..f12e83a 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -75,6 +75,14 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } +/* SD/MMC card */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_GENERIC_ATMEL_MCI +#define CONFIG_SYS_MMC_CD_PIN AT91_PIN_PC9 +#define CONFIG_CMD_MMC +#define CONFIG_ATMEL_MCI_PORTB /* use port B on those boards */ + /* LED */ #define CONFIG_AT91_LED #define CONFIG_RED_LED AT91_PIN_PA9 /* this is the power led */ @@ -127,21 +135,26 @@ (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) #endif -/* DataFlash */ -#define CONFIG_ATMEL_DATAFLASH_SPI -#define CONFIG_HAS_DATAFLASH 1 -#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) -#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 -#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ -#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ -#define AT91_SPI_CLK 15000000 - -#ifdef CONFIG_AT91SAM9G20EK -#define DATAFLASH_TCSS (0x22 << 16) -#else -#define DATAFLASH_TCSS (0x1a << 16) -#endif -#define DATAFLASH_TCHS (0x1 << 24) +/* + * DataFlash + * cannot coexist with MMC due to shared pins. + */ +#ifndef CONFIG_MMC +# define CONFIG_ATMEL_DATAFLASH_SPI +# define CONFIG_HAS_DATAFLASH 1 +# define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) +# define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 +# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ +# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ +# define AT91_SPI_CLK 15000000 + +# ifdef CONFIG_AT91SAM9G20EK +# define DATAFLASH_TCSS (0x22 << 16) +# else +# define DATAFLASH_TCSS (0x1a << 16) +# endif +# define DATAFLASH_TCHS (0x1 << 24) +#endif /* ifndef CONFIG_MMC */ /* NAND flash */ #ifdef CONFIG_CMD_NAND -- 1.5.6.5

1 0

[U-Boot] [PATCH] arm: Adds saving of Kernel boot args to NAND flash
by Simon Schwarz 08 Jul '11

08 Jul '11

Adds the saving of either ATAGS or FDT kernel argument image to NAND flash. This image then can be used in SPL boot. This adds two CONFIG_ paramter to board configuration (in this RFC as example added to devkit8000.h): CONFIG_SAVE_BOOT_ARGS makes the feature active CONFIG_BOOT_ARGS_NAND_OFS defines the offset in NAND flash where the image is saved For OMAP34XX the image is saved with hw-ecc. Signed-off-by: Simon Schwarz <simonschwarzcor(a)gmail.com> --- This is an RFC on how this can be done. What I don't like here is the omap specific hw ecc switch. But the nand-spl has just hw-ecc yet - at least afaik. Belonging discussion: http://marc.info/?t=130942998000003 Regards Simon arch/arm/lib/bootm.c | 64 ++++++++++++++++++++++++++++++++++++++++++ include/configs/devkit8000.h | 4 ++ 2 files changed, 68 insertions(+), 0 deletions(-) diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index 802e833..57e08d3 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -5,6 +5,10 @@ * * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw(a)its.tudelft.nl) * + * Copyright (C) 2011 + * Corscience GmbH & Co. KG - Simon Schwarz <schwarz(a)corscience.de> + * - added saving of kernel-parameter-image to NAND flash + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or @@ -30,6 +34,14 @@ #include <libfdt.h> #include <fdt_support.h> +#ifdef CONFIG_SAVE_BOOT_ARGS +#include <nand.h> +#include <asm/setup.h> +#ifdef CONFIG_OMAP34XX +#include <asm/arch/sys_proto.h> +#endif +#endif + DECLARE_GLOBAL_DATA_PTR; #if defined (CONFIG_SETUP_MEMORY_TAGS) || \ @@ -58,6 +70,38 @@ static ulong get_sp(void); static int bootm_linux_fdt(int machid, bootm_headers_t *images); #endif +#ifdef CONFIG_SAVE_BOOT_ARGS +/* This function writes given bootparams to NAND flash + * adr: Start adress of Kernel parameter image (ATAGS, FDT) + * length: length of the image in byte + * + * borrowd heavily from common/cmd_nand.c + */ +void boot_params_to_nand(u_char *adr, size_t length) { + nand_info_t *nand = &nand_info[nand_curr_device]; /* use current dev */ + loff_t off = CONFIG_BOOT_ARGS_NAND_OFS; + nand_erase_options_t opts; + +#ifdef CONFIG_OMAP34XX + omap_nand_switch_ecc(1); /* use hw ecc on omap for SPL compat */ +#endif + /* erase */ + memset(&opts, 0, sizeof(opts)); + opts.offset = off; + opts.length = length; + opts.quiet = 1; + opts.spread = 1; + nand_erase_opts(nand,&opts); + + /* write */ + if(nand_write_skip_bad(nand, off, &length, adr, 0)) + printf("FAILED!\n"); + + printf("Written to offset 0x%llX, size: %d bytes\n", + off, length); +} +#endif /* CONFIG_SAVE_BOOT_ARGS */ + void arch_lmb_reserve(struct lmb *lmb) { ulong sp; @@ -104,6 +148,10 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) char *commandline = getenv ("bootargs"); #endif +#ifdef CONFIG_SAVE_BOOT_ARGS + struct tag *t; + size_t size=0; +#endif if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) return 1; @@ -150,6 +198,17 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) setup_end_tag(bd); #endif +#ifdef CONFIG_SAVE_BOOT_ARGS + printf("write ATAGS to NAND...\n"); + + /* get size of atags */ + for_each_tag(t, (struct tag *)(bd->bi_boot_params)) + size += t->hdr.size; + size += 2; /* ATAG_NONE has size 0 */ + size *= 4; /* words -> byte! */ + boot_params_to_nand((u_char *)bd->bi_boot_params, size); +#endif + announce_and_cleanup(); kernel_entry(0, machid, bd->bi_boot_params); @@ -208,6 +267,11 @@ static int bootm_linux_fdt(int machid, bootm_headers_t *images) fdt_initrd(*of_flat_tree, *initrd_start, *initrd_end, 1); +#ifdef CONFIG_SAVE_BOOT_ARGS + printf("write FDT to NAND...\n"); + boot_params_to_nand((u_char *)(*of_flat_tree),of_size); +#endif + announce_and_cleanup(); kernel_entry(0, machid, *of_flat_tree); diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 1bf6bea..3061fc2 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -345,4 +345,8 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) +/* Direct OS boot options */ +#define CONFIG_SAVE_BOOT_ARGS +#define CONFIG_BOOT_ARGS_NAND_OFS 0x700000 + #endif /* __CONFIG_H */ -- 1.7.4.1

4 14

Re: [U-Boot] [PATCH 1/4] Armada100: Ethernet support for Marvell gplugD
by Ajay Bhargav 08 Jul '11

08 Jul '11

Dear Wolfgang, I need some more clarification on the GPIO part. Most of the architectures i see define their own way of working with GPIO. There is no generic framework for GPIO as i see. I followed similar style used in drivers/gpio/kw_gpio.c they however used different names so its not so easy to make out that they are actually GPIO registers. Regards, Ajay Bhargav ----- Original Message ----- From: "Wolfgang Denk" <wd(a)denx.de> To: "Ajay Bhargav" <ajay.bhargav(a)einfochips.com> Cc: prafulla(a)marvell.com, u-boot(a)lists.denx.de Sent: Friday, July 8, 2011 1:17:50 PM Subject: Re: [U-Boot] [PATCH 1/4] Armada100: Ethernet support for Marvell gplugD Dear Ajay Bhargav, In message <1310106168-17166-1-git-send-email-ajay.bhargav(a)einfochips.com> you wrote: > This patch adds ethernet support for GuruPlug-Display. tftpboot and > and other network related commands now works. > > Signed-off-by: Ajay Bhargav <ajay.bhargav(a)einfochips.com> > --- > .gitignore | 1 + > arch/arm/include/asm/arch-armada100/armada100.h | 39 ++ > arch/arm/include/asm/arch-armada100/gpio.h | 81 +++ > arch/arm/include/asm/arch-armada100/mfp.h | 19 + > board/Marvell/gplugd/gplugd.c | 77 +++ > drivers/net/Makefile | 1 + > drivers/net/pxa168_eth.c | 815 +++++++++++++++++++++++ > drivers/net/pxa168_eth.h | 239 +++++++ > include/configs/gplugd.h | 22 +- > include/netdev.h | 1 + > 10 files changed, 1293 insertions(+), 2 deletions(-) > create mode 100644 arch/arm/include/asm/arch-armada100/gpio.h > create mode 100644 drivers/net/pxa168_eth.c > create mode 100644 drivers/net/pxa168_eth.h > > diff --git a/.gitignore b/.gitignore > index 8ec3d06..806ab29 100644 > --- a/.gitignore > +++ b/.gitignore > @@ -43,6 +43,7 @@ > > /include/generated/ > /lib/asm-offsets.s > +/include/configs/tags This change is unrelated. Please submit separately. > # stgit generated dirs > patches-* > diff --git a/arch/arm/include/asm/arch-armada100/armada100.h b/arch/arm/include/asm/arch-armada100/armada100.h > index d5d125a..b21e476 100644 > --- a/arch/arm/include/asm/arch-armada100/armada100.h > +++ b/arch/arm/include/asm/arch-armada100/armada100.h > @@ -60,6 +60,9 @@ > #define ARMD1_APMU_BASE 0xD4282800 > #define ARMD1_CPU_BASE 0xD4282C00 > > +#define FEC_CLK_ADR 0xD42828FC > + > + Only one blank line, please, at places like that. > --- /dev/null > +++ b/arch/arm/include/asm/arch-armada100/gpio.h > @@ -0,0 +1,81 @@ > +/************************************************************************** > + * > + * Copyright (c) 2009, 2010 Marvell International Ltd. ... Incorrect multiline comment style. +#define GPIO_bit(gpio) (1 << ((gpio) & 0x1f)) Macro names must be all caps. ... > +#define GPLR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x00) > +#define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c) > +#define GPSR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x18) > +#define GPCR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x24) > +#define GSDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x54) > +#define GCDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x60) Please use a C struct to dsescribe the register layout. +#define GPIO_SET 1 +#define GPIO_CLR 0 + +static inline int gpio_get_value(unsigned gpio) Don't we have a generic GPIO framework we should use here? > diff --git a/board/Marvell/gplugd/gplugd.c b/board/Marvell/gplugd/gplugd.c > index dc7d89d..81770fc 100644 > --- a/board/Marvell/gplugd/gplugd.c > +++ b/board/Marvell/gplugd/gplugd.c > @@ -32,9 +32,24 @@ > #include <mvmfp.h> > #include <asm/arch/mfp.h> > #include <asm/arch/armada100.h> > +#include <asm/arch/gpio.h> > +#include <miiphy.h> > + > +#ifdef CONFIG_PXA_ETH > +#include <net.h> > +#include <netdev.h> > +#endif /* CONFIG_PXA_ETH */ > > DECLARE_GLOBAL_DATA_PTR; > > +#define PHY_LED_PAR_SEL_REG 22 > +#define PHY_LED_MAN_REG 25 > +#define PHY_LED_VAL 0x5b /* LINK LED1, ACT LED2 */ > +#define PHY_RST 104 /* GPIO104 - PHY RESET */ > +#define RTC_IRQ 102 /* GPIO102 - RTC IRQ Input */ > +#define FE_CLK_RST 0x1 > +#define FE_CLK_ENA 0x8 Hm... is this cource file the right place for such #defines? Probably some should go into global hader files, other into the board config file? > diff --git a/drivers/net/pxa168_eth.c b/drivers/net/pxa168_eth.c > new file mode 100644 > index 0000000..f5251e9 > --- /dev/null > +++ b/drivers/net/pxa168_eth.c ... This driver looks very much similar to what we already have in drivers/net/mvgbe.c. Instead of re-implementing the same code again and again, please come up with a unified version. > diff --git a/drivers/net/pxa168_eth.h b/drivers/net/pxa168_eth.h > new file mode 100644 > index 0000000..29c8673 > --- /dev/null > +++ b/drivers/net/pxa168_eth.h ... > +struct pxa_reg { > + u32 phyadr; > + u8 pad1[0x010 - 0x00 - 4]; > + u32 smi; > + u8 pad2[0x400 - 0x010 - 4]; > + u32 pconf; > + u8 pad3[4]; > + u32 pconf_ext; > + u8 pad4[4]; > + u32 pcmd; > + u8 pad5[4]; > + u32 pstatus; > + u8 pad6[4]; > + u32 spar; > + u8 pad7[4]; > + u32 htpr; > + u8 pad8[4]; > + u32 fcsal; > + u8 pad9[4]; > + u32 fcsah; > + u8 pad10[4]; > + u32 sdma_conf; > + u8 pad11[4]; > + u32 sdma_cmd; > + u8 pad12[4]; > + u32 ic; > + u32 iwc; > + u32 im; > + u8 pad13[4]; > + u32 *eth_idscpp[4]; > + u32 eth_vlan_p; > + u8 pad14[0x480 - 0x470 - 4]; > + struct rx_desc *rxfdp[4]; > + u8 pad15[0x4a0 - 0x48c - 4]; > + struct rx_desc *rxcdp[4]; > + u8 pad16[0x4e0 - 0x4ac - 4]; > + struct tx_desc *txcdp[2]; > +}; Would it not be nice to have a few comments here what the entries are? > +struct pxa_device { > + struct eth_device dev; > + struct pxa_reg *regs; > + struct tx_desc *p_txdesc; > + struct rx_desc *p_rxdesc; > + struct rx_desc *p_rxdesc_curr; > + u8 *p_rxbuf; > + u8 *p_aligned_txbuf; > + u8 *htpr; /* hash pointer */ > +}; Again, this should porobably be unified with drivers/net/mvgbe.h > +#define CONFIG_IPADDR 192.168.9.51 > +#define CONFIG_SERVERIP 192.168.9.91 > +#define CONFIG_ETHADDR "F0:AD:4E:00:32:9C" NAK. We don't allow such static initializations of network parameters. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de "Don't worry about people stealing your ideas. If your ideas are any good, you'll have to ram them down people's throats." - Howard Aiken -- This message has been scanned for viruses and dangerous content by Clean Mail Gateway, and is believed to be clean. ************************************************************************************************************************************************************* einfochips Business Disclaimer : This e-mail message and all attachments transmitted with it are intended solely for the use of the addressee and may contain legally privileged and confidential information. If the reader of this message is not the intended recipient, or an employee or agent responsible for delivering this message to the intended recipient, you are hereby notified that any dissemination, distribution, copying, or other use of this message or its attachments is strictly prohibited. If you have received this message in error, please notify the sender immediately by replying to this message and please delete it from your computer. Any views expressed in this message are those of the individual sender unless otherwise stated. Company has taken enough precautions to prevent the spread of viruses. However the company accepts no liability for any damage caused by any virus transmitted by this email. *************************************************************************************************************************************************************

3 2

Re: [U-Boot] [PATCH 1/4] Armada100: Ethernet support for Marvell gplugD
by Ajay Bhargav 08 Jul '11

08 Jul '11

Dear Wolfgang, > Bad examples are no excuse for adding more bad code. got it :) > Some things only get noticed when they already exist. But once > noticed, we should not repeat the same mistakes. I wouldn't have tried making that mistake if it was mentioned that earlier implementations are wrong. I just thought its a simple way to do a complex thing :) I will get back with updated patch. Thanks for your time sir. Regards, Ajay Bhargav

2 1

Re: [U-Boot] [PATCH 1/4] Armada100: Ethernet support for Marvell gplugD
by Ajay Bhargav 08 Jul '11

08 Jul '11

Dear Wolfdang, I did get your point sir, but... > To me this looks different. > - Do not use a "base address + offset" notation (with a declartion of > register offsets in your header files), but use C structs instead to > describe the regioster layout, and then use proper I/O accessor > functions on them. asm/arch-kirkwood/gpio.h)> #define GPIO_OFF(pin) (((pin) >> 5) ? 0x0040 : 0x0000) #define GPIO_OUT(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x00) #define GPIO_IO_CONF(pin) (KW_GPIO0_BASE + GPIO_OFF(pin) + 0x04) #define GPIO_REG(x) (GPIO_REGS_VIRT + (x)) #define GPLR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x00) #define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c) > - Do not implement your own GPIO framework, but instead use existing > code. I did not tried anything on my own. I just tried similar things which were done by others already. I hope I am able to highlight what i am trying to say. Regards, Ajay Bhargav

2 1

Re: [U-Boot] [PATCH 1/4] Armada100: Ethernet support for Marvell gplugD
by Ajay Bhargav 08 Jul '11

08 Jul '11

Dear Wolfgang, Thanks for info, I have seen that. But i am not adding support for GPIO commands. In reference to >> +#define GPLR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x00) >> +#define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c) >> +#define GPSR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x18) >> +#define GPCR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x24) >> +#define GSDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x54) >> +#define GCDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x60) > Please use a C struct to dsescribe the register layout. I have followed similar way of using GPIO as used by "drivers/gpio/kw_gpio.c" and defined in "include/asm/arch-kirkwood/gpio.h", so actually i am not adding GPIO support rather i wrote functions that are required by the Ethernet and other drivers. Regards, Ajay Bhargav

2 1

Re: [U-Boot] MCI support in U-Boot
by Reinhard Meyer 08 Jul '11

08 Jul '11

Dear Song, Elen, > Hello Reinhard, > > We planed to add MCI support in U-Boot. We found you once had a branch named “wip110202” which makes use of generic > mci for AT91SAM9260. The commit id is 137f4defd “AT91:enable MMC on at91sam(9260/9g20/0xe)ek”. > > I tried that branch. It works well with generic mci command. But now it is gone. Do you have any future plan for the > MCI support on AT91? > We've done something on top of wip110202 to support other AT91 EK boards. Could you point what we shall continue to > move on? A patch for MMC/SD making it work on at91sam9260 is here. Unfortunately I have mixed an unrelated change (to CONFIG_SYS_TEXT_BASE) into the same patch, I have to seperate that first before submitting to mainline u-boot. On that CONFIG_SYS_TEXT_BASE matter, I intended to move it to start of SDRAM, making sure u-boot relocation will not overlap (currently _TEXT_BASE is near end of SDRAM). I know that requires a change to at91bootstrap as well. What is your opinion on this? Reinhard

1 0

[U-Boot] CONGRATULATIONS" YOUR EMAIL HAS WON, OPEN ATTACHMENT FILE.
by UNITED NATIONS AND USA CRISIS-SURVIVAL LOTTERY AWARD 08 Jul '11

08 Jul '11

1 0

[U-Boot] Enabling of KGDB using U-Boot
by maheen butt 08 Jul '11

08 Jul '11

I want to know U-boot user mode configuration to enable KGDB. Is there any solution to my problem. actually I have seen some thing like this CFG_CMD_KGDB* kgdb in u-boot readme. this CFG_CMD_KGDB is 'or'ed to CONFIG_COMMANDS but I dont know the proper procedure.

1 0