June 2011 - U-Boot

[U-Boot] NEW!!!!!!!!! LED down/ceiling/indoor light
by penny(LED light manufactory) 03 Jun '11

03 Jun '11

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Re: [U-Boot] [STATUS] WARNING: huge ARM board removal pending
by Wolfgang Denk 03 Jun '11

03 Jun '11

Dear Reinhard, In message <8A423D2D-B4CA-422A-813D-E808A0B849A0(a)googlemail.com> Andreas Bießmann wrote: > > > At present, the following 112 boards are scheduled for removal: > > <snip boards> > > > Please submit fixes to prevent removal. > > http://patchwork.ozlabs.org/patch/83703/ is pending since february and will fix at least: > > at91rm9200ek at91rm9200ek_ram eb_cpux9k2 > (maybe some other arm920t/at91 boards) > > > Note: countdown is T minus 10 days, and counting. > > Reinhard could you please schedule this patch? > Can you please comment why thi spatch has not been applied yet, and when we will see a pull request to include it? Would it be possible to have this in the next few days, so we cah have a -rc3 before the .06 release? Thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de What was sliced bread the greatest thing since?

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[U-Boot] [Patch v3 1/2] Adding more SPD registers
by York Sun 03 Jun '11

03 Jun '11

Adding byte 32 and 33 Signed-off-by: York Sun <yorksun(a)freescale.com> --- include/ddr_spd.h | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/include/ddr_spd.h b/include/ddr_spd.h index e895d61..40a0463 100644 --- a/include/ddr_spd.h +++ b/include/ddr_spd.h @@ -219,7 +219,9 @@ typedef struct ddr3_spd_eeprom_s { Delay Time*/ unsigned char opt_features; /* 30 SDRAM Optional Features */ unsigned char therm_ref_opt; /* 31 SDRAM Thermal and Refresh Opts */ - unsigned char res_32_59[28]; /* 32-59 Reserved, General Section */ + unsigned char therm_sensor; /* 32 Module Thermal Sensor */ + unsigned char device_type; /* 33 SDRAM device type */ + unsigned char res_34_59[26]; /* 34-59 Reserved, General Section */ /* Module-Specific Section: Bytes 60-116 */ union { -- 1.7.0.4

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[U-Boot] [PATCH] powerpc/86xx: display boot device and bank on the MPC8610 HPCD
by Timur Tabi 03 Jun '11

03 Jun '11

Signed-off-by: Timur Tabi <timur(a)freescale.com> --- board/freescale/mpc8610hpcd/mpc8610hpcd.c | 25 +++++++++++++++++++++++-- 1 files changed, 23 insertions(+), 2 deletions(-) diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index d7dd470..4e4b7c0 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -94,11 +94,32 @@ int checkboard(void) volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm; u8 *pixis_base = (u8 *)PIXIS_BASE; - printf ("Board: MPC8610HPCD, System ID: 0x%02x, " - "System Version: 0x%02x, FPGA Version: 0x%02x\n", + printf ("Board: MPC8610HPCD, Sys ID: 0x%02x, " + "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), in_8(pixis_base + PIXIS_PVER)); + /* + * The MPC8610 HPCD workbook says that LBMAP=11 is the "normal" boot + * bank and LBMAP=00 is the alternate bank. However, the pixis + * altbank code can only set bits, not clear them, so we treat 00 as + * the normal bank and 11 as the alternate. + */ + switch (in_8(pixis_base + PIXIS_VBOOT) & 0xC0) { + case 0: + puts("vBank: Standard\n"); + break; + case 0x40: + puts("Promjet\n"); + break; + case 0x80: + puts("NAND\n"); + break; + case 0xC0: + puts("vBank: Alternate\n"); + break; + } + mcm->abcr |= 0x00010000; /* 0 */ mcm->hpmr3 = 0x80000008; /* 4c */ mcm->hpmr0 = 0; -- 1.7.3.4

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[U-Boot] [PATCH][v2] powerpc/85xx: Add NAND boot support for P3041/P5020DS
by Shaohui Xie 03 Jun '11

03 Jun '11

When booting from NAND we get the environment from NAND. Signed-off-by: Shaohui Xie <b21989(a)freescale.com> Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- changes for v2: move _NAND up to sorted by alpha. boards.cfg | 2 ++ include/configs/corenet_ds.h | 29 +++++++++++++++++++++++------ 2 files changed, 25 insertions(+), 6 deletions(-) diff --git a/boards.cfg b/boards.cfg index 9f2b118..f170042 100644 --- a/boards.cfg +++ b/boards.cfg @@ -572,12 +572,14 @@ P2020RDB_NAND powerpc mpc85xx p1_p2_rdb freesca P2020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,SDCARD P2020RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,SPIFLASH P3041DS powerpc mpc85xx corenet_ds freescale +P3041DS_NAND powerpc mpc85xx corenet_ds freescale - P3041DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000 P3041DS_SDCARD powerpc mpc85xx corenet_ds freescale - P3041DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000 P3041DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P3041DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000 P4080DS powerpc mpc85xx corenet_ds freescale P4080DS_SDCARD powerpc mpc85xx corenet_ds freescale - P4080DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000 P4080DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P4080DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000 P5020DS powerpc mpc85xx corenet_ds freescale +P5020DS_NAND powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000 P5020DS_SDCARD powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000 P5020DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000 mpq101 powerpc mpc85xx mpq101 mercury - mpq101 diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 9ba032b..2e45b92 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -91,6 +91,11 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_OFFSET (512 * 1097) +#elif defined(CONFIG_NAND) +#define CONFIG_SYS_EXTRA_ENV_RELOC +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE +#define CONFIG_ENV_OFFSET (5 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) @@ -196,10 +201,10 @@ #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE #endif -#define CONFIG_SYS_BR0_PRELIM \ - (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) | \ - BR_PS_16 | BR_V) -#define CONFIG_SYS_OR0_PRELIM ((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \ +#define CONFIG_SYS_FLASH_BR_PRELIM \ + (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) \ + | BR_PS_16 | BR_V) +#define CONFIG_SYS_FLASH_OR_PRELIM ((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \ | OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR) #define CONFIG_SYS_BR1_PRELIM \ @@ -268,9 +273,21 @@ | OR_FCM_TRLX \ | OR_FCM_EHTR) -#define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ -#define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ +#ifdef CONFIG_NAND +#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ +#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ +#define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ +#define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ +#else +#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ +#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ +#define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ +#define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ +#endif #endif /* CONFIG_NAND_FSL_ELBC */ +#else +#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ +#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_FLASH_OR_PRELIM /* NOR Options */ #endif #define CONFIG_SYS_FLASH_EMPTY_INFO -- 1.6.4

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[U-Boot] [PATCH v2] powerpc/85xx: Fix compile errors if CONFIG_SYS_DPAA_QBFMAN isn't set
by Kumar Gala 03 Jun '11

03 Jun '11

Add ifdef protection for qp_info and liodn associated with Q/BMan. Also rearrange setting of _tbl_sz variables to utilize existing ifdef protection for things like FMAN. Also add protection around setup_portals() call in corenet_ds board code. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- * Missed one case in corenet_ds.c that also needed #ifdef protection arch/powerpc/cpu/mpc85xx/p3041_ids.c | 11 +++++++---- arch/powerpc/cpu/mpc85xx/p4080_ids.c | 13 ++++++++----- arch/powerpc/cpu/mpc85xx/p5020_ids.c | 11 +++++++---- board/freescale/corenet_ds/corenet_ds.c | 2 ++ 4 files changed, 24 insertions(+), 13 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/p3041_ids.c b/arch/powerpc/cpu/mpc85xx/p3041_ids.c index 1255898..ff51d23 100644 --- a/arch/powerpc/cpu/mpc85xx/p3041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p3041_ids.c @@ -24,6 +24,7 @@ #include <asm/fsl_portals.h> #include <asm/fsl_liodn.h> +#ifdef CONFIG_SYS_DPAA_QBFMAN struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { /* dqrr liodn, frame data liodn, liodn off, sdest */ SET_QP_INFO( 1, 2, 1, 0), @@ -37,10 +38,13 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { SET_QP_INFO( 0, 0, 0, 0), /* for now sdest to 0 */ SET_QP_INFO( 0, 0, 0, 0), /* for now sdest to 0 */ }; +#endif struct liodn_id_table liodn_tbl[] = { +#ifdef CONFIG_SYS_DPAA_QBFMAN SET_QMAN_LIODN(31), SET_BMAN_LIODN(32), +#endif SET_SDHC_LIODN(1, 64), @@ -65,6 +69,7 @@ struct liodn_id_table liodn_tbl[] = { SET_GUTS_LIODN(NULL, 201, rio1maintliodnr, 0), SET_GUTS_LIODN(NULL, 202, rio2maintliodnr, 0), }; +int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl); #ifdef CONFIG_SYS_DPAA_FMAN struct liodn_id_table fman1_liodn_tbl[] = { @@ -75,6 +80,7 @@ struct liodn_id_table fman1_liodn_tbl[] = { SET_FMAN_RX_1G_LIODN(1, 4, 14), SET_FMAN_RX_10G_LIODN(1, 0, 15), }; +int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl); #endif struct liodn_id_table sec_liodn_tbl[] = { @@ -89,6 +95,7 @@ struct liodn_id_table sec_liodn_tbl[] = { SET_SEC_DECO_LIODN_ENTRY(0, 97, 98), SET_SEC_DECO_LIODN_ENTRY(1, 99, 100), }; +int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl); struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100), @@ -99,7 +106,3 @@ struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(136, 172), #endif }; - -int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl); -int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl); -int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl); diff --git a/arch/powerpc/cpu/mpc85xx/p4080_ids.c b/arch/powerpc/cpu/mpc85xx/p4080_ids.c index fd155c8..560c02a 100644 --- a/arch/powerpc/cpu/mpc85xx/p4080_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p4080_ids.c @@ -24,6 +24,7 @@ #include <asm/fsl_portals.h> #include <asm/fsl_liodn.h> +#ifdef CONFIG_SYS_DPAA_QBMAN struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { /* dqrr liodn, frame data liodn, liodn off, sdest */ SET_QP_INFO( 1, 2, 1, 0), @@ -37,6 +38,7 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { SET_QP_INFO(17, 18, 9, 0), /* for now sdest to 0 */ SET_QP_INFO(19, 20, 10, 0), /* for now sdest to 0 */ }; +#endif struct liodn_id_table liodn_tbl[] = { SET_USB_LIODN(1, "fsl-usb2-mph", 127), @@ -55,10 +57,13 @@ struct liodn_id_table liodn_tbl[] = { SET_GUTS_LIODN(NULL, 199, rio2liodnr, 0), SET_GUTS_LIODN(NULL, 200, rmuliodnr, 0), +#ifdef CONFIG_SYS_DPAA_QBMAN SET_QMAN_LIODN(31), SET_BMAN_LIODN(32), +#endif SET_PME_LIODN(128), }; +int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl); #ifdef CONFIG_SYS_DPAA_FMAN struct liodn_id_table fman1_liodn_tbl[] = { @@ -68,6 +73,7 @@ struct liodn_id_table fman1_liodn_tbl[] = { SET_FMAN_RX_1G_LIODN(1, 3, 14), SET_FMAN_RX_10G_LIODN(1, 0, 15), }; +int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl); #if (CONFIG_SYS_NUM_FMAN == 2) struct liodn_id_table fman2_liodn_tbl[] = { @@ -77,6 +83,7 @@ struct liodn_id_table fman2_liodn_tbl[] = { SET_FMAN_RX_1G_LIODN(2, 3, 19), SET_FMAN_RX_10G_LIODN(2, 0, 20), }; +int fman2_liodn_tbl_sz = ARRAY_SIZE(fman2_liodn_tbl); #endif #endif @@ -101,6 +108,7 @@ struct liodn_id_table sec_liodn_tbl[] = { SET_SEC_DECO_LIODN_ENTRY(3, 132, 164), SET_SEC_DECO_LIODN_ENTRY(4, 133, 165), }; +int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl); struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(96, 106), @@ -114,8 +122,3 @@ struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(116, 133), #endif }; - -int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl); -int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl); -int fman2_liodn_tbl_sz = ARRAY_SIZE(fman2_liodn_tbl); -int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl); diff --git a/arch/powerpc/cpu/mpc85xx/p5020_ids.c b/arch/powerpc/cpu/mpc85xx/p5020_ids.c index 1255898..9836588 100644 --- a/arch/powerpc/cpu/mpc85xx/p5020_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p5020_ids.c @@ -24,6 +24,7 @@ #include <asm/fsl_portals.h> #include <asm/fsl_liodn.h> +#ifdef CONFIG_SYS_DPAA_QBMAN struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { /* dqrr liodn, frame data liodn, liodn off, sdest */ SET_QP_INFO( 1, 2, 1, 0), @@ -37,10 +38,13 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = { SET_QP_INFO( 0, 0, 0, 0), /* for now sdest to 0 */ SET_QP_INFO( 0, 0, 0, 0), /* for now sdest to 0 */ }; +#endif struct liodn_id_table liodn_tbl[] = { +#ifdef CONFIG_SYS_DPAA_QBMAN SET_QMAN_LIODN(31), SET_BMAN_LIODN(32), +#endif SET_SDHC_LIODN(1, 64), @@ -65,6 +69,7 @@ struct liodn_id_table liodn_tbl[] = { SET_GUTS_LIODN(NULL, 201, rio1maintliodnr, 0), SET_GUTS_LIODN(NULL, 202, rio2maintliodnr, 0), }; +int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl); #ifdef CONFIG_SYS_DPAA_FMAN struct liodn_id_table fman1_liodn_tbl[] = { @@ -75,6 +80,7 @@ struct liodn_id_table fman1_liodn_tbl[] = { SET_FMAN_RX_1G_LIODN(1, 4, 14), SET_FMAN_RX_10G_LIODN(1, 0, 15), }; +int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl); #endif struct liodn_id_table sec_liodn_tbl[] = { @@ -89,6 +95,7 @@ struct liodn_id_table sec_liodn_tbl[] = { SET_SEC_DECO_LIODN_ENTRY(0, 97, 98), SET_SEC_DECO_LIODN_ENTRY(1, 99, 100), }; +int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl); struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100), @@ -99,7 +106,3 @@ struct liodn_id_table liodn_bases[] = { [FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(136, 172), #endif }; - -int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl); -int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl); -int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl); diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c index 9324125..45e8d6c 100644 --- a/board/freescale/corenet_ds/corenet_ds.c +++ b/board/freescale/corenet_ds/corenet_ds.c @@ -142,7 +142,9 @@ int board_early_init_r(void) 0, flash_esel, BOOKE_PAGESZ_256M, 1); /* ts, esel, tsize, iprot */ set_liodns(); +#ifdef CONFIG_SYS_DPAA_QBFMAN setup_portals(); +#endif return 0; } -- 1.7.3.4

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[U-Boot] [PATCH 1/4] common/env_common: Add CONFIG_SILENT_CONSOLE_AT_BOOT env option
by Matthew McClintock 03 Jun '11

03 Jun '11

Just setting CONFIG_SILENT_CONSOLE does not make the CONSOLE silent without the silent env variable set. This adds a new define to add this to the default environment easily Signed-off-by: Matthew McClintock <msm(a)freescale.com> --- README | 4 ++++ common/env_common.c | 3 +++ 2 files changed, 7 insertions(+), 0 deletions(-) diff --git a/README b/README index ed73981..8779544 100644 --- a/README +++ b/README @@ -546,6 +546,10 @@ The following options need to be configured: the "silent" environment variable. See doc/README.silent for more information. + When CONFIG_SILENT_CONSOLE_AT_BOOT is set u-boot + will be built with silent defined in the default + environment for a completly silent console at boot + - Console Baudrate: CONFIG_BAUDRATE - in bps Select one of the baudrates listed in diff --git a/common/env_common.c b/common/env_common.c index c3e6388..3b09373 100644 --- a/common/env_common.c +++ b/common/env_common.c @@ -123,6 +123,9 @@ uchar default_environment[] = { #if defined(CONFIG_PCI_BOOTDELAY) && (CONFIG_PCI_BOOTDELAY > 0) "pcidelay=" MK_STR(CONFIG_PCI_BOOTDELAY) "\0" #endif +#ifdef CONFIG_SILENT_CONSOLE_AT_BOOT + "silent=1\0" +#endif #ifdef CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS #endif -- 1.7.5

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[U-Boot] [WIKI][Timer]New Timer API Page added to Wiki
by Graeme Russ 03 Jun '11

03 Jun '11

Hi all, I've just created a new Wiki entry for the new Timer API at: http://www.denx.de/wiki/U-Boot/TaskTimerAPI Right now it only details the user-level interface to the API while we still work out the nuts and bolts underneath - Please take a look and comment Regards, Graeme

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[U-Boot] Dreamplug into mainline
by Jason 03 Jun '11

03 Jun '11

Prafulla, As a practical learning exercise, I'm going to attempt to add support for the Dreamplug into the mainline u-boot tree. I'm starting with the board number. It is currently 2659. The same as the Guruplug. This is less than ideal because the Dreamplug has 2MB (yes, megabytes) of SPI flash, whereas the Guruplug had 512 MB of flash. There are other peripherals on the Dreamplug that aren't on the Guruplug (audio, etc) but I don't see that as immediately relevant with U-Boot. I've found [1] for requesting a new board number, but can I do it? I'm not related to Marvell in any way... My plan right now is to make copies of all the guruplug stuff, do s/guruplug/dreamplug/g on the new files, consolidate, then add the support for the SPI. Any holes in that? thx, Jason. [1] http://www.arm.linux.org.uk/developer/machines/

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[U-Boot] [ eyzxgdafzmyifujd] : business marketing database
by Jon combustion 03 Jun '11

03 Jun '11

Business List Package: $295 ALL Lists Below: $295 altogether OR any 5 Lists for $149 Also, ask about our Healthcare and Consumer databases Hotels in the USA Database : 63,260 emails Schools in the USA Database : 439,797 emails for Schools, Universities and Colleges in the USA. Churches in the USA Database : 169,377 emails for Churches of all denominations in the USA Architects in the USA Database : 9,790 emails in total Real Estate Land Developers Database : 10,837 emails in total Construction Development Database : 94,272 emails Criminal Attorneys Database : 142,906 total records, 99,857 emails Real Estate Agents Database : 2.4 Million Email Database (2 lists) Police and Sheriff Services Database : 42,987 records and 114 emails USA Business Database Database : 10 Million Emails for US businesses in various categories (3 lists) Manufacturers Database Database : 1,057,119 records with 476,509 emails USA Lawyers Database Database : 269,787 records with 235,244 emails Financial Planners Database Database : 148,857 records all with emails Finance and Money Professionals Database Database : 116,568 records all with emails Insurance Agents Database : 61,744 emails for Insurance companies in the USA (2 files) Media Outlet Contacts Database : over 200k records all with emails and full contact data VARs and IT Consultants Database : 12,000 VAR and IT consultant Emails in the USA Samples can be downloaded in Excel format, please email me here jane.christy(a)gmx.us. Send email to takeitoff(a)gmx.com for deleted status

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