April 2011 - U-Boot

[U-Boot] Cloud Server雲端伺服器
by Boris 06 Apr '11

06 Apr '11

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[U-Boot] Where can i get this patch ??
by ravi.rao＠rflelect.com 05 Apr '11

05 Apr '11

Hi All, Can any of you please let me know where can I get this patch. [U-Boot] [PATCH] Marvell 88EXXXX Switch/PHY init support Also why is this not yet part of main release ?? Thanks, Ravi

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[U-Boot] [PATCH] powerpc/85xx: Add P1021 specific QE and UEC support
by Kumar Gala 05 Apr '11

05 Apr '11

From: Haiying Wang <Haiying.Wang(a)freescale.com> P1021 has some QE pins which need to be set in pmuxcr register before using QE functions. In this patch, pin QE0 and QE3 are set for UCC1 and UCC5 in Eth mode. QE9 and QE12 are set for MII management. QE12 needs to be released after MII access because QE12 pin is muxed with LBCTL signal. Also added relevant QE support defines unique to P1021. The P1021 QE is shared on P1012, P1016, and P1025. Signed-off-by: Haiying Wang <Haiying.Wang(a)freescale.com> Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- arch/powerpc/cpu/mpc85xx/speed.c | 8 +++++- arch/powerpc/include/asm/config_mpc85xx.h | 12 +++++++++ arch/powerpc/include/asm/immap_85xx.h | 38 ++++++++++++++++++++++------- drivers/qe/uec.c | 37 +++++++++++++++++++++++++++- 4 files changed, 84 insertions(+), 11 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index faca451..e762269 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -28,6 +28,7 @@ #include <common.h> #include <ppc_asm.tmpl> +#include <linux/compiler.h> #include <asm/processor.h> #include <asm/io.h> @@ -136,7 +137,7 @@ void get_sys_info (sys_info_t * sysInfo) #endif int i; #ifdef CONFIG_QE - u32 qe_ratio; + __maybe_unused u32 qe_ratio; #endif plat_ratio = (gur->porpllsr) & 0x0000003e; @@ -164,10 +165,15 @@ void get_sys_info (sys_info_t * sysInfo) #endif #ifdef CONFIG_QE +#if defined(CONFIG_P1012) || defined(CONFIG_P1016) || \ + defined(CONFIG_P1021) || defined(CONFIG_P1025) + sysInfo->freqQE = sysInfo->freqSystemBus; +#else qe_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_QE_RATIO) >> MPC85xx_PORPLLSR_QE_RATIO_SHIFT; sysInfo->freqQE = qe_ratio * CONFIG_SYS_CLK_FREQ; #endif +#endif #ifdef CONFIG_SYS_DPAA_FMAN sysInfo->freqFMan[0] = sysInfo->freqSystemBus / 2; diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 0529632..0b5f78a 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -115,6 +115,9 @@ #define CONFIG_SYS_FSL_SEC_COMPAT 2 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 +#define QE_MURAM_SIZE 0x6000UL +#define MAX_QE_RISC 1 +#define QE_NUM_OF_SNUM 28 /* P1013 is single core version of P1022 */ #elif defined(CONFIG_P1013) @@ -155,6 +158,9 @@ #define CONFIG_SYS_FSL_SEC_COMPAT 2 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 +#define QE_MURAM_SIZE 0x6000UL +#define MAX_QE_RISC 1 +#define QE_NUM_OF_SNUM 28 /* P1017 is single core version of P1023 */ #elif defined(CONFIG_P1017) @@ -185,6 +191,9 @@ #define CONFIG_SYS_FSL_SEC_COMPAT 2 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 +#define QE_MURAM_SIZE 0x6000UL +#define MAX_QE_RISC 1 +#define QE_NUM_OF_SNUM 28 #elif defined(CONFIG_P1022) #define CONFIG_MAX_CPUS 2 @@ -225,6 +234,9 @@ #define CONFIG_SYS_FSL_SEC_COMPAT 2 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 +#define QE_MURAM_SIZE 0x6000UL +#define MAX_QE_RISC 1 +#define QE_NUM_OF_SNUM 28 /* P2010 is single core version of P2020 */ #elif defined(CONFIG_P2010) diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index d26d648..7beb6a7 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1923,6 +1923,19 @@ typedef struct ccsr_gur { #define MPC85xx_PMUXCR_SD_DATA 0x80000000 #define MPC85xx_PMUXCR_SDHC_CD 0x40000000 #define MPC85xx_PMUXCR_SDHC_WP 0x20000000 +#define MPC85xx_PMUXCR_QE0 0x00008000 +#define MPC85xx_PMUXCR_QE1 0x00004000 +#define MPC85xx_PMUXCR_QE2 0x00002000 +#define MPC85xx_PMUXCR_QE3 0x00001000 +#define MPC85xx_PMUXCR_QE4 0x00000800 +#define MPC85xx_PMUXCR_QE5 0x00000400 +#define MPC85xx_PMUXCR_QE6 0x00000200 +#define MPC85xx_PMUXCR_QE7 0x00000100 +#define MPC85xx_PMUXCR_QE8 0x00000080 +#define MPC85xx_PMUXCR_QE9 0x00000040 +#define MPC85xx_PMUXCR_QE10 0x00000020 +#define MPC85xx_PMUXCR_QE11 0x00000010 +#define MPC85xx_PMUXCR_QE12 0x00000008 u32 pmuxcr2; /* Alt. function signal multiplex control 2 */ u8 res6[8]; u32 devdisr; /* Device disable control */ @@ -1956,29 +1969,36 @@ typedef struct ccsr_gur { u8 res9[12]; u32 pvr; /* Processor version */ u32 svr; /* System version */ - u8 res10a[8]; + u8 res10[8]; u32 rstcr; /* Reset control */ #if defined(CONFIG_MPC8568)||defined(CONFIG_MPC8569) - u8 res10b[76]; + u8 res11a[76]; par_io_t qe_par_io[7]; - u8 res10c[1600]; + u8 res11b[1600]; +#elif defined(CONFIG_P1012) || defined(CONFIG_P1016) || \ + defined(CONFIG_P1021) || defined(CONFIG_P1025) + u8 res11a[12]; + u32 iovselsr; + u8 res11b[60]; + par_io_t qe_par_io[3]; + u8 res11c[1496]; #else - u8 res10b[1868]; + u8 res11a[1868]; #endif u32 clkdvdr; /* Clock Divide register */ - u8 res10d[1532]; + u8 res12[1532]; u32 clkocr; /* Clock out select */ - u8 res11[12]; + u8 res13[12]; u32 ddrdllcr; /* DDR DLL control */ - u8 res12[12]; + u8 res14[12]; u32 lbcdllcr; /* LBC DLL control */ - u8 res13[248]; + u8 res15[248]; u32 lbiuiplldcr0; /* LBIU PLL Debug Reg 0 */ u32 lbiuiplldcr1; /* LBIU PLL Debug Reg 1 */ u32 ddrioovcr; /* DDR IO Override Control */ u32 tsec12ioovcr; /* eTSEC 1/2 IO override control */ u32 tsec34ioovcr; /* eTSEC 3/4 IO override control */ - u8 res15[61648]; + u8 res16[61648]; } ccsr_gur_t; #endif diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c index 282ab23..811e3fc 100644 --- a/drivers/qe/uec.c +++ b/drivers/qe/uec.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2006-2010 Freescale Semiconductor, Inc. + * Copyright (C) 2006-2011 Freescale Semiconductor, Inc. * * Dave Liu <daveliu(a)freescale.com> * @@ -588,9 +588,27 @@ static void phy_change(struct eth_device *dev) { uec_private_t *uec = (uec_private_t *)dev->priv; +#if defined(CONFIG_P1012) || defined(CONFIG_P1016) || \ + defined(CONFIG_P1021) || defined(CONFIG_P1025) + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + + /* QE9 and QE12 need to be set for enabling QE MII managment signals */ + setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE9); + setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE12); +#endif + /* Update the link, speed, duplex */ uec->mii_info->phyinfo->read_status(uec->mii_info); +#if defined(CONFIG_P1012) || defined(CONFIG_P1016) || \ + defined(CONFIG_P1021) || defined(CONFIG_P1025) + /* + * QE12 is muxed with LBCTL, it needs to be released for enabling + * LBCTL signal for LBC usage. + */ + clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE12); +#endif + /* Adjust the interface according to speed */ adjust_link(dev); } @@ -1198,10 +1216,21 @@ static int uec_init(struct eth_device* dev, bd_t *bd) uec_private_t *uec; int err, i; struct phy_info *curphy; +#if defined(CONFIG_P1012) || defined(CONFIG_P1016) || \ + defined(CONFIG_P1021) || defined(CONFIG_P1025) + ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); +#endif uec = (uec_private_t *)dev->priv; if (uec->the_first_run == 0) { +#if defined(CONFIG_P1012) || defined(CONFIG_P1016) || \ + defined(CONFIG_P1021) || defined(CONFIG_P1025) + /* QE9 and QE12 need to be set for enabling QE MII managment signals */ + setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE9); + setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE12); +#endif + err = init_phy(dev); if (err) { printf("%s: Cannot initialize PHY, aborting.\n", @@ -1228,6 +1257,12 @@ static int uec_init(struct eth_device* dev, bd_t *bd) udelay(100000); } while (1); +#if defined(CONFIG_P1012) || defined(CONFIG_P1016) || \ + defined(CONFIG_P1021) || defined(CONFIG_P1025) + /* QE12 needs to be released for enabling LBCTL signal*/ + clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE12); +#endif + if (err || i <= 0) printf("warning: %s: timeout on PHY link\n", dev->name); -- 1.7.2.3

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[U-Boot] [PATCH] powerpc/85xx: Add some defines & registers in immap_85xx.h
by Kumar Gala 05 Apr '11

05 Apr '11

From: Zhao Chenhui <b35336(a)freescale.com> * Added SDHCDCR register to GUR struct * Added SDHCDCR_CD_INV define related to SDHCDCR * Added Pin Muxing define related to TDM on P102x Signed-off-by: Zhao Chenhui <b35336(a)freescale.com> Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- arch/powerpc/include/asm/immap_85xx.h | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 7beb6a7..5118fe0 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1923,6 +1923,7 @@ typedef struct ccsr_gur { #define MPC85xx_PMUXCR_SD_DATA 0x80000000 #define MPC85xx_PMUXCR_SDHC_CD 0x40000000 #define MPC85xx_PMUXCR_SDHC_WP 0x20000000 +#define MPC85xx_PMUXCR_TDM_ENA 0x00800000 #define MPC85xx_PMUXCR_QE0 0x00008000 #define MPC85xx_PMUXCR_QE1 0x00004000 #define MPC85xx_PMUXCR_QE2 0x00002000 @@ -1998,10 +1999,14 @@ typedef struct ccsr_gur { u32 ddrioovcr; /* DDR IO Override Control */ u32 tsec12ioovcr; /* eTSEC 1/2 IO override control */ u32 tsec34ioovcr; /* eTSEC 3/4 IO override control */ - u8 res16[61648]; + u8 res16[52]; + u32 sdhcdcr; /* SDHC debug control register */ + u8 res17[61592]; } ccsr_gur_t; #endif +#define SDHCDCR_CD_INV 0x80000000 /* invert SDHC card detect */ + typedef struct serdes_corenet { struct { u32 rstctl; /* Reset Control Register */ -- 1.7.2.3

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[U-Boot] [PATCH] powerpc/85xx: don't init SDRAM when CONFIG_SYS_RAMBOOT
by Kumar Gala 05 Apr '11

05 Apr '11

From: Zhao Chenhui <b35336(a)freescale.com> Signed-off-by: Zhao Chenhui <b35336(a)freescale.com> Acked-by: Li Yang <leoli(a)freescale.com> Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- arch/powerpc/cpu/mpc85xx/cpu.c | 11 +++++++++++ arch/powerpc/include/asm/fsl_ddr_sdram.h | 1 + 2 files changed, 12 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index 49ea6cc..f5b39c0 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -299,6 +299,16 @@ void mpc85xx_reginfo(void) /* Common ddr init for non-corenet fsl 85xx platforms */ #ifndef CONFIG_FSL_CORENET +#if defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SYS_INIT_L2_ADDR) +phys_size_t initdram(int board_type) +{ +#if defined(CONFIG_SPD_EEPROM) || defined(CONFIG_DDR_SPD) + return fsl_ddr_sdram_size(); +#else + return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; +#endif +} +#else /* CONFIG_SYS_RAMBOOT */ phys_size_t initdram(int board_type) { phys_size_t dram_size = 0; @@ -348,6 +358,7 @@ phys_size_t initdram(int board_type) puts("DDR: "); return dram_size; } +#endif /* CONFIG_SYS_RAMBOOT */ #endif #if CONFIG_POST & CONFIG_SYS_POST_MEMORY diff --git a/arch/powerpc/include/asm/fsl_ddr_sdram.h b/arch/powerpc/include/asm/fsl_ddr_sdram.h index 99dddb4..127a840 100644 --- a/arch/powerpc/include/asm/fsl_ddr_sdram.h +++ b/arch/powerpc/include/asm/fsl_ddr_sdram.h @@ -271,6 +271,7 @@ typedef struct memctl_options_s { } memctl_options_t; extern phys_size_t fsl_ddr_sdram(void); +extern phys_size_t fsl_ddr_sdram_size(void); extern int fsl_use_spd(void); extern void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, unsigned int ctrl_num); -- 1.7.2.3

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[U-Boot] [GIT PULL] Pull request: u-boot-imx
by Stefano Babic 05 Apr '11

05 Apr '11

Hi Albert, The following changes since commit 67a490d60d70f2b01d55976440ba30154af96965: atmel_nand: don't require CONFIG_SYS_NAND_ENABLE_PIN (2011-04-01 14:49:08 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master Fabio Estevam (1): mx25: Make the UART port number explicit in its setup function Jason Liu (2): mx53loco: set mmc env to MMC slot1 MX5: Enable flat-device-tree support on mx53 loco board Liu Hui-R64343 (3): MX53: drop config.mk from mx53evk MX53: support for freescale MX53LOCO board MX5: Enable flat-device-tree support on mx51/53 evk board Stefano Babic (5): Makefile: change rule to build IMX image MX51: drop config.mk from mx51evk MX31: add support for MX31 watchdog MX31: qong: add watchdog IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers MAINTAINERS | 1 + Makefile | 2 +- arch/arm/cpu/arm1136/mx31/devices.c | 4 +- arch/arm/cpu/arm1136/mx31/generic.c | 2 +- arch/arm/cpu/arm1136/mx31/timer.c | 40 +++- arch/arm/cpu/arm926ejs/mx25/generic.c | 2 +- arch/arm/include/asm/arch-mx31/{mx31.h => clock.h} | 6 +- .../asm/arch-mx31/{mx31-regs.h => imx-regs.h} | 10 + board/davedenx/qong/fpga.c | 4 +- board/davedenx/qong/lowlevel_init.S | 2 +- board/davedenx/qong/qong.c | 16 +- board/freescale/mx31ads/lowlevel_init.S | 2 +- board/freescale/mx31ads/mx31ads.c | 4 +- board/freescale/mx31pdk/lowlevel_init.S | 2 +- board/freescale/mx31pdk/mx31pdk.c | 4 +- board/freescale/mx53evk/config.mk | 24 -- .../{mx51evk/config.mk => mx53loco/Makefile} | 36 ++- board/freescale/mx53loco/imximage.cfg | 96 ++++++ board/freescale/mx53loco/mx53loco.c | 316 ++++++++++++++++++++ board/imx31_phycore/imx31_phycore.c | 4 +- board/imx31_phycore/lowlevel_init.S | 2 +- board/karo/tx25/tx25.c | 4 +- board/logicpd/imx31_litekit/imx31_litekit.c | 4 +- board/logicpd/imx31_litekit/lowlevel_init.S | 2 +- boards.cfg | 5 +- drivers/gpio/mxc_gpio.c | 5 - drivers/i2c/mxc_i2c.c | 7 +- drivers/serial/serial_mxc.c | 4 - drivers/spi/mxc_spi.c | 9 +- drivers/usb/host/ehci-mxc.c | 2 +- drivers/video/mx3fb.c | 6 +- include/configs/imx31_litekit.h | 2 +- include/configs/mx31ads.h | 2 +- include/configs/mx31pdk.h | 2 +- include/configs/mx51evk.h | 5 + include/configs/mx53evk.h | 3 + include/configs/mx53loco.h | 199 ++++++++++++ include/configs/qong.h | 3 +- nand_spl/nand_boot_fsl_nfc.c | 4 - 39 files changed, 751 insertions(+), 96 deletions(-) rename arch/arm/include/asm/arch-mx31/{mx31.h => clock.h} (92%) rename arch/arm/include/asm/arch-mx31/{mx31-regs.h => imx-regs.h} (99%) delete mode 100644 board/freescale/mx53evk/config.mk rename board/freescale/{mx51evk/config.mk => mx53loco/Makefile} (51%) create mode 100755 board/freescale/mx53loco/imximage.cfg create mode 100755 board/freescale/mx53loco/mx53loco.c create mode 100644 include/configs/mx53loco.h Best regards, Stefano -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office(a)denx.de =====================================================================

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[U-Boot] Please pull u-boot-mpc85xx.git
by Kumar Gala 05 Apr '11

05 Apr '11

The following changes since commit 19b54a701811220221fc4d5089a2bb18892018ca: Prepare v2011.03 (2011-03-31 23:45:36 +0200) are available in the git repository at: git://git.denx.de/u-boot-mpc85xx.git master Dipen Dudhat (1): powerpc/85xx: Add support for Integrated Flash Controller (IFC) Haiying Wang (2): powerpc/85xx: Refactor Qman/Portal support to be shared between SoCs powerpc/85xx: load ucode from nand flash before qe_init Jerry Huang (1): powerpc/85xx: Add eSDHC support on P2020DS Jiang Yutang (1): powerpc/85xx: Add 36-bit address map support to P1022DS Kumar Gala (16): powerpc/85xx: Remove DATARATE_*_MHZ defines in static ddr init powerpc/85xx: Declare fsl_ddr_set_memctl_regs in <asm/fsl_ddr_sdram.h> powerpc/85xx: Add some defines for P2040, P3041, P5010, P5020 powerpc: Move cpu specific lmb reserve to arch_lmb_reserve powerpc/85xx: Remove config.mk for nand linker script powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq() powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board powerpc/85xx: Cleanup some QE related defines powerpc: Add cpu_secondary_init_r to allow for initialization post env setup powerpc/85xx: Don't build read_tlbcam_entry for CONFIG_NAND_SPL powerpc/8xxx: Fix LAW init to respect pre-initialized entries powerpc/85xx: Support for Freescale P1024/P1025 processor powerpc/85xx: Specify CONFIG_SYS_FM_MURAM_SIZE powerpc/85xx: Fixup determining PME, FMan freq powerpc/85xx: Fix determining Fman freq on P1023 powerpc/8xxx: Fix typo for address hashing message Kyle Moffett (2): fsl_ddr: Don't use full 64-bit divides on 32-bit PowerPC mpc8xxx: DDR2/DDR3: Clean up DIMM-type switch statements Laurentiu TUDOR (1): powerpc/85xx: Fix setting of LIODN prop in PCIe nodes on P3041/P5020 Li Yang (2): powerpc/85xx: Update P2020DS default env settings tsec: add AR8021 PHY support Pankaj Chauhan (1): powerpc/85xx: Extend ethernet device tree stashing parameters for "fsl,etsec2" Poonam Aggrwal (6): powerpc/85xx: Use BR_PHYS_ADDR macro to setup BRs on P1_P2_RDB fsl_ddr: Adds 16 bit DDR Data width option powerpc/85xx: Adds some P1010/P1014 SoC configuration defines powerpc/85xx: Removed P1/P2 RDB RevB support powerpc/85xx: Optimized DDR settings for 800MT/s on P1/P2 RDB powerpc/85xx: Add 36-bit physical addressing support for P1_P2_RDB Prabhakar Kushwaha (2): powerpc/85xx: Add SERDES support for P1010/P1014 fsl_pci: Add support for FSL PCIe controllers v2.x Priyanka Jain (3): powerpc/85xx: Corrected sdhc clock value for P1010 powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdb powerpc/85xx: Read board switch settings on p1_p2_rdb Roy Zang (1): powerpc/85xx: Add support for Freescale P1023/P1017 Processors Timur Tabi (2): p1022ds: allow for board-specific ngPIXIS functions fsl: obsolete NXID v0 EEPROMs, automatically upgrade them to NXID v1 York Sun (2): powerpc/85xx: Update fixed DDR3 timing table for P4080DS powerpc/8xxx: Display DIMM model Zhao Chenhui (4): echi: add ULI1575 PCI ID powerpc/85xx: Replace memctl_intlv_ctl with hwconfig on MPC8572DS powerpc/85xx: Disable ECC in considering performance on MPC8572DS powerpc/85xx: Add support for ULI1575 PCI EHCI module on MPC8572DS bhaskar upadhaya (1): powerpc/85xx: Update timer-frequency prop in ptp_timer node of device tree arch/powerpc/cpu/mpc85xx/Makefile | 14 +- arch/powerpc/cpu/mpc85xx/cpu.c | 7 +- arch/powerpc/cpu/mpc85xx/cpu_init.c | 32 +- arch/powerpc/cpu/mpc85xx/fdt.c | 12 + arch/powerpc/cpu/mpc85xx/p1010_serdes.c | 75 ++ arch/powerpc/cpu/mpc85xx/p1023_serdes.c | 53 ++ arch/powerpc/cpu/mpc85xx/p3041_ids.c | 10 +- arch/powerpc/cpu/mpc85xx/p4080_ids.c | 8 +- arch/powerpc/cpu/mpc85xx/p5020_ids.c | 10 +- arch/powerpc/cpu/mpc85xx/portals.c | 32 +- arch/powerpc/cpu/mpc85xx/speed.c | 48 +- arch/powerpc/cpu/mpc85xx/tlb.c | 4 +- arch/powerpc/cpu/mpc8xxx/Makefile | 1 + arch/powerpc/cpu/mpc8xxx/cpu.c | 14 +- arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | 4 +- arch/powerpc/cpu/mpc8xxx/ddr/ddr.h | 1 - arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c | 23 +- arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c | 43 +- .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c | 11 +- arch/powerpc/cpu/mpc8xxx/ddr/main.c | 63 ++- arch/powerpc/cpu/mpc8xxx/ddr/util.c | 60 +- arch/powerpc/cpu/mpc8xxx/fsl_ifc.c | 84 ++ arch/powerpc/include/asm/config.h | 2 + arch/powerpc/include/asm/config_mpc85xx.h | 117 +++ arch/powerpc/include/asm/fsl_ddr_sdram.h | 3 + arch/powerpc/include/asm/fsl_ifc.h | 957 ++++++++++++++++++++ arch/powerpc/include/asm/fsl_law.h | 4 +- arch/powerpc/include/asm/fsl_liodn.h | 14 +- arch/powerpc/include/asm/fsl_pci.h | 20 +- arch/powerpc/include/asm/immap_85xx.h | 35 +- arch/powerpc/include/asm/immap_qe.h | 98 +-- arch/powerpc/include/asm/processor.h | 12 + arch/powerpc/lib/board.c | 14 + arch/powerpc/lib/bootm.c | 5 + board/freescale/common/ngpixis.c | 56 +- board/freescale/common/ngpixis.h | 8 +- board/freescale/common/sys_eeprom.c | 50 +- board/freescale/corenet_ds/corenet_ds.c | 11 +- board/freescale/corenet_ds/ddr.c | 49 +- board/freescale/corenet_ds/p4080ds_ddr.c | 24 +- board/freescale/mpc8536ds/config.mk | 30 - board/freescale/mpc8536ds/ddr.c | 26 - board/freescale/mpc8540ads/ddr.c | 30 - board/freescale/mpc8541cds/ddr.c | 26 - board/freescale/mpc8544ds/ddr.c | 27 - board/freescale/mpc8548cds/ddr.c | 27 - board/freescale/mpc8555cds/ddr.c | 26 - board/freescale/mpc8560ads/ddr.c | 30 - board/freescale/mpc8568mds/ddr.c | 28 - board/freescale/mpc8569mds/config.mk | 30 - board/freescale/mpc8569mds/ddr.c | 28 - board/freescale/mpc8572ds/config.mk | 30 - board/freescale/mpc8572ds/ddr.c | 28 - board/freescale/mpc8572ds/mpc8572ds.c | 11 +- board/freescale/mpc8610hpcd/ddr.c | 26 - board/freescale/mpc8641hpcn/ddr.c | 37 +- board/freescale/mpc8641hpcn/mpc8641hpcn.c | 11 +- board/freescale/p1022ds/ddr.c | 23 - board/freescale/p1022ds/diu.c | 66 ++- board/freescale/p1022ds/p1022ds.c | 13 +- board/freescale/p1_p2_rdb/config.mk | 31 - board/freescale/p1_p2_rdb/ddr.c | 47 +- board/freescale/p1_p2_rdb/p1_p2_rdb.c | 66 +- board/freescale/p1_p2_rdb/tlb.c | 22 +- board/freescale/p2020ds/ddr.c | 24 - board/freescale/p2020ds/p2020ds.c | 23 +- board/sbc8548/ddr.c | 27 - board/sbc8560/ddr.c | 30 - board/sbc8641d/ddr.c | 35 - board/sbc8641d/sbc8641d.c | 9 - board/socrates/ddr.c | 27 - board/stx/stxgp3/ddr.c | 30 - board/stx/stxssa/ddr.c | 29 - board/xes/xpedite517x/ddr.c | 32 +- board/xes/xpedite517x/xpedite517x.c | 9 - board/xes/xpedite520x/ddr.c | 22 +- board/xes/xpedite537x/ddr.c | 22 +- board/xes/xpedite537x/xpedite537x.c | 9 - board/xes/xpedite550x/ddr.c | 20 +- board/xes/xpedite550x/xpedite550x.c | 9 - boards.cfg | 13 + common/ddr_spd.c | 2 +- drivers/misc/fsl_law.c | 20 + drivers/net/tsec.c | 23 + drivers/pci/fsl_pci_init.c | 12 +- drivers/usb/host/ehci-pci.c | 1 + include/common.h | 4 + include/configs/MPC8536DS.h | 1 + include/configs/MPC8569MDS.h | 4 +- include/configs/MPC8572DS.h | 17 +- include/configs/MPC8610HPCD.h | 2 +- include/configs/P1022DS.h | 48 +- include/configs/P1_P2_RDB.h | 83 ++- include/configs/P2020DS.h | 49 +- include/configs/corenet_ds.h | 1 + include/configs/xpedite550x.h | 2 +- include/ddr_spd.h | 28 +- 97 files changed, 2233 insertions(+), 1241 deletions(-) create mode 100644 arch/powerpc/cpu/mpc85xx/p1010_serdes.c create mode 100644 arch/powerpc/cpu/mpc85xx/p1023_serdes.c create mode 100644 arch/powerpc/cpu/mpc8xxx/fsl_ifc.c create mode 100644 arch/powerpc/include/asm/fsl_ifc.h delete mode 100644 board/freescale/mpc8536ds/config.mk delete mode 100644 board/freescale/mpc8569mds/config.mk delete mode 100644 board/freescale/mpc8572ds/config.mk delete mode 100644 board/freescale/p1_p2_rdb/config.mk

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Re: [U-Boot] Uboot - USB to Ethernet patch
by rick＠efn.org 05 Apr '11

05 Apr '11

Hi Scott, In order to use the USB-Ethernet in u-boot, what do we need to set ethact to? I would be great if you could show an example. Of all the device below, which ones have actually been tested and known to work? { 0x05ac, 0x1402 }, /* Apple USB Ethernet Adapter */ { 0x07d1, 0x3c05 }, /* D-Link DUB-E100 H/W Ver B1 */ { 0x0b95, 0x772a }, /* Cables-to-Go USB Ethernet Adapter */ { 0x0b95, 0x7720 }, /* Trendnet TU2-ET100 V3.0R */ { 0x0b95, 0x1720 }, /* SMC */ { 0x0db0, 0xa877 }, /* MSI - ASIX 88772a */ { 0x077b, 0x2226 }, /* Linksys 200M */ { 0x13b1, 0x0018 }, /* Linksys 200M v2.1 */ { 0x1557, 0x7720 }, /* 0Q0 cable ethernet */ { 0x2001, 0x3c05 }, /* DLink DUB-E100 H/W Ver B1 Alternate */ { 0x0000, 0x0000 } /* END - Do not remove */ Thanks much. Rick

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[U-Boot] arm imx35 timer failure
by Laurent Joye 05 Apr '11

05 Apr '11

Hello, I'm developing a product based on the imx35 cpu with NOR and NAND flash. The SBC I use is the pcm-043 from Phytec. I use the FEC to communicate over the ethernet. I've made my own BSP for Das U-boot based on the release tagged v2011.03-rc2 on the git://git.denx.de/u-boot.git master repository. I've encountered one problem in uboot so that my board can work properly: This concerns the FEC autonegotiation timeout. I had some MDIO read an write and autonegotiation wait timeout failures. By debugging the problem I've found that the changes I've brought to the timer.c file (see patch below for arch/arm/cpu/arm1136/timer.c) of the imx35 cpu solves the problem. It seems that the return value of the "get_timer_masked" function is not given with the same unit as the input value for the "get_timer" function. It seems also to me that this value should be dependent of the "CONFIG_SYS_HZ" macro. Did anybody encountered this problem? Could you please tell me if there is really something wrong in timer.c file? Laurent Joye HaslerRail AG Bern, Switzerland Related patch: diff --git a/arch/arm/cpu/arm1136/mx35/timer.c b/arch/arm/cpu/arm1136/mx35/timer.c index db1e2c9..00ca3e6 100644 --- a/arch/arm/cpu/arm1136/mx35/timer.c +++ b/arch/arm/cpu/arm1136/mx35/timer.c @@ -70,7 +70,7 @@ inline ulong get_timer_masked(void) struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR; ulong val = readl(&gpt->counter); - return val; + return val / CONFIG_SYS_HZ; } void reset_timer(void) @@ -84,12 +84,14 @@ ulong get_timer(ulong base) tmp = get_timer_masked(); - if (tmp <= (base * 1000)) { + if (tmp < base) { /* Overflow */ - tmp += (0xffffffff - base); + tmp = (0xffffffff - (base - tmp)); + } else { + tmp = tmp -base; } - return (tmp / 1000) - base; + return tmp; } void set_timer(ulong t) @@ -103,6 +105,7 @@ void set_timer(ulong t) void __udelay(unsigned long usec) { ulong tmp; + usec /= CONFIG_SYS_HZ; tmp = get_timer_masked(); /* get current timestamp */

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[U-Boot] [PATCHv2] fdt_support: Fix buffer overflow in fdt_fixup_memory_banks
by Kyle Moffett 05 Apr '11

05 Apr '11

When fdt_fixup_memory_banks is called with 2-cell address and size fields in the device-tree (IE: 64-bit address and size), then it will overflow its on-stack "tmp" buffer. This fixes the buffer size and adds a comment explaining how many bytes need to be allocated per record. Signed-off-by: Kyle Moffett <Kyle.D.Moffett(a)boeing.com> Cc: Jerry Van Baren <vanbaren(a)cideas.com> --- Changelog: v2: Resubmitted separately from the other HWW-1U-1A changes. common/fdt_support.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/common/fdt_support.c b/common/fdt_support.c index 6c98e5b..edcf04a 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -394,7 +394,7 @@ int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks) { int err, nodeoffset; int addr_cell_len, size_cell_len, len; - u8 tmp[banks * 8]; + u8 tmp[banks * 16]; /* Up to 64-bit address + 64-bit size */ int bank; err = fdt_check_header(blob); -- 1.7.2.3

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