April 2011 - U-Boot

[U-Boot] [PATCH 00/15] [REWORK AVR32/AT91] additional changes for avr32
by Andreas Bießmann 19 Apr '11

19 Apr '11

This series do some cleanup all avr32 boards. This series is on top of 'Get AVR32 boards working with partial linking' rebased to u-boot-atmel/rework110202. In summary the board specific config.mk and u-boot.lds files are deleted in favor of a version at architecture level. Theses files had all the same content cause they where pure copies of the atstk100x ones. I have splitted the patches to each board cause some of them should be actively maintained and the respectively maintainer should have a chance to give some feedback. Andreas Bießmann (15): avr32/config.mk: simplify PLATFORM_RELFLAGS avr32: use single linker script atngw100: fix "#define XXXX 1" atstk1002: fix "#define XXXX 1" atstk1003: fix "#define XXXX 1" atstk1004: fix "#define XXXX 1" atstk1006: fix "#define XXXX 1" favr-32-ezkit: fix "#define XXXX 1" hammerhead: fix "#define XXXX 1" mimc200: fix "#define XXXX 1" atngw100: move CONFIG_SYS_TEXT_BASE to header atstk100x: move CONFIG_SYS_TEXT_BASE to header favr-32-ezkit: move CONFIG_SYS_TEXT_BASE to header mimc200: move CONFIG_SYS_TEXT_BASE to header hammerhead: move CONFIG_SYS_TEXT_BASE to header arch/avr32/config.mk | 4 + .../atmel/atstk1000 => arch/avr32/cpu}/u-boot.lds | 0 board/atmel/atngw100/config.mk | 2 - board/atmel/atngw100/u-boot.lds | 72 -------------------- board/atmel/atstk1000/config.mk | 3 - board/earthlcd/favr-32-ezkit/config.mk | 3 - board/earthlcd/favr-32-ezkit/u-boot.lds | 70 ------------------- board/mimc/mimc200/config.mk | 2 - board/mimc/mimc200/u-boot.lds | 72 -------------------- board/miromico/hammerhead/config.mk | 2 - board/miromico/hammerhead/u-boot.lds | 72 -------------------- include/configs/atngw100.h | 55 ++++++++------- include/configs/atstk1002.h | 49 +++++++------- include/configs/atstk1003.h | 43 ++++++------ include/configs/atstk1004.h | 43 ++++++------ include/configs/atstk1006.h | 49 +++++++------- include/configs/favr-32-ezkit.h | 47 +++++++------ include/configs/hammerhead.h | 49 +++++++------- include/configs/mimc200.h | 57 ++++++++-------- 19 files changed, 204 insertions(+), 490 deletions(-) rename {board/atmel/atstk1000 => arch/avr32/cpu}/u-boot.lds (100%) delete mode 100644 board/atmel/atngw100/config.mk delete mode 100644 board/atmel/atngw100/u-boot.lds delete mode 100644 board/atmel/atstk1000/config.mk delete mode 100644 board/earthlcd/favr-32-ezkit/config.mk delete mode 100644 board/earthlcd/favr-32-ezkit/u-boot.lds delete mode 100644 board/mimc/mimc200/config.mk delete mode 100644 board/mimc/mimc200/u-boot.lds delete mode 100644 board/miromico/hammerhead/config.mk delete mode 100644 board/miromico/hammerhead/u-boot.lds -- 1.7.2.3

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[U-Boot] [PATCH] avr32: add ATAG_BOARDINFO
by Andreas Bießmann 19 Apr '11

19 Apr '11

This patch adds a new ATAG_BORADINFO to U-Boot. This tag is intended to hand over the bd->bi_board_number to the linux kernel for early stage board information like a board revision or other kind of board specific decisions necessary before the linux peripherial drivers are up. Signed-off-by: Andreas Bießmann <biessmann(a)corscience.de> --- I try to get this information interchange in mainline to have the ATAG key value reserved for that intended use. Please see http://lists.avr32linux.org/pipermail/kernel/2011-April/005593.html and http://article.gmane.org/gmane.linux.kernel/1125654 for more information. arch/avr32/include/asm/setup.h | 8 ++++++++ arch/avr32/lib/bootm.c | 11 +++++++++++ 2 files changed, 19 insertions(+), 0 deletions(-) diff --git a/arch/avr32/include/asm/setup.h b/arch/avr32/include/asm/setup.h index e6ef8d6..7f5d883 100644 --- a/arch/avr32/include/asm/setup.h +++ b/arch/avr32/include/asm/setup.h @@ -107,6 +107,13 @@ struct tag_ethernet { #define AETH_INVALID_PHY 0xff +/* board information information */ +#define ATAG_BOARDINFO 0x54410008 + +struct tag_boardinfo { + u32 board_number; +}; + struct tag { struct tag_header hdr; union { @@ -115,6 +122,7 @@ struct tag { struct tag_cmdline cmdline; struct tag_clock clock; struct tag_ethernet ethernet; + struct tag_boardinfo boardinfo; } u; }; diff --git a/arch/avr32/lib/bootm.c b/arch/avr32/lib/bootm.c index 8a47cfe..c9a55ff 100644 --- a/arch/avr32/lib/bootm.c +++ b/arch/avr32/lib/bootm.c @@ -165,6 +165,16 @@ static struct tag *setup_ethernet_tags(struct tag *params) return params; } +static struct tag *setup_boardinfo_tag(struct tag *params) +{ + params->hdr.tag = ATAG_BOARDINFO; + params->hdr.size = tag_size(tag_boardinfo); + + params->u.boardinfo.board_number = gd->bd->bi_board_number; + + return tag_next(params); +} + static void setup_end_tag(struct tag *params) { params->hdr.tag = ATAG_NONE; @@ -195,6 +205,7 @@ int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *ima params = setup_commandline_tag(params, commandline); params = setup_clock_tags(params); params = setup_ethernet_tags(params); + params = setup_boardinfo_tag(params); setup_end_tag(params); printf("\nStarting kernel at %p (params at %p)...\n\n", -- 1.7.2.5

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[U-Boot] [PATCH-V2 1/2] at91: reworked support for meesc board
by Daniel Gorsulowski 19 Apr '11

19 Apr '11

The meesc board support was broken. Within this opportunity, I completely reworked the board files. Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski(a)esd.eu> --- This patch is based on u-boot-atmel/rework101229 branch (minus the last 5 patches) plus the 'at91: fixed at91sam9263 system file' patch in u-boot-atmel/next branch. V2: -fixed commit description board/esd/meesc/config.mk | 1 - board/esd/meesc/meesc.c | 49 ++++++----- boards.cfg | 3 +- include/configs/meesc.h | 208 ++++++++++++++++++++++++++------------------- 4 files changed, 149 insertions(+), 112 deletions(-) delete mode 100644 board/esd/meesc/config.mk diff --git a/board/esd/meesc/config.mk b/board/esd/meesc/config.mk deleted file mode 100644 index 2077692..0000000 --- a/board/esd/meesc/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x21f00000 diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c index 41fa3e1..e016b68 100644 --- a/board/esd/meesc/meesc.c +++ b/board/esd/meesc/meesc.c @@ -3,7 +3,7 @@ * Stelian Pop <stelian.pop(a)leadtechdesign.com> * Lead Tech Design <www.leadtechdesign.com> * - * (C) Copyright 2009-2010 + * (C) Copyright 2009-2011 * Daniel Gorsulowski <daniel.gorsulowski(a)esd.eu> * esd electronic system design gmbh <www.esd.eu> * @@ -27,7 +27,7 @@ */ #include <common.h> -#include <asm/arch/at91sam9263.h> +#include <asm/io.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> @@ -35,8 +35,6 @@ #include <asm/arch/at91_matrix.h> #include <asm/arch/at91_pio.h> #include <asm/arch/clk.h> -#include <asm/arch/hardware.h> -#include <asm/arch/io.h> #include <netdev.h> DECLARE_GLOBAL_DATA_PTR; @@ -67,8 +65,8 @@ int get_hw_rev(void) static void meesc_nand_hw_init(void) { unsigned long csa; - at91_smc_t *smc = (at91_smc_t *) AT91_SMC0_BASE; - at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE; + at91_smc_t *smc = (at91_smc_t *) ATMEL_BASE_SMC0; + at91_matrix_t *matrix = (at91_matrix_t *) ATMEL_BASE_MATRIX; /* Enable CS3 */ csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A; @@ -88,7 +86,7 @@ static void meesc_nand_hw_init(void) writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | AT91_SMC_MODE_EXNW_DISABLE | AT91_SMC_MODE_DBW_8 | - AT91_SMC_MODE_TDF_CYCLE(2), + AT91_SMC_MODE_TDF_CYCLE(3), &smc->cs[3].mode); /* Configure RDY/BSY */ @@ -102,9 +100,9 @@ static void meesc_nand_hw_init(void) #ifdef CONFIG_MACB static void meesc_macb_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; /* Enable clock */ - writel(1 << AT91SAM9263_ID_EMAC, &pmc->pcer); + writel(1 << ATMEL_ID_EMAC, &pmc->pcer); at91_macb_hw_init(); } #endif @@ -117,7 +115,7 @@ static void meesc_macb_hw_init(void) */ static void meesc_ethercat_hw_init(void) { - at91_smc_t *smc1 = (at91_smc_t *) AT91_SMC1_BASE; + at91_smc_t *smc1 = (at91_smc_t *) ATMEL_BASE_SMC1; /* Configure SMC EBI1_CS0 for EtherCAT */ writel(AT91_SMC_SETUP_NWE(0) | AT91_SMC_SETUP_NCS_WR(0) | @@ -142,8 +140,9 @@ static void meesc_ethercat_hw_init(void) int dram_init(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM; - gd->bd->bi_dram[0].size = get_ram_size((long *) PHYS_SDRAM, (1 << 27)); + gd->ram_size = get_ram_size( + (void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); return 0; } @@ -151,7 +150,7 @@ int board_eth_init(bd_t *bis) { int rc = 0; #ifdef CONFIG_MACB - rc = macb_eth_initialize(0, (void *)AT91_EMAC_BASE, 0x00); + rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00); #endif return rc; } @@ -225,7 +224,7 @@ int misc_init_r(void) { char *str; char buf[32]; - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; /* * Normally the processor clock has a divisor of 2. @@ -246,24 +245,28 @@ int misc_init_r(void) } #endif /* CONFIG_MISC_INIT_R */ -int board_init(void) +int board_early_init_f(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; - /* Peripheral Clock Enable Register */ - writel(1 << AT91SAM9263_ID_PIOA | - 1 << AT91SAM9263_ID_PIOB | - 1 << AT91SAM9263_ID_PIOCDE | - 1 << AT91SAM9263_ID_UHP, + /* enable all clocks */ + writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | + (1 << ATMEL_ID_PIOCDE) | (1 << ATMEL_ID_UHP), &pmc->pcer); + at91_seriald_hw_init(); + + return 0; +} + +int board_init(void) +{ /* initialize ET1100 Controller */ meesc_ethercat_hw_init(); /* adress of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - at91_serial_hw_init(); #ifdef CONFIG_CMD_NAND meesc_nand_hw_init(); #endif diff --git a/boards.cfg b/boards.cfg index 9b15026..eccbb9c 100644 --- a/boards.cfg +++ b/boards.cfg @@ -83,7 +83,8 @@ at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1 top9000eval_xe arm arm926ejs top9000 emk at91 top9000:EVAL9000 top9000su_xe arm arm926ejs top9000 emk at91 top9000:SU9000 -meesc arm arm926ejs - esd at91 +meesc arm arm926ejs meesc esd at91 meesc:AT91SAM9263,SYS_USE_NANDFLASH +meesc_dataflash arm arm926ejs meesc esd at91 meesc:AT91SAM9263,SYS_USE_DATAFLASH otc570 arm arm926ejs - esd at91 pm9261 arm arm926ejs - ronetix at91 pm9263 arm arm926ejs - ronetix at91 diff --git a/include/configs/meesc.h b/include/configs/meesc.h index a27b36b..a8a4bd3 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -3,7 +3,7 @@ * Stelian Pop <stelian.pop(a)leadtechdesign.com> * Lead Tech Design <www.leadtechdesign.com> * - * (C) Copyright 2009-2010 + * (C) Copyright 2009-2011 * Daniel Gorsulowski <daniel.gorsulowski(a)esd.eu> * esd electronic system design gmbh <www.esd.eu> * @@ -31,49 +31,68 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* Common stuff */ -#define CONFIG_MEESC 1 /* Board is esd MEESC */ -#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ -#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */ +/* + * SoC must be defined first, before hardware.h is included. + * In this case SoC is defined in boards.cfg. + */ +#include <asm/hardware.h> + +/* + * Warning: changing CONFIG_SYS_TEXT_BASE requires + * adapting the initial boot program. + * Since the linker has to swallow that define, we must use a pure + * hex number here! + */ +#define CONFIG_SYS_TEXT_BASE 0x20002000 + +/* ARM asynchronous clock */ +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */ #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */ #define CONFIG_SYS_HZ 1000 /* decrementer freq */ -#define CONFIG_DISPLAY_BOARDINFO 1 -#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */ -#define CONFIG_PREBOOT /* enable preboot variable */ -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 -#define CONFIG_SERIAL_TAG 1 -#define CONFIG_REVISION_TAG 1 -#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */ +/* Misc CPU related */ #define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_ARCH_CPU_INIT +#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_SERIAL_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_MISC_INIT_R /* Call misc_init_r */ +#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */ -#define CONFIG_ARCH_CPU_INIT +#define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */ +#define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */ +#define CONFIG_PREBOOT /* enable preboot variable */ /* * Hardware drivers */ +/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */ +#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP + +/* general purpose I/O */ +#define CONFIG_AT91_GPIO + /* Console output */ -#define CONFIG_AT91_GPIO 1 -#define CONFIG_ATMEL_USART 1 -#undef CONFIG_USART0 -#undef CONFIG_USART1 -#undef CONFIG_USART2 -#define CONFIG_USART3 1 /* USART 3 is DBGU */ +#define CONFIG_ATMEL_USART +#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CONFIG_USART_ID ATMEL_ID_SYS +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200, 19200, 38400, 57600, 9600} -#define CONFIG_BOOTDELAY 3 -#define CONFIG_ZERO_BOOTDELAY_CHECK 1 +#define CONFIG_BOOTDELAY 3 +#define CONFIG_ZERO_BOOTDELAY_CHECK /* * BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 -#define CONFIG_BOOTP_BOOTPATH 1 -#define CONFIG_BOOTP_GATEWAY 1 -#define CONFIG_BOOTP_HOSTNAME 1 +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME /* * Command line configuration. @@ -84,97 +103,112 @@ #undef CONFIG_CMD_LOADS #undef CONFIG_CMD_IMLS -#define CONFIG_CMD_PING 1 -#define CONFIG_CMD_DHCP 1 -#define CONFIG_CMD_NAND 1 -#define CONFIG_CMD_USB 1 +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_NAND +#define CONFIG_CMD_USB /* LED */ -#define CONFIG_AT91_LED 1 - -/* SDRAM */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM 0x20000000 - -/* DataFlash */ -#define CONFIG_ATMEL_DATAFLASH_SPI -#define CONFIG_HAS_DATAFLASH 1 -#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) -#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 -#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ -#define AT91_SPI_CLK 15000000 -#define DATAFLASH_TCSS (0x1a << 16) -#define DATAFLASH_TCHS (0x1 << 24) +#define CONFIG_AT91_LED + +/* + * SDRAM: 1 bank, min 32, max 128 MB + * Initialized before u-boot gets started. + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */ +#define CONFIG_SYS_SDRAM_SIZE 0x02000000 + +#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000) + +/* + * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, + * leaving the correct space for initial global data structure above + * that address while providing maximum stack area below. + */ +#define CONFIG_SYS_INIT_SP_ADDR \ + (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE) + + /* DataFlash */ +#ifdef CONFIG_SYS_USE_DATAFLASH +# define CONFIG_ATMEL_DATAFLASH_SPI +# define CONFIG_HAS_DATAFLASH +# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) +# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 +# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ +# define AT91_SPI_CLK 15000000 +# define DATAFLASH_TCSS (0x1a << 16) +# define DATAFLASH_TCHS (0x1 << 24) +#endif /* NOR flash is not populated, disable it */ -#define CONFIG_SYS_NO_FLASH 1 +#define CONFIG_SYS_NO_FLASH /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_NAND_ATMEL -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_DBW_8 1 -/* our ALE is AD21 */ -#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) -/* our CLE is AD22 */ -#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22 -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ +# define CONFIG_NAND_ATMEL +# define CONFIG_SYS_MAX_NAND_DEVICE 1 +# define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */ +# define CONFIG_SYS_NAND_DBW_8 +# define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +# define CONFIG_SYS_NAND_MASK_CLE (1 << 22) +# define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15 +# define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22 +# define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* Ethernet */ -#define CONFIG_MACB 1 -#define CONFIG_RMII 1 -#define CONFIG_NET_MULTI 1 +#define CONFIG_MACB +#define CONFIG_RMII +#define CONFIG_NET_MULTI +#define CONFIG_FIT #define CONFIG_NET_RETRY_COUNT 20 #undef CONFIG_RESET_PHY_R /* USB */ #define CONFIG_USB_ATMEL -#define CONFIG_USB_OHCI_NEW 1 -#define CONFIG_DOS_PARTITION 1 -#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 +#define CONFIG_USB_OHCI_NEW +#define CONFIG_DOS_PARTITION +#define CONFIG_SYS_USB_OHCI_CPU_INIT #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#define CONFIG_USB_STORAGE 1 -#define CONFIG_CMD_FAT 1 - -#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ - -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END 0x21e00000 - -#define CONFIG_SYS_USE_DATAFLASH 1 -#undef CONFIG_SYS_USE_NANDFLASH /* CAN */ -#define CONFIG_AT91_CAN 1 +#define CONFIG_AT91_CAN /* hw-controller addresses */ -#define CONFIG_ET1100_BASE 0x70000000 +#define CONFIG_ET1100_BASE 0x70000000 + +#ifdef CONFIG_SYS_USE_DATAFLASH /* bootstrap + u-boot + env in dataflash on CS0 */ -#define CONFIG_ENV_IS_IN_DATAFLASH 1 -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ +# define CONFIG_ENV_IS_IN_DATAFLASH +# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 0x8400) -#define CONFIG_ENV_OFFSET 0x4200 -#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ +# define CONFIG_ENV_OFFSET 0x4200 +# define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ CONFIG_ENV_OFFSET) -#define CONFIG_ENV_SIZE 0x4200 +# define CONFIG_ENV_SIZE 0x4200 -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } +#elif CONFIG_SYS_USE_NANDFLASH + +/* bootstrap + u-boot + env + linux in nandflash */ +# define CONFIG_ENV_IS_IN_NAND 1 +# define CONFIG_ENV_OFFSET 0xC0000 +# define CONFIG_ENV_SIZE 0x20000 + +#endif #define CONFIG_SYS_PROMPT "=> " -#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_CBSIZE 512 #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP 1 -#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING /* * Size of malloc() pool @@ -185,7 +219,7 @@ #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ #ifdef CONFIG_USE_IRQ -#error CONFIG_USE_IRQ not supported +# error CONFIG_USE_IRQ not supported #endif #endif -- 1.5.3

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[U-Boot] [PATCH] MMC: disable multiblock rw on old rev OMAP3 silicon
by John Rigby 19 Apr '11

19 Apr '11

Make existing field b_max field in struct mmc unconditional and use it instead of CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_bread and mmc_bwrite. Initialize b_max to CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_register if it has not been initialized by the hw driver. Initialize b_max to 1 in omap_hsmmc.c for old rev silicon OMAP3 to disable multi block rw. Signed-off-by: John Rigby <john.rigby(a)linaro.org> --- drivers/mmc/mmc.c | 8 ++++---- drivers/mmc/omap_hsmmc.c | 8 ++++++++ include/mmc.h | 2 -- 3 files changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index f27b7c7..f6d31f5 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -243,8 +243,7 @@ mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const void*src) return 0; do { - cur = (blocks_todo > CONFIG_SYS_MMC_MAX_BLK_COUNT) ? - CONFIG_SYS_MMC_MAX_BLK_COUNT : blocks_todo; + cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo; if(mmc_write_blocks(mmc, start, cur, src) != cur) return 0; blocks_todo -= cur; @@ -320,8 +319,7 @@ static ulong mmc_bread(int dev_num, ulong start, lbaint_t blkcnt, void *dst) return 0; do { - cur = (blocks_todo > CONFIG_SYS_MMC_MAX_BLK_COUNT) ? - CONFIG_SYS_MMC_MAX_BLK_COUNT : blocks_todo; + cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo; if(mmc_read_blocks(mmc, dst, start, cur) != cur) return 0; blocks_todo -= cur; @@ -1029,6 +1027,8 @@ int mmc_register(struct mmc *mmc) mmc->block_dev.removable = 1; mmc->block_dev.block_read = mmc_bread; mmc->block_dev.block_write = mmc_bwrite; + if (!mmc->b_max) + mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; INIT_LIST_HEAD (&mmc->link); diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index 6f2280a..1fab249 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -465,6 +465,14 @@ int omap_mmc_init(int dev_index) mmc->f_min = 400000; mmc->f_max = 52000000; +#if defined(CONFIG_OMAP34XX) + /* + * Silicon revs 2.1 and older do not support multiblock transfers. + */ + if (get_cpu_rev() <= CPU_3XX_ES21) + mmc->b_max = 1; +#endif + mmc_register(mmc); return 0; diff --git a/include/mmc.h b/include/mmc.h index e0a56d9..b4197a7 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -283,9 +283,7 @@ struct mmc { struct mmc_cmd *cmd, struct mmc_data *data); void (*set_ios)(struct mmc *mmc); int (*init)(struct mmc *mmc); -#ifdef CONFIG_MMC_MBLOCK uint b_max; -#endif }; int mmc_register(struct mmc *mmc); -- 1.7.1

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[U-Boot] [PATCH 1/2] mmc: coding style fix and tabify of mmc.h
by Thomas Chou 19 Apr '11

19 Apr '11

Signed-off-by: Thomas Chou <thomas(a)wytron.com.tw> --- for u-boot include/mmc.h | 44 ++++++++++++++++++++++---------------------- 1 files changed, 22 insertions(+), 22 deletions(-) diff --git a/include/mmc.h b/include/mmc.h index e0a56d9..1a0d00a 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -14,7 +14,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -94,14 +94,14 @@ #define MMC_HS_TIMING 0x00000100 #define MMC_HS_52MHZ 0x2 -#define OCR_BUSY 0x80000000 -#define OCR_HCS 0x40000000 +#define OCR_BUSY 0x80000000 +#define OCR_HCS 0x40000000 #define OCR_VOLTAGE_MASK 0x007FFF80 #define OCR_ACCESS_MODE 0x60000000 #define MMC_STATUS_MASK (~0x0206BF7F) -#define MMC_STATUS_RDY_FOR_DATA (1<<8) -#define MMC_STATUS_CURR_STATE (0xf<<9) +#define MMC_STATUS_RDY_FOR_DATA (1 << 8) +#define MMC_STATUS_CURR_STATE (0xf << 9) #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ @@ -147,12 +147,12 @@ * EXT_CSD field definitions */ -#define EXT_CSD_CMD_SET_NORMAL (1<<0) -#define EXT_CSD_CMD_SET_SECURE (1<<1) -#define EXT_CSD_CMD_SET_CPSECURE (1<<2) +#define EXT_CSD_CMD_SET_NORMAL (1 << 0) +#define EXT_CSD_CMD_SET_SECURE (1 << 1) +#define EXT_CSD_CMD_SET_CPSECURE (1 << 2) -#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ -#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ +#define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ +#define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ @@ -162,21 +162,21 @@ #define R1_APP_CMD (1 << 5) #define MMC_RSP_PRESENT (1 << 0) -#define MMC_RSP_136 (1 << 1) /* 136 bit response */ -#define MMC_RSP_CRC (1 << 2) /* expect valid crc */ -#define MMC_RSP_BUSY (1 << 3) /* card may send busy */ -#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ +#define MMC_RSP_136 (1 << 1) /* 136 bit response */ +#define MMC_RSP_CRC (1 << 2) /* expect valid crc */ +#define MMC_RSP_BUSY (1 << 3) /* card may send busy */ +#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ -#define MMC_RSP_NONE (0) -#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_NONE (0) +#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) #define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \ MMC_RSP_BUSY) -#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) -#define MMC_RSP_R3 (MMC_RSP_PRESENT) -#define MMC_RSP_R4 (MMC_RSP_PRESENT) -#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) -#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) -#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) +#define MMC_RSP_R3 (MMC_RSP_PRESENT) +#define MMC_RSP_R4 (MMC_RSP_PRESENT) +#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) +#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) struct mmc_cid { -- 1.7.1.86.g0e460

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[U-Boot] [PATCHv2 0/2] ARM: OMAP3: Revamp IGEP default configuration
by Enric Balletbo i Serra 19 Apr '11

19 Apr '11

Hi, This is the second version of patch series to revamp the default configuration for all IGEP boards. The purpose of these patches is use the boot script used in others OMAP3-based boards. Tested on IGEP v2 board and IGEP module. * changes since version 1: * Fix nandboot: should be 'onenand read' instead of 'nand read' * Also revamp default configuration on IGEP module Enric Balletbo i Serra (2): ARM: OMAP3: Revamp IGEP v2 default configuration ARM: OMAP3: Revamp IGEP module default configuration include/configs/igep0020.h | 57 ++++++++++++++++++++++++++++++++++++++++---- include/configs/igep0030.h | 57 ++++++++++++++++++++++++++++++++++++++++---- 2 files changed, 104 insertions(+), 10 deletions(-)

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Re: [U-Boot] U-Boot Digest, Vol 35, Issue 28
by ByteLee 19 Apr '11

19 Apr '11

于 4/19/11 4:25 PM, u-boot-request(a)lists.denx.de 写道: > Send U-Boot mailing list submissions to > u-boot(a)lists.denx.de > > To subscribe or unsubscribe via the World Wide Web, visit > http://lists.denx.de/mailman/listinfo/u-boot > or, via email, send a message with subject or body 'help' to > u-boot-request(a)lists.denx.de > > You can reach the person managing the list at > u-boot-owner(a)lists.denx.de > > When replying, please edit your Subject line so it is more specific > than "Re: Contents of U-Boot digest..." > > > Today's Topics: > > 1. [PATCH v2] S5P: GPIO Macro Values Corrected. (Chander Kashyap) > 2. Ticket number: YG764T 854R (COCA-COLA(a)une-pmta04.une.net.co) > 3. Re: [PATCH 1/2] Fix timer usage of the Atmel SPI dataflash > driver (Reinhard Meyer) > 4. Re: [PATCH 1/4] atmel_dataflash: remove use of > get_timer_masked (Reinhard Meyer) > 5. Re: [PATCH 2/3] avr32: fix linking (Reinhard Meyer) > 6. Beagle mux config: nCS5 vs. DMAREQ2? (Orjan Friberg) > 7. Re: [PATCH 1/3] ARM: don't panic if no flash is there > (Albert ARIBAUD) > 8. subscribe me to this list (Ratheendran R) > 9. Re: subscribe me to this list (Anatolij Gustschin) > 10. Re: [PATCH 00/15] [REWORK AVR32/AT91] additional changes for > avr32 (Reinhard Meyer) > 11. Re: [PATCH 00/15] [REWORK AVR32/AT91] additional changes for > avr32 (Andreas Bie?mann) > 12. [PATCH V2 01/15] avr32/config.mk: simplify PLATFORM_RELFLAGS > (Andreas Bie?mann) > 13. [PATCH V2 11/15] atngw100: move CONFIG_SYS_TEXT_BASE to > header (Andreas Bie?mann) > 14. [PATCH V2 13/15] favr-32-ezkit: move CONFIG_SYS_TEXT_BASE to > header (Andreas Bie?mann) > 15. [PATCH V2 08/15] favr-32-ezkit: fix "#define XXXX 1" > (Andreas Bie?mann) > 16. [PATCH V2 15/15] hammerhead: move CONFIG_SYS_TEXT_BASE to > header (Andreas Bie?mann) > 17. [PATCH V2 07/15] atstk1006: fix "#define XXXX 1" > (Andreas Bie?mann) > 18. [PATCH-V2 1/2] at91: reworked support for meesc board > (Daniel Gorsulowski) > 19. [PATCH V2 09/15] hammerhead: fix "#define XXXX 1" > (Andreas Bie?mann) > 20. [PATCH V2 03/15] atngw100: fix "#define XXXX 1" (Andreas Bie?mann) > 21. [PATCH V2 00/15] *** SUBJECT HERE *** (Andreas Bie?mann) > 22. [PATCH V2 04/15] atstk1002: fix "#define XXXX 1" > (Andreas Bie?mann) > 23. [PATCH V2 10/15] mimc200: fix "#define XXXX 1" (Andreas Bie?mann) > 24. [PATCH V2 12/15] atstk100x: move CONFIG_SYS_TEXT_BASE to > header (Andreas Bie?mann) > 25. [PATCH V2 05/15] atstk1003: fix "#define XXXX 1" > (Andreas Bie?mann) > 26. [PATCH V2 06/15] atstk1004: fix "#define XXXX 1" > (Andreas Bie?mann) > 27. [PATCH V2 14/15] mimc200: move CONFIG_SYS_TEXT_BASE to header > (Andreas Bie?mann) > 28. [PATCH V2 02/15] avr32: use single linker script > (Andreas Bie?mann) > 29. [PATCH-V2 2/2] at91: reworked support for otc570 board > (Daniel Gorsulowski) > 30. Re: [Patch v1] ARMV7: AM3517/05: Add support for CraneBoard. > (Srinath R) > 31. [PATCHv2 1/2] MMC: make b_max unconditional (John Rigby) > 32. [PATCHv2 2/2] mmc: omap_hsmmc.c: disable multiblock rw on old > rev omap34xx silicon (John Rigby) > 33. [PATCH v2 0/6] TFTP server (Luca Ceresoli) > 34. [PATCH v2 1/6] README: remove spurious line (Luca Ceresoli) > 35. [PATCH v2 2/6] NET: pass source IP address to packet handlers > (Luca Ceresoli) > 36. [PATCH v2 3/6] TFTP: rename "server" to "remote" (Luca Ceresoli) > 37. [PATCH v2 4/6] TFTP: rename STATE_RRQ to STATE_SEND_RRQ > (Luca Ceresoli) > 38. [PATCH v2 6/6] TFTP: add tftpsrv command (Luca Ceresoli) > 39. [PATCH v2 5/6] TFTP: net/tftp.c: add server mode receive > (Luca Ceresoli) > 40. [PATCH] MX31: mx31pdk: Make the board name simpler. > (Fabio Estevam) > 41. [PATCH v5] MX31: Introduce get_reset_cause() (Fabio Estevam) > 42. Re: [PATCH v4 2/5] Add Ethernet hardware MAC address > framework to usbnet (Remy Bohmer) > 43. Loan Offer... (Norton Finance Loan) > 44. Re: [PATCH v4 1/5] Add support for SMSC95XX USB 2.0 > 10/100MBit Ethernet Adapter (Wolfgang Denk) > 45. Re: [PATCH v4 2/5] Add Ethernet hardware MAC address > framework to usbnet (Wolfgang Denk) > 46. Re: [PATCH v4 2/5] Add Ethernet hardware MAC address > framework to usbnet (Wolfgang Denk) > 47. [PATCH] GPIO: Tegra2: add GPIO driver for Seaboard and > Harmony (Tom Warren) > 48. Re: [PATCH] BeagleBoard: Added LED driver (Paulraj, Sandeep) > 49. Re: [PATCH v3] omap3_beagle: enable the use of a plain text > file named uEnv.txt instead of boot.scr (Paulraj, Sandeep) > 50. Re: [PATCH v3] OMAP3: BeagleBoard: Enable pullups on i2c2. > (Paulraj, Sandeep) > 51. Re: [PATCH v2] OMAP3: BeagleBoard: add xM rev B to ID table > (Paulraj, Sandeep) > 52. Re: [PATCH v2] OMAP3: BeagleBoard: add more expansionboard > IDs (Paulraj, Sandeep) > 53. Re: [PATCH] BeagleBoard: add xM rev C to ID table > (Paulraj, Sandeep) > 54. Re: [Patch v1] ARMV7: AM3517/05: Add support for CraneBoard. > (Paulraj, Sandeep) > 55. Re: [PATCH 0/9] Update support for CM-T35 (Paulraj, Sandeep) > 56. ATM pin is 822 (ATM CARD DEPARTMENT) > 57. Re: [PATCH v3] omap3_beagle: enable the use of a plain text > file named uEnv.txt instead of boot.scr (Wolfgang Denk) > 58. Please pull u-boot-ti/master (s-paulraj(a)ti.com) > 59. Re: [PATCH v3] omap3_beagle: enable the use of a plain text > file named uEnv.txt instead of boot.scr (Paulraj, Sandeep) > 60. Please pull u-boot-ti/master (s-paulraj(a)ti.com) > 61. Fix for overlapping sections? (Ciummo, Larry (DS-1)) > 62. Re: [V1 0/3] OpenRD-Client and OpenRD-Ultimate support > (Clint Adams) > 63. [PATCH v2 0/4] support for OpenRD-Client and OpenRD-Ultimate > (Clint Adams) > 64. [PATCH v2 2/4] Add definitions for OpenRD-Client and > OpenRD-Ultimate (Clint Adams) > 65. [PATCH v2 3/4] Initialize second PHY on OpenRD-Client and > OpenRD-Ultimate (Clint Adams) > 66. [PATCH v2 1/4] Rename openrd_base files to openrd (Clint Adams) > 67. [PATCH v2 4/4] Enable multiple fs options for Marvell SoC > family on OpenRD boards (Clint Adams) > 68. [PATCH] ehci-pci: Fix PCI EHCI driver for 36-bit (Zhao Chenhui) > 69. Re: [PATCH v2 3/4] Initialize second PHY on OpenRD-Client and > OpenRD-Ultimate (Prafulla Wadaskar) > 70. Issue with ehci-pci on MPC8548 (Sandeep Kumar Gopalpet) > 71. Re: Please pull u-boot-ti/master (Albert ARIBAUD) > 72. help for porting u-boot (Ratheendran R) > 73. PLEASE ACCEPT MY REGUEST (PLEASE ACCEPT MY REGUEST) > 74. [PATCH 0/9] Patch set for some Freescale ColdFire boards > (Jason Jin) > 75. [PATCH 1/9] Fix the configuration broken for ColdFire boards. > (Jason Jin) > 76. [PATCH V2 2/9] ColdFire: Change the way to set platform CPP > flags (Jason Jin) > 77. [PATCH V2 3/9] Env and lds file clean up for ColdFire M5445x > and M547x/8x boards. (Jason Jin) > 78. [PATCH 6/9] Disable the NFS define for 52277 board. (Jason Jin) > 79. [PATCH 4/9] Clean up lds files for some ColdFire nommu chips > (Jason Jin) > 80. [PATCH V2 5/9] Enable the dm9000 on ColdFire 5253DEMO board. > (Jason Jin) > 81. [PATCH 7/9] ColdFire:Add mb for 5253 dram initialization > (Jason Jin) > 82. [PATCH 8/9] Change the env settings for u-boot update (Jason Jin) > 83. [PATCH 9/9] sync the buffer descriptor IO for coldfire FEC > (Jason Jin) > 84. Status of ethernet support for Beagleboard xM ? (Bids O'Bids) > 85. Status of ethernet support for Beagleboard xM ? (Bids O'Bids) > 86. UEC phy not working on first try (DUNDA Matthias) > 87. [PATCH] Remove remnants of obsolete CONFIG_SYS_GBL_DATA_SIZE > comments (Michael Jones) > 88. Re: [PATCH] S5P:SROM config code moved to s5p-common > directory (Minkyu Kang) > 89. Re: [PATCH v2] S5P: GPIO Macro Values Corrected. (Minkyu Kang) > > > ---------------------------------------------------------------------- > > Message: 1 > Date: Mon, 18 Apr 2011 15:38:43 +0530 > From: Chander Kashyap<chander.kashyap(a)linaro.org> > Subject: [U-Boot] [PATCH v2] S5P: GPIO Macro Values Corrected. > To: u-boot(a)lists.denx.de > Cc: linaro-dev(a)lists.linaro.org, bjlee(a)samsung.com, > patches(a)linaro.org, mk7.kang(a)samsung.com, Chander Kashyap > <chander.kashyap(a)linaro.org>, samsung(a)lists.linaro.org > Message-ID: > <1303121323-22997-1-git-send-email-chander.kashyap(a)linaro.org> > > S5PC2XX: Macro values for Pull Up and Driver Strength were wrong. > S5PC1XX: Macro values for Driver Strength were wrong. > > Signed-off-by: Chander Kashyap<chander.kashyap(a)linaro.org> > --- > > Changes for V2: > - Macro value order fixed. > - Added Changes for S5PC1XX. > > arch/arm/include/asm/arch-s5pc1xx/gpio.h | 4 ++-- > arch/arm/include/asm/arch-s5pc2xx/gpio.h | 7 +++---- > 2 files changed, 5 insertions(+), 6 deletions(-) > > diff --git a/arch/arm/include/asm/arch-s5pc1xx/gpio.h b/arch/arm/include/asm/arch-s5pc1xx/gpio.h > index 2df33a6..485b9bf 100644 > --- a/arch/arm/include/asm/arch-s5pc1xx/gpio.h > +++ b/arch/arm/include/asm/arch-s5pc1xx/gpio.h > @@ -149,8 +149,8 @@ void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); > > /* Drive Strength level */ > #define GPIO_DRV_1X 0x0 > -#define GPIO_DRV_2X 0x1 > -#define GPIO_DRV_3X 0x2 > +#define GPIO_DRV_3X 0x1 > +#define GPIO_DRV_2X 0x2 > #define GPIO_DRV_4X 0x3 > #define GPIO_DRV_FAST 0x0 > #define GPIO_DRV_SLOW 0x1 > diff --git a/arch/arm/include/asm/arch-s5pc2xx/gpio.h b/arch/arm/include/asm/arch-s5pc2xx/gpio.h > index 05e5b3e..38303e4 100644 > --- a/arch/arm/include/asm/arch-s5pc2xx/gpio.h > +++ b/arch/arm/include/asm/arch-s5pc2xx/gpio.h > @@ -99,14 +99,13 @@ void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); > /* Pull mode */ > #define GPIO_PULL_NONE 0x0 > #define GPIO_PULL_DOWN 0x1 > -#define GPIO_PULL_UP 0x2 > +#define GPIO_PULL_UP 0x3 > > /* Drive Strength level */ > #define GPIO_DRV_1X 0x0 > -#define GPIO_DRV_2X 0x1 > -#define GPIO_DRV_3X 0x2 > +#define GPIO_DRV_3X 0x1 > +#define GPIO_DRV_2X 0x2 > #define GPIO_DRV_4X 0x3 > #define GPIO_DRV_FAST 0x0 > #define GPIO_DRV_SLOW 0x1 > - > #endif > -- > 1.7.1 > > > > ------------------------------ > > Message: 2 > Date: Mon, 18 Apr 2011 03:18:19 -0700 > From: COCA-COLA(a)une-pmta04.une.net.co, "INC."@une-pmta04.une.net.co > Subject: [U-Boot] Ticket number: YG764T 854R > To: Recipients<COCA-COLA(a)une-pmta04.une.net.co> > Message-ID:<20110418101852.97039213DE4(a)une-pmta04.une.net.co> > Content-Type: text/plain; charset="iso-8859-1" > > COCA-COLA INC. > PO Box 1010,Great Britain. > L70 1NL,United Kingdom > > Seria No: 110922 > Ticket number: YG764T 854R > > Congratulations!!! > > Your email address has just won you the sum of ?200, 000. 00 (Great British Pounds Sterlings) In the on going Coca-Cola Inc. Season's Promotion UK 2011.In line with The commemorating event marking our 25th anniversary, We rolled out over 75,000.000.00 (Seventy Five Million Great Britain Pounds) for our 25TH Anniversary Draws you are among the 7 lucky winners. > > To claim your prize contact our Claims Department via email with Personal details. E-mail: clearingpaymenthouse(a)gmail.com > > 1. Scan copy of your identity Proof. > 2. Complete Names: > 3. Address: > 4. Age: > 5. Occupation: > 6. Telephone: > 7. Sex: Male > 8. Marital Status: > 9. Country: > 10: State: > > IMPORTANT:Please fill the below verification form required for authentication and verification by the India High Commission in London: > > ANNOUNCER. > Sir Edward C. N. Branson > +44-704-579-2572 > Copyright ? Coca-Cola Inc 2011 Times Internet Limited. All rights reserved > > > ------------------------------ > > Message: 3 > Date: Mon, 18 Apr 2011 12:36:23 +0200 > From: Reinhard Meyer<u-boot(a)emk-elektronik.de> > Subject: Re: [U-Boot] [PATCH 1/2] Fix timer usage of the Atmel SPI > dataflash driver > To: Remy Bohmer<linux(a)bohmer.net> > Cc: u-boot(a)lists.denx.de > Message-ID:<4DAC1427.7060706(a)emk-elektronik.de> > Content-Type: text/plain; charset=ISO-8859-15 > > Dear Remy Bohmer, >> Signed-off-by: Remy Bohmer<linux(a)bohmer.net> >> --- >> drivers/spi/atmel_dataflash_spi.c | 8 ++++---- >> 1 files changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/spi/atmel_dataflash_spi.c b/drivers/spi/atmel_dataflash_spi.c >> index 4a5c4aa..2f23f54 100644 >> --- a/drivers/spi/atmel_dataflash_spi.c >> +++ b/drivers/spi/atmel_dataflash_spi.c >> @@ -133,7 +133,7 @@ unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc); >> >> unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc) >> { >> - unsigned int timeout; >> + u32 time_start, timeout; >> >> pDesc->state = BUSY; >> >> @@ -158,12 +158,12 @@ unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc) >> } >> >> /* arm simple, non interrupt dependent timer */ >> - reset_timer_masked(); >> - timeout = 0; >> + time_start = get_timer(0); >> >> writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN, AT91_BASE_SPI + AT91_SPI_PTCR); >> while (!(readl(AT91_BASE_SPI + AT91_SPI_SR)& AT91_SPI_RXBUFF)&& >> - ((timeout = get_timer_masked())< CONFIG_SYS_SPI_WRITE_TOUT)); >> + ((timeout = get_timer(time_start))< CONFIG_SYS_SPI_WRITE_TOUT)); >> + >> writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR); >> pDesc->state = IDLE; > This issue had already been fixed by the ATMEL rework. > > But you are welcome to further "fix" this driver to use structure SoC access ;) > > Best Regards, Reinhard > > > ------------------------------ > > Message: 4 > Date: Mon, 18 Apr 2011 12:41:14 +0200 > From: Reinhard Meyer<u-boot(a)emk-elektronik.de> > Subject: Re: [U-Boot] [PATCH 1/4] atmel_dataflash: remove use of > get_timer_masked > To: Alessandro Rubini<rubini(a)gnudd.com> > Cc: u-boot(a)lists.denx.de > Message-ID:<4DAC154A.6080500(a)emk-elektronik.de> > Content-Type: text/plain; charset=ISO-8859-1 > > Dear Alessandro Rubini: >> Commit 5dca710a3d7703e41da0e9894f2d71f9e25bea6b removed >> get_timer_masked for at91. The dataflash driver was still >> using it and so stopped compiling. This blindly fixes >> the compilation problem (I am not currently using dataflash). >> >> Signed-off-by: Alessandro Rubini<rubini(a)gnudd.com> >> --- >> drivers/spi/atmel_dataflash_spi.c | 4 ++-- >> 1 files changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/spi/atmel_dataflash_spi.c b/drivers/spi/atmel_dataflash_spi.c >> index 4a5c4aa..d5215c0 100644 >> --- a/drivers/spi/atmel_dataflash_spi.c >> +++ b/drivers/spi/atmel_dataflash_spi.c >> @@ -158,12 +158,12 @@ unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc) >> } >> >> /* arm simple, non interrupt dependent timer */ >> - reset_timer_masked(); >> + reset_timer(); >> timeout = 0; >> >> writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN, AT91_BASE_SPI + AT91_SPI_PTCR); >> while (!(readl(AT91_BASE_SPI + AT91_SPI_SR)& AT91_SPI_RXBUFF)&& >> - ((timeout = get_timer_masked())< CONFIG_SYS_SPI_WRITE_TOUT)); >> + ((timeout = get_timer(0))< CONFIG_SYS_SPI_WRITE_TOUT)); >> writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR); >> pDesc->state = IDLE; >> > a) reset_timer(), and all *_masked() timer functions are depreciated and have been > removed from AT91 timer code > b) the problem has already been fixed in current u-boot-atmel/next > > Best Regards, > Reinhard > > > ------------------------------ > > Message: 5 > Date: Mon, 18 Apr 2011 12:53:12 +0200 > From: Reinhard Meyer<u-boot(a)emk-elektronik.de> > Subject: Re: [U-Boot] [PATCH 2/3] avr32: fix linking > To: Andreas Bie?mann<biessmann(a)corscience.de> > Cc: u-boot(a)lists.denx.de > Message-ID:<4DAC1818.9050709(a)emk-elektronik.de> > Content-Type: text/plain; charset=UTF-8 > > Dear Andreas Bie?mann: >> This patch fixes following error: >> >> ---8<--- >> avr32-linux-ld: --gc-sections and -r may not be used together >> --->8--- >> >> Since 8aba9dceebb14144e07d19593111ee3a999c37fc all avr32 boards are broken due >> to linking error as seen above. >> >> Signed-off-by: Andreas Bie?mann<biessmann(a)corscience.de> >> --- >> arch/avr32/config.mk | 2 +- >> board/atmel/atngw100/config.mk | 1 - >> board/atmel/atstk1000/config.mk | 1 - >> board/earthlcd/favr-32-ezkit/config.mk | 1 - >> board/mimc/mimc200/config.mk | 1 - >> board/miromico/hammerhead/config.mk | 1 - >> 6 files changed, 1 insertions(+), 6 deletions(-) > Applied to u-boot-atmel/next, thanks. > > Reinhard > > > ------------------------------ > > Message: 6 > Date: Mon, 18 Apr 2011 12:53:53 +0200 > From: Orjan Friberg<orjan.friberg(a)flatfrog.com> > Subject: [U-Boot] Beagle mux config: nCS5 vs. DMAREQ2? > To: "u-boot(a)lists.denx.de"<u-boot(a)lists.denx.de> > Message-ID:<4DAC1841.2030408(a)flatfrog.com> > Content-Type: text/plain; charset="ISO-8859-1"; format=flowed > > Hi, > > The mux configuration in board/ti/beagle/beagle.h says > > MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M0)) /*GPMC_nCS5*/ > MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M1)) /*SYS_nDMA_REQ2*/ > > The TRM (spruf98p) says sys_ndmareq2 is mux mode 1 for ncs5, not ncs6. > > (Possibly not a concern for the BeagleBoard; I'm trying to get dmareq2 > working on a custom 3730 board.) > > Thanks, > Orjan >

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[U-Boot] [PATCH v2] S5P: GPIO Macro Values Corrected.
by Chander Kashyap 19 Apr '11

19 Apr '11

S5PC2XX: Macro values for Pull Up and Driver Strength were wrong. S5PC1XX: Macro values for Driver Strength were wrong. Signed-off-by: Chander Kashyap <chander.kashyap(a)linaro.org> --- Changes for V2: - Macro value order fixed. - Added Changes for S5PC1XX. arch/arm/include/asm/arch-s5pc1xx/gpio.h | 4 ++-- arch/arm/include/asm/arch-s5pc2xx/gpio.h | 7 +++---- 2 files changed, 5 insertions(+), 6 deletions(-) diff --git a/arch/arm/include/asm/arch-s5pc1xx/gpio.h b/arch/arm/include/asm/arch-s5pc1xx/gpio.h index 2df33a6..485b9bf 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/gpio.h +++ b/arch/arm/include/asm/arch-s5pc1xx/gpio.h @@ -149,8 +149,8 @@ void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); /* Drive Strength level */ #define GPIO_DRV_1X 0x0 -#define GPIO_DRV_2X 0x1 -#define GPIO_DRV_3X 0x2 +#define GPIO_DRV_3X 0x1 +#define GPIO_DRV_2X 0x2 #define GPIO_DRV_4X 0x3 #define GPIO_DRV_FAST 0x0 #define GPIO_DRV_SLOW 0x1 diff --git a/arch/arm/include/asm/arch-s5pc2xx/gpio.h b/arch/arm/include/asm/arch-s5pc2xx/gpio.h index 05e5b3e..38303e4 100644 --- a/arch/arm/include/asm/arch-s5pc2xx/gpio.h +++ b/arch/arm/include/asm/arch-s5pc2xx/gpio.h @@ -99,14 +99,13 @@ void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); /* Pull mode */ #define GPIO_PULL_NONE 0x0 #define GPIO_PULL_DOWN 0x1 -#define GPIO_PULL_UP 0x2 +#define GPIO_PULL_UP 0x3 /* Drive Strength level */ #define GPIO_DRV_1X 0x0 -#define GPIO_DRV_2X 0x1 -#define GPIO_DRV_3X 0x2 +#define GPIO_DRV_3X 0x1 +#define GPIO_DRV_2X 0x2 #define GPIO_DRV_4X 0x3 #define GPIO_DRV_FAST 0x0 #define GPIO_DRV_SLOW 0x1 - #endif -- 1.7.1

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[U-Boot] Status of ethernet support for Beagleboard xM ?
by Bids O'Bids 19 Apr '11

19 Apr '11

Hi, After browsing through the mailing list archives, I would like to know the latest status for the (upcoming ?) support of ethernet on the Beagleboard xM, to enable loading uimages through tftp. As far as I understood, it was not yet supported as of February 2011, potentially planned as part of GSoC this year, and some people potentially had partial patches for this. Any info on this topic would be greatly appreciated. Regards, Julien

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[U-Boot] Status of ethernet support for Beagleboard xM ?
by Bids O'Bids 19 Apr '11

19 Apr '11

Hi, After sea

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