November 2011 - U-Boot

[U-Boot] [PATCH 0/1] OMAP3: Change omap3_evm maintainer
by Tom Rini 09 Nov '11

09 Nov '11

Hey all, The omap3_evm board doesn't have an active maintainer currently. The listed maintainer hasn't made a commit since 2009 and is no longer employed by TI. I checked with Sanjeev Premi who has also been active with this board recently and he wasn't interested, so I'm offering myself up. -- Tom

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[U-Boot] Pick Up Your Compensation Funds
by Western Union Company 09 Nov '11

09 Nov '11

Sir/Madam, On behalf of the United Nations Compensation Commission (UNCC) in affiliation with Western Union Campaign for Global Economic Crisis eradication, we wish to notify you that your E-mail Address has won (Two Hundred and Fifty Thousand United State Dollars only) $250,000.00. For security reasons and to avoid misappropriation of funds, proper verifications must be carried out before the fund is transferred. We require the details below for verification so that the transfer can be carried out. (1)Your Name:---------------- (2)Your Country:------------ (3)Tel:-------------------- (4)Age:--------------------- (6)Sex:-------------- (7) Occupation--------- Send the above details to us via the email addresses stated below: Western Union District Manager (Mr. Frank Amos) Website: www.westernunion.com E-mail: western-money70(a)hotmail.com Tel: +2347031908911 As soon as these details are received and verified, the fund will be transferred to you. Thanks and God Bless, Mrs. Maureen Mbe. Organization Dept Copyright © 2001-2011 The Western Union Company. All Rights Reserved

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[U-Boot] A WIDOW AND CHILD ASKING FOR HELP IN BUSINESS ASSISTANCE.
by VUYO GWALA 09 Nov '11

09 Nov '11

Attn:Sir/Madam,open the attached file for transaction details.

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[U-Boot] TEST: Join mailing list.
by uboot＠andestech.com 09 Nov '11

09 Nov '11

Sorry this is a send mail test. Please ignore it.

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[U-Boot] gcc 4.6 warning in x86emu/ops2.c
by Kumar Gala 09 Nov '11

09 Nov '11

Tried to look at this but decided to give up as it seems a bit too involved: LOG/P2020DS_SPIFLASH.ERR:x86emu/ops2.c: In function 'x86emuOp2_set_byte': LOG/P2020DS_SPIFLASH.ERR:x86emu/ops2.c:171:11: warning: variable 'name' set but not used [-Wunused-but-set-variable] - k

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[U-Boot] [PATCH 0/12]: Add more framework to OMAP3 SPL, port more boards
by Tom Rini 09 Nov '11

09 Nov '11

Hey all, This is related to, but a bit different from the RFT thread I made with beagleboard SPL patches. I've incorporated the feedback about splitting the changes up a lot more and after talking with Scott Wood on IRC after the ML thread, I've created an omap3 specific file with the NAND related stuff these boards need (since it would have gotten very big for what's really needed here at this stage). The series is checkpatch.pl clean. What we have in patches 1-6 is bugfixing and cleanup of the SDRC code. It's worth noting that without these changes we do some very 'funny' (read: wrong) things on some platforms like omap3_evm where we find 384MB memory when there's really only 256MB (and maybe 256 on the 128MB boards, not sure). Patch 7 adds another hook for SDRC boards to be able to say what timings they have because on say beagle or omap3_evm, we have a few choices. We also convert devkit8000 here. Patch 8 adds a new CONFIG (CONFIG_SPL_OMAP3_POP_PROBE) and file so that OMAP3 boards which have a PoP chip for NAND/DDR can find out what they are and decide on timings based on that. Patches 9 and 10 convert Beagleboard and OMAP3 EVM to SPL. Patches 11 and 12 convert the am3517 evm and am3517 crane boards (which don't use SDRC but EMIF4) to SPL as well (given Ilya Yanok fixed a bug in <asm/arch-omap3/cpu.h for emif4 this is just a mechanical change). -- Tom

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[U-Boot] [PATCH 10/16] board/sbc8560/sbc8560.c: Fix GCC 4.6 build warning
by Kumar Gala 09 Nov '11

09 Nov '11

Fix: sbc8560.c: In function 'ft_board_setup': sbc8560.c:351:12: warning: variable 'tmp' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- board/sbc8560/sbc8560.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/board/sbc8560/sbc8560.c b/board/sbc8560/sbc8560.c index c5fe92e..98bc7df 100644 --- a/board/sbc8560/sbc8560.c +++ b/board/sbc8560/sbc8560.c @@ -348,7 +348,7 @@ phys_size_t fixed_sdram(void) void ft_board_setup(void *blob, bd_t *bd) { - int node, tmp[2]; + int node; #ifdef CONFIG_PCI const char *path; #endif @@ -356,7 +356,6 @@ ft_board_setup(void *blob, bd_t *bd) ft_cpu_setup(blob, bd); node = fdt_path_offset(blob, "/aliases"); - tmp[0] = 0; if (node >= 0) { #ifdef CONFIG_PCI path = fdt_getprop(blob, node, "pci0", NULL); -- 1.7.3.4

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[U-Boot] [PATCH 1/7 v2] integrator: pass configs for core modules
by Linus Walleij 09 Nov '11

09 Nov '11

Alter the board.cfg to pass core module configuration flags so we can make compile-time switches for different core modules. These are already in use for some low-level code, they just got lost in the conversion to the new build system. Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- ChangeLog v1->v2: - Rebased to U-Boot ARM HEAD at Alberts request, see message 4EA1C8E7.7090105(a)aribaud.net --- boards.cfg | 16 ++++++++-------- 1 files changed, 8 insertions(+), 8 deletions(-) diff --git a/boards.cfg b/boards.cfg index 4162172..721e89c 100644 --- a/boards.cfg +++ b/boards.cfg @@ -35,7 +35,7 @@ # Target ARCH CPU Board name Vendor SoC Options ########################################################################################################### -integratorcp_cm1136 arm arm1136 integrator armltd - integratorcp +integratorcp_cm1136 arm arm1136 integrator armltd - integratorcp:CM1136 qong arm arm1136 - davedenx mx31 mx31ads arm arm1136 - freescale mx31 imx31_litekit arm arm1136 - logicpd mx31 @@ -45,9 +45,9 @@ mx31pdk arm arm1136 - freesca mx35pdk arm arm1136 - freescale mx35 omap2420h4 arm arm1136 - ti omap24xx tnetv107x_evm arm arm1176 tnetv107xevm ti tnetv107x -integratorap_cm720t arm arm720t integrator armltd - integratorap -integratorap_cm920t arm arm920t integrator armltd - integratorap -integratorcp_cm920t arm arm920t integrator armltd - integratorcp +integratorap_cm720t arm arm720t integrator armltd - integratorap:CM720T +integratorap_cm920t arm arm920t integrator armltd - integratorap:CM920T +integratorcp_cm920t arm arm920t integrator armltd - integratorcp:CM920T a320evb arm arm920t - faraday a320 at91rm9200ek arm arm920t at91rm9200ek atmel at91 at91rm9200ek at91rm9200ek_ram arm arm920t at91rm9200ek atmel at91 at91rm9200ek:RAMBOOT @@ -61,8 +61,8 @@ cm41xx arm arm920t - - VCMA9 arm arm920t vcma9 mpl s3c24x0 smdk2410 arm arm920t - samsung s3c24x0 omap1510inn arm arm925t - ti -integratorap_cm926ejs arm arm926ejs integrator armltd - integratorap -integratorcp_cm926ejs arm arm926ejs integrator armltd - integratorcp +integratorap_cm926ejs arm arm926ejs integrator armltd - integratorap:CM926EJ_S +integratorcp_cm926ejs arm arm926ejs integrator armltd - integratorcp:CM924EJ_S versatileqemu arm arm926ejs versatile armltd versatile versatile:ARCH_VERSATILE_QEMU,ARCH_VERSATILE_PB versatilepb arm arm926ejs versatile armltd versatile versatile:ARCH_VERSATILE_PB versatileab arm arm926ejs versatile armltd versatile versatile:ARCH_VERSATILE_AB @@ -158,8 +158,8 @@ nhk8815_onenand arm arm926ejs nhk8815 st omap5912osk arm arm926ejs - ti omap edminiv2 arm arm926ejs - LaCie orion5x dkb arm arm926ejs - Marvell pantheon -integratorap_cm946es arm arm946es integrator armltd - integratorap -integratorcp_cm946es arm arm946es integrator armltd - integratorcp +integratorap_cm946es arm arm946es integrator armltd - integratorap:CM946ES +integratorcp_cm946es arm arm946es integrator armltd - integratorcp:CM946ES ca9x4_ct_vxp arm armv7 vexpress armltd am335x_evm arm armv7 am335x ti am33xx efikamx arm armv7 efikamx - mx5 efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/efikamx/imximage_mx.cfg -- 1.7.6.4

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[U-Boot] [PATCH 7/7 v3] integrator: enable Vpp and disable flash protection
by Linus Walleij 09 Nov '11

09 Nov '11

This enables Vpp and disables the flash protection on the Integrator when starting U-Boot. The integrator/AP has double protection mechanisms: this one and the EBI protection bit (patch earlier), the Integrator/CP has only one line of protection in these registers. Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- ChangeLog v1->v2: - Rebased to U-Boot ARM HEAD at Alberts request, see message 4EA1C8E7.7090105(a)aribaud.net ChangeLog v2->v3: - Rebased to U-Boot ARM HEAD at Alberts request, see message 4EB84700.1030109(a)aribaud.net --- board/armltd/integrator/integrator.c | 20 ++++++++++++++++++++ 1 files changed, 20 insertions(+), 0 deletions(-) diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c index dd83ca5..a507c09 100644 --- a/board/armltd/integrator/integrator.c +++ b/board/armltd/integrator/integrator.c @@ -37,6 +37,7 @@ #include <netdev.h> #include <asm/io.h> #include "arm-ebi.h" +#include "integrator-sc.h" DECLARE_GLOBAL_DATA_PTR; @@ -76,7 +77,19 @@ extern void cm_remap(void); cm_remap(); /* remaps writeable memory to 0x00000000 */ #endif +#ifdef CONFIG_ARCH_CINTEGRATOR /* + * Flash protection on the Integrator/CP is in a simple register + */ + val = readl(CP_FLASHPROG); + val |= (CP_FLASHPROG_FLVPPEN | CP_FLASHPROG_FLWREN); + writel(val, CP_FLASHPROG); +#else + /* + * The Integrator/AP has some special protection mechanisms + * for the external memories, first the External Bus Interface (EBI) + * then the system controller (SC). + * * The system comes up with the flash memory non-writable and * configuration locked. If we want U-Boot to be used for flash * access we cannot have the flash memory locked. @@ -88,6 +101,13 @@ extern void cm_remap(void); writel(val, EBI_BASE + EBI_CSR1_REG); writel(0, EBI_BASE + EBI_LOCK_REG); + /* + * Set up the system controller to remove write protection from + * the flash memory and enable Vpp + */ + writel(SC_CTRL_FLASHVPP | SC_CTRL_FLASHWP, SC_CTRLS); +#endif + icache_enable (); return 0; -- 1.7.6.4

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[U-Boot] [PATCH 6/7 v3] integrator: add system controller header
by Linus Walleij 09 Nov '11

09 Nov '11

Break out the AP system controller and CP "CP controller" registers into a header file, it gives better overview than hardcoding its values and other disturbing practices. Signed-off-by: Linus Walleij <linus.walleij(a)linaro.org> --- ChangeLog v1->v2: - Rebased to U-Boot ARM HEAD at Alberts request, see message 4EA1C8E7.7090105(a)aribaud.net ChangeLog v2->v3: - Rebased to U-Boot ARM HEAD at Alberts request, see message 4EB84700.1030109(a)aribaud.net --- board/armltd/integrator/integrator-sc.h | 91 +++++++++++++++++++++++++++++++ 1 files changed, 91 insertions(+), 0 deletions(-) create mode 100644 board/armltd/integrator/integrator-sc.h diff --git a/board/armltd/integrator/integrator-sc.h b/board/armltd/integrator/integrator-sc.h new file mode 100644 index 0000000..279dc55 --- /dev/null +++ b/board/armltd/integrator/integrator-sc.h @@ -0,0 +1,91 @@ +/* + * (C) Copyright 2011 + * Linaro + * Linus Walleij <linus.walleij(a)linaro.org> + * Register definitions for the System Controller (SC) and + * the similar "CP Controller" found in the ARM Integrator/AP and + * Integrator/CP reference designs + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __ARM_SC_H +#define __ARM_SC_H + +#define SC_BASE 0x11000000 + +/* + * The system controller registers + */ +#define SC_ID_OFFSET 0x00 +#define SC_OSC_OFFSET 0x04 +/* Setting this bit switches to 25 MHz mode, clear means 33 MHz */ +#define SC_OSC_DIVXY (1 << 8) +#define SC_CTRLS_OFFSET 0x08 +#define SC_CTRLC_OFFSET 0x0C +/* Set bits by writing CTRLS, clear bits by writing CTRLC */ +#define SC_CTRL_SOFTRESET (1 << 0) +#define SC_CTRL_FLASHVPP (1 << 1) +#define SC_CTRL_FLASHWP (1 << 2) +#define SC_CTRL_UART1DTR (1 << 4) +#define SC_CTRL_UART1RTS (1 << 5) +#define SC_CTRL_UART0DTR (1 << 6) +#define SC_CTRL_UART0RTS (1 << 7) +#define SC_DEC_OFFSET 0x10 +#define SC_ARB_OFFSET 0x14 +#define SC_PCI_OFFSET 0x18 +#define SC_PCI_PCIEN (1 << 0) +#define SC_PCI_PCIBINT_CLR (1 << 1) +#define SC_LOCK_OFFSET 0x1C +#define SC_LBFADDR_OFFSET 0x20 +#define SC_LBFCODE_OFFSET 0x24 + +#define SC_ID (SC_BASE + SC_ID_OFFSET) +#define SC_OSC (SC_BASE + SC_OSC_OFFSET) +#define SC_CTRLS (SC_BASE + SC_CTRLS_OFFSET) +#define SC_CTRLC (SC_BASE + SC_CTRLC_OFFSET) +#define SC_DEC (SC_BASE + SC_DEC_OFFSET) +#define SC_ARB (SC_BASE + SC_ARB_OFFSET) +#define SC_PCI (SC_BASE + SC_PCI_OFFSET) +#define SC_LOCK (SC_BASE + SC_LOCK_OFFSET) +#define SC_LBFADDR (SC_BASE + SC_LBFADDR_OFFSET) +#define SC_LBFCODE (SC_BASE + SC_LBFCODE_OFFSET) + +/* + * The Integrator/CP as a smaller set of registers, at a different + * offset - probably not to disturb old software. + */ + +#define CP_BASE 0xCB000000 + +#define CP_IDFIELD_OFFSET 0x00 +#define CP_FLASHPROG_OFFSET 0x04 +#define CP_FLASHPROG_FLVPPEN (1 << 0) +#define CP_FLASHPROG_FLWREN (1 << 1) +#define CP_FLASHPROG_FLASHSIZE (1 << 2) +#define CP_FLASHPROG_EXTRABANK (1 << 3) +#define CP_INTREG_OFFSET 0x08 +#define CP_DECODE_OFFSET 0x0C + +#define CP_IDFIELD (CP_BASE + CP_ID_OFFSET) +#define CP_FLASHPROG (CP_BASE + CP_FLASHPROG_OFFSET) +#define CP_INTREG (CP_BASE + CP_INTREG_OFFSET) +#define CP_DECODE (CP_BASE + CP_DECODE_OFFSET) + +#endif -- 1.7.6.4

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