January 2011 - U-Boot

[U-Boot] [PATCH] Replace "FLASH" strings with "Flash" or "flash"
by Peter Tyser 19 Jan '11

19 Jan '11

There's no compelling reason to have the output on bootup or the "flinfo" command print "flash" in uppercase, so use the proper case where appropriate. Signed-off-by: Peter Tyser <ptyser(a)xes-inc.com> --- arch/arm/lib/board.c | 2 +- arch/m68k/lib/board.c | 2 +- arch/microblaze/lib/board.c | 2 +- arch/powerpc/lib/board.c | 2 +- arch/sh/lib/board.c | 2 +- arch/sparc/lib/board.c | 2 +- board/xes/xpedite517x/xpedite517x.c | 2 +- board/xes/xpedite520x/xpedite520x.c | 2 +- board/xes/xpedite537x/xpedite537x.c | 2 +- board/xes/xpedite550x/xpedite550x.c | 2 +- drivers/mtd/cfi_flash.c | 4 ++-- 11 files changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index 96c0e30..c620d2c 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -481,7 +481,7 @@ void board_init_r (gd_t *id, ulong dest_addr) mem_malloc_init (malloc_start, TOTAL_MALLOC_LEN); #if !defined(CONFIG_SYS_NO_FLASH) - puts ("FLASH: "); + puts ("Flash: "); if ((flash_size = flash_init ()) > 0) { # ifdef CONFIG_SYS_FLASH_CHECKSUM diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c index 9a51908..7867ba5 100644 --- a/arch/m68k/lib/board.c +++ b/arch/m68k/lib/board.c @@ -460,7 +460,7 @@ void board_init_r (gd_t *id, ulong dest_addr) malloc_bin_reloc (); #if !defined(CONFIG_SYS_NO_FLASH) - puts ("FLASH: "); + puts ("Flash: "); if ((flash_size = flash_init ()) > 0) { # ifdef CONFIG_SYS_FLASH_CHECKSUM diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c index eeef579..3cd2352 100644 --- a/arch/microblaze/lib/board.c +++ b/arch/microblaze/lib/board.c @@ -125,7 +125,7 @@ void board_init (void) printf ("\tU-Boot Start:0x%08x\n", CONFIG_SYS_TEXT_BASE); #if defined(CONFIG_CMD_FLASH) - puts ("FLASH: "); + puts ("Flash: "); bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; if (0 < (flash_size = flash_init ())) { bd->bi_flashsize = flash_size; diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index 9759e23..b88cf6b 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -717,7 +717,7 @@ void board_init_r (gd_t *id, ulong dest_addr) mem_malloc_init (malloc_start, TOTAL_MALLOC_LEN); #if !defined(CONFIG_SYS_NO_FLASH) - puts ("FLASH: "); + puts ("Flash: "); if (board_flash_wp_on()) { printf("Uninitialized - Write Protect On\n"); diff --git a/arch/sh/lib/board.c b/arch/sh/lib/board.c index 3d201b2..ea98b32 100644 --- a/arch/sh/lib/board.c +++ b/arch/sh/lib/board.c @@ -46,7 +46,7 @@ unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN; static int sh_flash_init(void) { gd->bd->bi_flashsize = flash_init(); - printf("FLASH: %ldMB\n", gd->bd->bi_flashsize / (1024*1024)); + printf("Flash: %ldMB\n", gd->bd->bi_flashsize / (1024*1024)); return 0; } diff --git a/arch/sparc/lib/board.c b/arch/sparc/lib/board.c index ab31cfb..386cd04 100644 --- a/arch/sparc/lib/board.c +++ b/arch/sparc/lib/board.c @@ -284,7 +284,7 @@ void board_init_f(ulong bootflag) malloc_bin_reloc(); #if !defined(CONFIG_SYS_NO_FLASH) - puts("FLASH: "); + puts("Flash: "); if ((flash_size = flash_init()) > 0) { # ifdef CONFIG_SYS_FLASH_CHECKSUM diff --git a/board/xes/xpedite517x/xpedite517x.c b/board/xes/xpedite517x/xpedite517x.c index 0f7fa6c..57ef5e3 100644 --- a/board/xes/xpedite517x/xpedite517x.c +++ b/board/xes/xpedite517x/xpedite517x.c @@ -47,7 +47,7 @@ static void flash_cs_fixup(void) */ flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) & CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS)); - printf("FLASH: Executed from FLASH%d\n", flash_sel ? 2 : 1); + printf("Flash: Executed from flash%d\n", flash_sel ? 2 : 1); if (flash_sel) { set_lbc_br(0, CONFIG_SYS_BR1_PRELIM); diff --git a/board/xes/xpedite520x/xpedite520x.c b/board/xes/xpedite520x/xpedite520x.c index dc5c965..c79171d 100644 --- a/board/xes/xpedite520x/xpedite520x.c +++ b/board/xes/xpedite520x/xpedite520x.c @@ -47,7 +47,7 @@ static void flash_cs_fixup(void) */ flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) & CONFIG_SYS_PCA953X_FLASH_PASS_CS)); - printf("FLASH: Executed from FLASH%d\n", flash_sel ? 2 : 1); + printf("Flash: Executed from flash%d\n", flash_sel ? 2 : 1); if (flash_sel) { set_lbc_br(0, CONFIG_SYS_BR1_PRELIM); diff --git a/board/xes/xpedite537x/xpedite537x.c b/board/xes/xpedite537x/xpedite537x.c index 89fa6c7..d074495 100644 --- a/board/xes/xpedite537x/xpedite537x.c +++ b/board/xes/xpedite537x/xpedite537x.c @@ -47,7 +47,7 @@ static void flash_cs_fixup(void) */ flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) & CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS)); - printf("FLASH: Executed from FLASH%d\n", flash_sel ? 2 : 1); + printf("Flash: Executed from flash%d\n", flash_sel ? 2 : 1); if (flash_sel) { set_lbc_br(0, CONFIG_SYS_BR1_PRELIM); diff --git a/board/xes/xpedite550x/xpedite550x.c b/board/xes/xpedite550x/xpedite550x.c index 2ad30a3..6f91c83 100644 --- a/board/xes/xpedite550x/xpedite550x.c +++ b/board/xes/xpedite550x/xpedite550x.c @@ -47,7 +47,7 @@ static void flash_cs_fixup(void) */ flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) & CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS)); - printf("FLASH: Executed from FLASH%d\n", flash_sel ? 2 : 1); + printf("Flash: Executed from flash%d\n", flash_sel ? 2 : 1); if (flash_sel) { set_lbc_br(0, CONFIG_SYS_BR1_PRELIM); diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index b006884..c6d48e0 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -1154,7 +1154,7 @@ void flash_print_info (flash_info_t * info) return; } - printf ("%s FLASH (%d x %d)", + printf ("%s flash (%d x %d)", info->name, (info->portwidth << 3), (info->chipwidth << 3)); if (info->size < 1024*1024) @@ -2104,7 +2104,7 @@ unsigned long flash_init (void) size += flash_info[i].size; if (flash_info[i].flash_id == FLASH_UNKNOWN) { #ifndef CONFIG_SYS_FLASH_QUIET_TEST - printf ("## Unknown FLASH on Bank %d " + printf ("## Unknown flash on Bank %d " "- Size = 0x%08lx = %ld MB\n", i+1, flash_info[i].size, flash_info[i].size >> 20); -- 1.7.0.4

2 1

[U-Boot] [PATCH v2] Correct chip detect logic
by Yanjun Yang 18 Jan '11

18 Jan '11

The lan91c96_detect_chip routine is not correct according to the manual. Signed-off-by: YanJun Yang <yangyj.ee(a)gmail.com> --- Changes for v2: - Avoid line wraps and ensure tabs - Don't define a new macro drivers/net/lan91c96.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/net/lan91c96.c b/drivers/net/lan91c96.c index bd6966e..883f3a7 100644 --- a/drivers/net/lan91c96.c +++ b/drivers/net/lan91c96.c @@ -780,7 +780,7 @@ static int lan91c96_detect_chip(struct eth_device *dev) u8 chip_id; int r; SMC_SELECT_BANK(dev, 3); - chip_id = SMC_inw(dev, 0xA) & LAN91C96_REV_REVID; + chip_id = (SMC_inw(dev, 0xA) & LAN91C96_REV_CHIPID) >> 4; SMC_SELECT_BANK(dev, 0); for (r = 0; r < sizeof(supported_chips) / sizeof(struct id_type); r++) if (chip_id == supported_chips[r].id) -- 1.7.3.4

2 1

[U-Boot] [PATCH 1/4] mpc83xx: Make start.S true PIC
by Joakim Tjernlund 18 Jan '11

18 Jan '11

Remove dependencies on link address. Use GOT and add an new function to calculate the actual address. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund(a)transmode.se> --- arch/powerpc/cpu/mpc83xx/start.S | 35 +++++++++++++++++++++++++++-------- 1 files changed, 27 insertions(+), 8 deletions(-) diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index 0c8e884..1ab8c88 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -71,12 +71,12 @@ */ START_GOT GOT_ENTRY(_GOT2_TABLE_) + GOT_ENTRY(_start) GOT_ENTRY(__bss_start) GOT_ENTRY(_end) #ifndef CONFIG_NAND_SPL GOT_ENTRY(_FIXUP_TABLE_) - GOT_ENTRY(_start) GOT_ENTRY(_start_of_vectors) GOT_ENTRY(_end_of_vectors) GOT_ENTRY(transfer_to_handler) @@ -229,10 +229,12 @@ _start: /* time t 0 */ /* there and deflate the flash size back to minimal size */ /*------------------------------------------------------------*/ bl map_flash_by_law1 - lis r4, (CONFIG_SYS_MONITOR_BASE)@h - ori r4, r4, (CONFIG_SYS_MONITOR_BASE)@l - addi r5, r4, in_flash - _start + EXC_OFF_SYS_RESET - mtlr r5 + + bl 1f +1: mflr r3 /* get current address */ + addi r3, r3, in_flash - 1b + bl add_flash_base + mtlr r3 blr in_flash: #if 1 /* Remapping flash with LAW0. */ @@ -831,10 +833,11 @@ relocate_code: bl _GLOBAL_OFFSET_TABLE_@local-4 mflr r30 #endif - mr r3, r5 /* Destination Address */ - lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ - ori r4, r4, CONFIG_SYS_MONITOR_BASE@l + lwz r4, GOT(_start) /* Source Address */ + addi r4, r4, -EXC_OFF_SYS_RESET lwz r5, GOT(__bss_start) + mr r3, r10 /* Destination Address */ + sub r5, r5, r4 li r6, CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */ @@ -1128,6 +1131,21 @@ unlock_ram_in_cache: #endif /* CONFIG_SYS_INIT_RAM_LOCK */ #ifdef CONFIG_SYS_FLASHBOOT + +add_flash_base: + /* Check if already inside flash address space. */ + /* if so, do not add CONFIG_SYS_FLASH_BASE */ + lis r4, (CONFIG_SYS_FLASH_BASE)@h + ori r4, r4, (CONFIG_SYS_FLASH_BASE)@l + cmplw cr0, r3, r4 + ble cr0, 2f /* r3 < r4 ? */ + lis r6, (CONFIG_SYS_FLASH_BASE+(CONFIG_SYS_FLASH_SIZE*1024*1024-1))@h + ori r6, r6, (CONFIG_SYS_FLASH_BASE+(CONFIG_SYS_FLASH_SIZE*1024*1024-1))@l + cmplw cr0, r3, r6 + blelr cr0 /* r3 < r6 ? */ +2: add r3,r3,r4 + blr + map_flash_by_law1: /* When booting from ROM (Flash or EPROM), clear the */ /* Address Mask in OR0 so ROM appears everywhere */ @@ -1179,6 +1197,7 @@ map_flash_by_law1: */ remap_flash_by_law0: /* Initialize the BR0 with the boot ROM starting address. */ + lis r3, (CONFIG_SYS_IMMR)@h /* r3 <= CONFIG_SYS_IMMR */ lwz r4, BR0(r3) li r5, 0x7FFF and r4, r4, r5 -- 1.7.2.2

4 28

[U-Boot] [PATCH 1/2] rtc: add support for Micro Crystal RV-3029-C2 RTC
by Heiko Schocher 18 Jan '11

18 Jan '11

Signed-off-by: Heiko Schocher <hs(a)denx.de> --- drivers/rtc/Makefile | 1 + drivers/rtc/rv3029.c | 124 ++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 125 insertions(+), 0 deletions(-) create mode 100644 drivers/rtc/rv3029.c diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 916d73f..e4be4a4 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -60,6 +60,7 @@ COBJS-$(CONFIG_RTC_PL031) += pl031.o COBJS-$(CONFIG_RTC_PT7C4338) += pt7c4338.o COBJS-$(CONFIG_RTC_RS5C372A) += rs5c372.o COBJS-$(CONFIG_RTC_RTC4543) += rtc4543.o +COBJS-$(CONFIG_RTC_RV3029) += rv3029.o COBJS-$(CONFIG_RTC_RX8025) += rx8025.o COBJS-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o COBJS-$(CONFIG_RTC_S3C44B0) += s3c44b0_rtc.o diff --git a/drivers/rtc/rv3029.c b/drivers/rtc/rv3029.c new file mode 100644 index 0000000..3ebc768 --- /dev/null +++ b/drivers/rtc/rv3029.c @@ -0,0 +1,124 @@ +/* + * (C) Copyright 2010 + * Heiko Schocher, DENX Software Engineering, hs(a)denx.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <command.h> +#include <i2c.h> +#include <rtc.h> + +#define RTC_RV3029_CTRL_RESET 0x04 +#define RTC_RV3029_CTRL_SYS_R (1 << 4) + +#define RTC_RV3029_CLOCK_PAGE 0x08 +#define RTC_RV3029_PAGE_LEN 7 + +#define RV3029C2_W_SECONDS 0x00 +#define RV3029C2_W_MINUTES 0x01 +#define RV3029C2_W_HOURS 0x02 +#define RV3029C2_W_DATE 0x03 +#define RV3029C2_W_DAYS 0x04 +#define RV3029C2_W_MONTHS 0x05 +#define RV3029C2_W_YEARS 0x06 + +#define RV3029C2_REG_HR_12_24 (1 << 6) /* 24h/12h mode */ +#define RV3029C2_REG_HR_PM (1 << 5) /* PM/AM bit in 12h mode */ + +int rtc_get( struct rtc_time *tmp ) +{ + int ret; + unsigned char buf[RTC_RV3029_PAGE_LEN]; + + ret = i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CLOCK_PAGE, 1, buf, \ + RTC_RV3029_PAGE_LEN); + if (ret) { + printf("%s: error reading RTC: %x\n", __func__, ret); + return -1; + } + tmp->tm_sec = bcd2bin( buf[RV3029C2_W_SECONDS] & 0x7f); + tmp->tm_min = bcd2bin( buf[RV3029C2_W_MINUTES] & 0x7f); + if (buf[RV3029C2_W_HOURS] & RV3029C2_REG_HR_12_24) { + /* 12h format */ + tmp->tm_hour = bcd2bin(buf[RV3029C2_W_HOURS] & 0x1f); + if (buf[RV3029C2_W_HOURS] & RV3029C2_REG_HR_PM) + /* PM flag set */ + tmp->tm_hour += 12; + } else + tmp->tm_hour = bcd2bin(buf[RV3029C2_W_HOURS] & 0x3f); + + tmp->tm_mday = bcd2bin( buf[RV3029C2_W_DATE] & 0x3F ); + tmp->tm_mon = bcd2bin( buf[RV3029C2_W_MONTHS] & 0x1F ); + tmp->tm_wday = bcd2bin( buf[RV3029C2_W_DAYS] & 0x07 ); + /* RTC supports only years > 1999 */ + tmp->tm_year = bcd2bin( buf[RV3029C2_W_YEARS]) + 2000; + tmp->tm_yday = 0; + tmp->tm_isdst = 0; + +#ifdef RTC_DEBUG + printf( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec ); + +#endif + return 0; +} + +int rtc_set( struct rtc_time *tmp ) +{ + int ret; + unsigned char buf[RTC_RV3029_PAGE_LEN]; +#ifdef RTC_DEBUG + printf( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, + tmp->tm_hour, tmp->tm_min, tmp->tm_sec); +#endif + + if (tmp->tm_year < 2000) { + printf("RTC: year %d < 2000 not possible\n", tmp->tm_year); + return -1; + } + buf[RV3029C2_W_SECONDS] = bin2bcd(tmp->tm_sec); + buf[RV3029C2_W_MINUTES] = bin2bcd(tmp->tm_min); + buf[RV3029C2_W_HOURS] = bin2bcd(tmp->tm_hour); + /* set 24h format */ + buf[RV3029C2_W_HOURS] &= ~RV3029C2_REG_HR_12_24; + buf[RV3029C2_W_DATE] = bin2bcd(tmp->tm_mday); + buf[RV3029C2_W_DAYS] = bin2bcd(tmp->tm_wday); + buf[RV3029C2_W_MONTHS] = bin2bcd(tmp->tm_mon); + tmp->tm_year -= 2000; + buf[RV3029C2_W_YEARS] = bin2bcd(tmp->tm_year); + ret = i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CLOCK_PAGE, 1, + buf, RTC_RV3029_PAGE_LEN); + + /* give the RTC some time to update */ + udelay(1000); + return 0; +} + +void rtc_reset (void) +{ + int ret; + unsigned char buf[RTC_RV3029_PAGE_LEN]; + + buf[0] = RTC_RV3029_CTRL_SYS_R; + ret = i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL_RESET, 1, + buf, 1); +} -- 1.7.3.4

4 13

[U-Boot] [PATCH v3] ppc, 8xx: remove obsolete km8xx boards from keymile
by holger.brunck＠keymile.com 18 Jan '11

18 Jan '11

From: Holger Brunck <holger.brunck(a)keymile.com> The MPC852 based mgsuvd and kmsupx4 boards from keymile were initially ported but later on not developed further. So the respective files were removed to avoid unneeded merging and maintenance. Signed-off-by: Holger Brunck <holger.brunck(a)keymile.com> Acked-by: Heiko Schocher<hs(a)denx.de> --- Changes for v3: - resend unchanged, because of corrupted lines in previous version Changes for v2: - fix typos in commit message - remove boards from MAINTAINERS file MAINTAINERS | 2 - board/keymile/km8xx/Makefile | 48 ----- board/keymile/km8xx/km8xx.c | 197 ------------------- board/keymile/km8xx/km8xx_hdlc_enet.c | 278 --------------------------- board/keymile/km8xx/u-boot.lds | 97 ---------- boards.cfg | 2 - include/configs/km8xx.h | 332 --------------------------------- include/configs/kmsupx4.h | 43 ----- include/configs/mgsuvd.h | 40 ---- 9 files changed, 0 insertions(+), 1039 deletions(-) delete mode 100644 board/keymile/km8xx/Makefile delete mode 100644 board/keymile/km8xx/km8xx.c delete mode 100644 board/keymile/km8xx/km8xx_hdlc_enet.c delete mode 100644 board/keymile/km8xx/u-boot.lds delete mode 100644 include/configs/km8xx.h delete mode 100644 include/configs/kmsupx4.h delete mode 100644 include/configs/mgsuvd.h diff --git a/MAINTAINERS b/MAINTAINERS index a799037..a6e8a7f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -418,9 +418,7 @@ Heiko Schocher <hs(a)denx.de> ids8247 MPC8247 jupiter MPC5200 kmeter1 MPC8360 - kmsupx4 MPC852T mgcoge MPC8247 - mgsuvd MPC852 mucmc52 MPC5200 muas3001 MPC8270 municse MPC5200 diff --git a/board/keymile/km8xx/Makefile b/board/keymile/km8xx/Makefile deleted file mode 100644 index abb9ef9..0000000 --- a/board/keymile/km8xx/Makefile +++ /dev/null @@ -1,48 +0,0 @@ -# -# (C) Copyright 2007 -# Heiko Schocher, DENX Software Engineering, hs(a)denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) -$(shell mkdir -p $(obj)../common) -endif - -LIB = $(obj)lib$(BOARD).o - -COBJS = $(BOARD).o ../common/common.o ../common/keymile_hdlc_enet.o \ - km8xx_hdlc_enet.o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) - $(call cmd_link_o_target, $(OBJS)) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/keymile/km8xx/km8xx.c b/board/keymile/km8xx/km8xx.c deleted file mode 100644 index 6de2f22..0000000 --- a/board/keymile/km8xx/km8xx.c +++ /dev/null @@ -1,197 +0,0 @@ -/* - * (C) Copyright 2007 - * Heiko Schocher, DENX Software Engineering, hs(a)denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#include <common.h> -#include <mpc8xx.h> -#include <net.h> -#include <asm/io.h> - -#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) -#include <libfdt.h> -#endif - -#include "../common/common.h" - -DECLARE_GLOBAL_DATA_PTR; - -const uint sdram_table[] = -{ - 0x0f07fc04, 0x0ffffc04, 0x00bdfc04, 0x0ff77c00, - 0x1ffffc05, 0xfffffc04, 0xfffffc04, 0xfffffc04, - /* 0x08 Burst Read */ - 0x0f07fc04, 0x0ffffc04, 0x00bdfc04, 0x00fffc00, - 0x00fffc00, 0x00fffc00, 0x0ff77c00, 0x1ffffc05, - /* 0x10 Load mode register */ - 0x0ffffc34, 0x0ff57c04, 0x0ffffc04, 0x1ffffc05, - 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, - /* 0x18 Single Write */ - 0x0f07fc04, 0x0ffffc00, 0x00bd7c04, 0x0ffffc04, - 0x0ff77c04, 0x1ffffc05, 0xfffffc04, 0xfffffc04, - /* 0x20 Burst Write */ - 0x0f07fc04, 0x0ffffc00, 0x00bd7c00, 0x00fffc00, - 0x00fffc00, 0x00fffc04, 0x0ffffc04, 0x0ff77c04, - 0x1ffffc05, 0xfffffc04, 0xfffffc04, 0xfffffc04, - 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, - /* 0x30 Precharge all and Refresh */ - 0x0ff77c04, 0x0ffffc04, 0x0ff5fc84, 0x0ffffc04, - 0x0ffffc04, 0x0ffffc84, 0x1ffffc05, 0xfffffc04, - 0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04, - /* 0x3C Exception */ - 0x7ffffc04, 0xfffffc07, 0xfffffc04, 0xfffffc04, -}; - -int checkboard (void) -{ - puts ("Board: Keymile "); -#if defined(CONFIG_KMSUPX4) - puts ("kmsupx4"); -#else - puts ("mgsuvd"); -#endif - if (ethernet_present ()) - puts (" with PIGGY."); - puts ("\n"); - return (0); -} - -phys_size_t initdram (int board_type) -{ - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - volatile memctl8xx_t *memctl = &immap->im_memctl; - long int size; - - upmconfig (UPMB, (uint *) sdram_table, - sizeof (sdram_table) / sizeof (uint)); - - /* - * Preliminary prescaler for refresh (depends on number of - * banks): This value is selected for four cycles every 62.4 us - * with two SDRAM banks or four cycles every 31.2 us with one - * bank. It will be adjusted after memory sizing. - */ - memctl->memc_mptpr = CONFIG_SYS_MPTPR; - - /* - * The following value is used as an address (i.e. opcode) for - * the LOAD MODE REGISTER COMMAND during SDRAM initialisation. If - * the port size is 32bit the SDRAM does NOT "see" the lower two - * address lines, i.e. mar=0x00000088 -> opcode=0x00000022 for - * MICRON SDRAMs: - * -> 0 00 010 0 010 - * | | | | +- Burst Length = 4 - * | | | +----- Burst Type = Sequential - * | | +------- CAS Latency = 2 - * | +----------- Operating Mode = Standard - * +-------------- Write Burst Mode = Programmed Burst Length - */ - memctl->memc_mar = CONFIG_SYS_MAR; - - /* - * Map controller banks 1 to the SDRAM banks 1 at - * preliminary addresses - these have to be modified after the - * SDRAM size has been determined. - */ - memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM; - memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM; - - memctl->memc_mbmr = CONFIG_SYS_MBMR & (~(MBMR_PTBE)); /* no refresh yet */ - - udelay (200); - - /* perform SDRAM initializsation sequence */ - - memctl->memc_mcr = 0x80802830; /* SDRAM bank 0 */ - udelay (1); - memctl->memc_mcr = 0x80802110; /* SDRAM bank 0 - execute twice */ - udelay (1); - - memctl->memc_mbmr |= MBMR_PTBE; /* enable refresh */ - - udelay (1000); - - /* - * Check Bank 0 Memory Size for re-configuration - * - */ - size = get_ram_size(SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE); - - udelay (1000); - - debug ("SDRAM Bank 0: %ld MB\n", size >> 20); - - return (size); -} - -/* - * Early board initalization. - */ -int board_early_init_r(void) -{ - /* setup the UPIOx */ - /* General Unit Reset disabled, Flash Bank enabled, UnitLed on */ - out_8((u8 *)(CONFIG_SYS_PIGGY_BASE + 0x02), 0xc2); - /* SCC4 enable, halfduplex, FCC1 powerdown, ANDI enable*/ - out_8((u8 *)(CONFIG_SYS_PIGGY_BASE + 0x03), 0x35); - return 0; -} - -int hush_init_var (void) -{ - ivm_read_eeprom (); - return 0; -} - -#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) -/* - * update "brg" property in the blob - */ -void ft_blob_update (void *blob, bd_t *bd) -{ - ulong brg_data[1] = {0}; - - /* BRG */ - brg_data[0] = cpu_to_be32 (bd->bi_busfreq); - fdt_set_node_and_value (blob, "/soc/cpm", "brg-frequency", brg_data, - sizeof (brg_data)); - - /* MAC adr */ - fdt_set_node_and_value (blob, "/soc/cpm/ethernet", "mac-address", - bd->bi_enetaddr, sizeof (u8) * 6); -} - -void ft_board_setup(void *blob, bd_t *bd) -{ - ft_cpu_setup (blob, bd); - ft_blob_update (blob, bd); -} -#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */ - -int i2c_soft_read_pin (void) -{ - int val; - - *(unsigned short *)(I2C_BASE_DIR) &= ~SDA_CONF; - udelay(1); - val = *(unsigned char *)(I2C_BASE_PORT); - - return ((val & SDA_BIT) == SDA_BIT); -} diff --git a/board/keymile/km8xx/km8xx_hdlc_enet.c b/board/keymile/km8xx/km8xx_hdlc_enet.c deleted file mode 100644 index ca00576..0000000 --- a/board/keymile/km8xx/km8xx_hdlc_enet.c +++ /dev/null @@ -1,278 +0,0 @@ -/* - * (C) Copyright 2008 - * Gary Jennejohn, DENX Software Engineering GmbH, garyj(a)denx.de. - * - * Based in part on arch/powerpc/cpu/mpc8xx/scc.c. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> /* commproc.h is included here */ -#include <malloc.h> -#include <net.h> - -#ifdef CONFIG_KEYMILE_HDLC_ENET - -#include "../common/keymile_hdlc_enet.h" - -char keymile_slot; /* our slot number in the backplane */ - -/* - * Since, except during initialization, ethact is always HDLC - * while we're in the driver, just use serial_printf() everywhere for - * output. This avoids possible conflicts when netconsole is being - * used. - */ -#define dprintf(fmt, args...) serial_printf(fmt, ##args) - -static int already_inited; - -/* - * SCC Ethernet Tx and Rx buffer descriptors allocated at the - * immr->udata_bd address on Dual-Port RAM - * Provide for Double Buffering - */ -typedef volatile struct CommonBufferDescriptor { - cbd_t txbd; /* Tx BD */ - cbd_t rxbd[HDLC_PKTBUFSRX]; /* Rx BD */ -} RTXBD; - -static RTXBD *rtx; - -int keymile_hdlc_enet_init(struct eth_device *, bd_t *); -void keymile_hdlc_enet_halt(struct eth_device *); -extern void keymile_hdlc_enet_init_bds(RTXBD *); -extern void initCachedNumbers(int); - -/* Use SCC4 */ -#define MGS_CPM_CR_HDLC CPM_CR_CH_SCC4 -#define MGS_PROFF_HDLC PROFF_SCC4 -#define MGS_SCC_HDLC 3 /* Index, not number! */ - -int keymile_hdlc_enet_init(struct eth_device *dev, bd_t *bis) -{ - /* int i; */ - /* volatile cbd_t *bdp; */ - volatile cpm8xx_t *cp; - volatile scc_t *sccp; - volatile hdlc_pram_t *hpr; - volatile iop8xx_t *iop; - - if (already_inited) - return 0; - - cp = (cpm8xx_t *)&(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm); - hpr = (hdlc_pram_t *)(&cp->cp_dparam[MGS_PROFF_HDLC]); - sccp = (volatile scc_t *)(&cp->cp_scc[MGS_SCC_HDLC]); - iop = (iop8xx_t *)&(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport); - - /* - * Disable receive and transmit just in case. - */ - sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); - -#ifndef CONFIG_SYS_ALLOC_DPRAM -#error "CONFIG_SYS_ALLOC_DPRAM must be defined" -#else - /* - * Avoid exhausting DPRAM, which would cause a panic. - * Actually this isn't really necessary, but leave it here - * for safety's sake. - */ - if (rtx == NULL) { - rtx = (RTXBD *) (cp->cp_dpmem + - dpram_alloc_align(sizeof(RTXBD), 8)); - if (rtx == (RTXBD *)CPM_DP_NOSPACE) - return -1; - memset((void *)rtx, 0, sizeof(RTXBD)); - } -#endif /* !CONFIG_SYS_ALLOC_DPRAM */ - - /* We need the slot number for addressing. */ - keymile_slot = *(char *)(CONFIG_SYS_SLOT_ID_BASE + - CONFIG_SYS_SLOT_ID_OFF) & CONFIG_SYS_SLOT_ID_MASK; - /* - * Be consistent with the Linux driver and set - * only enetaddr[0]. - * - * Always add 1 to the slot number so that - * there are no problems with an ethaddr which - * is all 0s. This should be acceptable because - * a board should never have a slot number of 255, - * which is the broadcast address. The HDLC addressing - * uses only the slot number. - */ - dev->enetaddr[0] = keymile_slot + 1; - -#ifdef TEST_IT - dprintf("slot %d\n", keymile_slot); -#endif - - /* use pa8, pa9 pins for TXD4, RXD4 respectively */ - iop->iop_papar |= ((0x8000 >> 8) | (0x8000 >> 9)); - iop->iop_padir &= ~((0x8000 >> 8) | (0x8000 >> 9)); - iop->iop_paodr &= ~((0x8000 >> 8) | (0x8000 >> 9)); - - /* also use pa0 as CLK8 */ - iop->iop_papar |= 0x8000; - iop->iop_padir &= ~0x8000; - iop->iop_paodr &= ~0x8000; - - /* use pc5 as CTS4 */ - iop->iop_pcpar &= ~(0x8000 >> 5); - iop->iop_pcdir &= ~(0x8000 >> 5); - iop->iop_pcso |= (0x8000 >> 5); - - /* - * SI clock routing - * use CLK8 - * this also connects SCC4 to NMSI - */ - cp->cp_sicr = (cp->cp_sicr & ~0xff000000) | 0x3f000000; - - /* keymile_rxIdx = 0; */ - - /* - * Initialize function code registers for big-endian. - */ - hpr->rfcr = SCC_EB; - hpr->tfcr = SCC_EB; - - /* - * Set maximum bytes per receive buffer. - */ - hpr->mrblr = MAX_FRAME_LENGTH; - - /* Setup CRC generator values for HDLC */ - hpr->c_mask = 0x0000F0B8; - hpr->c_pres = 0x0000FFFF; - - /* Initialize all error counters to 0 */ - hpr->disfc = 0; - hpr->crcec = 0; - hpr->abtsc = 0; - hpr->nmarc = 0; - hpr->retrc = 0; - - /* Set maximum frame length size */ - hpr->mflr = MAX_FRAME_LENGTH; - - /* set to 1 for per frame processing change later if needed */ - hpr->rfthr = 1; - - hpr->hmask = 0xff; - - hpr->haddr2 = SET_HDLC_UUA(keymile_slot); - hpr->haddr3 = hpr->haddr2; - hpr->haddr4 = hpr->haddr2; - /* broadcast */ - hpr->haddr1 = HDLC_BCAST; - - hpr->rbase = (unsigned int) &rtx->rxbd[0]; - hpr->tbase = (unsigned int) &rtx->txbd; - -#if 0 - /* - * Initialize the buffer descriptors. - */ - bdp = &rtx->txbd; - bdp->cbd_sc = 0; - bdp->cbd_bufaddr = 0; - bdp->cbd_sc = BD_SC_WRAP; - - /* - * Setup RX packet buffers, aligned correctly. - * Borrowed from net/net.c. - */ - MyRxPackets[0] = &MyPktBuf[0] + (PKTALIGN - 1); - MyRxPackets[0] -= (ulong)MyRxPackets[0] % PKTALIGN; - for (i = 1; i < HDLC_PKTBUFSRX; i++) - MyRxPackets[i] = MyRxPackets[0] + i * PKT_MAXBLR_SIZE; - - bdp = &rtx->rxbd[0]; - for (i = 0; i < HDLC_PKTBUFSRX; i++) { - bdp->cbd_sc = BD_SC_EMPTY; - /* Leave space at the start for INET header. */ - bdp->cbd_bufaddr = (unsigned int)(MyRxPackets[i] + - INET_HDR_ALIGN); - bdp++; - } - bdp--; - bdp->cbd_sc |= BD_SC_WRAP; -#else - keymile_hdlc_enet_init_bds(rtx); -#endif - - /* Let's re-initialize the channel now. We have to do it later - * than the manual describes because we have just now finished - * the BD initialization. - */ - cp->cp_cpcr = mk_cr_cmd(MGS_CPM_CR_HDLC, CPM_CR_INIT_TRX) | CPM_CR_FLG; - while (cp->cp_cpcr & CPM_CR_FLG); - - sccp->scc_gsmrl = SCC_GSMRL_MODE_HDLC; - /* CTSS=1 */ - sccp->scc_gsmrh = SCC_GSMRH_CTSS; - /* NOF=0, RTE=1, DRT=0, BUS=1 */ - sccp->scc_psmr = ((0x8000 >> 6) | (0x8000 >> 10)); - -/* loopback for local testing */ -#ifdef GJTEST - dprintf("LOOPBACK!\n"); - sccp->scc_gsmrl |= SCC_GSMRL_DIAG_LOOP; -#endif - - /* - * Disable all interrupts and clear all pending - * events. - */ - sccp->scc_sccm = 0; - sccp->scc_scce = 0xffff; - - /* - * And last, enable the transmit and receive processing. - */ - sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); - - dprintf("%s: HDLC ENET Version 0.3 on SCC%d\n", dev->name, - MGS_SCC_HDLC + 1); - - /* - * We may not get an ARP packet because ARP was already done on - * a different interface, so initialize the cached values now. - */ - initCachedNumbers(1); - - already_inited = 1; - - return 0; -} - -void keymile_hdlc_enet_halt(struct eth_device *dev) -{ -#if 0 /* just return, but keep this for reference */ - volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; - - /* maybe should do a graceful stop here? */ - immr->im_cpm.cp_scc[MGS_SCC_HDLC].scc_gsmrl &= - ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); -#endif -} - -#endif /* CONFIG_KEYMILE_HDLC_ENET */ diff --git a/board/keymile/km8xx/u-boot.lds b/board/keymile/km8xx/u-boot.lds deleted file mode 100644 index ea70ae4..0000000 --- a/board/keymile/km8xx/u-boot.lds +++ /dev/null @@ -1,97 +0,0 @@ -/* - * (C) Copyright 2000-2010 - * Wolfgang Denk, DENX Software Engineering, wd(a)denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(powerpc) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - arch/powerpc/cpu/mpc8xx/start.o (.text*) - arch/powerpc/cpu/mpc8xx/traps.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(.rodata) - *(.rodata1) - *(.rodata.str1.4) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - KEEP(*(.got)) - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - _end = . ; - PROVIDE (end = .); -} diff --git a/boards.cfg b/boards.cfg index 3497408..54ed0f7 100644 --- a/boards.cfg +++ b/boards.cfg @@ -584,8 +584,6 @@ SXNI855T powerpc mpc8xx sixnet v37 powerpc mpc8xx MHPC powerpc mpc8xx mhpc eltec TOP860 powerpc mpc8xx top860 emk -kmsupx4 powerpc mpc8xx km8xx keymile -mgsuvd powerpc mpc8xx km8xx keymile KUP4K powerpc mpc8xx kup4k kup KUP4X powerpc mpc8xx kup4x kup ELPT860 powerpc mpc8xx elpt860 LEOX diff --git a/include/configs/km8xx.h b/include/configs/km8xx.h deleted file mode 100644 index 7683fe5..0000000 --- a/include/configs/km8xx.h +++ /dev/null @@ -1,332 +0,0 @@ -/* - * (C) Copyright 2009 - * Heiko Schocher, DENX Software Engineering, hs(a)denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * configuration options, keymile 8xx board specific - */ - -#ifndef __CONFIG_KM8XX_H -#define __CONFIG_KM8XX_H - -/* - * High Level Configuration Options - * (easy to change) - */ - -#define CONFIG_KM8XX 1 /* on a km8xx board */ - -/* include common defines/options for all Keymile boards */ -#include "keymile-common.h" - -#if defined(CONFIG_KMSUPX4) -#undef CONFIG_I2C_MUX /* no I2C mux on this board */ -#endif - -#define CONFIG_8xx_GCLK_FREQ 66000000 - -#define CONFIG_SYS_SMC_UCODE_PATCH 1 /* Relocate SMC1 */ -#define CONFIG_SYS_SMC_DPMEM_OFFSET 0x1fc0 -#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ -#define CONFIG_SYS_SMC_RXBUFLEN 128 -#define CONFIG_SYS_MAXIDLE 10 - -#define CONFIG_SYS_CPM_BOOTCOUNT_ADDR 0x1eb0 /* In case of SMC relocation, - * the default value is not - * working - */ - -#define BOOTFLASH_START F0000000 -#define CONFIG_PRAM 512 /* protected RAM [KBytes] */ - -#define CONFIG_PREBOOT "echo;" \ - "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ - "echo" - -#define BOOTFLASH_START F0000000 -#define CONFIG_PRAM 512 /* protected RAM [KBytes] */ - -#if defined(CONFIG_MGSUVD) -#define CONFIG_ENV_IVM "EEprom_ivm=pca9544a:70:4 \0" -#else -#define CONFIG_ENV_IVM "" -#endif - -#define MTDIDS_DEFAULT "nor0=app" -#define MTDPARTS_DEFAULT \ - "mtdparts=app:384k(u-boot),128k(env),128k(envred),128k(free)," \ - "1536k(esw0),8704k(rootfs0),1536k(esw1),2432k(rootfs1),640k(var)," \ - "768k(cfg)" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_KM_DEF_ENV \ - "rootpath=/opt/eldk/ppc_8xx\0" \ - "addcon=setenv bootargs ${bootargs} " \ - "console=ttyCPM0,${baudrate}\0" \ - "mtdids=nor0=app \0" \ - "mtdparts=" MK_STR(MTDPARTS_DEFAULT) "\0" \ - "partition=nor0,9 \0" \ - "new_env=prot off F0060000 F009FFFF; era F0060000 F009FFFF \0" \ - CONFIG_ENV_IVM \ - "" - -#undef CONFIG_RTC_MPC8xx /* MPC866 does not support RTC */ - -#define CONFIG_TIMESTAMP /* but print image timestmps */ - -/* - * Low Level Configuration Settings - * (address mappings, register initial values, etc.) - * You should know what you are doing if you make changes here. - */ -/*----------------------------------------------------------------------- - * Internal Memory Mapped Register - */ -#define CONFIG_SYS_IMMR 0xFFF00000 - -/*----------------------------------------------------------------------- - * Definitions for initial stack pointer and data area (in DPRAM) - */ -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR -#define CONFIG_SYS_INIT_RAM_SIZE 0x2F00 /* Size of used area in DPRAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/*----------------------------------------------------------------------- - * Start addresses for the final memory configuration - * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 - */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_FLASH_BASE 0xf0000000 -#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* 384 kB for Monitor */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) - -/*----------------------------------------------------------------------- - * FLASH organization - */ -/* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_FLASH_SIZE 32 -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -/* max num of sects on one chip */ -#define CONFIG_SYS_MAX_FLASH_SECT 256 - -#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* (in ms) */ - -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN -#define CONFIG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */ - -/* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) -#define CONFIG_ENV_BUFFER_PRINT 1 - -/*----------------------------------------------------------------------- - * Cache Configuration - */ -#define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CACHELINE_SHIFT 4 /* log base 2 of the above value */ -#endif - -/*----------------------------------------------------------------------- - * SYPCR - System Protection Control 11-9 - * SYPCR can only be written once after reset! - *----------------------------------------------------------------------- - * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze - */ -#define CONFIG_SYS_SYPCR 0xffffff89 - -/*----------------------------------------------------------------------- - * SIUMCR - SIU Module Configuration 11-6 - *----------------------------------------------------------------------- - */ -#if defined(CONFIG_MGSUVD) -#define CONFIG_SYS_SIUMCR 0x00610480 -#else -#define CONFIG_SYS_SIUMCR 0x00610400 -#endif - -/*----------------------------------------------------------------------- - * TBSCR - Time Base Status and Control 11-26 - *----------------------------------------------------------------------- - * Clear Reference Interrupt Status, Timebase freezing enabled - */ -#define CONFIG_SYS_TBSCR (TBSCR_REFA | TBSCR_REFB | TBSCR_TBF) - -/*----------------------------------------------------------------------- - * PISCR - Periodic Interrupt Status and Control 11-31 - *----------------------------------------------------------------------- - * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled - */ -#define CONFIG_SYS_PISCR (PISCR_PS | PISCR_PITF) - -/*----------------------------------------------------------------------- - * SCCR - System Clock and reset Control Register 15-27 - *----------------------------------------------------------------------- - * Set clock output, timebase and RTC source and divider, - * power management and some other internal clocks - */ -#if defined(CONFIG_MGSUVD) -#define SCCR_MASK 0x01800000 -#else -#define SCCR_MASK 0x00000000 -#endif -#define CONFIG_SYS_SCCR 0x01800000 - -#define CONFIG_SYS_DER 0 - -/* - * Init Memory Controller: - * - * BR0/1 and OR0/1 (FLASH) - */ - -#define FLASH_BASE0_PRELIM 0xf0000000 /* FLASH bank #0 */ - -/* used to re-map FLASH both when starting from SRAM or FLASH: - * restrict access enough to keep SRAM working (if any) - * but not too much to meddle with FLASH accesses - */ -#define CONFIG_SYS_REMAP_OR_AM 0x80000000 /* OR addr mask */ -#define CONFIG_SYS_PRELIM_OR_AM 0xE0000000 /* OR addr mask */ - -/* - * FLASH timing: Default value of OR0 after reset - */ -#define CONFIG_SYS_OR0_PRELIM 0xfe000954 -#define CONFIG_SYS_BR0_PRELIM 0xf0000401 - -/* - * BR1 and OR1 (SDRAM) - * - */ -#define SDRAM_BASE1_PRELIM 0x00000000 /* SDRAM bank #0 */ -#define SDRAM_MAX_SIZE (64 << 20) /* max 64 MB per bank */ - -/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care) */ -#define CONFIG_SYS_OR_TIMING_SDRAM 0x00000A00 - -#define CONFIG_SYS_OR1_PRELIM 0xfc000800 -#define CONFIG_SYS_BR1_PRELIM (0x000000C0 | 0x01) - -#define CONFIG_SYS_MPTPR 0x0200 -/* PTB=16, AMB=001, FIXME 1 RAS precharge cycles, 1 READ loop cycle (not used), - 1 Write loop Cycle (not used), 1 Timer Loop Cycle */ -#if defined(CONFIG_MGSUVD) -#define CONFIG_SYS_MBMR 0x10964111 -#else -#define CONFIG_SYS_MBMR 0x20964111 -#endif -#define CONFIG_SYS_MAR 0x00000088 - -/* - * 4096 Rows from SDRAM example configuration - * 1000 factor s -> ms - * 64 PTP (pre-divider from MPTPR) from SDRAM example configuration - * 4 Number of refresh cycles per period - * 64 Refresh cycle in ms per number of rows - */ -#define CONFIG_SYS_PTA_PER_CLK ((4096 * 64 * 1000) / (4 * 64)) - -/* GPIO/PIGGY on CS3 initialization values -*/ -#define CONFIG_SYS_PIGGY_BASE (0x30000000) -#if defined(CONFIG_MGSUVD) -#define CONFIG_SYS_OR3_PRELIM (0xfe000d24) -#define CONFIG_SYS_BR3_PRELIM (0x30000401) -#else -#define CONFIG_SYS_OR3_PRELIM (0xf8000d26) -#define CONFIG_SYS_BR3_PRELIM (0x30000401) -#endif - -#define CONFIG_SCC3_ENET -#define CONFIG_ETHPRIME "SCC" -#define CONFIG_HAS_ETH0 - -/* pass open firmware flat tree */ -#define CONFIG_OF_LIBFDT 1 -#define CONFIG_OF_BOARD_SETUP 1 - -#define OF_STDOUT_PATH "/soc/cpm/serial@a80" - -/* enable I2C and select the hardware/software driver */ -#undef CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ -/* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SPEED 50000 -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define I2C_SOFT_DECLARATIONS - -/* - * Software (bit-bang) I2C driver configuration - */ -#define I2C_BASE_DIR ((u16 *)(CONFIG_SYS_PIGGY_BASE + 0x04)) -#define I2C_BASE_PORT ((u8 *)(CONFIG_SYS_PIGGY_BASE + 0x09)) - -#define SDA_BIT 0x40 -#define SCL_BIT 0x80 -#define SDA_CONF 0x1000 -#define SCL_CONF 0x2000 - -#define I2C_ACTIVE do {} while (0) -#define I2C_TRISTATE do {} while (0) -#define I2C_READ ((in_8(I2C_BASE_PORT) & SDA_BIT) == SDA_BIT) -#define I2C_SDA(bit) if(bit) { \ - clrbits(be16, I2C_BASE_DIR, SDA_CONF); \ - } else { \ - clrbits(8, I2C_BASE_PORT, SDA_BIT); \ - setbits(be16, I2C_BASE_DIR, SDA_CONF); \ - } -#define I2C_SCL(bit) if(bit) { \ - clrbits(be16, I2C_BASE_DIR, SCL_CONF); \ - } else { \ - clrbits(8, I2C_BASE_PORT, SCL_BIT); \ - setbits(be16, I2C_BASE_DIR, SCL_CONF); \ - } -#define I2C_DELAY udelay(50) /* 1/4 I2C clock duration */ - -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 - -/* I2C SYSMON (LM75, AD7414 is almost compatible) */ -#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */ -#if defined(CONFIG_MGSUVD) -#define CONFIG_DTT_SENSORS {0, 2, 4, 6} /* Sensor addresses */ -#else -#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */ -#endif -#define CONFIG_SYS_DTT_MAX_TEMP 70 -#define CONFIG_SYS_DTT_LOW_TEMP -30 -#define CONFIG_SYS_DTT_HYSTERESIS 3 -#define CONFIG_SYS_DTT_BUS_NUM (CONFIG_SYS_MAX_I2C_BUS) -#endif /* __CONFIG_KM8XX_H */ diff --git a/include/configs/kmsupx4.h b/include/configs/kmsupx4.h deleted file mode 100644 index 228bdd7..0000000 --- a/include/configs/kmsupx4.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * (C) Copyright 2009 - * Heiko Schocher, DENX Software Engineering, hs(a)denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_MPC852T 1 /* This is a MPC852T CPU */ -#define CONFIG_KMSUPX4 1 /* ...on a kmsupx4 board */ -#define CONFIG_HOSTNAME kmsupx4 - -#define CONFIG_SYS_TEXT_BASE 0xf0000000 - -/* include common defines/options for all Keymile 8xx boards */ -#include "km8xx.h" - -#define CONFIG_SYS_DELAYED_ICACHE 1 /* enable ICache not before - * running in RAM. - */ -#endif /* __CONFIG_H */ diff --git a/include/configs/mgsuvd.h b/include/configs/mgsuvd.h deleted file mode 100644 index 6036da8..0000000 --- a/include/configs/mgsuvd.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * (C) Copyright 2007 - * Heiko Schocher, DENX Software Engineering, hs(a)denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_MPC866 1 /* This is a MPC866 CPU */ -#define CONFIG_MGSUVD 1 /* ...on a mgsuvd board */ -#define CONFIG_HOSTNAME mgsuvd - -#define CONFIG_SYS_TEXT_BASE 0xf0000000 - -/* include common defines/options for all Keymile 8xx boards */ -#include "km8xx.h" - -#endif /* __CONFIG_H */ -- 1.7.0.5

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[U-Boot] Expert Beauty Magazine, UK & Europe - Spring 2011 and beyond - invitation
by Expert Beauty Magazine London 18 Jan '11

18 Jan '11

Hi there A (Belated) Happy New Year to you from all of us at Expert Beauty Magazine, UK & Europe. It is indeed our pleasure to invite your organisation to participate with advertising (and possibly editorial) for the Spring 2011 edition, deadline for which is rapidly approaching! Why would you want to advertise here? Started last year by renowned plastic surgeon, Charles Nduka, Expert Beauty Magazine features official and scientifically accurate information on surgical and non-surgical treatments, hair & make up, fashion, health, drugs and vitamins, fitness, and most other topics surrounding these issues. As an exclusive title, the magazine has been well received, and has already expanded to three times annually. It is distributed accordingly, with 25,000 copies per edition to be found at exclusive spas, fitness clubs, private hospital waiting areas, beauty salons, cosmetic dentists, hotels and business class airport lounges, thus reaching this wide and financially capable AB1 and high net worth demographic, c. 100,000 readers per edition. Thus, whether you are in the beauty/health industry or not, this is a remarkable vehicle to get your products and services infront of this lucrative potential customer base for your organisation. Interested? We would like to offer you a TRIAL ADVERTISING OFFER for the Spring Edition, as we hope you willl be back for more when you have seen the results! So, until 18:00 31st Jan 2011 we would like to offer you a full A4 page ad, with a free page editorial at just £1500.00 total (list price £3000.00), a half page ad at £750.00, or a quarter page at just £400.00 (usual media pack through links below)! To take advantage of this attractive offer while it is still here, simply reply to this email in the affirmative, together with your chosen ad size, to begin reaching this high net worth audience, and before 31 January please! We hope to be welcoming you to this exclusive publication very soon! Kind regards Sam Featherstone for EXPERT BEAUTY MAGAZINE T: +44 (0)845 428 9350 F: +44 (0)207 183 4752 W: www.expertbeauty.com Downloads Media kit: http://www.sksassociates.co.uk/eb/EBMediaPack2011.pdf Hotel Distribution: http://www.sksassociates.co.uk/eb/EB_Distribution_UKHotels.xls Medical Distribution: http://www.sksassociates.co.uk/eb/EB_Distribution_UKMedical.xls Contracted exclusively by: SKS/Enhanced Media & Communications Ltd 1 Farnham Road, Guildford, Surrey GU2 4RG UK ** You were subscribed to this offer list through one of our extensive, but discerning luxury partner networks. ** If you feel you have received this email in error, simply REPLY and SEND with the subject line intact. Thanks.

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[U-Boot] [PATCH] mpc8378emds: correct the CS0 setting
by Baidu Boy 18 Jan '11

18 Jan '11

The original CS0 OR configuration sets the reserved field. This patch is to correct the setting. Signed-off-by: Baidu Boy <liucai.lfn(a)gmail.com> --- include/configs/MPC837XEMDS.h | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index c237991..8ddccec 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -242,7 +242,6 @@ | (2 << BR_PS_SHIFT) /* 16 bit port size */ \ | BR_V ) /* valid */ #define CONFIG_SYS_OR0_PRELIM ( (~(CONFIG_SYS_FLASH_SIZE - 1) << 20) \ - | OR_UPM_XAM \ | OR_GPCM_CSNT \ | OR_GPCM_ACS_DIV2 \ | OR_GPCM_XACS \ -- 1.7.3.1.msysgit.0

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[U-Boot] [PATCH V3] bugfix: image header pointer change.
by Baidu Boy 18 Jan '11

18 Jan '11

This patch is to avoid potential issue when we still use the pointer images->legacy_hdr_os after the kernel un-compressed. in function boot_get_kernel(): we should let the images->legacy_hdr_os point to the new copied image header, not the original image header in uImage which may be over-written in the kernel un-compressed process. This is a potential problem. Signed-off-by: Baidu Boy <liucai.lfn(a)gmail.com> --- changes for V2: - Avoid unrelated syntax changes changes for V3: - Add some description for this patch. common/cmd_bootm.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 1a024f1..8f9e5f1 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -896,7 +896,7 @@ static void *boot_get_kernel (cmd_tbl_t *cmdtp, int flag, int argc, char * const memmove (&images->legacy_hdr_os_copy, hdr, sizeof(image_header_t)); /* save pointer to image header */ - images->legacy_hdr_os = hdr; + images->legacy_hdr_os = &images->legacy_hdr_os_copy; images->legacy_hdr_valid = 1; show_boot_progress (6); -- 1.7.3.1.msysgit.0

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[U-Boot] [PATCH 1/2 v2] BLOCK: Add freescale IMX51 PATA driver
by Marek Vasut 18 Jan '11

18 Jan '11

Signed-off-by: Marek Vasut <marek.vasut(a)gmail.com> --- v2: Fixed line-too-long bugs as proposed by Stefano drivers/block/Makefile | 1 + drivers/block/mxc_ata.c | 149 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 150 insertions(+), 0 deletions(-) create mode 100644 drivers/block/mxc_ata.c diff --git a/drivers/block/Makefile b/drivers/block/Makefile index e27175b..aa7dc87 100644 --- a/drivers/block/Makefile +++ b/drivers/block/Makefile @@ -31,6 +31,7 @@ COBJS-$(CONFIG_FSL_SATA) += fsl_sata.o COBJS-$(CONFIG_LIBATA) += libata.o COBJS-$(CONFIG_CMD_MG_DISK) += mg_disk.o COBJS-$(CONFIG_MVSATA_IDE) += mvsata_ide.o +COBJS-$(CONFIG_MX51_PATA) += mxc_ata.o COBJS-$(CONFIG_PATA_BFIN) += pata_bfin.o COBJS-$(CONFIG_SATA_DWC) += sata_dwc.o COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o diff --git a/drivers/block/mxc_ata.c b/drivers/block/mxc_ata.c new file mode 100644 index 0000000..842a633 --- /dev/null +++ b/drivers/block/mxc_ata.c @@ -0,0 +1,149 @@ +/* + * Freescale iMX51 ATA driver + * + * Copyright (C) 2010 Marek Vasut <marek.vasut(a)gmail.com> + * + * Based on code by: + * Mahesh Mahadevan <mahesh.mahadevan(a)freescale.com> + * + * Based on code from original FSL ATA driver, which is + * part of eCos, the Embedded Configurable Operating System. + * Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <config.h> +#include <asm/byteorder.h> +#include <asm/io.h> +#include <ide.h> + +#include <asm/arch/imx-regs.h> +#include <asm/arch/clock.h> + +/* MXC ATA register offsets */ +struct mxc_ata_config_regs { + u8 time_off; /* 0x00 */ + u8 time_on; + u8 time_1; + u8 time_2w; + u8 time_2r; + u8 time_ax; + u8 time_pio_rdx; + u8 time_4; + u8 time_9; + u8 time_m; + u8 time_jn; + u8 time_d; + u8 time_k; + u8 time_ack; + u8 time_env; + u8 time_udma_rdx; + u8 time_zah; /* 0x10 */ + u8 time_mlix; + u8 time_dvh; + u8 time_dzfs; + u8 time_dvs; + u8 time_cvh; + u8 time_ss; + u8 time_cyc; + u32 fifo_data_32; /* 0x18 */ + u32 fifo_data_16; + u32 fifo_fill; + u32 ata_control; + u32 interrupt_pending; + u32 interrupt_enable; + u32 interrupt_clear; + u32 fifo_alarm; +}; + +struct mxc_data_hdd_regs { + u32 drive_data; /* 0xa0 */ + u32 drive_features; + u32 drive_sector_count; + u32 drive_sector_num; + u32 drive_cyl_low; + u32 drive_cyl_high; + u32 drive_dev_head; + u32 command; + u32 status; + u32 alt_status; +}; + +/* PIO timing table */ +#define NR_PIO_SPECS 5 +static uint16_t pio_t0[NR_PIO_SPECS] = { 600, 383, 240, 180, 120 }; +static uint16_t pio_t1[NR_PIO_SPECS] = { 70, 50, 30, 30, 25 }; +static uint16_t pio_t2_8[NR_PIO_SPECS] = { 290, 290, 290, 80, 70 }; +static uint16_t pio_t2_16[NR_PIO_SPECS] = { 165, 125, 100, 80, 70 }; +static uint16_t pio_t2i[NR_PIO_SPECS] = { 40, 0, 0, 0, 0 }; +static uint16_t pio_t4[NR_PIO_SPECS] = { 30, 20, 15, 10, 10 }; +static uint16_t pio_t9[NR_PIO_SPECS] = { 20, 15, 10, 10, 10 }; +static uint16_t pio_tA[NR_PIO_SPECS] = { 50, 50, 50, 50, 50 }; + +#define REG2OFF(reg) ((((uint32_t)reg) & 0x3) * 8) +static void set_ata_bus_timing(unsigned char mode) +{ + uint32_t val; + uint32_t T = 1000000000 / mxc_get_clock(MXC_IPG_CLK); + + struct mxc_ata_config_regs *ata_regs; + ata_regs = (struct mxc_ata_config_regs *)CONFIG_SYS_ATA_BASE_ADDR; + + if (mode >= NR_PIO_SPECS) + return; + + /* Write TIME_OFF/ON/1/2W */ + val = (3 << REG2OFF(&ata_regs->time_off)) | + (3 << REG2OFF(&ata_regs->time_on)) | + (((pio_t1[mode] + T) / T) << REG2OFF(&ata_regs->time_1)) | + (((pio_t2_8[mode] + T) / T) << REG2OFF(&ata_regs->time_2w)); + writel(val, &ata_regs->time_off); + + /* Write TIME_2R/AX/RDX/4 */ + val = (((pio_t2_8[mode] + T) / T) << REG2OFF(&ata_regs->time_2r)) | + (((pio_tA[mode] + T) / T + 2) << REG2OFF(&ata_regs->time_ax)) | + (1 << REG2OFF(&ata_regs->time_pio_rdx)) | + (((pio_t4[mode] + T) / T) << REG2OFF(&ata_regs->time_4)); + writel(val, &ata_regs->time_2r); + + /* Write TIME_9 ; the rest of timing registers is irrelevant for PIO */ + val = (((pio_t9[mode] + T) / T) << REG2OFF(&ata_regs->time_9)); + writel(val, &ata_regs->time_9); +} + +int ide_preinit(void) +{ + struct mxc_ata_config_regs *ata_regs; + ata_regs = (struct mxc_ata_config_regs *)CONFIG_SYS_ATA_BASE_ADDR; + + /* 46.3.3.4 @ FSL iMX51 manual */ + /* FIFO normal op., drive reset */ + writel(0x80, &ata_regs->ata_control); + /* FIFO normal op., drive not reset */ + writel(0xc0, &ata_regs->ata_control); + + /* Configure the PIO timing */ + set_ata_bus_timing(CONFIG_MXC_ATA_PIO_MODE); + + /* 46.3.3.4 @ FSL iMX51 manual */ + /* Drive not reset, IORDY handshake */ + writel(0x41, &ata_regs->ata_control); + + return 0; +} -- 1.7.2.3

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[U-Boot] [RFC PATCH] ARM: print gcc version
by Alexander Holler 18 Jan '11

18 Jan '11

It might be useful to see what compiler version was used to compile u-boot. --- arch/arm/lib/board.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index 96c0e30..df90b5e 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -75,7 +75,7 @@ extern void dataflash_print_info(void); #endif const char version_string[] = - U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ")"CONFIG_IDENT_STRING; + U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ", gcc " __VERSION__ ")"CONFIG_IDENT_STRING; #ifdef CONFIG_DRIVER_RTL8019 extern void rtl8019_get_enetaddr (uchar * addr); -- 1.7.2.2

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