September 2010 - U-Boot

[U-Boot] [STATUS] U-Boot v2010.09 released - Merge Window OPEN
by Wolfgang Denk 30 Sep '10

30 Sep '10

Hello all, U-Boot v2010.09 has been released and is available from the git repository and the FTP server. The "next" branch has been pulled into mainline ("master" branch) and has been removed afterward. ******************** ******************** ** ** ** BIG FAT NOTE ** ** ** ******************** ******************** The commits we pulled from the next branch into mainline contain 3 major groups of changes: 1) New implementation for internal handling of environment variables. In addition to the traditional commands "setenv", "printenv" and "saveenv" there is now a new "env" command with a number opf subcommands that offer many new features. Please see the commit message of commit ea882baf for details: http://git.denx.de/?p=u-boot.git;a=commit;h=ea882baf 2) ARM cache support. This greatly accelerates U-Boot on many ARM systems, especially functions like uncompressing images or loading images form external storage are now much faster, sometimes by a factor > 10. For details please see these commits: 7e4a9e6 ARM (ARM11): add data cache support, test on Qong board 95c6f6d ARM V7 (OMAP): add data cache support, test on Beagle board c3330e9 ARM (ARM926ejs): add data cache support, tested on magnesium and tx25 board http://git.denx.de/?p=u-boot.git;a=commit;h=7e4a9e6 http://git.denx.de/?p=u-boot.git;a=commit;h=95c6f6d http://git.denx.de/?p=u-boot.git;a=commit;h=c3330e9 3) ARM relocation support. This allows to efficiently use the same U-Bot binary image on systems with different RAM sizes, and brings the implementation much more in line with the code used for example on Power Architecture systems (eventually allowing to merge into common code). This seems especailly interesting now that ARM is getting Device Tree support as well. Please note that *all* ARM boards need to be adapted to this noew code, which requires testing on the actual hardware, so this is a task for the respective board maintainers or other users. ***************************************************************** * Currently, most ARM boards are *broken* and *do not compile*. * ***************************************************************** Please see the commit message of commit f1d2b31 for details: http://git.denx.de/?p=u-boot.git;a=commit;h=f1d2b31 Support for CONFIG_SYS_ARM_WITHOUT_RELOC will be removed after release v2010.03; all boards that have not been converted by then, i. e. that are still broken then, are considered unmaintained and without interest for the community and will be removed as well. --- end of big fat note --- The Merge Window for the next release (v2010.12) is open until Sat Oct 16, 2010, 23:59:59 CET = 17 days remaining. The next release v2010.12 is scheduled for December 13, 2010. See http://www.denx.de/wiki/U-Boot/ReleaseCycle for details, including guestimates for the next releases after that. A little statistics [1] - changes since release v2020.06: Processed 842 csets from 114 developers 32 employers found A total of 77775 lines added, 140638 removed (delta -62863) Developers with the most changesets Mike Frysinger 77 (9.1%) Kumar Gala 69 (8.2%) Wolfgang Denk 55 (6.5%) Steve Sakoman 34 (4.0%) Minkyu Kang 33 (3.9%) Stefan Roese 28 (3.3%) Stefano Babic 19 (2.3%) Albert Aribaud 19 (2.3%) Graeme Russ 18 (2.1%) Marek Vasut 17 (2.0%) ... Developers with the most changed lines Wolfgang Denk 111033 (56.0%) Minkyu Kang 6363 (3.2%) Kumar Gala 6342 (3.2%) Graeme Russ 5707 (2.9%) Vipin KUMAR 5698 (2.9%) Mike Frysinger 5461 (2.8%) Steve Sakoman 4111 (2.1%) Stefan Roese 3789 (1.9%) Matthias Kaehlcke 3008 (1.5%) kevin.morfitt(a)fearnside-systems.co.uk 2950 (1.5%) ... Developers with the most lines removed Wolfgang Denk 105067 (74.7%) Graeme Russ 4244 (3.0%) Thomas Chou 979 (0.7%) kevin.morfitt(a)fearnside-systems.co.uk 867 (0.6%) Michal Simek 797 (0.6%) Michael Zaidman 612 (0.4%) Peter Tyser 383 (0.3%) Becky Bruce 206 (0.1%) Ladislav Michl 172 (0.1%) Nishanth Menon 104 (0.1%) ... Developers with the most signoffs (total 294) Sandeep Paulraj 54 (18.4%) Kumar Gala 54 (18.4%) Ben Warren 30 (10.2%) Stefan Roese 19 (6.5%) Minkyu Kang 19 (6.5%) Wolfgang Denk 13 (4.4%) Mike Frysinger 13 (4.4%) Kyungmin Park 11 (3.7%) Scott McNutt 8 (2.7%) Kim Phillips 6 (2.0%) ... Developers with the most reviews (total 0) Developers with the most test credits (total 20) Steve Sakoman 3 (15.0%) Thomas Chou 3 (15.0%) Stefan Roese 1 (5.0%) Minkyu Kang 1 (5.0%) Wolfgang Denk 1 (5.0%) Detlev Zundel 1 (5.0%) Peter Tyser 1 (5.0%) Ian Abbott 1 (5.0%) Philip Balister 1 (5.0%) Andreas BieÃmann 1 (5.0%) ... Developers who gave the most tested-by credits (total 20) Mike Frysinger 5 (25.0%) Grazvydas Ignotas 2 (10.0%) Steve Sakoman 1 (5.0%) Thomas Chou 1 (5.0%) Stefan Roese 1 (5.0%) Wolfgang Denk 1 (5.0%) Reinhard Meyer 1 (5.0%) Aneesh V 1 (5.0%) Timur Tabi 1 (5.0%) kevin.morfitt(a)fearnside-systems.co.uk 1 (5.0%) ... Developers with the most report credits (total 4) Wolfgang Denk 2 (50.0%) York Sun 1 (25.0%) Vivi Li 1 (25.0%) Developers who gave the most report credits (total 4) Mike Frysinger 1 (25.0%) Kumar Gala 1 (25.0%) Kim Phillips 1 (25.0%) Anton Vorontsov 1 (25.0%) Top changeset contributors by employer (Unknown) 168 (20.0%) Freescale 134 (15.9%) DENX Software Engineering 119 (14.1%) Analog Devices 85 (10.1%) Samsung 43 (5.1%) Sakoman Inc. 34 (4.0%) Texas Instruments 25 (3.0%) Wind River 20 (2.4%) Graeme Russ 18 (2.1%) Marvell 16 (1.9%) ... Top lines changed by employer DENX Software Engineering 121675 (61.4%) (Unknown) 21198 (10.7%) Freescale 10652 (5.4%) Analog Devices 7846 (4.0%) Samsung 6709 (3.4%) Graeme Russ 5996 (3.0%) ST Microelectronics 5701 (2.9%) Sakoman Inc. 4121 (2.1%) Wind River 3766 (1.9%) Texas Instruments 2239 (1.1%) ... Employers with the most signoffs (total 294) Freescale 90 (30.6%) Texas Instruments 61 (20.7%) (Unknown) 44 (15.0%) DENX Software Engineering 35 (11.9%) Samsung 34 (11.6%) Analog Devices 15 (5.1%) Psyent 8 (2.7%) Sakoman Inc. 4 (1.4%) Wind River 1 (0.3%) Marvell 1 (0.3%) Xilinx 1 (0.3%) [1] See http://www.denx.de/wiki/U-Boot/UbootStat_2010_09 for full statistics, and http://www.denx.de/wiki/UBoot/ReleaseCycle for links to statistics for earlier releases. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd(a)denx.de "Why waste negative entropy on comments, when you could use the same entropy to create bugs instead?" - Steve Elias

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[U-Boot] [PATCH] fsl: verify writes to the MAC address EEPROM
by Timur Tabi 30 Sep '10

30 Sep '10

Update the code which writes to the on-board EEPROM so that it can detect if the write failed because the EEPROM is write-protected. Most of the 8xxx-class Freescale reference boards use an AT24C02 EEPROM to store MAC addresses and similar information. With this patch, if the EEPROM is protected, the "mac save" command will display an error message indicating that the write has not succeeded. Signed-off-by: Timur Tabi <timur(a)freescale.com> --- board/freescale/common/sys_eeprom.c | 18 +++++++++++++++++- 1 files changed, 17 insertions(+), 1 deletions(-) diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index 5a8f4f5..c5f1c06 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -204,7 +204,7 @@ static void update_crc(void) */ static int prog_eeprom(void) { - int ret = 0; /* shut up gcc */ + int ret = 0; int i; void *p; #ifdef CONFIG_SYS_EEPROM_BUS_NUM @@ -225,6 +225,11 @@ static int prog_eeprom(void) i2c_set_bus_num(CONFIG_SYS_EEPROM_BUS_NUM); #endif + /* + * The AT24C02 datasheet says that data can only be written in page + * mode, which means 8 bytes at a time, and it takes up to 5ms to + * complete a given write. + */ for (i = 0, p = &e; i < sizeof(e); i += 8, p += 8) { ret = i2c_write(CONFIG_SYS_I2C_EEPROM_ADDR, i, CONFIG_SYS_I2C_EEPROM_ADDR_LEN, p, min((sizeof(e) - i), 8)); @@ -233,12 +238,23 @@ static int prog_eeprom(void) udelay(5000); /* 5ms write cycle timing */ } + if (!ret) { + /* Verify the write by reading back the EEPROM and comparing */ + struct eeprom e2; + + ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, + CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (void *)&e2, sizeof(e2)); + if (!ret && memcmp(&e, &e2, sizeof(e))) + ret = -1; + } + #ifdef CONFIG_SYS_EEPROM_BUS_NUM i2c_set_bus_num(bus); #endif if (ret) { printf("Programming failed.\n"); + has_been_read = 0; return -1; } -- 1.7.0.1

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[U-Boot] [PATCH 1/3] mpc8569mds: fix CONFIG_ENV_SIZE
by Haiying.Wang＠freescale.com 30 Sep '10

30 Sep '10

From: Haiying Wang <Haiying.Wang(a)freescale.com> CONFIG_ENV_SIZE of MPC8569MDS was wrongly set to CONFIG_ENV_SECT_SIZE which is 128KB, so it took longer time to do crc32 calculation for ENV than it should do. It causes the bootup for MPC8569MDS significantly slow. This patch fixs it to 0x2000(8KB), also fix the comment for CONFIG_ENV_SECT_SIZE to correct size. Signed-off-by: Kai.Jiang <Kai.Jiang(a)freescale.com Signed-off-by: Haiying Wang <Haiying.Wang(a)freescale.com> --- include/configs/MPC8569MDS.h | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 8ffd458..936f1af 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -505,8 +505,8 @@ extern unsigned long get_clock_freq(void); #else #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SECT_SIZE 0x20000 /* 256K(one sector) for env */ -#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ +#define CONFIG_ENV_SIZE 0x2000 #endif #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -- 1.7.0

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[U-Boot] [PATCH 1/3] mpc8569mds: fix CONFIG_ENV_SIZE
by Haiying.Wang＠freescale.com 30 Sep '10

30 Sep '10

From: Haiying Wang <Haiying.Wang(a)freescale.com> CONFIG_ENV_SIZE of MPC8569MDS was wrongly set to CONFIG_ENV_SECT_SIZE which is 128KB, so it took longer time to do crc32 calculation for ENV than it should do. It causes the bootup for MPC8569MDS significantly slow. This patch fixs it to 0x2000(8KB), also fix the comment for CONFIG_ENV_SECT_SIZE to correct size. Signed-off-by: Kai.Jiang <Kai.Jiang(a)freescale.com Signed-off-by: Haiying Wang <Haiying.Wang(a)freescale.com> --- include/configs/MPC8569MDS.h | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 8ffd458..936f1af 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -505,8 +505,8 @@ extern unsigned long get_clock_freq(void); #else #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SECT_SIZE 0x20000 /* 256K(one sector) for env */ -#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ +#define CONFIG_ENV_SIZE 0x2000 #endif #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -- 1.7.0

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[U-Boot] [PATCH] [v2] p1022ds: add audclk hwconfig setting enable codec reference clock
by Timur Tabi 30 Sep '10

30 Sep '10

The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference clock for the audio codec, but by default both are disabled. Add a 'audclk' hwconfig option that allows the user to choose which clock he wants. The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48, 64, and 96KHz. The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and 88200Hz. Also configure a pin muxing to select some SSI signals, which will disable I2C1. Signed-off-by: Timur Tabi <timur(a)freescale.com> --- board/freescale/p1022ds/p1022ds.c | 67 ++++++++++++++++++++++++++++++++----- doc/README.fsl-hwconfig | 21 +++++++++++ include/configs/P1022DS.h | 1 + 3 files changed, 80 insertions(+), 9 deletions(-) create mode 100644 doc/README.fsl-hwconfig diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c index be692cb..e75f864 100644 --- a/board/freescale/p1022ds/p1022ds.c +++ b/board/freescale/p1022ds/p1022ds.c @@ -27,6 +27,7 @@ #include <asm/mp.h> #include <netdev.h> #include <i2c.h> +#include <hwconfig.h> #include "../common/ngpixis.h" @@ -90,34 +91,58 @@ phys_size_t initdram(int board_type) #define CONFIG_TFP410_I2C_ADDR 0x38 +/* Masks for the SSI_TDM and AUDCLK bits of the ngPIXIS BRDCFG1 register. */ +#define CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK 0x0c +#define CONFIG_PIXIS_BRDCFG1_AUDCLK_MASK 0x03 + +/* Route the I2C1 pins to the SSI port instead. */ +#define CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI 0x08 + +/* Choose the 12.288Mhz codec reference clock */ +#define CONFIG_PIXIS_BRDCFG1_AUDCLK_12 0x02 + +/* Choose the 11.2896Mhz codec reference clock */ +#define CONFIG_PIXIS_BRDCFG1_AUDCLK_11 0x01 + int misc_init_r(void) { u8 temp; + const char *audclk; + size_t arglen; - /* Enable the TFP410 Encoder */ + /* For DVI, enable the TFP410 Encoder. */ temp = 0xBF; if (i2c_write(CONFIG_TFP410_I2C_ADDR, 0x08, 1, &temp, sizeof(temp)) < 0) return -1; - - /* Verify if enabled */ - temp = 0; if (i2c_read(CONFIG_TFP410_I2C_ADDR, 0x08, 1, &temp, sizeof(temp)) < 0) return -1; - debug("DVI Encoder Read: 0x%02x\n", temp); temp = 0x10; if (i2c_write(CONFIG_TFP410_I2C_ADDR, 0x0A, 1, &temp, sizeof(temp)) < 0) return -1; - - /* Verify if enabled */ - temp = 0; if (i2c_read(CONFIG_TFP410_I2C_ADDR, 0x0A, 1, &temp, sizeof(temp)) < 0) return -1; - debug("DVI Encoder Read: 0x%02x\n",temp); + /* + * Enable the reference clock for the WM8776 codec, and route the MUX + * pins for SSI. The default is the 12.288 MHz clock + */ + + temp = in_8(&pixis->brdcfg1) & ~(CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK | + CONFIG_PIXIS_BRDCFG1_AUDCLK_MASK); + temp |= CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI; + + audclk = hwconfig_arg("audclk", &arglen); + /* Check the first two chars only */ + if (audclk && (strncmp(audclk, "11", 2) == 0)) + temp |= CONFIG_PIXIS_BRDCFG1_AUDCLK_11; + else + temp |= CONFIG_PIXIS_BRDCFG1_AUDCLK_12; + out_8(&pixis->brdcfg1, temp); + return 0; } @@ -310,6 +335,27 @@ int board_eth_init(bd_t *bis) } #ifdef CONFIG_OF_BOARD_SETUP +/** + * ft_codec_setup - fix up the clock-frequency property of the codec node + * + * Update the clock-frequency property based on the value of the 'audclk' + * hwconfig option. If audclk is not specified, then default to 12.288MHz. + */ +static void ft_codec_setup(void *blob, const char *compatible) +{ + const char *audclk; + size_t arglen; + u32 freq; + + audclk = hwconfig_arg("audclk", &arglen); + if (audclk && (strncmp(audclk, "11", 2) == 0)) + freq = 11289600; + else + freq = 12288000; + + do_fixup_by_compat_u32(blob, compatible, "clock-frequency", freq, 1); +} + void ft_board_setup(void *blob, bd_t *bd) { phys_addr_t base; @@ -343,6 +389,9 @@ void ft_board_setup(void *blob, bd_t *bd) #ifdef CONFIG_FSL_SGMII_RISER fsl_sgmii_riser_fdt_fixup(blob); #endif + + /* Update the WM8776 node's clock frequency property */ + ft_codec_setup(blob, "wlf,wm8776"); } #endif diff --git a/doc/README.fsl-hwconfig b/doc/README.fsl-hwconfig new file mode 100644 index 0000000..03fea74 --- /dev/null +++ b/doc/README.fsl-hwconfig @@ -0,0 +1,21 @@ +Freescale-specific 'hwconfig' options. + +This file documents Freescale-specific key:value pairs for the 'hwconfig' +option. See README.hwconfig for general information about 'hwconfig'. + +audclk + Specific to the P1022DS reference board. + + This option specifies which of the two oscillator frequencies should be + routed to the Wolfson WM8776 codec. The ngPIXIS can be programmed to + route either a 11.2896MHz or a 12.288MHz clock. The default is + 12.288MHz. This option has two effects. First, the MUX on the board + will be programmed accordingly. Second, the clock-frequency property + in the codec node in the device tree will be updated to the correct + value. + + 'audclk:11' + Select the 11.2896MHz clock + + 'audclk:12' + Select the 12.288MHz clock diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index b42b5d0..0f7aca2 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -137,6 +137,7 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_MISC_INIT_R +#define CONFIG_HWCONFIG #define CONFIG_FSL_NGPIXIS #define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ -- 1.7.0.1

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[U-Boot] I'm very happy to meet you,
by lenny donatus 30 Sep '10

30 Sep '10

Hello I'm very happy to meet you, Compliments of the day! How are you ? hope you are doing well, I am Lenny a lovely girl, I am looking for a reliable and trusted person. I believe we can get acquainted, so if it interests you, please reach me back here for further communications. I stop here awaiting your responds. Please get back to me with this ( E-mail;lenny1v1(a)hotmail.com) so that I will send my photo to you and tell you more about my self. A good friendship is the foundation build on other relative things to come. May God bless you as I wait impatiently to read from you.. Regards, Lenny Donatus.

1 0

[U-Boot] [PATCH 01/10] Use common function to set GPIOs for MX3 and MX5
by Stefano Babic 30 Sep '10

30 Sep '10

The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic(a)denx.de> --- arch/arm/include/asm/arch-mx31/mx31-regs.h | 14 +++- arch/arm/include/asm/arch-mx31/mx31.h | 25 ------- arch/arm/include/asm/arch-mx51/imx-regs.h | 6 ++ board/davedenx/qong/qong.c | 29 ++++---- drivers/gpio/Makefile | 2 +- drivers/gpio/mx31_gpio.c | 88 ----------------------- drivers/gpio/mxc_gpio.c | 107 ++++++++++++++++++++++++++++ drivers/spi/mxc_spi.c | 15 ++-- include/configs/imx31_phycore.h | 2 +- include/configs/qong.h | 2 +- include/mxc_gpio.h | 52 +++++++++++++ 11 files changed, 201 insertions(+), 141 deletions(-) delete mode 100644 drivers/gpio/mx31_gpio.c create mode 100644 drivers/gpio/mxc_gpio.c create mode 100644 include/mxc_gpio.h diff --git a/arch/arm/include/asm/arch-mx31/mx31-regs.h b/arch/arm/include/asm/arch-mx31/mx31-regs.h index d72585c..f05e743 100644 --- a/arch/arm/include/asm/arch-mx31/mx31-regs.h +++ b/arch/arm/include/asm/arch-mx31/mx31-regs.h @@ -57,6 +57,14 @@ struct clock_control_regs { u32 pdr2; }; +/* GPIO Registers */ +struct gpio_regs { + u32 gpio_dr; + u32 gpio_dir; + u32 gpio_psr; +}; + + /* Bit definitions for RCSR register in CCM */ #define CCM_RCSR_NF16B (1 << 31) #define CCM_RCSR_NFMS (1 << 30) @@ -153,9 +161,9 @@ struct clock_control_regs { /* * GPIO */ -#define GPIO1_BASE 0x53FCC000 -#define GPIO2_BASE 0x53FD0000 -#define GPIO3_BASE 0x53FA4000 +#define GPIO1_BASE_ADDR 0x53FCC000 +#define GPIO2_BASE_ADDR 0x53FD0000 +#define GPIO3_BASE_ADDR 0x53FA4000 #define GPIO_DR 0x00000000 /* data register */ #define GPIO_GDIR 0x00000004 /* direction register */ #define GPIO_PSR 0x00000008 /* pad status register */ diff --git a/arch/arm/include/asm/arch-mx31/mx31.h b/arch/arm/include/asm/arch-mx31/mx31.h index f702d26..5a5aa11 100644 --- a/arch/arm/include/asm/arch-mx31/mx31.h +++ b/arch/arm/include/asm/arch-mx31/mx31.h @@ -28,31 +28,6 @@ extern u32 mx31_get_ipg_clk(void); #define imx_get_uartclk mx31_get_ipg_clk extern void mx31_gpio_mux(unsigned long mode); -enum mx31_gpio_direction { - MX31_GPIO_DIRECTION_IN, - MX31_GPIO_DIRECTION_OUT, -}; - -#ifdef CONFIG_MX31_GPIO -extern int mx31_gpio_direction(unsigned int gpio, - enum mx31_gpio_direction direction); -extern void mx31_gpio_set(unsigned int gpio, unsigned int value); -extern int mx31_gpio_get(unsigned int gpio); -#else -static inline int mx31_gpio_direction(unsigned int gpio, - enum mx31_gpio_direction direction) -{ - return 1; -} -static inline int mx31_gpio_get(unsigned int gpio) -{ - return 1; -} -static inline void mx31_gpio_set(unsigned int gpio, unsigned int value) -{ -} -#endif - void mx31_uart1_hw_init(void); void mx31_spi2_hw_init(void); diff --git a/arch/arm/include/asm/arch-mx51/imx-regs.h b/arch/arm/include/asm/arch-mx51/imx-regs.h index 3887d3c..0e3bc2a 100644 --- a/arch/arm/include/asm/arch-mx51/imx-regs.h +++ b/arch/arm/include/asm/arch-mx51/imx-regs.h @@ -256,6 +256,12 @@ struct weim { u32 cswcr2; }; +/* GPIO Registers */ +struct gpio_regs { + u32 gpio_dr; + u32 gpio_dir; + u32 gpio_psr; +}; #endif /* __ASSEMBLER__*/ #endif /* __ASM_ARCH_MXC_MX51_H__ */ diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c index e509383..9abc29c 100644 --- a/board/davedenx/qong/qong.c +++ b/board/davedenx/qong/qong.c @@ -27,6 +27,7 @@ #include <asm/arch/mx31-regs.h> #include <nand.h> #include <fsl_pmic.h> +#include <mxc_gpio.h> #include "qong_fpga.h" DECLARE_GLOBAL_DATA_PTR; @@ -41,9 +42,9 @@ int dram_init (void) static void qong_fpga_reset(void) { - mx31_gpio_set(QONG_FPGA_RST_PIN, 0); + mxc_gpio_set(QONG_FPGA_RST_PIN, 0); udelay(30); - mx31_gpio_set(QONG_FPGA_RST_PIN, 1); + mxc_gpio_set(QONG_FPGA_RST_PIN, 1); udelay(300); } @@ -66,11 +67,11 @@ int board_early_init_f (void) /* FPGA reset Pin */ /* rstn = 0 */ - mx31_gpio_set(QONG_FPGA_RST_PIN, 0); - mx31_gpio_direction(QONG_FPGA_RST_PIN, MX31_GPIO_DIRECTION_OUT); + mxc_gpio_set(QONG_FPGA_RST_PIN, 0); + mxc_gpio_direction(QONG_FPGA_RST_PIN, MXC_GPIO_DIRECTION_OUT); /* set interrupt pin as input */ - mx31_gpio_direction(QONG_FPGA_IRQ_PIN, MX31_GPIO_DIRECTION_IN); + mxc_gpio_direction(QONG_FPGA_IRQ_PIN, MXC_GPIO_DIRECTION_IN); #endif @@ -206,27 +207,27 @@ static void board_nand_setup(void) qong_fpga_reset(); /* Enable NAND flash */ - mx31_gpio_set(15, 1); - mx31_gpio_set(14, 1); - mx31_gpio_direction(15, MX31_GPIO_DIRECTION_OUT); - mx31_gpio_direction(16, MX31_GPIO_DIRECTION_IN); - mx31_gpio_direction(14, MX31_GPIO_DIRECTION_IN); - mx31_gpio_set(15, 0); + mxc_gpio_set(15, 1); + mxc_gpio_set(14, 1); + mxc_gpio_direction(15, MXC_GPIO_DIRECTION_OUT); + mxc_gpio_direction(16, MXC_GPIO_DIRECTION_IN); + mxc_gpio_direction(14, MXC_GPIO_DIRECTION_IN); + mxc_gpio_set(15, 0); } int qong_nand_rdy(void *chip) { udelay(1); - return mx31_gpio_get(16); + return mxc_gpio_get(16); } void qong_nand_select_chip(struct mtd_info *mtd, int chip) { if (chip >= 0) - mx31_gpio_set(15, 0); + mxc_gpio_set(15, 0); else - mx31_gpio_set(15, 1); + mxc_gpio_set(15, 1); } diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 07d395d..a0f4552 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -27,7 +27,7 @@ LIB := $(obj)libgpio.a COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o -COBJS-$(CONFIG_MX31_GPIO) += mx31_gpio.o +COBJS-$(CONFIG_MXC_GPIO) += mxc_gpio.o COBJS-$(CONFIG_PCA953X) += pca953x.o COBJS-$(CONFIG_S5P) += s5p_gpio.o diff --git a/drivers/gpio/mx31_gpio.c b/drivers/gpio/mx31_gpio.c deleted file mode 100644 index b07f038..0000000 --- a/drivers/gpio/mx31_gpio.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Copyright (C) 2009 - * Guennadi Liakhovetski, DENX Software Engineering, <lg(a)denx.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#include <common.h> -#include <asm/arch/mx31.h> -#include <asm/arch/mx31-regs.h> - -/* GPIO port description */ -static unsigned long gpio_ports[] = { - [0] = GPIO1_BASE, - [1] = GPIO2_BASE, - [2] = GPIO3_BASE, -}; - -int mx31_gpio_direction(unsigned int gpio, enum mx31_gpio_direction direction) -{ - unsigned int port = gpio >> 5; - u32 l; - - if (port >= ARRAY_SIZE(gpio_ports)) - return 1; - - gpio &= 0x1f; - - l = __REG(gpio_ports[port] + GPIO_GDIR); - switch (direction) { - case MX31_GPIO_DIRECTION_OUT: - l |= 1 << gpio; - break; - case MX31_GPIO_DIRECTION_IN: - l &= ~(1 << gpio); - } - __REG(gpio_ports[port] + GPIO_GDIR) = l; - - return 0; -} - -void mx31_gpio_set(unsigned int gpio, unsigned int value) -{ - unsigned int port = gpio >> 5; - u32 l; - - if (port >= ARRAY_SIZE(gpio_ports)) - return; - - gpio &= 0x1f; - - l = __REG(gpio_ports[port] + GPIO_DR); - if (value) - l |= 1 << gpio; - else - l &= ~(1 << gpio); - __REG(gpio_ports[port] + GPIO_DR) = l; -} - -int mx31_gpio_get(unsigned int gpio) -{ - unsigned int port = gpio >> 5; - u32 l; - - if (port >= ARRAY_SIZE(gpio_ports)) - return -1; - - gpio &= 0x1f; - - l = (__REG(gpio_ports[port] + GPIO_DR) >> gpio) & 0x01; - - return l; -} diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c new file mode 100644 index 0000000..663141f --- /dev/null +++ b/drivers/gpio/mxc_gpio.c @@ -0,0 +1,107 @@ +/* + * Copyright (C) 2009 + * Guennadi Liakhovetski, DENX Software Engineering, <lg(a)denx.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#ifdef CONFIG_MX31 +#include <asm/arch/mx31-regs.h> +#endif +#ifdef CONFIG_MX51 +#include <asm/arch/imx-regs.h> +#endif +#include <asm/io.h> +#include <mxc_gpio.h> + +/* GPIO port description */ +static unsigned long gpio_ports[] = { + [0] = GPIO1_BASE_ADDR, + [1] = GPIO2_BASE_ADDR, + [2] = GPIO3_BASE_ADDR, +#ifdef CONFIG_MX51 + [3] = GPIO4_BASE_ADDR, +#endif +}; + +int mxc_gpio_direction(unsigned int gpio, enum mxc_gpio_direction direction) +{ + unsigned int port = gpio >> 5; + struct gpio_regs *regs; + u32 l; + + if (port >= ARRAY_SIZE(gpio_ports)) + return 1; + + gpio &= 0x1f; + + regs = (struct gpio_regs *)gpio_ports[port]; + + l = readl(&regs->gpio_dir); + + switch (direction) { + case MXC_GPIO_DIRECTION_OUT: + l |= 1 << gpio; + break; + case MXC_GPIO_DIRECTION_IN: + l &= ~(1 << gpio); + } + writel(l, &regs->gpio_dir); + + return 0; +} + +void mxc_gpio_set(unsigned int gpio, unsigned int value) +{ + unsigned int port = gpio >> 5; + struct gpio_regs *regs; + u32 l; + + if (port >= ARRAY_SIZE(gpio_ports)) + return; + + gpio &= 0x1f; + + regs = (struct gpio_regs *)gpio_ports[port]; + + l = readl(&regs->gpio_dr); + if (value) + l |= 1 << gpio; + else + l &= ~(1 << gpio); + writel(l, &regs->gpio_dr); +} + +int mxc_gpio_get(unsigned int gpio) +{ + unsigned int port = gpio >> 5; + struct gpio_regs *regs; + u32 l; + + if (port >= ARRAY_SIZE(gpio_ports)) + return -1; + + gpio &= 0x1f; + + regs = (struct gpio_regs *)gpio_ports[port]; + + l = (readl(&regs->gpio_dr) >> gpio) & 0x01; + + return l; +} diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index e15a63c..802cd2e 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -23,6 +23,7 @@ #include <spi.h> #include <asm/errno.h> #include <asm/io.h> +#include <mxc_gpio.h> #ifdef CONFIG_MX27 /* i.MX27 has a completely wrong register layout and register definitions in the @@ -68,9 +69,6 @@ static unsigned long spi_bases[] = { 0x53f84000, }; -#define OUT MX31_GPIO_DIRECTION_OUT -#define mxc_gpio_direction mx31_gpio_direction -#define mxc_gpio_set mx31_gpio_set #elif defined(CONFIG_MX51) #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h> @@ -111,13 +109,12 @@ static unsigned long spi_bases[] = { CSPI2_BASE_ADDR, CSPI3_BASE_ADDR, }; -#define mxc_gpio_direction(gpio, dir) (0) -#define mxc_gpio_set(gpio, value) {} -#define OUT 1 #else #error "Unsupported architecture" #endif +#define OUT MXC_GPIO_DIRECTION_OUT + struct mxc_spi_slave { struct spi_slave slave; unsigned long base; @@ -126,6 +123,7 @@ struct mxc_spi_slave { u32 cfg_reg; #endif int gpio; + int ss_pol; }; static inline struct mxc_spi_slave *to_mxc_spi_slave(struct spi_slave *slave) @@ -147,7 +145,7 @@ void spi_cs_activate(struct spi_slave *slave) { struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); if (mxcs->gpio > 0) - mxc_gpio_set(mxcs->gpio, mxcs->ctrl_reg & MXC_CSPICTRL_SSPOL); + mxc_gpio_set(mxcs->gpio, mxcs->ss_pol); } void spi_cs_deactivate(struct spi_slave *slave) @@ -155,7 +153,7 @@ void spi_cs_deactivate(struct spi_slave *slave) struct mxc_spi_slave *mxcs = to_mxc_spi_slave(slave); if (mxcs->gpio > 0) mxc_gpio_set(mxcs->gpio, - !(mxcs->ctrl_reg & MXC_CSPICTRL_SSPOL)); + !(mxcs->ss_pol)); } #ifdef CONFIG_MX51 @@ -394,6 +392,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, mxcs->slave.bus = bus; mxcs->slave.cs = cs; mxcs->base = spi_bases[bus]; + mxcs->ss_pol = (mode & SPI_CS_HIGH) ? 1 : 0; #ifdef CONFIG_MX51 /* Can be used for i.MX31 too ? */ diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h index 1dbafa0..62944a9 100644 --- a/include/configs/imx31_phycore.h +++ b/include/configs/imx31_phycore.h @@ -183,7 +183,7 @@ #ifdef CONFIG_IMX31_PHYCORE_EET #define BOARD_LATE_INIT -#define CONFIG_MX31_GPIO 1 +#define CONFIG_MXC_GPIO #define CONFIG_HARD_SPI 1 #define CONFIG_MXC_SPI 1 diff --git a/include/configs/qong.h b/include/configs/qong.h index 7a68b7b..7cd9558 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -52,7 +52,7 @@ #define CONFIG_MXC_UART 1 #define CONFIG_SYS_MX31_UART1 1 -#define CONFIG_MX31_GPIO +#define CONFIG_MXC_GPIO #define CONFIG_MXC_SPI #define CONFIG_DEFAULT_SPI_BUS 1 diff --git a/include/mxc_gpio.h b/include/mxc_gpio.h new file mode 100644 index 0000000..002ba61 --- /dev/null +++ b/include/mxc_gpio.h @@ -0,0 +1,52 @@ +/* + * + * (c) 2007 Pengutronix, Sascha Hauer <s.hauer(a)pengutronix.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MXC_GPIO_H +#define __MXC_GPIO_H + +enum mxc_gpio_direction { + MXC_GPIO_DIRECTION_IN, + MXC_GPIO_DIRECTION_OUT, +}; + +#ifdef CONFIG_MXC_GPIO +extern int mxc_gpio_direction(unsigned int gpio, + enum mxc_gpio_direction direction); +extern void mxc_gpio_set(unsigned int gpio, unsigned int value); +extern int mxc_gpio_get(unsigned int gpio); +#else +static inline int mxc_gpio_direction(unsigned int gpio, + enum mxc_gpio_direction direction) +{ + return 1; +} +static inline int mxc_gpio_get(unsigned int gpio) +{ + return 1; +} +static inline void mxc_gpio_set(unsigned int gpio, unsigned int value) +{ +} +#endif + +#endif -- 1.6.3.3

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[U-Boot] [PATCH 0/7] patch set for P1021MDS support
by Haiying Wang 30 Sep '10

30 Sep '10

The patchset supports SRAM boot, P1021MDS NAND boot, P1021MDS QE/UEC, it is against the git://git.denx.de/u-boot-mpc85xx. Thanks. Haiying

3 4

[U-Boot] u-boot boot sequence
by Marcel 29 Sep '10

29 Sep '10

Hi, I'm working on u-boot-usb and I think I get along quite well so far for the Atmel g45, thanks to this list. Slowly I do like the u-boot structure although it has a steep learning curve (I guess one week is considered steep by me). I've got the my Atmel Sam9G45 working for most parts (it boots well) and I hope to contribute some code soon (after usb is working well). I do however have some questions about the u-boot startup behaviour. What I want to create is the following : 1) u-boot starts and checks if it can start my application (either CRC check or whatever). This is the first thing u-boot should do. 2) if it can't boot it will listen on USB or ethernet for someone to upload a valid image or boot via NFS or whatever has been configured. 3) If it can boot, it will boot immediately (there may be a GPIO pin to override this behaviour) 4) once within the application (linux or whatever) I must be able to set a flag that lets u-boot wait for uploading a new image file when I soft-reset my device. This is needed for firmware upgrading of course. I still need to check if this flag is supported by the CPU or needs other support (eeprom perhaps). 5) After uploading an image the soft-reset is cleared and the whole sequence start over again, so it should boot the new image. In short I want the application to be in control and only if there's no application installed or it's corrupt or when the application let's u-boot know, u-boot is in control. I know at step 2 there are some complications for testing purposes, so there must be a way to change the behavior (change the order of doing things). Maybe a kind of boot sequence added to u-boot would be fine. But the boot sequence only needs two items than. Either boot the image or stay in u-boot. I know it's possible to do this but I wonder if it has been done before and if there any examples of it ? Since I'm working on USB device support for my G45 and I want the above behaviour (or something very similar) I'm very much interested in any work that implements this or comes close to this. If it hasn't been done before I'm interested to work on this of course and contribute the work. In that case I'd be interested in anyone's opinion on this topic (I mean the way to implement it and stay consistent with the current u-boot code). Best regards, Marcel

3 7

[U-Boot] hello
by joy benson 29 Sep '10

29 Sep '10

My Name is JUSTINA i am seeking for a honest partner i hope you don't mind if you don't mind please reply my mail so i can tell you more about myself and we can exchange picture too

1 0