September 2010 - U-Boot

[U-Boot] Help me on finding board similar to NIC card in U-bootloader
by Hari Babu 11 Oct '10

11 Oct '10

Hello, I am having a new NIC card and i have to develop U-boot Loader for that.Can any one help me which board name in U-Boot source code having similar kind of features( PHY, MAC ) for cloning that to my new NIC target card.This NIC card is communicating through PCIe to host,my NIC card is having the following H/W details. 1.CN63xx processor(Cavium network) 2.NAND Flash device : MT29F16G08ABABA 3.NOR Flash device : JS28F320J3D75 4.EEPROM : AT24C256B, AT25F1024 5.PSRAM : MT45W1MW16PD 6.DDR3SDRAM :MT41J128M16 7.*BCM8727* dual 10 GbE SFI-to-XAUI PHY I think U-bootloader dont have Cavium support processors.so can u consider other H/W details for finding board name. Thank u.

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[U-Boot] [RFC PATCH 1/2] nand: allow delayed initialization
by Mike Frysinger 10 Oct '10

10 Oct '10

Many people like the current nand_init() behavior where it is always initialized during boot and the flash size shown, but there are cases where we are willing to forgo this niceness for speed/functionality. So rather than change the default, introduce a delayed config option people may enable. This way the nand is only poked when someone tries to actually use it. Signed-off-by: Mike Frysinger <vapier(a)gentoo.org> --- note: i havent documented this in the README yet as i want to get feedback on the approach first common/cmd_nand.c | 2 ++ common/env_nand.c | 8 ++++++++ drivers/mtd/nand/nand.c | 9 +++++++++ include/nand.h | 5 +++++ 4 files changed, 24 insertions(+), 0 deletions(-) diff --git a/common/cmd_nand.c b/common/cmd_nand.c index f611fd7..ed3ca54 100644 --- a/common/cmd_nand.c +++ b/common/cmd_nand.c @@ -222,6 +222,8 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) if (argc < 2) goto usage; + nand_delayed_init(); + if (quiet_str) quiet = simple_strtoul(quiet_str, NULL, 0) != 0; diff --git a/common/env_nand.c b/common/env_nand.c index 99f661e..e8be67b 100644 --- a/common/env_nand.c +++ b/common/env_nand.c @@ -307,6 +307,8 @@ void env_relocate_spec (void) return use_default(); } + nand_delayed_init(); + if (readenv(CONFIG_ENV_OFFSET, (u_char *) tmp_env1)) puts("No Valid Environment Area Found\n"); if (readenv(CONFIG_ENV_OFFSET_REDUND, (u_char *) tmp_env2)) @@ -347,6 +349,8 @@ void env_relocate_spec (void) free(tmp_env1); } +#else + nand_delayed_init(); #endif /* ! ENV_IS_EMBEDDED */ } #else /* ! CONFIG_ENV_OFFSET_REDUND */ @@ -359,12 +363,16 @@ void env_relocate_spec (void) #if !defined(ENV_IS_EMBEDDED) int ret; + nand_delayed_init(); + ret = readenv(CONFIG_ENV_OFFSET, (u_char *) env_ptr); if (ret) return use_default(); if (crc32(0, env_ptr->data, ENV_SIZE) != env_ptr->crc) return use_default(); +#else + nand_delayed_init(); #endif /* ! ENV_IS_EMBEDDED */ } #endif /* CONFIG_ENV_OFFSET_REDUND */ diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/nand.c index 47d6872..42ec40a 100644 --- a/drivers/mtd/nand/nand.c +++ b/drivers/mtd/nand/nand.c @@ -81,6 +81,15 @@ void nand_init(void) { int i; unsigned int size = 0; + +#ifdef CONFIG_SYS_NAND_DELAYED_INIT + static uint8_t initialized; + if (initialized) + return; + initialized = 1; + printf("Delayed NAND init: "); +#endif + for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) { nand_init_chip(&nand_info[i], &nand_chip[i], base_address[i]); size += nand_info[i].size / 1024; diff --git a/include/nand.h b/include/nand.h index 2a81597..939b8e7 100644 --- a/include/nand.h +++ b/include/nand.h @@ -25,6 +25,11 @@ #define _NAND_H_ extern void nand_init(void); +#ifdef CONFIG_SYS_NAND_DELAYED_INIT +# define nand_delayed_init() nand_init() +#else +# define nand_delayed_init() do { } while (0) +#endif #include <linux/mtd/compat.h> #include <linux/mtd/mtd.h> -- 1.7.2.3

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[U-Boot] [PATCH 0/2] Fix tx/rx_req operations
by vkuzmichev＠mvista.com 09 Oct '10

09 Oct '10

From: Vitaly Kuzmichev <vkuzmichev(a)mvista.com> Fix bugs in tx/rx_req operations. Vitaly Kuzmichev (2): USB-CDC: Fix tx/rx_req memory leaks USB-CDC: Prevent rx_req being enqueued twice drivers/usb/gadget/ether.c | 21 ++++++++------------- 1 files changed, 8 insertions(+), 13 deletions(-) -- 1.7.2.2

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[U-Boot] [PATCH 1/2] USB: Make non-bulk delay longer in OHCI
by Marek Vasut 09 Oct '10

09 Oct '10

This fixes TIMEOUT with my Kingston 32GB USB3.0 flashdrive, which I experienced on my PXA270 (USB 1.1) Vpac270 board. Signed-off-by: Marek Vasut <marek.vasut(a)gmail.com> --- drivers/usb/host/ohci-hcd.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index 3f76c4e..d246978 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c @@ -1529,7 +1529,7 @@ int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer, if (usb_pipebulk(pipe)) timeout = BULK_TO; else - timeout = 100; + timeout = 1000; /* wait for it to complete */ for (;;) { -- 1.7.1

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[U-Boot] Question about PCIe configuration
by Carlos Roberto Moratelli 08 Oct '10

08 Oct '10

Hi, I am trying to map a PCIe peripherical on my MPC8536 custom board. I already have u-boot and linux kernel running fine on this board. The peripherical is on PCIe1 port. Compiling u-boot using debug flag I have the following log: pci_init_board: devdisr=40900, sdrs2_io_sel=7, io_sel=7 Serdes2 disalbed PCIE3: disabled PCIE1: disabled PCIE2: disabled PCI: 32 bit, 66 MHz, sync, host, arbiter (base address ffe08000) with errors. Clearing. Now 0x0b200091Outbound memory range: f0000000:100000000 PCICSRBAR @ 0xeff00000 R0 bus_start: 0 phys_start: 0 size: 8000000 R64 bus_start: 1000000000 phys_start: 0 size: 8000000 PCI reg:0 0000000c00000000:00000000f0000000 0000000010000000 00000000 PCI reg:1 0000000fffc00000:0000000000000000 0000000000010000 00000001 PCI reg:2 0000000fffe00000:00000000eff00000 0000000000100000 00000100 PCI reg:3 0000000000000000:0000000000000000 0000000008000000 00000108 PCI reg:4 0000000000000000:0000001000000000 0000000008000000 00000108 Scanning PCI bus 00 PCIE1 on bus 00 - 00 Running pci command I can see: => pci Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _____________________________________________________________ 00.00.00 0x1957 0x0050 Processor 0x20 I don't know if I am correct, but I understand that the PCIe controller identify itself. However, the PCIe peripherical was not found. Bellow, the default PCIe1 configuration to MPC8536DS target. Could something in this configuration prevent the PCIe peripherical to be found? I have CONFIG_PHYS_64BIT enabled. /* controller 1, Slot 1, tgtid 1, Base address a000 */ #define CONFIG_SYS_PCIE1_MEM_VIRT 0x90000000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE1_MEM_BUS 0xf8000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc10000000ull #else #define CONFIG_SYS_PCIE1_MEM_BUS 0x90000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0x90000000 #endif #define CONFIG_SYS_PCIE1_MEM_SIZE 0x08000000 /* 128M */ #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc10000 #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc10000ull #else #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc10000 #endif #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ Thank you. Carlos R. Moratelli

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[U-Boot] u-boot vs. Cavium 5010 pci init
by sywang 08 Oct '10

08 Oct '10

Hello, everyone, Do you know what bugs or problems there are on u-boot with Cavium CN5010 PCI init? Now I have the following on the board with Cavium CN5010. The board will hang when PCI init with the U-boot. Any suggestions are welcome. How to identify if the issue's cause is HW or SW? Thanks! Shuyou

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[U-Boot] [PATCH] include/compiler.h: remove uint typedef for __MACH__
by Andreas Bießmann 08 Oct '10

08 Oct '10

uint is typedefed twice if __MACH__ is defined. This generates an error when calling MAKEALL for netstar bord on OS X. This patch removes the typedef for __MACH__ case in favor of general definiton some lines below. Signed-off-by: Andreas Bießmann <andreas.devel(a)googlemail.com> --- include/compiler.h | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/include/compiler.h b/include/compiler.h index 23f4b83..91dbe56 100644 --- a/include/compiler.h +++ b/include/compiler.h @@ -47,7 +47,6 @@ #elif defined(__MACH__) # include <machine/endian.h> typedef unsigned long ulong; -typedef unsigned int uint; #endif typedef uint8_t __u8; -- 1.7.3

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[U-Boot] [PATCH] lib/hashtable.c: add algorithm for small buffer import
by Andreas Bießmann 08 Oct '10

08 Oct '10

This patch adds a new flag to influence the hashtable internal algorithm for creation size when importing a buffer. When importing a extremely small buffer (e.g. the default_environment) the current algorithm cuts down the size of hash table to extremely small size. In some cases this may render the device unusable until one saves the environment to non volatile memory and restarts the device. Signed-off-by: Andreas Bießmann <andreas.devel(a)googlemail.com> --- In my case i had to import 5 key/value pairs from default_environment which was about 30 byte buffer. These key/values fit in my hash table but the ethernet driver would like to setenv() another key/value which returned with error. common/env_common.c | 2 +- include/search.h | 4 +++- lib/hashtable.c | 15 ++++++++++++--- 3 files changed, 16 insertions(+), 5 deletions(-) diff --git a/common/env_common.c b/common/env_common.c index a415ef8..bd6eae4 100644 --- a/common/env_common.c +++ b/common/env_common.c @@ -188,7 +188,7 @@ void set_default_env(const char *s) } if (himport((char *)default_environment, - sizeof(default_environment), '\0', 0) == 0) { + sizeof(default_environment), '\0', H_ALG_SMALL_BUF) == 0) { error("Environment import failed: errno = %d\n", errno); } gd->flags |= GD_FLG_ENV_READY; diff --git a/include/search.h b/include/search.h index fccc757..e6cd189 100644 --- a/include/search.h +++ b/include/search.h @@ -102,5 +102,7 @@ extern int himport_r(struct hsearch_data *__htab, /* Flags for himport() / himport_r() */ #define H_NOCLEAR 1 /* do not clear hash table before importing */ - +#define H_ALG_SMALL_BUF 2 /* use another algorithm for small buffers to + calculate hashtable size. + */ #endif /* search.h */ diff --git a/lib/hashtable.c b/lib/hashtable.c index b747f1f..82a4d00 100644 --- a/lib/hashtable.c +++ b/lib/hashtable.c @@ -636,7 +636,7 @@ int himport_r(struct hsearch_data *htab, } /* - * Create new hash table (if needed). The computation of the hash + * Create new hash table (if needed). The computation of the hash * table size is based on heuristics: in a sample of some 70+ * existing systems we found an average size of 39+ bytes per entry * in the environment (for the whole key=value pair). Assuming a @@ -644,16 +644,25 @@ int himport_r(struct hsearch_data *htab, * safety margin for any existing environment definitions and still * allow for more than enough dynamic additions. Note that the * "size" argument is supposed to give the maximum enviroment size - * (CONFIG_ENV_SIZE). This heuristics will result in + * (CONFIG_ENV_SIZE). This heuristics will result in * unreasonably large numbers (and thus memory footprint) for * big flash environments (>8,000 entries for 64 KB * envrionment size), so we clip it to a reasonable value * (which can be overwritten in the board config file if * needed). + * + * But in some cases it is necessary to have another algorithm to + * get the size of hash table. Especially for extremely small buffers + * there is the flag H_ALG_SMALL_BUF which takes another factor to + * calculate the hash table size. */ if (!htab->table) { - int nent = size / 8; + int nent; + if (flag & H_ALG_SMALL_BUF) + nent = size / 2; + else + nent = size / 8; if (nent > CONFIG_ENV_MAX_ENTRIES) nent = CONFIG_ENV_MAX_ENTRIES; -- 1.7.3

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[U-Boot] [PATCH] fsl: add support for NXID v1 EEPROM format
by Timur Tabi 07 Oct '10

07 Oct '10

Freescale application note AN3638 describes an update to the NXID format, which stores MAC addresses and related data on an on-board EEPROM. The new version adds support for up to 23 MAC addresses, instead of just 8. Since the initial implementation of NXID had a "0" in the 'version' field, this new version is called "v1". Boards that are shipped with EEPROMs in the NXID v1 format should define CONFIG_SYS_I2C_EEPROM_NXID_1 instead of CONFIG_SYS_I2C_EEPROM_NXID. Signed-off-by: Timur Tabi <timur(a)freescale.com> --- board/freescale/common/sys_eeprom.c | 26 +++++++++++++++++--------- 1 files changed, 17 insertions(+), 9 deletions(-) diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index 3929ad0..7621b91 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -28,13 +28,21 @@ #include <i2c.h> #include <linux/ctype.h> +#ifdef CONFIG_SYS_I2C_EEPROM_CCID #include "../common/eeprom.h" +#define MAX_NUM_PORTS 8 +#endif -#if !defined(CONFIG_SYS_I2C_EEPROM_CCID) && !defined(CONFIG_SYS_I2C_EEPROM_NXID) -#error "Please define either CONFIG_SYS_I2C_EEPROM_CCID or CONFIG_SYS_I2C_EEPROM_NXID" +#ifdef CONFIG_SYS_I2C_EEPROM_NXID +#define MAX_NUM_PORTS 8 +#define NXID_VERSION 0 #endif -#define MAX_NUM_PORTS 8 /* This value must be 8 as defined in doc */ +#ifdef CONFIG_SYS_I2C_EEPROM_NXID_1 +#define CONFIG_SYS_I2C_EEPROM_NXID +#define MAX_NUM_PORTS 23 +#define NXID_VERSION 1 +#endif /** * static eeprom: EEPROM layout for CCID or NXID formats @@ -68,8 +76,8 @@ static struct __attribute__ ((__packed__)) eeprom { u8 res_1[21]; /* 0x2b - 0x3f Reserved */ u8 mac_count; /* 0x40 Number of MAC addresses */ u8 mac_flag; /* 0x41 MAC table flags */ - u8 mac[MAX_NUM_PORTS][6]; /* 0x42 - 0x71 MAC addresses */ - u32 crc; /* 0x72 CRC32 checksum */ + u8 mac[MAX_NUM_PORTS][6]; /* 0x42 - x MAC addresses */ + u32 crc; /* x+1 CRC32 checksum */ #endif } e; @@ -300,7 +308,7 @@ static void set_mac_address(unsigned int index, const char *string) char *p = (char *) string; unsigned int i; - if (!string) { + if ((index >= MAX_NUM_PORTS) || !string) { printf("Usage: mac <n> XX:XX:XX:XX:XX:XX\n"); return; } @@ -333,7 +341,7 @@ int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (cmd == 'i') { #ifdef CONFIG_SYS_I2C_EEPROM_NXID memcpy(e.id, "NXID", sizeof(e.id)); - e.version = 0; + e.version = NXID_VERSION; #else memcpy(e.id, "CCID", sizeof(e.id)); #endif @@ -382,8 +390,8 @@ int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) e.mac_count = simple_strtoul(argv[2], NULL, 16); update_crc(); break; - case '0' ... '7': /* "mac 0" through "mac 7" */ - set_mac_address(cmd - '0', argv[2]); + case '0' ... '9': /* "mac 0" through "mac 22" */ + set_mac_address(simple_strtoul(argv[1], NULL, 10), argv[2]); break; case 'h': /* help */ default: -- 1.7.2.3

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[U-Boot] [PATCH] powerpc/85xx: Add support for 4th PCI controller on corenet_ds
by Kumar Gala 07 Oct '10

07 Oct '10

We configure the controller but dont have virtual address space thus any devices on the 4th controller are not accessible in u-boot. Signed-off-by: Kumar Gala <galak(a)kernel.crashing.org> --- board/freescale/corenet_ds/pci.c | 28 +++++++++++++++++++++++++++- include/configs/corenet_ds.h | 8 ++++++++ 2 files changed, 35 insertions(+), 1 deletions(-) diff --git a/board/freescale/corenet_ds/pci.c b/board/freescale/corenet_ds/pci.c index 2994e36..e1bca19 100644 --- a/board/freescale/corenet_ds/pci.c +++ b/board/freescale/corenet_ds/pci.c @@ -40,10 +40,14 @@ static struct pci_controller pcie2_hose; static struct pci_controller pcie3_hose; #endif +#ifdef CONFIG_PCIE4 +static struct pci_controller pcie4_hose; +#endif + void pci_init_board(void) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - struct fsl_pci_info pci_info[3]; + struct fsl_pci_info pci_info[4]; u32 devdisr; int first_free_busno = 0; int num = 0; @@ -119,6 +123,28 @@ void pci_init_board(void) #else setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE3); /* disable */ #endif + +#ifdef CONFIG_PCIE4 + pcie_configured = is_serdes_configured(PCIE4); + + if (pcie_configured && !(devdisr & FSL_CORENET_DEVDISR_PCIE4)) { + set_next_law(CONFIG_SYS_PCIE4_MEM_PHYS, LAW_SIZE_512M, + LAW_TRGT_IF_PCIE_4); + set_next_law(CONFIG_SYS_PCIE4_IO_PHYS, LAW_SIZE_64K, + LAW_TRGT_IF_PCIE_4); + SET_STD_PCIE_INFO(pci_info[num], 4); + pcie_ep = fsl_setup_hose(&pcie4_hose, pci_info[num].regs); + printf(" PCIE4 connected to as %s (base addr %lx)\n", + pcie_ep ? "End Point" : "Root Complex", + pci_info[num].regs); + first_free_busno = fsl_pci_init_port(&pci_info[num++], + &pcie4_hose, first_free_busno); + } else { + printf (" PCIE4: disabled\n"); + } +#else + setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE4); /* disable */ +#endif } void pci_of_setup(void *blob, bd_t *bd) diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 6486869..9184eeb 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -399,6 +399,14 @@ #endif #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ +/* controller 4, Base address 203000 */ +#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull +#define CONFIG_SYS_PCIE4_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull +#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ + /* Qman/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 10 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 -- 1.7.2.3

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